2002-2012 Microchip Technology Inc. DS21421E-page 1
TC4423/TC4424/TC4425
Features
• High Peak Output Current: 3A
• Wide Input Supply Voltage Operating Range:
- 4.5V to 18V
• High Capacitive Load Drive Capability:
- 1800 pF in 25 ns
• Sho rt Delay Times: <40 n s (typ)
• Matched Rise/Fa ll Times
• Low Supply Current:
- With Logic ‘1’ Input – 3.5 mA ( Max)
- With Logic ‘0’ Input – 350 µA (Max)
• Low Output Impedance: 3.5 (typ)
• Latch-U p P rotec te d: Wi ll Withstand 1.5A Rev ers e
Current
• Logic Input Will Withstand Negative Swing Up To
5V
• ESD Protected: 4 kV
• Pin compatible with the TC1426 /TC1427/TC1428,
TC4426 /TC4 427/TC4428 and TC4426A/
TC4427A/TC4428A devices.
• Space-savi ng 8-Pin 6x5 DFN Packa ge
Applications
• Switch Mode Power Supplies
• Pulse Transformer Drive
• Line Drivers
General Description
The TC4423/TC4424/TC4425 devices are a family of
3A, dual-output buffers/MOSFET driv ers. Pin compati-
ble with the TC1426/27/28, TC4426/27/28 and
TC4426A/27A/28A dual 1.5A driver families, the
TC4423/24/25 family has an increased latch-up current
rating of 1.5A, making them even more robust for
operation in harsh electrical environments.
As MOSFE T drivers, the TC442 3/TC4424/TC 4425 ca n
easily charge 1800 pF gate capacitance in under
35 nsec , provi ding low enou gh im ped anc es in bot h the
on and off states to ensure the MOSFET's intended
state will not be affected, even by large transients .
The TC4423/TC4424/TC4425 inputs may be driven
directly from either TTL or CMOS (2.4V to 18V). In
addition, the 300 mV of built-in hysteresis provides
noise i mmun ity an d all ows the devi ce to be driv en from
slowly rising or falling waveforms.
Package Types(1)
8-Pin DFN(2)
NC
IN A
GND
IN B
2
3
45
6
7
8
1
8-Pin PDIP
1
2
3
4
NC
5
6
7
8OUT A
OUT B
NC
IN A
GND
IN B VDD
TC4423
TC4424
Note 1: Duplicate pins must both be connected for proper operation.
2: Exposed pad of the DFN pa ckage is electrically isolated.
TC4423 TC4424
NC
OUT A
OUT B
VDD
TC4423
TC4424
TC4425
NC
OUT A
OUT B
VDD 1
2
3
4
5
6
7
8
16
13
12
11
10
9
NC
IN A
NC
GND
GND
NC
IN B
NC
NC
OUT A
VDD
VDD
OUT B
OUT B
NC
OUT A
15
14
TC4423
TC4424
TC4425
16-Pin SOIC (Wide) NC
OUT A
VDD
VDD
OUT B
OUT B
NC
OUT A OUT A
VDD
VDD
OUT B
OUT B
NC
OUT A
TC4423 TC4424 TC4425
NC
TC4425
TC4425
NC
OUT A
OUT B
VDD
TC4423 TC4424
NC
OUT A
OUT B
VDD
TC4425
NC
OUT A
OUT B
VDD
3A Dual High-Speed Power MOSFET Drivers
TC4423/TC4424/TC4425
DS21421E-page 2 2002-2012 Microchip Technology Inc.
Functional Block Diagram(1)
Effective
Input C = 20 pF
(Each Input)
TC4423 Dual Inverting
TC4424 Dual Non-inverting
TC4425 One Inverting, One Non-inverting
Output
Input
GND
VDD
300 mV
4.7V
Inverting
Non-inverting
Note 1: Unused inp uts shou ld be grou nde d.
750 µA
2002-2012 Microchip Technology Inc. DS21421E-page 3
TC4423/TC4424/TC4425
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
Supply Voltage................................................................ +22V
Input Voltage, IN A or IN B
................................................(VDD + 0.3V) to (GND – 5V)
Package Power Dissipation (TA 70°C)
DFN......................................................................... Note 2
PDIP.......................................................................730 mW
SOIC.......................................................................470 mW
† Notice: Stresses above those listed under "Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational sections of this specification is not intended.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, TA = +25°C, with 4.5V VDD18V.
Parameters Sym Min Typ Max Units Conditions
Input
Logic ‘1’, High Input Voltage VIH 2.4 — — V
Logic ‘0’, Low Input Voltage VIL ——0.8V
Input Current IIN –1 — 1 µA 0VVINVDD
Output
High Output Voltage VOH VDD – 0.025 — — V
Low Ou tput Voltage VOL — — 0.025 V
Output Re si stance, High ROH —2.85IOUT = 10 mA, VDD = 18V
Output Re si stance, Low ROL —3.55IOUT = 10 mA, VDD = 18V
Peak Output Current IPK —3—A
Latch-Up Prote cti on With -
stand Reverse Current IREV — >1.5 — A Duty cycle2 %, t 300 µsec.
Switching Tim e (Note 1 )
Rise Time tR—2335nsFigure 4-1, Figure 4-2,
CL = 1800 pF
Fall Time tF—2535nsFigure 4-1, Figure 4-2,
CL = 1800 pF
Delay Time tD1 —3375nsFigure 4-1, Figure 4-2,
CL = 1800 pF
Delay Time tD2 —3875nsFigure 4-1, Figure 4-2,
CL = 1800 pF
Power Supply
Power Supply Current IS—
—1.5
0.15 2.5
0.25 mA VIN = 3V (Both inputs)
VIN = 0V (Both inputs)
Note 1: Switching times ensured by design.
2: Package power dissipation is dependent on the copper pad area on the PCB.
TC4423/TC4424/TC4425
DS21421E-page 4 2002-2012 Microchip Technology Inc.
DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE)
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, operating temperature range with 4.5V VDD18V.
Parameters Sym Min Typ Max Units Conditions
Input
Logic ‘1’, High Input Voltage VIH 2.4 — — V
Logic ‘0’, Low Input Voltage VIL ——0.8V
Input Current IIN –10 — +10 µA 0VVINVDD
Output
High Output Voltage VOH VDD – 0.025 — — V
Low Ou tput Voltage VOL ——0.025V
Output Re si stance, High ROH —3.78IOUT = 10 mA, VDD = 18V
Output Re si stance, Low ROL —4.38IOUT = 10 mA, VDD = 18V
Peak Output Current IPK —3.0—A
Latch-Up Prote cti on
Withstand Reverse Current IREV — >1.5 — A Duty cycl e2%, t 300 µsec
Switching Tim e (Note 1)
Rise Time tR—2860nsFigure 4-1, Figure 4-2,
CL = 1800 pF
Fall Time tF—3260nsFigure 4-1, Figure 4-2,
CL = 1800 pF
Delay Time tD1 — 32 100 ns Figure 4-1, Figure 4-2,
CL = 1800 pF
Delay Time tD2 — 38 100 ns Figure 4-1, Figure 4-2,
CL = 1800 pF
Power Supply
Power Supply Current IS—
—2.0
0.2 3.5
0.3 mA VIN = 3V (Both inputs)
VIN = 0V (Both inputs)
Note 1: S witching times ensured by design.
Electrical Specifications: Unless otherwise noted, all pa rameters apply with 4.5V VDD 18V.
Parameters Sym Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range (C) TA0—+70°C
Specified Temperature Range (E) TA–40 — +85 °C
Specified Temperature Range (V) TA–40 — +125 °C
Maximum Junction Temperature TJ——+150°C
Storage Temperature Range TA–65 — +150 °C
Package Thermal Resistances
Thermal Resistance, 8L-6x5 DFN JA — 33.2 — °C/W Typical four-layer board with
vias to ground plane
Thermal Resistance, 8L-PDIP JA — 125 — °C/W
Thermal Resistance, 16L-SOIC JA — 155 — °C/W
2002-2012 Microchip Technology Inc. DS21421E-page 5
TC4423/TC4424/TC4425
2.0 TYPICAL PE RFORMANCE CURVES
FIGURE 2-1: Rise Time vs. Supply
Voltage.
FIGURE 2-2: Rise Time vs. Capacitive
Load.
FIGURE 2-3: Rise and Fall Times vs.
Temperature.
FIGURE 2-4: Fall Time vs. Supply
Voltage.
FIGURE 2-5: Fall Time vs. Capacitive
Load.
FIGURE 2-6: Propagation Delay vs. Input
Amplitude.
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
4681012141618
2200 pF
100
80
60
40
20
0
1000 pF
3300 pF
1500 pF
4700 pF
470 pF
t
RISE
(nsec)
V
DD
(V)
100 1000 10,000
5V
10V
15V
100
80
60
40
20
0
t
RISE
(nsec)
C
LOAD
(pF)
Time (nsec)
32
30
28
26
24
22
20
18
-55 -35 5 25 45 65 85 105 125-15
t
FALL
t
RISE
T
A
(°C)
t
FALL
t
RISE
C
LOAD
= 2200 pF
4681012141618
100
80
60
40
20
0
1000 pF
1500 pF
4700 pF
3300 pF
2200 pF
470 pF
tFALL (nsec)
VDD (V)
100 1000 10,000
5V
10V
15V
100
80
60
40
20
0
t
FALL
(nsec)
C
LOAD
(pF)
100
80
60
40
20
Delay Time (nsec)
Input (V)
0123456789101112
t
D1
t
D2
C
LOAD
= 2200 pF
V
DD
= 10V
TC4423/TC4424/TC4425
DS21421E-page 6 2002-2012 Microchip Technology Inc.
Typical Performance Curves (Continued)
FIGURE 2-7: Propagation Delay Time vs.
Supply Voltage.
FIGURE 2-8: Quiescent Current vs.
Supply Voltage.
FIGURE 2-9: Output Resistance
(Output High) vs. Supply Voltage.
FIGURE 2-10: Propagation Delay Time vs.
Temperature.
FIGURE 2-11: Quiescent Current vs.
Temperature.
FIGURE 2-12: Output Resistance
(Output Low) vs. Supply Voltage.
50
45
40
35
30
25
20
4 6 8 1012141618
Delay Time (nsec)
V
DD
(V)
C
LOAD
= 2200 pF
t
D1
t
D2
1
0.1
0.01
4 6 8 10 12 14 16 18
Both Inputs = 1
Both Inputs = 0
V
DD
(V)
I
QUIESCENT
(mA)
T
A
= 25°C
14
12
10
8
6
4
2
4 6 8 10 12 14 16 18
Typical @
T
A
= +25
°
C
Worst Case
@ T
J
= +150
°
C
V
DD
(V)
R
DS(ON)
(Ω)
50
45
40
35
30
25
20
Delay Time (nsec)
-55 -35 -15 5 25 45 65 85 105 125
t
D2
t
D1
CLOAD = 2200 pF
TA (°C)
-55 -35 -15 5 25 45 65 85 105 125
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
Both Inputs = 1
Both Inputs = 0
TA (°C)
IQUIESCENT (mA)
14
12
10
8
6
4
2
4 6 8 1012141618
Worst Case
@ T
J
= +150°C
V
DD
(V)
Typical @
T
A
= +25°C
R
DS(ON)
(Ω)
2002-2012 Microchip Technology Inc. DS21421E-page 7
TC4423/TC4424/TC4425
Typical Performance Curves (Continued)
Note: Load on single output only
FIGURE 2-13: Su pply Cur r ent vs.
Capacitive Load .
FIGURE 2-14: Su pply Cur r ent vs.
Capacitive Load .
FIGURE 2-15: Su pply Cur r ent vs.
Capacitive Load .
FIGURE 2-16: Supply Current vs.
Frequency.
FIGURE 2-17: Supply Current vs.
Frequency.
FIGURE 2-18: Supply Current vs.
Frequency.
100 1000 10,000
60
50
40
30
20
10
0
355 kHz
200 kHz
35.5 kHz
634 kHz
CLOAD (pF)
112.5 kHz
20 kHz
63.4 kHz
V
DD
= 18V
ISUPPLY (mA)
100 1000 10,000
2 MHz
1.125 MHz
634 kHz
355 kHz
200 kHz
112.5 kHz
63.4 kHz
20 kHz
90
80
70
60
50
40
30
20
10
0
I
SUPPLY
(mA)
C
LOAD
(pF)
V
DD
= 12V
100 1000 10,000
634 kHz
355 kHz
112.5 kHz
20 kHz
2 MHz
1.125 MHz
3.55 MHz
120
100
80
60
40
20
0
C
LOAD
(pF)
I
SUPPLY
(mA)
VDD = 6V
10,000 pF
Frequency (kHz)
60
50
40
30
20
10
010 100 1000
3300 pF
100 pF
1000 pF
I
SUPPLY
(mA)
V
DD
= 18V
10,000 pF
10 100 1000
Frequency (kHz)
90
80
70
60
50
40
30
20
10
0
100 pF
3300 pF
1000 pF
I
SUPPLY
(mA)
V
DD
= 12V
10 100 1000
Frequency (kHz)
1000 pF
4700 pF
100 pF
120
100
80
60
40
20
0
10,000 pF
2200 pF
I
SUPPLY
(mA)
VDD
= 6V
TC4423/TC4424/TC4425
DS21421E-page 8 2002-2012 Microchip Technology Inc.
Typical Performance Curves (Continued)
FIGURE 2-19: TC442 3 Crossover Energy.
10-8
8
10-7
A • sec
024681012141618
6
4
2
8
6
4
2
10-9
VIN (V)
Note: The values on this graph represent the loss
seen by both drivers in a package during one
complete cycle. For a single dri ver , divide the
stated values by 2. For a single transition of a
single driver, divide the state d value by 4.
2002-2012 Microchip Technology Inc. DS21421E-page 9
TC4423/TC4424/TC4425
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE (1)
3.1 Inputs A and B
Inputs A and B are TTL/CMOS compatible inputs that
control outputs A and B, respectively. These inputs
have 300 mV of hysteresis between the high and low
input le vels, a llowing them to be dri ven from slow ri sing
and falling signals, and to provide noise immunity.
3.2 Outputs A and B
Outputs A and B are CMOS push-pull outputs that are
capable of sourcing and sinking 3A peaks of current
(VDD = 18V). The low output impedance ensures the
gate of the external MOSFET will stay in the intended
state even during large transients. These outputs also
have a reverse current latch-up rating of 1.5A.
3.3 Supply Input (VDD)
VDD is the bias su pply input for the M OSFET driver and
has a voltage range of 4.5V to 18V. This input must be
decoupled to ground with a local ceramic capacitor.
This bypass capacitor provides a localized low-
impedance path for the peak currents that are to be
provided to the load.
3.4 Ground (GND)
Ground is the device return pin. The ground pin(s)
should have a low-impedance connection to the bias
supply source return. High peak currents will flow out
the ground pin(s) when the capacitive load is being
discharged.
3.5 Exposed Metal Pad
The expo sed metal p a d of th e 6 x5 D F N package is not
internally connected to any potential. Therefore, this
pad can be connected to a ground plane or other cop-
per plane on a printed circuit board to aid in heat
removal from the package.
8-Pin PDIP 8-Pin
DFN
16-Pin
SOIC
(Wide) Symbol Description
1 1 1 NC No connection
2 2 2 IN A Input A
— — 3 NC No connection
3 3 4 GND Ground
— — 5 GND Ground
— — 6 NC No connection
4 4 7 IN B Input B
— — 8 NC No connection
— — 9 NC No connection
5 5 10 OUT B Out put B
——11OUT BOutput B
6612V
DD Supply input
——13V
DD Supply input
7 7 14 OUT A Out put A
— — 15 OUT A Output A
8 8 16 NC No connection
— PAD — NC Exposed Metal Pad
Note 1: Duplicate pins must be connected for proper operation.
TC4423/TC4424/TC4425
DS21421E-page 10 2002-2012 Microchip Technology Inc.
4.0 APPLICATIONS INFORMATION
FIGURE 4-1: Inve rting Driver Switching
Time. FIGURE 4-2: Non-invertin g Driver
Switching Time.
0.1 µF
+5V
10%
90%
10%
90%
10%
90%
18V
1µF
WIMA
MKS-2
0V
0V
TC4423
(1/2 TC4425)
1
2 CL = 1800 pF
Input
Input
Output
tD1 tFtD2
Input: 100 kHz,
square wave,
Output
tR
VDD = 18V
tRISE = tFALL 10 ns
Ceramic
90%
Input
tD1 tF
tD2
Output tR
10%
10% 10%
+5V
18V
0V
0V
90%
90%
Input: 100 kHz,
square wave,
tRISE = tFALL 10 ns
0.1 µF
1µF
WIMA
MKS-2
TC4424
(1/2 TC4425)
1
2 CL = 1800 pF
Input Output
VDD = 18V
Ceramic
2002-2012 Microchip Technology Inc. DS21421E-page 11
TC4423/TC4424/TC4425
5.0 PACKAGING INFORMATION
5.1 Package Marking Information
XXXXXXXX
XXXXXNNN
YYWW
8-Lead PDIP (300 mil) Example:
TC4423
CPA256
0420
16-Lead SOIC (300 mil) Example:
XXXXXXXXXXX
XXXXXXXXXXX
YYWWNNN
XXXXXXXXXXX
0420256
TC4423COE
8-Lead DFN Example:
XXXXXXX
XXXXXXX
XXYYWW
NNN
TC4423
EMF
0420
256
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric trac eab il ity code
Pb-free JEDEC designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC desig nator ( )
can be found on the outer packaging for this package.
Note: In the even t the full M icroc hip p art numb er canno t be mark ed on one line, it wil l
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
TC4423/TC4424/TC4425
DS21421E-page 12 2002-2012 Microchip Technology Inc.
8-Lead Plastic Dual Flat No Lead Package (MF) 6x5 mm Body (DFN-S) – Saw Singulated
Note: For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
2002-2012 Microchip Technology Inc. DS21421E-page 13
TC4423/TC4424/TC4425
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
B1
B
A1
A
L
A2
p
E
eB
c
E1
n
D
1
2
Units INCHES* MILLIMETERS
Dimension Limits MIN NOM MAX MIN NOM MAX
Number of Pins n88
Pitch p.100 2.54
Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32
Molded Pa ckag e Thickness A2 .11 5 .130 . 145 2.92 3.30 3.68
Base to Seating Plane A1 .015 0.38
Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26
Molded Pa ckag e Width E1 .24 0 .250 .260 6.10 6.3 5 6.60
Overall Length D .360 .373 .385 9.14 9.46 9.78
Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43
Lead Thickness c.008 .012 .015 0.20 0.29 0.38
Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78
Lower Lead Width B .014 .018 .022 0.36 0.46 0.56
Overall Row Spacing § eB .310 .370 .430 7.87 9.40 10.92
Mold Draft Angle Top 5 10 15 5 10 15
Mold Draft Angle Bottom 5 10 15 5 10 15
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
JEDEC Equivalent: MS-001
Drawing No. C04-018
.010” (0.254mm) per side.
§ Significant Characteristic
Note: For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
TC4423/TC4424/TC4425
DS21421E-page 14 2002-2012 Microchip Technology Inc.
16-Lead Plasti c Small Outline (SO) – Wide, 300 mil (SOIC)
Foot A ngle 048048
1512015120
Mold Draft Angle Bottom 1512015120
Mold Draft Angle Top 0.510.420.36.020.017.014BLead Width 0.330.280.23.013.011.009
c
Lead Thickness
1.270.840.41.050.033.016LFoot Length 0.740.500.25.029.020.010hChamfer Distance 10.4910.3010.10.413.406.398DOverall Length 7.597.497.39.299.295.291E1Molded Packa ge Width 10.6710.3410.01.420.407.394EOverall Width 0.300.200.10.012.008.004A1Standoff § 2.392.312.24.094.091.088A2Molded Package Thickness 2.642.502.36.104.099.093AOverall Height 1.27.050
p
Pitch 1616
n
Number of Pins MAXNOMMINMAXNOMMINDimension Limits MILLIMETERSINCHES*Units
L
c
h
45
1
2
D
p
n
B
E1
E
A2
A1
A
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Eq uiva l ent: MS-013
Drawing No. C04-102
§ Significant Characteristic
Note: For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
2002-2012 Microchip Technology Inc. DS21421E-page 15
TC4423/TC4424/TC4425
6.0 REVISION HISTORY
Revision E (December 2012)
Added a note to each package outline drawing.
TC4423/TC4424/TC4425
DS21421E-page 16 2002-2012 Microchip Technology Inc.
2002-2012 Microchip Technology Inc. DS21421E-page 17
TC4423/TC4424/TC4425
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Sales and Support
Device: TC4423: 3A Dual MOSFET Driver, Inverting
TC4424: 3A Dual MOSFET Driver, Non-Inverting
TC4425: 3A Dual MOSFET Driver, Complementary
Temperature Range: C = 0°C to +70°C (PDIP & SOIC Only)
E = -40°C to +85°C
V = -40°C to +125°C
Package: MF = Dual, Flat, No-Lead (6x5 mm Body), 8-lead
MF713 = Dual, Flat, No-Lead (6x5 mm Body), 8-lead
(Ta pe and Ree l)
OE = SOIC (Wide), 16-pin
OE713 = SOIC (Wide), 16-pin (Tape and Reel)
PA = Plastic DIP, (300 mil body), 8-lead
PB Free: G = Lead-Free device *
= Blank
* Available on selected packages. Contact your local sales
representative for availability.
Examples:
a) TC4423COE: 3A Dual Inverting
MOSFET Driver,
0°C to +70°C,
16LD SOIC package.
b) TC4423CPA: 3A Dual Inverting
MOSFET Driver,
0°C to +70°C,
8LD PD I P packa ge .
c) TC4423VMF: 3A Dual Inverting
MOSFET Driver,
-40°C to +125°C,
8LD DFN package.
a) TC4424COE713: 3A Dual Non-Inverting,
MOSFET Driver,
0°C to +70°C,
16LD SOIC package,
Tape and Reel.
b) TC4424EPA: 3A Dual Non-Inverting,
MOSFET Driver,
-40°C to +85°C,
8LD PD I P packa ge .
a) TC4425EOE: 3A Dual Complementary,
MOSFET Driver,
-40°C to +85°C,
16LD SOIC package.
b) TC4425CPA: 3A Dual Complementary,
MOSFET Driver,
0°C to +70°C,
PDIP package.
PART NO. XXX
PackageTemperature
Range
Device
XXX
Tape & Reel
X
PB Free
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and
recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1. Your local Microchip sales office
2. The Microchip Worldwide Site (www.micr ochip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
Customer Notification System
Register on our web site (www.microchip.com /cn) to receive the most current information on our products.
TC4423/TC4424/TC4425
DS21421E-page 18 2002-2012 Microchip Technology Inc.
NOTES:
2002-2012 Microchip Technology Inc. DS21421E-page 19
Information contained in this publication regarding device
applications a nd the lik e is provided only f or yo ur convenience
and may be supers ed ed by u pda t es . It is y our responsibil it y to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SS T Logo, SuperFlash
and UNI/O are registered trademarks of Microchip T echnology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONIT OR, FanSense, HI-TIDE, In-Circuit Serial
Programm ing, ICSP, Mindi, MiWi, MPAS M, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip T echnology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germ any II GmbH & Co . & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2002-2012, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620767962
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure famili es of its kind on t he market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is c onstantly evolving. We a t Microc hip are co m mitted to continuously improving the code prot ect ion featur es of our
products. Attempts to break Microchip’ s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperiph erals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT S
YSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
DS21421E-page 20 2002-2012 Microchip Technology Inc.
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11/27/12
