November 2008
Revision: EB24_01.4
LatticeSC™ PCI Express x1 Evaluation Board
User’s Guide
2
LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Introduction
This user’s guide describes the LatticeSC PCI Express x1 Evaluation Board featuring the LatticeSC LFSCM3GA25
device in a 900 fpBGA package. The stand-alone evaluation PCB provides a functional platform for development
and rapid prototyping of applications that require high-speed SERDES interfaces to PCI Express protocols.
The evaluation board includes provisioning to connect high-speed SERDES channels via SMA connectors to test
and measurement equipment. The board is manufactured using standard FR4 dielectric and through-hole vias. The
nominal impedance is 50-ohm for single-ended traces and 100-ohm for differential traces.
The board has several debugging and analyzing features for complete evaluation of the LatticeSC device. This
user’s guide is intended to be referenced in conjunction with evaluation design tutorials to demonstrate the Lat-
ticeSC FPGA.
Figure 1. LatticeSC PCI Express x1 Evaluation Board
Features
• Four SERDES high-speed channels interfaced to SMA test points and clock connections SERDES interface to
x1 PCI Express edge fingers
• RJ-45 interface for Ethernet
• QDR2 and RLDRAMII memory devices
• SFP Transceiver cage and associated interface
• SATA-like connections to SERDES channels
• Power connections and power sources
• ispVM
®
programming support
• On-board and external reference clock sources
– Interchangeable clock oscillators
– On-board reference clock management
• ORCAstra Demonstration Software interface via standard ispVM JTAG connection
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Lattice Semiconductor Evaluation Board User’s Guide
• RS-232 Communications Port
• Logic analyzer connection
• Liquid Crystal Display interface connection
• User-defined input and output points
• SMA connectors included for high-speed clock or data interfacing
• Performance monitoring via test headers, LEDs and switches
The contents of this user’s guide include top-level functional descriptions of the various portions of the evaluation
board, descriptions of the on-board connectors, diodes and switches and a complete set of schematics of the
board. Figure 2 shows the functional partitioning of the board.
Figure 2. LatticeSC PCI Express x1 Evaluation Board Block Diagram
Additional Resources
For additional information and resources related to this board, including updated documentation and software
demos, please see the Lattice web site at: www.latticesemi.com/boards, and navigate to the appropriate page for
this board.
Lattice makes its best effort to provide evaluation board designs to help users with evaluation and development.
However it remains the user's responsibility to verify proper and reliable operation of Lattice products in their end
application by consulting documentation provided by Lattice. Differences in component selection and/or PCB layout
in the user's application may significantly affect circuit performance and reliability.
SC15/SC25
900 fpBGA
FlxMac
RIGHT
LEFT
FlxMac
BOTTOM
X1 PCIe
Fingers
1Gbe-SFP
National
PHY
RJ-45
RS-232
2x5 COM
10/100/1000
QDR2
Flash
Osc
SGMII
SATA-Host
JTAG
Orcastra
magnetics
Power Regulation
12V Edge Fingers
12V WallWart
Terminal Block
x1 PCI Express Driver
Platform Board
for LatticSC
900 fpBGA Devices
Config
Status & Control
Backpanel Slot
Backpanel Slot
PCI Clk
PLL
*1.25
SATA-Target
Testpoints
LEDs
Switches
Osc
Clock Control
I2C
EE
PROM
Maxim
6692
PTEMP
SERDES
Loop
SERDES
SMAs
Osc
REFCLK-RIGHT
REFCLK-LEFT 100MHz
Differential
Trace
Loops
RLDRAM2
LVDS
SMAs
18-bit
18-bit
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LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Figure 3. LatticeSC PCI Express x1 Evaluation Board, Top View
LatticeSC Device
This board features a LatticeSC FPGA with a 1.2V core supply. It can accommodate all pin compatible LatticeSC
devices in the 900-ball fpBGA (1mm pitch) package. A complete description of this device can be found in the Lat-
ticeSC Family Data Sheet on the Lattice web site at www.latticesemi.com.
Note: The connections referenced in this document refer to the LFSCM3GA25EP1-XXF900 device. Available I/Os
and associated sysIO™ banks may differ for other densities within this device family.
Applying Power to the Board
The LatticeSC PCI Express x1 Evaluation Board is ready to power on. The board can be supplied with power from
an AC wall-type transformer power supply shipped with the board or it can be supplied from a bench top supply via
terminal screw connections. It also has provisions to be supplied from the PCI Express edge fingers from a host
board.
To supply power from the factory-supplied wall transformer, simply connect the output connection of the power cord
to J6 and plug the wall transformer into an AC wall outlet.
Power Supplies
(see Appendix A, Figure 6)
The evaluation board incorporates an alternate scheme to provide power to the board. The board is equipped to
accept a main supply via the TB1 connection. This connection is provided to use with a bench top supply adjusted
to provide a nominal 12V DC.
All input power sources and on-board power supplies are fused with surface mounted fuses and have green LEDs
to indicate power GOOD status of the intermediate supplies
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LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Table 1. Board Power Supply Fuses (see Appendix A, Figure 6)
Table 2. Board Power Supply Indicators (see Appendix A, Figure 6)
Table 3. Board Supply Disconnects (see Appendix A, Figure 7)
PCI Express Power Interface
Power can be sourced to the board via the PCB edge-finger (CN1). This interface allows the user to provide power
from a PCI Express host board.
VCC Core Selection
(see Appendix A, Figure 6)
The VCC core can be selected on the board to be either 1.0V or 1.2V using J7.
A jumper shunt placed between pin 1 and pin 2 will connect 1.0V. A jumper shunt between pin 2 and pin 3 will con-
nect 1.2V.
Programming/FPGA Configuration
(see Appendix A, Figure 5)
A programming header is provided on the evaluation board, providing access to the LatticeSC JTAG port.
Important Note:
The board must be un-powered when connecting, disconnecting, or reconnecting the ispDOWN-
LOAD Cable. Always connect the ispDOWNLOAD Cable's GND pin (black wire), before connecting any other JTAG
pins. Failure to follow these procedures can in result in damage to the LatticeSC FPGA device and render the
board inoperable.
An ispDOWNLOAD
®
Cable is included with this board and also with each ispLEVER
®
design tool shipment. Cables
may also be purchased separately from Lattice.
F1 1.0V/1.2V Core Fuse
F2 1.5V Fuse
F3 3.3V Fuse
F4 1.2V Fuse
F5 2.5V Fuse
F6 1.8V Fuse
D6 2.5V Source Good Indicator
D7 3.3V Source Good Indicator
D8 1.0V/1.2V VCC Core Source Good Indicator
D9 1.5V Source Good Indicator
D10 1.8V Source Good Indicator
D11 1.2V Source Good Indicator
D12 12V Input Good Indicator
TB1
Screw Terminal for 12V DC
Pin 1 (Square PCB Pad) = 12V DC
Pin 2 = Ground
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LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
ispVM Download Interface
J3 is an 10-pin JTAG connector used in conjunction with the ispVM USB download cable to program and control
the device. Connections to the cable typically consist of Pin[1:2:3:6:7:8]. The other pins are considered optional
and are not required to be connected for standard operation.
Table 4. ispVM JTAG Connector (see Appendix A, Figure 5)
Download Procedures
Requirements
• PC with ispVM System v.16.0 (or later) programming management software, installed with appropriate drivers
(USB driver for USB Cable, Windows NT/2000/XP parallel port driver for ispDOWNLOAD Cable). The latest
ispVM System software can be downloaded from the Lattice web site at www.latticesemi.com/ispvm.
Note: An option to install these drivers is included as part of the ispVM System setup.
• ispDOWNLOAD Cable
JTAG Download
The LatticeSC device can be configured easily via its JTAG port. The device is SRAM-based; it must remain pow-
ered on to retain its configuration when programmed in this fashion.
1. Connect the ispDOWNLOAD cable to the appropriate header. J3 is used for the 1x10 cable. Connections to J3
use only pins[1-3][6-8].
2. Connect the LatticeSC PCI Express x1 evaluation board to the appropriate power sources and power up
board.
3. Start the ispVM System software.
Pin 1 VCC
Pin 2 TDO
Pin 3 TDI
Pin 4 PROGRAMN
1
Pin 5 NC
Pin 6 TMS
Pin 7 GND
Pin 8 TCK
Pin 9 DONE
1
Pin 10 INITN
1
1. Optional pins.
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LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
4. Press the
SCAN
button located in the toolbar. The LatticeSC device is automatically detected.
5. Double-click the device to open the device information dialog. In the device information dialog, click the
Browse
button located under
Data File
. Locate the desired bitstream file (.bit). Click
OK
to both dialog boxes.
6. Click the green
GO
button. This will begin the download process into the device. Upon successful download,
the device will be operational.
Configuration Status Indicators
(see Appendix A, Figure 5)
These LEDs indicate the status of configuration to the FPGA.
• D2 (RED) illuminated: This indicates that the programming was aborted or reinitialized driving the INITN output
low.
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LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
• D5 (GREEN) is illuminated: This indicates the successful completion of configuration by releasing the open col-
lector DONE output pin.
• D1 (GREEN) will flash indicating TDI activity.
• D4 (RED) illuminated: This indicates that PROGRAMN is low.
• D3 (RED) illuminated: This indicates that GSRN is low.
PROGRAMN and GSRN
(see Appendix A, Figure 5)
These push-button switches assert/de-assert the logic levels on the PROGRAMN (SW3) and GSRN (SW2).
Depressing the button drives a logic level “0” to the device.
Bank1 VCCIO
(see Appendix A, Figure 6)
VCCIO1 can be selected on the board to be either 3.3V or 2.5V using J5.
A jumper shunt placed between pin 1 and pin 2 will connect 2.5V. A jumper shunt between pin 2 and pin 3 will con-
nect 3.3V.
On-Board Flash Memory
(see Appendix A, Figure 5)
Two memory devices (U2 and U3) are on-board for non-volatile configuration memory storage. These two devices
occupy the same Flash slot on the board. U2 can be populated with an 8M or smaller 8-pin SOIC device. U3 can be
used in place of U2 with a 16-pin TSSOP 64M Flash device. This is the factory supplied Flash memory configura-
tion. U4 is always supplied as an 8M Flash device. SW1 is used to control the selection of the Flash memory to be
accessed.
Refer to Lattice technical note TN1100,
SPI Serial Flash Programming Using ispJTAG™ on LatticeSC FPGAs
for
recommended procedures and software usage. To use both SPI Flash devices to program the LatticeSC device,
the user must write to the Flash devices individually. This is accomplished by setting SW1 accordingly. Writing to
Flash #1(U2 OR U3), close 3 and 5 switch positions (ON) and open all others. Writing to Flash #2(U4), close 2 and
4 switch positions (ON) and open all others. For reading from the Flash devices individually, use the same switch
settings as described for writing. For reading from both Flash devices in cascading format, close switch positions
(1, 3, 4, 5, 8).
FPGA Clock Management
(see Appendix A, Figures 10 and 11)
The evaluation board includes various features for generating and managing on-board clocks. The clocks are gen-
erated from either input provided from SMAs (see Table 5) or from crystal oscillators (Y1 and Y4). Y1 and Y4 are
socketed for interchangeability. Y2 and Y5 are 321.25MHz surface-mounted oscillators. The Y3 oscillator is fanned
out around U1 for reference clocks with a fan-out buffer IC.
Y1 and Y4 can be a 4-pin DIP type oscillator like Connor-Winfield XO-400 series.
Clock oscillators are selected per quad. Y1 and Y2 can source a clock to the Right SERDES Quads. Y4 and Y5 can
source a clock to the Left SERDES Quad. The user needs to select the appropriate oscillator by placing jumper
shunts on J20 and/or J22 for the Left reference clock source or J25 and/or J28 for the Right reference clock source.
The selection of these clock sources is dependent on the selection pins of the clock multiplexers. The mux select
pins are driven from the FPGA and will need to be driven according to the needs of the user design. The following
table defines the selection of the clock sources.
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LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Table 5. Clock Source Selection (see Appendix A, Figures 5 and 10)
When using FPGA control, 3.3V VCCIO must be used in bank 1. Refer to Bank1 VCCIO section of this document.
Table 6. Clock Input SMA (see Appendix A, Figure 10)
The clocks sources are fanned-out across the board to several destinations. These clocks are all differential and
must be used accordingly. These include SERDES reference clocks, PLL, and primary clock inputs.
Table 7. Clock Distribution (see Appendix A, Figure 11)
The clocks are also driven to SMA connections for driving off-board.
Table 8. Clock Output SMAs (see Appendix A, Figure 11)
SERDES Reference Clock
The 50-ohm terminated SMA connectors are provided the supply reference clocks directly to the LatticeSC device
from the clock management device. This device will drive clocks to both SERDES quads via 100-ohm LVDS signal-
ing. On-board clock oscillators mentioned in the previous sections can be chosen to drive the same SERDES refer-
ence clocks. Also the board can be provisioned to source the clock from the PCI Express edge-fingers directly to
FPGA input pins.
Both of these input clock sources are routed through clock management devices allowing for clock source selection
from a SMA input connector. This is accomplished by using the MUX selector driven by the FPGA output.
BGA-A19 BGA-A20 Right Clock Source Left Clock Source
L L SMA SMA
H H Oscillator Oscillator
Pin is low when open/float. FPGA general purpose I/O must be driven to
control the mux selection.
SMA Signal
J29 SMA Reference + Input to Left Quad
J30 SMA Reference - Input to Left Quad
J23 SMA Reference + Input to Right Quad
J24 SMA Reference - Input to Right Quad
Clock Net BGA Clock Destination
FPGA_REFCLKP_L P8 PCLKT7_2
FPGA_REFCLKN_L R8 PCLKC7_2
FPGA_REFCLKP_R AD26 LRC_PLLB_T
FPGA_REFCLKN_R AC25 LRC_PLLB_C
A_REFCLKP_L B1 SERDES[360]
A_REFCLKN_L C1 SERDES[360]
A_REFCLKP_R B30 SERDES[3e0]
A_REFCLKN_R C30 SERDES[3e0]
Net Name SMA SMA
EXTCLOCK_L J31 J32
EXTCLOCK_R J33 J34
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LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
SERDES Channels
SMA Connections
(see Appendix A, Figure 5)
DC coupled top-mounted SMA connectors connect to the two SERDES TX and RX channels. These pins are
directly coupled to the designated SMA connector creating a path for both input and output differential data.
Table 9. SERDES Connectors (see Appendix A, Figure 8)
SERDES SFP Transceiver Interface
(see Appendix A, Figure 8)
A small form-factor pluggable (SFP) transceiver cage is included for evaluation of SFP specific protocols. The PCB
includes the appropriate power and high-speed circuitry needed for the SFP standard transceiver.
Table 10. SFP Connections to SERDES Pins (see Appendix A, Figure 5)
Table 11. SFP Control and Status Connections to FPGA
SERDES SATA Channels
(see Appendix A, Figure 8)
AC-coupled connections are included to attach SATA type cables to SERDES channels for board-to-board or loop-
back purposes. The connectors are configured using the 7-pin SATA specifications.
SMA Channel Name
900-Ball
fpBGA SMA Channel Name
900-Ball
fpBGA
J13 A_HDINP1_LEFT B6 J10 A_HDOUTP1_LEFT A6
J15 A_HDINN1_LEFT B5 J12 A_HDOUTN1_LEFT A5
J9 A_HDINP2_LEFT B7 J14 A_HDOUTP2_LEFT A7
J11 A_HDINN2_LEFT B8 J16 A_HDOUTN2_LEFT A8
SFP RX Channel Name
900-Ball
fpBGA SFP TX Channel Name
900-Ball
fpBGA
RD+ A_HDINP0_RIGHT B28 TD+ A_HDOUTP0_RIGHT A28
RD- A_HDINN0_RIGHT B27 TD- A_HDOUTN0_RIGHT A27
SFP Pin
900-Ball
fpBGA SFP Pin
900-Ball
fpBGA
TxFault A15 ModeDef0 E15
TxDis C13 ModeDef1 D15
LOS G15 ModeDef3 C14
RateSel F15
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LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Table 12. SERDES to SATA Connections
SERDES PCI Express Channels
(see Appendix A, Figure 8)
This board is equipped to communicate directly as an add-on card to a PCI Express host. It is designed with edge-
fingers (CN1) to fit directly into an x1 host receptacle. Power can be supplied directly from the PCI Express host via
the edge-finger connections.
Table 13. SERDES to PCI Express Connections
FPGA Test Pins
(see Appendix A, Figure 15)
General purpose FPGA pins are available for user applications. FPGA pins are connected to SW4 DIP switch. This
switch is used for static settings to FPGA input pins. The pins must be set to LVCMOS18 buffer types and are exter-
nally pulled up when the switch is open and driven low when the switch is set to “ON” or closed.
General purpose outputs are connected to LEDs for observing output status of pins. The FPGA output buffers
should be LVCMOS18 and will illuminate the LED when driving a “1” and the LED will be off when driving a “0” or
when not used.
Table 14. FPGA Test Pins (see Appendix A, Figure 15)
CN1 Pin SERDES Pin
900-Ball
fpBGA CN2 Pin SERDES Pin
900-Ball
fpBGA
1__ GND 1 __ GND
2 A_HDOUTP1_R A25 2 A_HDINP2_R B24
3 A_HDOUTN1_R A26 3 A_HDINN2_R B23
4 __ GND 4 __ GND
5 A_HDINP1_R B25 5 A_HDOUTP2_R A24
6 A_HDINN1_R B26 6 A_HDOUTN2_R A23
7 __ GND 7 __ GND
PCI Express
Pin
PCI Express
Signal SCM Device Pin
900-Ball
fpBGA
B14 PETp0 A_HDINP0_L B3
B15 PETn0 A_HDINN0_L B4
A16 PERp0 A_HDOUTP0_L A3
A17 PERn0 A_HDOUTN0_L A4
A13 Refclk+ FPGA URC_A PLL Input+ D28
A14 Refclk- FPGA URC_A PLL Input+ E28
Switch BGA Netname LED 900-Ball fpBGA NetName LED Color
SW4A G28 Switch1 D15 H26 LED1 Red
SW4B F28 Switch2 D16 G26 LED2 Yellow
SW4C L25 Switch3 D17 D29 LED3 Green
SW4D L26 Switch4 D18 D30 LED4 Blue
SW4E E29 Switch5 D19 K25 LED5 Red
SW4F E30 Switch6 D20 K26 LED6 Yellow
SW4G J28 Switch7 D21 H30 LED7 Green
SW4H H28 Switch8 D22 K30 LED8 Blue
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LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Test SMA Connections
General-purpose FPGA pins are available via SMA test connections. These connections are designed to permit
evaluations of several types of FPGA I/O buffers. The use of several termination schemes permits easy interfaces
for the type of buffer.
Table 15. Test SMA Connections for FPGA Pins (see Appendix A, Figure 16)
High Speed Test Point
DP2
(see Appendix A, Figure 15 and 16)
General-purpose FPGA pins are available via a differential test pad. These connections allow a high-impedance
probe to measure the performance of a coupled-differential output buffer pair.
Table 16. Differential I/O Test Point
Logic Analysis Connection
LA1
(see Appendix A, Figure 15 and 16)
Agilent single-ended probes designed for connection to the supplies Tyco/AMP’s 2-767004-2 MICTOR connector
can be easily attached for signal bus analysis. Connections to general-purpose I/O pins are provided to the board
ready 38-pin MICTOR connector.
SMA
Designation Name
SCM25
Signal
900-Ball
fpBGA
Termination
Description
Termination
Resistor(s)
J37 LVDS_INP PR52A AB28 None —
J39 LVDS_INN PR52B AC28 None —
J38 LVDS_OUTP0 PR35A M29 100-ohm
Differential R275
J40 LVDS_OUTN0 PR35B N30 100-ohm
Differential R275
Probe
True
Probe
Compliment
100-ohm
Differential Resistor
AF30 AG30 R274
Table 17. Logic Analyzer Connections
MICTOR Pin Signal 900-Ball fpBGA MICTOR Pin Signal 900-Ball fpBGA
5LA_CLK1 AJ1 6 LA_CLK2 AF4
7 LA_0 AG3 8 LA_16 AH13
9 LA_1 AH2 10 LA_17 AK8
11 LA_2 AD8 12 LA_18 AK9
13 LA_3 AF7 14 LA_19 AH14
15 LA_4 AJ7 16 LA_20 AG14
17 LA_5 AJ8 18 LA_21 AK10
19 LA_6 AH10 20 LA_22 AK11
21 LA_7 AH11 22 LA_23 AH15
23 LA_8 AF13 24 LA_24 AG15
25 LA_9 AE14 26 LA_25 AH12
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Lattice Semiconductor Evaluation Board User’s Guide
RS-232 Interface
J36
(see Appendix A, Figures 5 and 16)
A simple 2x5 Header provides a connection to create a RS-232 serial communications port. The connection
includes the proper level shift needed to connect to a serial port of a PC. The RX and TX pins are connected to the
FPGA.
Table 18. RS-232 TX/RX
LCD Interface
J41
(see Appendix A, Figures 5 and 16)
A 2x8 Header provides a connection to 16-character x 2 line LCD modules such as Varitronix VDM16265. A ribbon
cable connection will allow attachment to the connector. The board includes two variable resistors for LCD adjust-
ments. VR1 adjusts the backlight and VR2 provides contrast adjustment. A user design must be included in the
FPGA to drive this feature.
I
2
C Interface
(see Appendix A, Figures 5 and 16)
I
2
C interface is supplied between the FPGA and two ICs. This interface is used to access a Maxim temperature
sensing device as well as a EEPROM. The temperature-sensing device is also connected back to the FPGA via the
PTEMP pins to monitor device temperature.
Table 19. I
2
C Interface
Ethernet Interface
(see Appendix A, Figures 5 and 13)
Interconnection to Base 10/100/1000 Ethernet protocols is supported via a RJ-45 connection (J35). This connec-
tion is electrically interfaced to the FPGA through a tri-speed PHY device. Use of this interface requires a MAC
27 LA_10 AK6 28 LA_26 AJ13
29 LA_11 AK7 30 LA_27 AD15
31 LA_12 AF14 32 LA_28 AE15
33 LA_13 AF15 34 LA_29 AK12
35 LA_14 AJ11 36 LA_30 AK13
37 LA_15 AG13 38 LA_31 AJ14
Signal 900-Ball fpBGA Buffer Type
RS232-RXD F13 LVCMOS25
RS232-TXD F12 LVCMOS25
Signal 900-Ball fpBGA Buffer Type
SCL B11 LVCMOS25 or LVTTL33
SDA B12 LVCMOS25 or LVTTL33
Table 17. Logic Analyzer Connections (Continued)
MICTOR Pin Signal 900-Ball fpBGA MICTOR Pin Signal 900-Ball fpBGA
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Lattice Semiconductor Evaluation Board User’s Guide
design to be included in the FPGA. The board includes two status LEDs to indicate Base 10 or Base 100 link.
LED(D13) is a green LED which will light to indicate a Base100 link and LED(D14) indicates an established Base
10 link. LED indicators on the RJ-45 connector will indicate activity and Base 1000 link status. Table 20 defines the
pinout between the FPGA and PHY device.
Table 20. LatticeSC FPGA to Ethernet PHY Connections
QDR2 Memory Interface
(see Appendix A, Figures 12 and 15)
Interconnection to a Cypress CY7C1413AV18-2Mx18 QDR2 SRAM memory device is supplied on board. It
includes the proper termination and interface requirements needed to operate at speed.
Signal
900-Ball
fpBGA
ETH_TX_D0 D3
ETH_TX_D1 D2
ETH_TX_D2 J6
ETH_TX_D3 J5
ETH_TX_D4 E3
ETH_TX_D5 E2
ETH_TX_D6 K4
ETH_TX_D7 J4
ETH_RX_D0 F3
ETH_RX_D1 G3
ETH_RX_D2 K5
ETH_RX_D3 K6
ETH_RX_D4 F2
ETH_RX_D5 F1
ETH_RX_D6 E1
ETH_RX_D7 D1
ETH_CRS K3
ETH_COL L3
ETH_RX_CLK L6
ETH_RX_DV M6
ETH_TX_EN J1
ETH_TX_CLK K1
ETH_GTX_CLK L1
ETH_CLK_TO_MAC M1
Table 21. QDR2 Memory Interface Pinouts
NetName FPGA Ball NetName FPGA Ball NetName FPGA Ball
A_0 T30 Q_0 AG29 D_0 AK16
A_1 W28 Q_1 AG28 D_1 AK17
A_2 U26 Q_2 AH30 D_2 AJ16
A_3 U28 Q_3 AJ30 D_3 AJ17
A_4 M30 Q_4 AH29 D_4 AE16
A_5 R29 Q_5 AJ29 D_5 AH16
A_6 P29 Q_6 AE25 D_6 AG16
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Lattice Semiconductor Evaluation Board User’s Guide
RLDRAM-II Memory Interface
(see Appendix A, Figures 14 and 15)
Interconnection to a Micron MT49H16M18CFM-25 SDRAM memory device is supplied on board. It includes the
proper termination and interface requirements needed to operate at speed.
Table 22. LatticeSC FPGA to On-board SDRAM Connections
A_7 P27 Q_7 AH28 D_7 AK18
A_8 N29 Q_8 AJ28 D_8 AK19
A_9 N28 Q_9 AE22 D_9 AH17
A_10 R25 Q_10 AK29 D_10 AH18
A_11 R28 Q_11 AK28 D_11 AG17
A_12 N27 Q_12 AH21 D_12 AJ18
A_13 L30 Q_13 AH23 D_13 AJ19
A_14 J30 Q_14 AH22 D_14 AK20
A_15 M26 Q_15 AG22 D_15 AK21
A_16 G29 Q_16 AG21 D_16 AF18
A_17 F29 Q_17 AF21 D_17 AG18
R_N AA30
W_N Y30
CQ AK24
K AJ20
K_N AJ21
NetName
900 Ball
fpBGA NetName
900 Ball
fpBGA NetName
900 Ball
fpBGA NetName
900 Ball
fpBGA
A_0 AH4 D_0 V2 Q_0 V1 BA_0 AJ2
A_1 AG5 D_1 W2 Q_1 U5 BA_1 AK2
A_2 AF8 D_2 V5 Q_2 U4 BA_2 AD7
A_3 AG8 D_3 V4 Q_3 T4 CS_N AH1
A_4 AH3 D_4 Y1 Q_4 T5 DM AJ12
A_5 AJ3 D_5 AA1 Q_5 U1 QK AC7
A_6 AF9 D_6 Y2 Q_6 T1 QVLD N3
A_7 AE10 D_7 AA2 Q_7 V3 DK AC4
A_8 AK3 D_8 Y3 Q_8 U3 DK_N AD4
A_9 AJ4 D_9 W3 Q_9 T6 CK AC3
A_10 AE11 D_10 AB1 Q_10 U2 CK_N AD3
A_11 AF10 D_11 AC1 Q_11 T2
A_12 AH7 D_12 W5 Q_12 R4
A_13 AH8 D_13 Y5 Q_13 R1
A_14 AE12 D_14 Y6 Q_14 P1
A_15 AE13 D_15 AD2 Q_15 R2
A_16 AK4 D_16 AE2 Q_16 P4
A_17 AK5 D_17 AB5 Q_17 P3
Table 21. QDR2 Memory Interface Pinouts (Continued)
NetName FPGA Ball NetName FPGA Ball NetName FPGA Ball
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Ordering Information
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Revision History
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their respective holders. The specifications and information herein are subject to change without notice.
A_18 AJ5
A_19 AJ6
Description Ordering Part Number
China RoHS Environment-Friendly
Use Period (EFUP)
LatticeSC PCI Express x1 Evaluation Board LFSC25E-P1-EV
Date Version Change Summary
October 2006 01.0 Initial release.
December 2006 01.1 Includes new SERDES schematic in Appendix A.
March 2007 01.2 Added Ordering Information section.
April 2007 01.3 Added important information for proper connection of ispDOWNLOAD
(Programming) Cables.
November 2008 01.4 Updated FPGA Clock Management text section.
Updated Clock Source Selection table.
Updated Clock Input SMA table.
Updated 10/100/1000 PHY schematic.
NetName
900 Ball
fpBGA NetName
900 Ball
fpBGA NetName
900 Ball
fpBGA NetName
900 Ball
fpBGA
10
17
LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Appendix A. Schematic
Figure 4. Cover Page
5
5
4
4
3
3
2
2
1
1
DD
C C
BB
A A
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Cover Page
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Board will meet PCI Express Electromechanical
Specification Rev 1.0
Add-in card form factor for standard height and full length
4.376" Height x 9.5" Length
LatticeSC-900fpBGA
X1 PCI Express Platform
Evaluation Board
18
LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Figure 5. Configuration/Top Bank
5
5
4
4
3
3
2
2
1
1
DD
C C
BB
A A
Q_0
WRITE_PROT_N
Q_1
SCSN_1
FLASH_DIS
MPIIRQN
SCSN_0
SCSN
TCK
LOCAL_TDI
LOCAL_TCK
TDI
LOCAL_TMS
PROGRAMN
TMS
TDO
TDO
TMS
INITN
DONE
M1
M2
M3
CS0N
WRN
CS1
RDCFGN
SCSN
INITN
DONE
DONE
INITN
FLASH_DIS
CS1
WRN
CS0N
SCSN_0
SCSN_1
WRITE_PROT_N
FLASH_DIS
M0
TDI
TMS
TCK
GSRN
TDO
PROGRAMN
CCLK
SCSN_0
DATA0
DATA1
Q_0
Q_1
Q_0
FLASH_DIS
WRITE_PROT_N
WRITE_PROT_N
GSRN
PROGRAMN
PROGRAMN
GSRN
SCK
SI
M0
M1
M2
M3
SI
SCK
RDCFGN
TCK
TDI
MPIIRQN
DATA1
DATA0
ETH_MDIO
ETH_MDC
ETH_TX_ER
ETH_RX_ER
ETH_RESET_N
ETH_MAC_CLK_EN
LCD_R/W
LCD0
LCD_DB0LCD1
LCD_DB2LCD2
LCD_DB4LCD3
LCD_DB6
LCD4
LCD_E
LCD6
LCD_RSLCD5
LCD_DB1LCD7
LCD_DB3LCD8
LCD_DB5
LCD9
LCD_DB7LCD10
LCD[0..10]
ETH_EGP5
ETH_EGP6
ETH_EGP4
ETH_EGP7
ETH_EGP2
ETH_EGP3
ETH_EGP0
ETH_EGP1
3_3V
3_3V
3_3V
3_3V
3_3V
3_3V
3_3V
2_5V
3_3V 3_3V
3_3V
2_5V
3_3V
2_5V
2_5V
2_5V
3_3V
2_5V2_5V
3_3V
2_5V
PCIE_PERSTN[5]
PCIE_SMCLK
[5]
PCIE_SMDAT
[5]
PCIE_WAKEN
[5]
PTEMP[13]
PCIE_PERSTN
[5]
RS232_RXD[13]
SDA
[13]
SCL[13]
RS232_TXD
[13]
OSC_IN_1[7]
ETH_MDIO[10]
ETH_MDC
[10]
SFP_LOS[5]
SFP_TXDIS
[5]
SFP_MODDEF2[5]
SFP_MODDEF1[5]
SFP_MODDEF0[5]
SFP_TXFAULT[5]
SFP_RATESEL[5]
CLOCK_CTRL_L[7]
CLOCK_CTRL_R[7]
ETH_TX_ER[10]
ETH_RX_ER
[10]
ETH_RESET_N[10]
ETH_MAC_CLK_EN
[10]
LCD[0..10][13]
ETH_EGP[0..7][10]
Title
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Title
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FROM ISPVM CABLE
This LED
indicates activity
on TDI.
FPGA RESETN/GSRN
PROGRAMN
SPI3 MODE SETTING
DONE indicator will light when
configuration is successfully
completed
INITN indicator will light
if an error occurs during
configuration programming
FLASH1
FLASH0
Top
BANK1
SC-900FPBGA
U1K
SC25-900fpBGA
Top
BANK1
SC-900FPBGA
U1K
SC25-900fpBGA
PT23D/D14/MPIWRDATA14
E12
PT47C/D10/MPIWRDATA10
A19
PT47D/D9/MPIWRDATA9
A20
PT49B/D8/MPIWRDATA8
B20
PT23A/D15/MPIWRDATA15
G9
PT25A/A17/MPIADDR31
D13
PT25B/A15/MPIADDR29
D14
PT25D/A16/MPIADDR30
G12
PT27A/A14/MPIADDR28
E13
PT27B/A13/MPIADDR27
E14
PT28A/A12/MPIADDR26
A13
PT28B/A11/MPIADDR25
A14
PT29A/A10/MPIADDR24
F14
PT29B/A9/MPIADDR23
G14
PT31A/A8/MPIADDR22
B13
PT31B/A7/MPIADDR21
B14
PT32A/A6/MPIADDR20
C13
PT32B/A5/MPIADDR19
C14
PT33A/A4/MPIADDR18
D15
PT33B/A3/MPIADDR17
E15
PT33C/A2/MPIADDR16
F15
PT33D/A1/MPIADDR15
G15
PT35A/A0/MPIADDR14
A15
PT27D/D11/MPIWRDATA11
G13 PT27C/D12/MPIWRDATA12
H13
PT25C/D13/MPIWRDATA13
G11
PT43B/D0/MPIWRDATA0
B18
PT45A/D1/MPIWRDATA1
G17
PT45B/D2/MPIWRDATA2
G18
PT45C/D3/MPIWRDATA3
E16
PT45D/D4/MPIWRDATA4
E17
PT46A/D5/MPIWRDATA5
C17
PT46B/D6/MPIWRDATA6
C18
PT46C/D7/MPIWRDATA7
F18
PT23B/A21/MPIBURST
G10
PT23C/DP1/MPIWRPARITY1
D12
PT24C/A20/MPIBDIP
F13
PT24A/MPITEAN/MPITEA
B11
PT24B/A18/MPITSIZ0
B12
PT24D/A19/MPITSIZ1
F12
PT46D/WRN/MPIRWN
F19
PT47A/RDN/MPISTRBN
D18
PT38B/DP0/MPIWRPARITY0
C16 PT38A/MPIACKN/MPITA
C15
PT37A/MPICLK/PCLKT1_0/MPICLK
B15
PT35B/MPIRTRYN/MPIRETRY
A16
PT49A/CS1/CS1
B19
PT47B/CS0N/CS0N
D19
PT35D/DP3/PCLKC1_4/MPIWRPARITY3
H16
PT42D/VREF2_1
G16
PT31C/VREF1_1
H14
PT37B/PCLKC1_0
B16
PT38D/EXTDONEO
F17
PT39A/EXTCLKP2I
D16
PT39B/EXTCLKP2O
D17
PT41A/EXTCLKP1I
H17
PT41B/EXTCLKP1O
H18
PT42A/EXTDONEI
A17
R104_7K-0603SMT R104_7K-0603SMT
RN1D
EXBV8V472JV
4.7K
RN1D
EXBV8V472JV
4.7K
45
R2
4_7K-0603SMT
R2
4_7K-0603SMT
R11
10K-0603SMT
R11
10K-0603SMT
R30
10K-0603SMT
R30
10K-0603SMT
U7B
SN74LVC125A/SO14
U7B
SN74LVC125A/SO14
3Y
83A 9
3OE_N 10
4Y
11 4A 12
4OE_N 13
VCC 14
R94_7K-0603SMT R94_7K-0603SMT
SW3
B3F-1150
Momentary Switch
SW3
B3F-1150
Momentary Switch
1 3
2 4
PP2PP2
1 2
R4
10K-0603SMT
R4
10K-0603SMT
C1
100NF-0603SMT
C1
100NF-0603SMT
U6
NC7WZ16-MACO6A/Fairchild TinyLogic
U6
NC7WZ16-MACO6A/Fairchild TinyLogic
IN A1 1
GND
2
IN A2 3
OUT Y2
4
VCC 5
OUT Y1
6
R27
100R-0603SMT
R27
100R-0603SMT
R22
680R-0603SMT
R22
680R-0603SMT
R13
4_7K-0603SMT
R13
4_7K-0603SMT
RN1C
4.7K
RN1C
4.7K
36
R24
220R-0603SMT
R24
220R-0603SMT
SC-900FPBGA
U1I
SC25-900fpBGA
SC-900FPBGA
U1I
SC25-900fpBGA
CCLK
F25
DONE
G6
INITN
G5
M0
F5
M1
F6
M2
F4
M3
E4
RDCFGN H6
RESETN
H5
TCK G25
TDI G24
TDO H25
TEMP
AD5
TMS J26
PROGRAMN
F26
PT42B/DOUT A18
PT49C/LDCN
F22
PT49D/HDC
G22
PT38C/RDY F16
PT43A/QOUT B17
MPIIRQN H24
R6
4_7K-0603SMT
R6
4_7K-0603SMT
PP3PP3
12
R28
4_7K-0603SMT
R28
4_7K-0603SMT
R8
4_7K-0603SMT
R8
4_7K-0603SMT
VCC
GND
TDO
TDI
ispEN_N
NC
TMS
TCK
DONE
INITN
J3
HEADER 10
VCC
GND
TDO
TDI
ispEN_N
NC
TMS
TCK
DONE
INITN
J3
HEADER 10
1
2
3
4
5
6
7
8
9
10
C2
10NF-0603SMT
C2
10NF-0603SMT
U4
M25P80-FLASH
U4
M25P80-FLASH
S#
1
Q
2
W#
3
GND
4
VCC 8
HOLD# 7
CLK 6
DI 5
R25
0R-0603SMT
R25
0R-0603SMT
Y
D3
LED-SMT1206_RED
Y
D3
LED-SMT1206_RED
RN1A
4.7K
RN1A
4.7K
18
C4
100NF-0603SMT
C4
100NF-0603SMT
R
D1
LED-SMT1206_GREEN
R
D1
LED-SMT1206_GREEN
C5
100NF-0603SMT
C5
100NF-0603SMT
U5
MAX6817
U5
MAX6817
IN1
1
GND
2
IN2
3
OUT2 4
VCC 5
OUT1 6
R16
4_7K-0603SMT
R16
4_7K-0603SMT
U3
M25P64-FLASH(NOB)
U3
M25P64-FLASH(NOB)
S#
7
Q
8
DU1
3
DU2
4
VCC
2HOLD#
1
DU4
6DU3
5
W# 9
VSS 10
DU5 11
DU6 12
DU7 13
DU8 14
D15
CK 16
C7
100NF-0603SMT
C7
100NF-0603SMT
Y
D4
LED-SMT1206_RED
Y
D4
LED-SMT1206_RED
R23
680R-0603SMT
R23
680R-0603SMT
C6
100NF-0603SMT
C6
100NF-0603SMT
SW1
TDA10H0SK1
SW1
TDA10H0SK1
1
12
23
34
45
56
67
78
89
910
10
11 11
12 12
13 13
14 14
15 15
16 16
17 17
18 18
19 19
20 20
R154_7K-0603SMT R154_7K-0603SMT
R20
4_7K-0603SMT
R20
4_7K-0603SMT
G
D5
LED-SMT1206_GREEN
G
D5
LED-SMT1206_GREEN
R17
BOURNS-3224W-10K
R17
BOURNS-3224W-10K
R18
220R-0603SMT
R18
220R-0603SMT
R12
10K-0603SMT
R12
10K-0603SMT
RN1B
4.7K
RN1B
4.7K
27
SW2
B3F-1150
Momentary Switch
SW2
B3F-1150
Momentary Switch
13
24
U7A
SN74LVC125A/SO14
U7A
SN74LVC125A/SO14
1OE_N 1
1A 2
1Y
3
2OE_N 4
2A 5
2Y
6
GND
7
U2
M25P80-FLASH
U2
M25P80-FLASH
S#
1
Q
2
W#
3
GND
4
VCC 8
HOLD# 7
CLK 6
DI 5
R144_7K-0603SMT R144_7K-0603SMT
C3
100NF-0603SMT
C3
100NF-0603SMT
J2
HEADER 4
J2
HEADER 4
1
2
3
4
R
D2
LED-SMT1206_RED
R
D2
LED-SMT1206_RED
Q1
2N2222/SOT23
Q1
2N2222/SOT23
3
1
2
R3
4_7K-0603SMT
R3
4_7K-0603SMT
R7
470R-0603SMT
R7
470R-0603SMT
R19
4_7K-0603SMT
R19
4_7K-0603SMT
R5
470R-0603SMT
R5
470R-0603SMT
PP1PP1
12
R29
4_7K-0603SMT
R29
4_7K-0603SMT
R21
680R-0603SMT
R21
680R-0603SMT
R26
100R-0603SMT
R26
100R-0603SMT
R1
4_7K-0603SMT
R1
4_7K-0603SMT
U8
NC7WZ16-MACO6A/Fairchild TinyLogic
U8
NC7WZ16-MACO6A/Fairchild TinyLogic
IN A1 1
GND
2
IN A2 3
OUT Y2
4
VCC 5
OUT Y1
6
J1
JUMPER1
J1
JUMPER1
1 2
19
LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Figure 6. Power Supplies
5
5
4
4
3
3
2
2
1
1
DD
C C
BB
A A
VREF_REG1
VREF_REG2
PROBE_VCC
VCC_CORE
1_8V
2_5V
2_5V
1_8V
1_8V
SC_QDR_VTT
2_5V
VCC_CORE
2_5V
1_8V
SC_QDR_VTT
3_3V
3_3V
2_5V
1_8V
1_8V
SC_RLDRAM_VTT
SC_RLDRAM_VTT
VCCIO1
2_5V
2_5V
SC_RLDRAM_VTT
2_5V
SC_QDR_VTT
1_2VDDA
SC_QDR_VREF
[12]
SC_RLDRAM_VREF
[12]
PROBE_VCC [4]
Title
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Power Supplies
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Power Supplies
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Title
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1.8V PROBE POINT
VCC12 PROBE POINT
VCCAUX PROBE POINT
0.9V VTT PROBE POINT
VCCIO1 SELECT
VCCIO1PROBE POINT
0.9V VTT PROBE POINT
2.5V PROBE POINT
BANK 2, 3, 4, 5, 6
VCCIO = 1.8V
BANK 7
VCCIO = 2.5V
+
C53
22UF-16V_TANTBSMT
+
C53
22UF-16V_TANTBSMT
C66
10NF-0603SMT
C66
10NF-0603SMT
C15
100NF-0603SMT
C15
100NF-0603SMT
PP8PP8
12
VCC
SC-900FPBGA
U1E
SC25-900fpBGA
VCC
SC-900FPBGA
U1E
SC25-900fpBGA
VCC
L10
VCC
L21
VCC
M10
VCC
M21
VCC
N10
VCC
N21
VCC
P10
VCC
P21
VCC
U10
VCC
U21
VCC
V10
VCC
V21
VCC
W10
VCC
W21
VCC
Y10
VCC
Y21
VCC
K10
VCC
K11
VCC
K12
VCC
K13
VCC
K14
VCC
K17
VCC
K18
VCC
K19
VCC
K20
VCC
AA10
VCC
AA11
VCC
AA12
VCC
AA13
VCC
AA14
VCC
AA17
VCC
AA18
VCC
AA19
VCC
AA20
VCC
AA21
VCC
AA22
VCC
AA9
VCC
AB10
VCC
AB21
VCC
J10
VCC
J21
VCC
J22
VCC
J9
VCC
K22
VCC
K9
VCC
K21
C81
100NF-0603SMT
C81
100NF-0603SMT
C75
100NF-0603SMT
C75
100NF-0603SMT
PP10PP10
12
C51
1UF-16V-0805SMT
C51
1UF-16V-0805SMT
C107
10NF-0603SMT
C107
10NF-0603SMT
C112
100NF-0603SMT
C112
100NF-0603SMT
PP6PP6
12
C31
10NF-0603SMT
C31
10NF-0603SMT
R334_7K-0603SMT R334_7K-0603SMT
+
C33
22UF-16V_TANTBSMT
+
C33
22UF-16V_TANTBSMT
R35
0R-0603SMT
R35
0R-0603SMT
R47
OPEN-0603SMT
R47
OPEN-0603SMT
C84
100NF-0603SMT
C84
100NF-0603SMT
C95
10NF-0603SMT
C95
10NF-0603SMT
C23
10NF-0603SMT
C23
10NF-0603SMT
C114
100NF-0603SMT
C114
100NF-0603SMT
C93
10NF-0603SMT
C93
10NF-0603SMT
C61
100NF-0603SMT
C61
100NF-0603SMT
C43
10NF-0603SMT
C43
10NF-0603SMT
+
C21
22UF-16V_TANTBSMT
+
C21
22UF-16V_TANTBSMT
C87
100NF-0603SMT
C87
100NF-0603SMT
C94
10NF-0603SMT
C94
10NF-0603SMT
C113
100NF-0603SMT
C113
100NF-0603SMT
VCCAUX
SC-900FPBGA
U1L
SC25-900fpBGA
VCCAUX
SC-900FPBGA
U1L
SC25-900fpBGA
VCCAUX1
H12
VCCAUX1
H11
VCCAUX1
H20
VCCAUX1
H19
VCCAUX2
M23
VCCAUX2
N24
VCCAUX2
M24
VCCAUX2
N23
VCCAUX3
U23
VCCAUX3
V23
VCCAUX3
V24
VCCAUX3
U24
VCCAUX3
W24
VCCAUX3
W23
VCCAUX4
AC18
VCCAUX4
AC17
VCCAUX4
AD17
VCCAUX4
AD18
VCCAUX4
AC19
VCCAUX4
AD19
VCCAUX5
AC13
VCCAUX5
AC14
VCCAUX5
AC12
VCCAUX5
AD13
VCCAUX5
AD14
VCCAUX5
AD12
VCCAUX6
V7
VCCAUX6
V8
VCCAUX6
U7
VCCAUX6
U8
VCCAUX6
W8
VCCAUX6
W7
VCCAUX7
M7
VCCAUX7
N8
VCCAUX7
M8
VCCAUX7
N7
C11
10NF-0603SMT
C11
10NF-0603SMT
C62
10NF-0603SMT
C62
10NF-0603SMT
R37
1K-0603SMT
R37
1K-0603SMT
C12
1UF-16V-0805SMT
C12
1UF-16V-0805SMT
C71
100NF-0603SMT
C71
100NF-0603SMT
C16
100NF-0603SMT
C16
100NF-0603SMT
R43
0R-0603SMT
R43
0R-0603SMT
C44
100NF-0603SMT
C44
100NF-0603SMT
C38
10NF-0603SMT
C38
10NF-0603SMT
PP13PP13
12
C27
1UF-16V-0805SMT
C27
1UF-16V-0805SMT
C109
100NF-0603SMT
C109
100NF-0603SMT
J5
HEADER 3X1
J5
HEADER 3X1
11
2
233
C35
100NF-0603SMT
C35
100NF-0603SMT
R34
1K_ADJ/SMT3MM
R34
1K_ADJ/SMT3MM
R404_7K-0603SMT R404_7K-0603SMT
R39
OPEN-0603SMT
R39
OPEN-0603SMT
+
C45
47UF-16V_TANTBSMT
+
C45
47UF-16V_TANTBSMT
C24
10NF-0603SMT
C24
10NF-0603SMT
C68
10NF-0603SMT
C68
10NF-0603SMT
C42
100NF-0603SMT
C42
100NF-0603SMT
+
C19
22UF-16V_TANTBSMT
+
C19
22UF-16V_TANTBSMT
C8
100NF-0603SMT
C8
100NF-0603SMT
C86
100NF-0603SMT
C86
100NF-0603SMT
C77
100NF-0603SMT
C77
100NF-0603SMT
C80
100NF-0603SMT
C80
100NF-0603SMT
C41
100NF-0603SMT
C41
100NF-0603SMT
C101
10NF-0603SMT
C101
10NF-0603SMT
R41
0R-0805SMT
R41
0R-0805SMT
+
C14
22UF-16V_TANTBSMT
+
C14
22UF-16V_TANTBSMT
R46
0R-0603SMT
R46
0R-0603SMT
C90
10NF-0603SMT
C90
10NF-0603SMT
C39
100NF-0603SMT
C39
100NF-0603SMT
R31
1K-0603SMT
R31
1K-0603SMT
C47
1UF-16V-0805SMT
C47
1UF-16V-0805SMT
C102
10NF-0603SMT
C102
10NF-0603SMT
C26
100NF-0603SMT
C26
100NF-0603SMT
C115
100NF-0603SMT
C115
100NF-0603SMT
C17
100NF-0603SMT
C17
100NF-0603SMT
C48
100NF-0603SMT
C48
100NF-0603SMT
C25
1UF-16V-0805SMT
C25
1UF-16V-0805SMT
VCCIO
SC-900FPBGA
U1C
SC25-900fpBGA
VCCIO
SC-900FPBGA
U1C
SC25-900fpBGA
VCCIO1
H10
VCCIO1
J20
VCCIO1
J14
VCCIO1
H21
VCCIO1
H22
VCCIO1
H9
VCCIO1
J11
VCCIO1
J12
VCCIO1
J13
VCCIO1
J17
VCCIO1
J15
VCCIO1
J16
VCCIO1
J18
VCCIO1
J19
VCCIO1
F20 VCCIO1
C19 VCCIO1
C12 VCCIO1
F11
VCCIO2
P22
VCCIO2
R22
VCCIO2
L23
VCCIO2
L22
VCCIO2
K24
VCCIO2
K23
VCCIO2
J24
VCCIO2
N22
VCCIO2
M22
VCCIO2
J23
VCCIO2
G30
VCCIO2
J29
VCCIO2
K27
VCCIO2
N25
VCCIO3
T22
VCCIO3
AB24
VCCIO3
AA23
VCCIO3
AA24
VCCIO3
AB23
VCCIO3
Y24
VCCIO3
W22
VCCIO3
U22
VCCIO3
V22
VCCIO3
Y22
VCCIO3
Y23
VCCIO3
AA26
VCCIO3
AA29
VCCIO3
Y28
VCCIO3
AC29
VCCIO4
AC22
VCCIO4
AC21
VCCIO4
AB16
VCCIO4
AB17
VCCIO4
AB18
VCCIO4
AB19
VCCIO4
AB20
VCCIO4
AC20
VCCIO4
AD21
VCCIO4
AD22
VCCIO4
AD20
VCCIO4
AG23
VCCIO4
AG20
VCCIO4
AJ23
VCCIO4
AJ26
VCCIO5
AH6
VCCIO5
AG11
VCCIO5
AJ9
VCCIO5
AE7
VCCIO5
AD10
VCCIO5
AC9
VCCIO5
AC11
VCCIO5
AC10
VCCIO5
AB15
VCCIO5
AB14
VCCIO5
AB13
VCCIO5
AB12
VCCIO5
AB11
VCCIO5
AD9
VCCIO5
AD11
VCCIO6
Y9
VCCIO6
W9
VCCIO6
Y8
VCCIO6
Y7
VCCIO6
T9
VCCIO6
AB8
VCCIO6
AB7
VCCIO6
AA8
VCCIO6
AA7
VCCIO6
V9
VCCIO6
U9
VCCIO6
AA4
VCCIO6
AD1
VCCIO6
AB2
VCCIO6
W4
VCCIO7
J8
VCCIO7
K7
VCCIO7
J7
VCCIO7
P9
VCCIO7
R9
VCCIO7
K8
VCCIO7
L8
VCCIO7
H4
VCCIO7
L2
VCCIO7
J2
VCCIO7
N6
VCCIO7
N4
VCCIO7
H2
VCCIO7
N9
VCCIO7
M9
VCCIO7
L9
C85
100NF-0603SMT
C85
100NF-0603SMT
C96
10NF-0603SMT
C96
10NF-0603SMT
C108
10NF-0603SMT
C108
10NF-0603SMT
C70
10NF-0603SMT
C70
10NF-0603SMT
C20
100NF-0603SMT
C20
100NF-0603SMT
C79
100NF-0603SMT
C79
100NF-0603SMT
U9
LP2996-SO8
U9
LP2996-SO8
GND
1
SD
2
VSENSE 3
VREF
4
VDDQ
5
AVIN 6
PVIN 7
VTT 8
+
C9
47UF-16V_TANTBSMT
+
C9
47UF-16V_TANTBSMT
+
C50
100UF-FKSMT
+
C50
100UF-FKSMT
C88
100NF-0603SMT
C88
100NF-0603SMT
C117
100NF-0603SMT
C117
100NF-0603SMT
C64
10NF-0603SMT
C64
10NF-0603SMT
R38
1K-0603SMT
R38
1K-0603SMT
C73
100NF-0603SMT
C73
100NF-0603SMT
C46
100NF-0603SMT
C46
100NF-0603SMT
DP1DP1
1
2
3
C55
100NF-0603SMT
C55
100NF-0603SMT
PP7PP7
12
C111
100NF-0603SMT
C111
100NF-0603SMT
C98
10NF-0603SMT
C98
10NF-0603SMT
R36
0R-0603SMT
R36
0R-0603SMT
+
C32
100UF-FKSMT
+
C32
100UF-FKSMT
J4
JUMPER1
J4
JUMPER1
12
C10
100NF-0603SMT
C10
100NF-0603SMT
C56
10NF-0603SMT
C56
10NF-0603SMT
PP11PP11
12
C100
10NF-0603SMT
C100
10NF-0603SMT
C49
10NF-0603SMT
C49
10NF-0603SMT
C92
10NF-0603SMT
C92
10NF-0603SMT
C29
1UF-16V-0805SMT
C29
1UF-16V-0805SMT
C18
100NF-0603SMT
C18
100NF-0603SMT
SC-900FPBGA
U1G
SC25-900fpBGA
SC-900FPBGA
U1G
SC25-900fpBGA
NC1
M4
NC2
P5
NC3
J3
NC4
AB3
NC5
AH9
NC6
AG7
NC7
AK27
NC8
AJ24
NC9
AA28
NC10
P24
NC11
K28
NC12
P23
NC13
L28
NC14
E19
NC15
G21
NC16
G20
NC17
G19
NC18
F9
NC19
A11
NC20
G7
NC21
AC16
NC22
AB30
NC23
AF12
NC24
AG10
C63
10NF-0603SMT
C63
10NF-0603SMT
PP12PP12
12
PP4PP4
12
C103
10NF-0603SMT
C103
10NF-0603SMT
R45
0R-0603SMT
R45
0R-0603SMT
C69
10NF-0603SMT
C69
10NF-0603SMT
C72
100NF-0603SMT
C72
100NF-0603SMT
C78
100NF-0603SMT
C78
100NF-0603SMT
C82
100NF-0603SMT
C82
100NF-0603SMT
C57
100NF-0603SMT
C57
100NF-0603SMT
C106
10NF-0603SMT
C106
10NF-0603SMT
PP9PP9
12
C110
100NF-0603SMT
C110
100NF-0603SMT
R48
1K-0603SMT
R48
1K-0603SMT
SC-900FPBGA
U1H
SC25-900fpBGA
SC-900FPBGA
U1H
SC25-900fpBGA
VTT_2
L24
VTT_2
T23
VTT_3
AC24
VTT_3
T25
VTT_3
W25
VTT_4
AD24
VTT_4
AE17
VTT_4
AE18
VTT_5
AC15
VTT_5
AD16
VTT_5
AE9
VTT_6
AA6
VTT_6
T7
VTT_6
W6
VTT_7
L7
VTT_7
P7
C13
100NF-0603SMT
C13
100NF-0603SMT
C83
100NF-0603SMT
C83
100NF-0603SMT
C116
100NF-0603SMT
C116
100NF-0603SMT
R32
0R-0603SMT
R32
0R-0603SMT
C58
10NF-0603SMT
C58
10NF-0603SMT
R44
1K_ADJ/SMT3MM
R44
1K_ADJ/SMT3MM
C89
100NF-0603SMT
C89
100NF-0603SMT
+
C52
10UF-16V_TANTBSMT
+
C52
10UF-16V_TANTBSMT
C40
10NF-0603SMT
C40
10NF-0603SMT
C91
10NF-0603SMT
C91
10NF-0603SMT
C36
10NF-0603SMT
C36
10NF-0603SMT
SC-900FPBGA
AGB
pf
0
0
9-
5
2C
S
D1U
SC-900FPBGA
AGB
pf
0
0
9-
5
2C
S
D1U
VCC1P2
AB9
VCC1P2
AC8
VCC1P2
H23
VCC1P2
H15
VCC1P2
AC23
VCC1P2
R23
VCC1P2
AB22
VCC1P2
T8
VCC1P2
H8
VCCJ J25
VCCL_LLC_A
AG4 VCCL_LLC_B
AF5 VCCL_LRC_A
AG27 VCCL_LRC_B
AF26 VCCL_ULC_A
E5 VCCL_ULC_B
D4 VCCL_URC_A
E26 VCCL_URC_B
D27
XRES
AE4
PROBE_GND
AE28
PROBE_VCC
AD27
C105
10NF-0603SMT
C105
10NF-0603SMT
PP5PP5
12
C97
10NF-0603SMT
C97
10NF-0603SMT
C59
100NF-0603SMT
C59
100NF-0603SMT
C99
10NF-0603SMT
C99
10NF-0603SMT
R42
1K-0603SMT
R42
1K-0603SMT
C22
10NF-0603SMT
C22
10NF-0603SMT
C34
1UF-16V-0805SMT
C34
1UF-16V-0805SMT
C54
1UF-16V-0805SMT
C54
1UF-16V-0805SMT
+
C30
10UF-16V_TANTBSMT
+
C30
10UF-16V_TANTBSMT
C65
10NF-0603SMT
C65
10NF-0603SMT
U10
LP2996-SO8
U10
LP2996-SO8
GND
1
SD
2
VSENSE 3
VREF
4
VDDQ
5
AVIN 6
PVIN 7
VTT 8
C28
1UF-16V-0805SMT
C28
1UF-16V-0805SMT
C67
10NF-0603SMT
C67
10NF-0603SMT
C74
100NF-0603SMT
C74
100NF-0603SMT
C76
100NF-0603SMT
C76
100NF-0603SMT
C60
10NF-0603SMT
C60
10NF-0603SMT
C37
100NF-0603SMT
C37
100NF-0603SMT
C104
10NF-0603SMT
C104
10NF-0603SMT
20
LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Figure 7. DC/DC Conversion
5
5
4
4
3
3
2
2
1
1
DD
C C
BB
A A
2_5_TRIM
CORE_TRIM
1_2_TRIM
3_3_TRIM
12_0V
2_5V
3_3V
12_0V
VCC_CORE
1_5V
2_5V12_0V
1_2V
1_8V
12_0V12_0V
VCC_CORE
3_3VIN
12_0V
1_8V
1_5V
1_2V
3_3VIN
3_3VIN
12_0V
12_0V
12_0V
12_0V
3_3VIN 3_3V
12_0V 12_0V
1_2VDDA
PROBE_VCC [3]
Title
veRtcejorP
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SC PCI EXPRESS Card
1.0
DC/DC Conversion
C
414
Title
veR
t
c
e
jo
r
Pe
zi
S
t
e
e
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S
:
etaD of
SC PCI EXPRESS Card
1.0
DC/DC Conversion
C
414
Title
veR
t
c
e
jo
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Pe
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S
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h
S
:
etaD of
SC PCI EXPRESS Card
1.0
DC/DC Conversion
C
414
GND Pads
Distributed around the board
2.5V
POWER RAIL GOOD INDICATORS
VCC
CORE
V5.2V8.1 3.3V1.2V
1.5V
SC
VCC_CORE
1.8V
1.5V
1.2V
12V
INPUT
GOOD
+12VDC
GND
3.3V
4.32K Typical
SET VALUE
1V= 36.5K
1.2V=17.4K
POWER INPUT
VCC12 power supply must always
be higher than VCC Core,
or if lower, then well within 150mV
of VCC Core
C137
22UF-16V_TANTBSMT
C137
22UF-16V_TANTBSMT
R50
470R-1206SMT
R50
470R-1206SMT
TP2
TESTPOINT
TP2
TESTPOINT
1
C128
100NF-0603SMT
C128
100NF-0603SMT
R81
OPEN-0805SMT
R81
OPEN-0805SMT
R79
0R-0603SMT
R79
0R-0603SMT
FB1
BLM41PG600SN1
FB1
BLM41PG600SN1
R83
124R-0603SMT
R83
124R-0603SMT
R55
150R-0603SMT
R55
150R-0603SMT
R54
100R-0603SMT
R54
100R-0603SMT
G
D6
LED-SMT1206_GREEN
G
D6
LED-SMT1206_GREEN
TP12
TESTPOINT
TP12
TESTPOINT
1
R75
15_4K-0603SMT
R75
15_4K-0603SMT
TP3
TESTPOINT
TP3
TESTPOINT
1
R66
OPEN-0603SMT
R66
OPEN-0603SMT
R65
124R-0603SMT
R65
124R-0603SMT
TB1
Terminal Block/ED1202DS
TB1
Terminal Block/ED1202DS
1
2
U13
PTH12060W
U13
PTH12060W
GND
1
VIN
2
INHIBIT#
3
ADJUST
4
SENSE 5
VOUT 6
GND
7TRACK 8
MDWN 9
MUP 10
R67
OPEN-0805SMT
R67
OPEN-0805SMT
C135
10UF-16V_TANTBSMT
C135
10UF-16V_TANTBSMT
TP7
TESTPOINT
TP7
TESTPOINT
1
F3
F1228CT-ND
5A Fast-Blo SMT Socketed Fuse
F3
F1228CT-ND
5A Fast-Blo SMT Socketed Fuse
C136
100NF-0603SMT
C136
100NF-0603SMT
R85
68K-0603SMT
R85
68K-0603SMT
R76
100K-0603SMT
R76
100K-0603SMT
TP11
TESTPOINT
TP11
TESTPOINT
1
C138
100NF-0603SMT
C138
100NF-0603SMT
C122
10UF-16V_TANTBSMT
C122
10UF-16V_TANTBSMT
C130
1UF-16V-0805SMT
C130
1UF-16V-0805SMT
U14
PTH12060W
U14
PTH12060W
GND
1
VIN
2
INHIBIT#
3
ADJUST
4
SENSE 5
VOUT 6
GND
7TRACK 8
MDWN 9
MUP 10
R86
56R-0603SMT
R86
56R-0603SMT
C133
10UF-16V_TANTBSMT
C133
10UF-16V_TANTBSMT
+
C134
330UF-FKSMT
+
C134
330UF-FKSMT
TP10
TESTPOINT
TP10
TESTPOINT
1
R62
0R-0805SMT
R62
0R-0805SMT
U16
AMS1503CT
U16
AMS1503CT
VPOWER
5
VCONTROL
4OUTPUT 3
ADJUST_GND
2SENSE 1
C127
22UF-16V_TANTBSMT
C127
22UF-16V_TANTBSMT
R60
100K-0603SMT
R60
100K-0603SMT
C131
10UF-16V_TANTBSMT
C131
10UF-16V_TANTBSMT
J8
JUMPER1
J8
JUMPER1
1 2
+
C118
470UF-FKSMT
+
C118
470UF-FKSMT
R63
0R-0603SMT
R63
0R-0603SMT
R87
BOURNS-3224W-10K
R87
BOURNS-3224W-10K
C125
10UF-16V_TANTBSMT
C125
10UF-16V_TANTBSMT
F4
F1228CT-ND
5A Fast-Blo SMT Socketed Fuse
F4
F1228CT-ND
5A Fast-Blo SMT Socketed Fuse
+
C124
330UF-FKSMT
+
C124
330UF-FKSMT
R78
0R-0603SMT
R78
0R-0603SMT
R72
24K-0603SMT
R72
24K-0603SMT
TP8
TESTPOINT
TP8
TESTPOINT
1
F2
F1228CT-ND
5A Fast-Blo SMT Socketed Fuse
F2
F1228CT-ND
5A Fast-Blo SMT Socketed Fuse
+
C119
100UF-FKSMT
+
C119
100UF-FKSMT
F1
F1251CT-ND
10A Fast-Blo SMT Socketed Fuse
F1
F1251CT-ND
10A Fast-Blo SMT Socketed Fuse
G
D8
LED-SMT1206_GREEN
G
D8
LED-SMT1206_GREEN
+
C132
330UF-FKSMT
+
C132
330UF-FKSMT
Q5
2N2222/SOT23
Q5
2N2222/SOT23
3
1
2
R68
OPEN-0805SMT
R68
OPEN-0805SMT
R51
470R-1206SMT
R51
470R-1206SMT J6
22HP037-2.1mm PC
Male Power Jack 2.1mm
J6
22HP037-2.1mm PC
Male Power Jack 2.1mm
1
3
2
R56
10K-0603SMT
R56
10K-0603SMT
R73
BOURNS-3224W-2K
R73
BOURNS-3224W-2K
G
D9
LED-SMT1206_GREEN
G
D9
LED-SMT1206_GREEN
U12
AMS1503CT
U12
AMS1503CT
VPOWER
5
VCONTROL
4OUTPUT 3
ADJUST_GND
2SENSE 1
R61
100K-0603SMT
R61
100K-0603SMT
R49
470R-1206SMT
R49
470R-1206SMT
R74
1_8K-0603SMT
R74
1_8K-0603SMT
R57
10K-0603SMT
R57
10K-0603SMT
R82
OPEN-0805SMT
R82
OPEN-0805SMT
Q4
2N2222/SOT23
Q4
2N2222/SOT23
3
1
2
R70
BOURNS-3224W-10K
R70
BOURNS-3224W-10K
TP9
TESTPOINT
TP9
TESTPOINT
1
TP5
TESTPOINT
TP5
TESTPOINT
1
G
D10
LED-SMT1206_GREEN
G
D10
LED-SMT1206_GREEN
+
C120
330UF-FKSMT
+
C120
330UF-FKSMT
G
D7
LED-SMT1206_GREEN
G
D7
LED-SMT1206_GREEN
R89
BOURNS-3224W-5K
R89
BOURNS-3224W-5K
R69
27R-0603SMT
R69
27R-0603SMT
+
C129
22UF-16V_TANTBSMT
+
C129
22UF-16V_TANTBSMT
Q2
2N2222/SOT23
Q2
2N2222/SOT23
3
1
2
R84
BOURNS-3224W-10K
R84
BOURNS-3224W-10K
C123
10UF-16V_TANTBSMT
C123
10UF-16V_TANTBSMT
F6
F1228CT-ND
5A Fast-Blo SMT Socketed Fuse
F6
F1228CT-ND
5A Fast-Blo SMT Socketed Fuse
TP1
TESTPOINT
TP1
TESTPOINT
1
C126
100NF-0603SMT
C126
100NF-0603SMT
TP6
TESTPOINT
TP6
TESTPOINT
1
G
D11
LED-SMT1206_GREEN
G
D11
LED-SMT1206_GREEN
R77
100K-0603SMT
R77
100K-0603SMT
TP4
TESTPOINT
TP4
TESTPOINT
1
R59
10K-0603SMT
R59
10K-0603SMT
R88
2_2K-0603SMT
R88
2_2K-0603SMT
G
D12
LED-SMT1206_GREEN
G
D12
LED-SMT1206_GREEN
R71
BOURNS-3224W-10K
R71
BOURNS-3224W-10K
R52
470R-1206SMT
R52
470R-1206SMT
C121
10UF-16V_TANTBSMT
C121
10UF-16V_TANTBSMT
R58
10K-0603SMT
R58
10K-0603SMT
R80
0R-0805SMT
R80
0R-0805SMT
R53
470R-1206SMT
R53
470R-1206SMT
U15
PTH12060W
U15
PTH12060W
GND
1
VIN
2
INHIBIT#
3
ADJUST
4
SENSE 5
VOUT 6
GND
7TRACK 8
MDWN 9
MUP 10
J7
HEADER 3x1
J7
HEADER 3x1
1V 1
ADJ
2
1.2V 3
Q3
2N2222/SOT23
Q3
2N2222/SOT23
3
1
2
F5
F1228CT-ND
5A Fast-Blo SMT Socketed Fuse
F5
F1228CT-ND
5A Fast-Blo SMT Socketed Fuse
R64
0R-0603SMT
R64
0R-0603SMT
U11
PTH03010W
U11
PTH03010W
GND
1
VIN
2
INHIBIT#
3
ADJUST
4
SENSE 5
VOUT 6
GND
7TRACK 8
MDWN 9
MUP 10
21
LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Figure 8. SERDES
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
AA
PETn0PETp0
A_HDINP0_L
50
A_HDINN0_L
50
A_HDOUTP0_L50
A_HDOUTN0_L
50
PERp0
PERn0
PETp0
PETn0
PCIE_3V3
PCIE_CLKN
PCIE_CLKP
x1
x1
PCIE_3V3
PETn0
PETp0
PERp0
PERn0
A_REFCLKN_R
A_REFCLKP_R
A_REFCLKN_L
A_REFCLKP_L
A_HDOUTP0_L
A_HDOUTN0_L
A_HDINP0_L
A_HDINN0_L
A_HDINP0_R
A_HDINN0_R
A_HDINP1_R
A_HDINN1_R
A_HDINP2_R
A_HDINN2_R
A_HDOUTP0_R
A_HDOUTN0_R
A_HDOUTP1_R
A_HDOUTN1_R
A_HDOUTP2_R
A_HDOUTN2_R
A_HDOUTP1_L
A_HDOUTN1_L
A_HDOUTP2_L
A_HDOUTN2_L
A_HDINP1_L
A_HDINN1_L
A_HDINP2_L
A_HDINN2_L
IN_SATA_HOST+
IN_SATA_HOST-
IN_SATA_TGT+
IN_SATA_TGT-
QUAD_LOOP1_N
QUAD_LOOP1_P
QUAD_LOOP2_P
QUAD_LOOP2_N
A_HDINP1_L
A_HDINN1_L
A_HDINP2_L
A_HDINN2_L
A_HDOUTP1_L
A_HDOUTN1_L
A_HDOUTP2_L
A_HDOUTN2_L
RESP_L
RESP_R
RESP_L_N
RESP_R_N
OUT_SATA_TGT+
50
OUT_SATA_TGT-
50
A_HDOUTP2_R
A_HDOUTN2_R
OUT_SATA_HOST+
50
OUT_SATA_HOST-
50
A_HDOUTP1_R
A_HDOUTN1_R
OUT_SATA_HOST+
OUT_SATA_HOST-
OUT_SATA_TGT+
50 OUT_SATA_TGT- 50
OUT_SATA_HOST- 50OUT_SATA_HOST+
50
RESP_L
RESP_L_N RESP_RRESP_R_N
SFP_RDP
SFP_RDN
IN_SATA_TGT+
50
IN_SATA_TGT-50
A_HDINP2_R
A_HDINN2_R
IN_SATA_HOST+
50
IN_SATA_HOST-
50
A_HDINP1_R
A_HDINN1_R
SFP_RDN 50SFP_RDP50
SFP_TDN
SFP_TDP
RXREFCLKP_L
RXREFCLKP_R
A_HDINN0_R
A_HDINP0_R
A_HDOUTP0_R
A_HDOUTN0_R
OUT_SATA_TGT-
OUT_SATA_TGT+
12_0V
3_3V
3_3V
PCIE_CLKN[12]
PCIE_CLKP
[12]
PCIE_PERSTN
[2] PCIE_WAKEN [2]
PCIE_SMCLK [2]
A_REFCLKN_R [8]
A_REFCLKP_R [8]
A_REFCLKN_L [8]
A_REFCLKP_L [8]
PCIE_SMDAT [2]
SFP_TXFAULT
[2]
SFP_TXDIS
[2]
SFP_MODDEF2
[2]
SFP_MODDEF1[2]
SFP_MODDEF0[2]
SFP_RATESEL[2]
SFP_LOS[2]
Title
v
e
R
tc
e
j
orPe
z
i
S
t
ee
h
S
:e
t
aD of
SC PCI EXPRESS Card
2.0
SERDES
C
514
Title
v
eRtcejorPeziS
te
e
hS:eta
Dof
SC PCI EXPRESS Card
2.0
SERDES
C
514
Title
v
eRtcejorPeziS
te
e
hS:eta
Dof
SC PCI EXPRESS Card
2.0
SERDES
C
514
HDINHDOUT
Place Capacitors
and Resistors as
Physically close to
device pin as possible
3G SMAs
X1 PCIe Board Fingers
B side = Primary Component Side(TOP)
A side = Secondary Component Side(BOTTOM)
200K
200K
AC Coupled receiver
+ 200K Ohm to GND
Host
Target
SGMII
SFP
SATA
STUFF OPTION A:
REPLACE C157, C158 WITH 0-OHM SHUNTS
STUFF OPTION A:
LEAVE R106, R107 == OPEN
C14610NF-0402SMT C14610NF-0402SMT
R96
150R-0603SMT
R96
150R-0603SMT
R93
4_02K-0603SMT
R93
4_02K-0603SMT
C159100NFX5R-0402SMT C159100NFX5R-0402SMT
C14010NF-0402SMT C14010NF-0402SMT
R103
1K-0603SMT
R103
1K-0603SMT
C157100NFX5R-0402SMT C157100NFX5R-0402SMT
J17
SMA_901_144_8(NOB)
J17
SMA_901_144_8(NOB)
1
2
3
4
5
C158
100NFX5R-0402SMT C158
100NFX5R-0402SMT
C153
10UF-16V_TANTBSMT
C153
10UF-16V_TANTBSMT
J18
SMA_901_144_8(NOB)
J18
SMA_901_144_8(NOB)
1
2
3
4
5
C160
100NFX5R-0402SMT C160
100NFX5R-0402SMT
CG1
SFP_CAGE
CG1
SFP_CAGE
1
1
2
2
3
3
4
4
5
5
6
6
77
88
99
10 10
11 11
R101
10K-0603SMT
R101
10K-0603SMT
C155
100NFX5R-0402SMT
C155
100NFX5R-0402SMT
R99
10K-0603SMT
R99
10K-0603SMT
R105
150R-0603SMT
R105
150R-0603SMT
L2
1UH-1206SMT
L2
1UH-1206SMT C154
100NF-0603SMT
C154
100NF-0603SMT
C150
100NF-0603SMT
C150
100NF-0603SMT
C14410NF-0402SMT C14410NF-0402SMT
C14210NF-0402SMT C14210NF-0402SMT
C14110NF-0402SMT C14110NF-0402SMT
CN3
HOST_SFP
CN3
HOST_SFP
VeeT
1
TxFault
2
TxDisable
3
Mod_Def_2
4
Mod_Def_1
5
Mod_Def_0
6
RateSel
7
LOS
8
VeeR
9
VeeR
10 VeeR 11
RD- 12
RD+ 13
VeeR 14
VccR 15
VccT 16
VeeT 17
TD- 19
VeeT 20
TD+ 18
C148
100NFX5R-0402SMT
C148
100NFX5R-0402SMT
J14
Rosenberger 32K153-400E3
J14
Rosenberger 32K153-400E3
1
2
SERDES
SC-900FPBGA
U1A
SC25-900fpBGA
SERDES
SC-900FPBGA
U1A
SC25-900fpBGA
A_HDINN0_L
B4
A_HDINN1_L
B5
A_HDINN2_L
B8
A_HDINN3_L
B9
A_HDINP0_L
B3
A_HDINP1_L
B6
A_HDINP2_L
B7
A_HDINP3_L
B10
A_HDOUTN0_L
A4
A_HDOUTN1_L
A5
A_HDOUTN2_L
A8
A_HDOUTN3_L
A9
A_HDOUTP0_L
A3
A_HDOUTP1_L
A6
A_HDOUTP2_L
A7
A_REFCLKN_L C1
A_REFCLKN_R C30
A_REFCLKP_L B1
A_REFCLKP_R B30
A_RXREFCLKN_L C2
A_RXREFCLKN_R C29
A_RXREFCLKP_L B2
A_RXREFCLKP_R B29
A_HDINP0_R
B28
A_HDINN0_R
B27
A_HDINP1_R
B25
A_HDINN1_R
B26
A_HDINP2_R
B24
A_HDINN2_R
B23
A_HDINP3_R
B21
A_HDINN3_R
B22
A_HDOUTP0_R
A28
A_HDOUTN0_R
A27
A_HDOUTP1_R
A25
A_HDOUTN1_R
A26
A_HDOUTP2_R
A24
A_HDOUTN2_R
A23
A_HDOUTP3_R
A21
A_HDOUTN3_R
A22
A_HDOUTP3_L
A10 RESP_ULC A2
RESP_URC A29
C152
100NF-0603SMT
C152
100NF-0603SMT
R95
150R-0603SMT
R95
150R-0603SMT
R90
OPEN-0603SMT
R90
OPEN-0603SMT
R97
150R-0603SMT
R97
150R-0603SMT
J13
Rosenberger 32K153-400E3
J13
Rosenberger 32K153-400E3
1
2
CN4
PCI Express x1 Edge Finger Conn.
CN4
PCI Express x1 Edge Finger Conn.
PRSNT1#
A1
+12V
A2
+12V
A3
GND
A4
JTAG2
A5
JTAG3
A6
JTAG4
A7
JTAG5
A8
+3.3V
A9
+3.3V
A10
PERST#
A11
GND
A12
REFCLK+
A13
REFCLK-
A14
GND
A15
PERp0
A16
PERn0
A17
GND
A18
+12V B1
+12V B2
RSVD_B3 B3
GND B4
SMCLK B5
SMDAT B6
GND B7
+3.3V B8
JTAG1 B9
3.3Vaux B10
WAKE# B11
RSVD_B12 B12
GND B13
PETp0 B14
PETn0 B15
GND B16
PRSNT3# B17
GND B18
C14510NF-0402SMT C14510NF-0402SMT
J16
Rosenberger 32K153-400E3
J16
Rosenberger 32K153-400E3
1
2
C151
10UF-16V_TANTBSMT
C151
10UF-16V_TANTBSMT
J10
Rosenberger 32K153-400E3
J10
Rosenberger 32K153-400E3
1
2
J9
Rosenberger 32K153-400E3
J9
Rosenberger 32K153-400E3
1
2
G
A+
A-
G
B-
B+
G
CN1
SATA
G
A+
A-
G
B-
B+
G
CN1
SATA
1
2
3
4
5
6
7
TP13
TESTPOINT
TP13
TESTPOINT
1
C13910NF-0402SMT C13910NF-0402SMT
J15
Rosenberger 32K153-400E3
J15
Rosenberger 32K153-400E3
1
2
R107
200K-0402SMT
R107
200K-0402SMT
J12
Rosenberger 32K153-400E3
J12
Rosenberger 32K153-400E3
1
2
J11
Rosenberger 32K153-400E3
J11
Rosenberger 32K153-400E3
1
2
C149
100NF-0603SMT
C149
100NF-0603SMT
R106
200K-0402SMT
R106
200K-0402SMT
R98
10K-0603SMT
R98
10K-0603SMT
R100
10K-0603SMT
R100
10K-0603SMT
C156
100NFX5R-0402SMT
C156
100NFX5R-0402SMT
R104
150R-0603SMT
R104
150R-0603SMT
L1
1UH-1206SMT
L1
1UH-1206SMT
C147
100NFX5R-0402SMT
C147
100NFX5R-0402SMT
R102
10K-0603SMT
R102
10K-0603SMT
C14310NF-0402SMT C14310NF-0402SMT
R92
OPEN-0603SMT
R92
OPEN-0603SMT
R91
4_02K-0603SMT
R91
4_02K-0603SMT
R94
150R-0603SMT
R94
150R-0603SMT
G
A+
A-
G
B-
B+
G
CN2
SATA
G
A+
A-
G
B-
B+
G
CN2
SATA
1
2
3
4
5
6
7
22
LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Figure 9. SERDES Power Supplies
5
5
4
4
3
3
2
2
1
1
DD
C C
BB
A A
A_VDDIB0_L
VDDOB
VDDIB
VDDOB
VDDIB
VDDOB
VDDIB
A_VDDIB0_R
2_5V
1_5V
1_2VDDA
1_2V
1_2VDDA
1_2V 1_5V
1_2VDDA
VDDOB
VDDIB
Title
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SC-900fpBGA X1 PCI EXPRESS Card
1.0
SERDES Power Supplies
C
614
Title
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SC-900fpBGA X1 PCI EXPRESS Card
1.0
SERDES Power Supplies
C
614
Title
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SC-900fpBGA X1 PCI EXPRESS Card
1.0
SERDES Power Supplies
C
614
VDDAX25 PROBE POINT
VDD_SERDES PROBE POINT
C168
100NF-0603SMT
C168
100NF-0603SMT
PP14PP14
12
R108
OPEN-0805SMT
R108
OPEN-0805SMT
C177
10NF-0603SMT
C177
10NF-0603SMT
C178
100NF-0603SMT
C178
100NF-0603SMT
SERDES
SUPPLIES
SC-900FPBGA
U1B
SC25-900fpBGA
SERDES
SUPPLIES
SC-900FPBGA
U1B
SC25-900fpBGA
A_VDDIB0_L
C3
A_VDDIB1_L
C6
A_VDDIB2_L
C7
A_VDDIB3_L
C10
A_VDDOB0_L
C4
A_VDDOB1_L
C5
A_VDDOB2_L
C8
A_VDDOB3_L
C9
A_VDDRX0_L
D6
A_VDDRX1_L
E7
A_VDDRX2_L
D8
A_VDDRX3_L
E9
A_VDDTX0_L
E6
A_VDDTX1_L
D7
A_VDDTX2_L
E8
A_VDDTX3_L
D9
A_VDDAX25_L
F7 A_VDDAX25_R
F24 A_VDDP_L D5
A_VDDP_R D26
A_VDDIB0_R C28
A_VDDIB1_R C25
A_VDDIB2_R C24
A_VDDIB3_R C21
A_VDDOB0_R C27
A_VDDOB1_R C26
A_VDDOB2_R C23
A_VDDOB3_R C22
A_VDDRX0_R D25
A_VDDRX1_R E24
A_VDDRX2_R D23
A_VDDRX3_R E22
A_VDDTX0_R E25
A_VDDTX1_R D24
A_VDDTX2_R E23
A_VDDTX3_R D22
R109
0R-0805SMT
R109
0R-0805SMT
+
C164
22UF-16V_TANTBSMT
+
C164
22UF-16V_TANTBSMT
C438
100NF-0603SMT
C438
100NF-0603SMT
C173
10NF-0603SMT
C173
10NF-0603SMT
C175
10NF-0603SMT
C175
10NF-0603SMT
C165
1UF-16V-0805SMT
C165
1UF-16V-0805SMT
R111
0R-0805SMT
R111
0R-0805SMT
C171
10NF-0603SMT
C171
10NF-0603SMT
C176
100NF-0603SMT
C176
100NF-0603SMT
+
C162
22UF-16V_TANTBSMT
+
C162
22UF-16V_TANTBSMT
R110
OPEN-0805SMT
R110
OPEN-0805SMT
C174
100NF-0603SMT
C174
100NF-0603SMT
C167
1UF-16V-0805SMT
C167
1UF-16V-0805SMT
C172
100NF-0603SMT
C172
100NF-0603SMT
C163
1UF-16V-0805SMT
C163
1UF-16V-0805SMT
+
C166
22UF-16V_TANTBSMT
+
C166
22UF-16V_TANTBSMT
C161
100NF-0603SMT
C161
100NF-0603SMT
C169
10NF-0603SMT
C169
10NF-0603SMT
C170
100NF-0603SMT
C170
100NF-0603SMT
C179
10NF-0603SMT
C179
10NF-0603SMT
PP15PP15
12
23
LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Figure 10. Clocks
5
5
4
4
3
3
2
2
1
1
DD
C C
BB
A A
OSC_IN_1
OSC_IN_3
OSC_IN_4
3_3V
3_3V
3_3V
3_3V
3_3V
3_3V 3_3V
3_3V
3_3V
3_3V
3_3V
3_3V
3_3V
3_3V
3_3V
3_3V 3_3V
3_3V 3_3V
3_3V
3_3V
1_8V
3_3V
3_3V
REFCLKP_L [8]
REFCLKN_L [8]
OSC_IN_1[2]
REFCLKP_R [8]
REFCLKN_R [8]
CLOCK_CTRL_R[2]
CLOCK_CTRL_L
[2]
OSC_IN_3[12]
OSC_IN_4
[12]
Title
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SC PCI EXPRESS Card
1.0
Clocks
C
714
Title
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SC PCI EXPRESS Card
1.0
Clocks
C
714
Title
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SC PCI EXPRESS Card
1.0
Clocks
C
714
NOTE: PLACE
TERMINATIONS
CLOSE TO
DEVICE.
NOTE: PLACE
TERMINATIONS
CLOSE TO
DEVICE.
Oscillator
Control
Oscillator
Socket
SMT Oscillator
Oscillator
Control
Oscillator
Socket
SMT Oscillator
EXTERNAL CLK
INPUT
EXTERNAL CLK
INPUT
NOTE: PLACE
TERMINATIONS
CLOSE TO
DEVICE.
NOTE: PLACE
TERMINATIONS
CLOSE TO
DEVICE.
SEL0 SEL1 Q0/Q0# Q1/Q1#
L L B B
L H B A
H H A A
H L A B
*** Pin is Low when open/float
SEL0
SEL1
Q7
2N2222/SOT23
Q7
2N2222/SOT23
3
1
2
R143
82R-0603SMT
R143
82R-0603SMT
R115
130R-0603SMT
R115
130R-0603SMT
R134
82R-0603SMT
R134
82R-0603SMT
J21
HEADER 2X1
J21
HEADER 2X1
1
1
2
2
+
C194
100NF-0603SMT
+
C194
100NF-0603SMT U29
PCA9306
U29
PCA9306
GND
1
VREF_LV
2
SIGA_LV
3
SIGB_LV
4SIGB_HV 5
SIGA_HV 6
VREF_HV 7
EN 8
R118
82R-0603SMT
R118
82R-0603SMT
R283
OPEN-0603SMT
R283
OPEN-0603SMT
R128
1_6R-0603SMT
R128
1_6R-0603SMT
C196
10NF-0603SMT
C196
10NF-0603SMT
R138
130R-0603SMT
R138
130R-0603SMT
J23J23
1
2
3
4
5
R139
107R-0603SMT
R139
107R-0603SMT
R121
130R-0603SMT
R121
130R-0603SMT
C188
100NF-0603SMT
C188
100NF-0603SMT
C181
100NF-0603SMT
C181
100NF-0603SMT
R120
82R-0603SMT
R120
82R-0603SMT
R281
OPEN-0603SMT
R281
OPEN-0603SMT
Y1
110-93-314-41-001
Y1
110-93-314-41-001
Q_N 1
Q8
VDD 14
GND
7
R124
270R-0603SMT
R124
270R-0603SMT
R280
200K-0603SMT
R280
200K-0603SMT
R127
82R-0603SMT
R127
82R-0603SMT
Y5
CW-P423F-312.5MHZ
Y5
CW-P423F-312.5MHZ
Q_N 5
Q4
VCC 6
GND
3
DIS#
1
NC
2
R114
130R-0603SMT
R114
130R-0603SMT
R282
OPEN-0603SMT
R282
OPEN-0603SMT
C189
10NF-0603SMT
C189
10NF-0603SMT
MUX
U17B
MC100LVEL56
MUX
U17B
MC100LVEL56
D1A
6
D1A_N
7
VBB1
8
D1B
9
D1B_N
10
VEE
11
Q1_N 12
Q1 13
VCC 14
SEL1
15
J24J24
1
2
3
4
5
R123
107R-0603SMT
R123
107R-0603SMT
R122
130R-0603SMT
R122
130R-0603SMT
R131
130R-0603SMT
R131
130R-0603SMT
R116
130R-0603SMT
R116
130R-0603SMT
R278
OPEN-0603SMT
R278
OPEN-0603SMT
J19
HEADER 3x1
J19
HEADER 3x1
1
3
2
R125
82R-0603SMT
R125
82R-0603SMT
+
C182
10UF-16V_TANTBSMT
+
C182
10UF-16V_TANTBSMT
J28
JUMPER1
J28
JUMPER1
12
R135
82R-0603SMT
R135
82R-0603SMT
U18
CY2304-1
U18
CY2304-1
REF
1
CLKA1
2
CLKA2
3
GND
4CLKB1 5
CLKB2 6
VDD 7
FBK 8
R284
OPEN-0603SMT
R284
OPEN-0603SMT
R112
1_6R-0603SMT
R112
1_6R-0603SMT
R279
OPEN-0603SMT
R279
OPEN-0603SMT
R132
130R-0603SMT
R132
130R-0603SMT
J25
JUMPER1
J25
JUMPER1
12
Y4
110-93-314-41-001
Y4
110-93-314-41-001
Q_N 1
Q8
VDD 14
GND
7
Q6
2N2222/SOT23
Q6
2N2222/SOT23
3
1
2
C185
100NF-0603SMT
C185
100NF-0603SMT
R141
10K-0603SMT
R141
10K-0603SMT
C195
100NF-0603SMT
C195
100NF-0603SMT
R136
82R-0603SMT
R136
82R-0603SMT
R130
130R-0603SMT
R130
130R-0603SMT
J27
HEADER 2X1
J27
HEADER 2X1
1
1
2
2
C183
100NF-0603SMT
C183
100NF-0603SMT
MUX
U17A
MC100LVEL56
MUX
U17A
MC100LVEL56
D0A
1
D0A_N
2
VBB0
3
D0B
4
D0B_N
5
COM_SEL
16
SEL0
17
Q0_N 18
Q0 19
VCC 20
R129
130R-0603SMT
R129
130R-0603SMT
C190
100NF-0603SMT
C190
100NF-0603SMT
Y2
CW-P423F-312.5MHZ
Y2
CW-P423F-312.5MHZ
Q_N 5
Q4
VCC 6
GND
3
DIS#
1
NC
2
+
C184
100NF-0603SMT
+
C184
100NF-0603SMT
J26
HEADER 3x1
J26
HEADER 3x1
1
3
2
Y3
CTS-CB3LV-3C-100.00MHZ
Y3
CTS-CB3LV-3C-100.00MHZ
N/C 1
GND 2
OUT
3
Vcc
4
R133
82R-0603SMT
R133
82R-0603SMT
J20
JUMPER1
J20
JUMPER1
1 2
R140
270R-0603SMT
R140
270R-0603SMT
R137
130R-0603SMT
R137
130R-0603SMT
R117
82R-0603SMT
R117
82R-0603SMT
+
C180
100NF-0603SMT
+
C180
100NF-0603SMT
C186
10NF-0603SMT
C186
10NF-0603SMT
C192
100NF-0603SMT
C192
100NF-0603SMT
J29J29
1
2
3
4
5
C187
100NF-0603SMT
C187
100NF-0603SMT
R119
82R-0603SMT
R119
82R-0603SMT
R142
82R-0603SMT
R142
82R-0603SMT
C500
100NF-0603SMT
C500
100NF-0603SMT
+
C191
100NF-0603SMT
+
C191
100NF-0603SMT
J30J30
1
2
3
4
5
R113
130R-0603SMT
R113
130R-0603SMT
+
C193
10UF-16V_TANTBSMT
+
C193
10UF-16V_TANTBSMT
R126
10K-0603SMT
R126
10K-0603SMT
J22
JUMPER1
J22
JUMPER1
1 2
24
LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Figure 11. Clocks (Cont.)
5
5
4
4
3
3
2
2
1
1
DD
C C
BB
A A
L_EXT_OUT_N
L_EXT_OUT_P
R_EXT_OUT_N
R_EXT_OUT_P
3_3V 3_3V
3_3V
3_3V
3_3V
3_3V
3_3V 3_3V
3_3V
3_3V
3_3V 3_3V
3_3V 3_3V
A_REFCLKN_L [5]
A_REFCLKP_L [5]
REFCLKP_L[7]
REFCLKN_L[7]
A_REFCLKN_R [5]
A_REFCLKP_R [5]
REFCLKP_R
[7]
REFCLKN_R[7]
FPGA_REFCLKP_L [12]
FPGA_REFCLKN_L [12]
FPGA_REFCLKP_R [12]
FPGA_REFCLKN_R [12]
Title
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SC PCI EXPRESS Card
1.0
Clocks(Continued)
C
814
Title
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SC PCI EXPRESS Card
1.0
Clocks(Continued)
C
814
Title
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SC PCI EXPRESS Card
1.0
Clocks(Continued)
C
814
NOTE: PLACE
TERMINATIONS
CLOSE TO U1
DEVICE.
NOTE: PLACE
TERMINATIONS
CLOSE TO U1
DEVICE.
NOTE: PLACE
TERMINATIONS
CLOSE TO U1
DEVICE.
NOTE: PLACE
TERMINATIONS
CLOSE TO U1
DEVICE.
R154
82R-0603SMT
R154
82R-0603SMT
R145
OPEN-0603SMT
R145
OPEN-0603SMT
R167
82R-0603SMT
R167
82R-0603SMT
J33J33
1
2
3
4
5
R153
82R-0603SMT
R153
82R-0603SMT
R165 62R-0603SMTR165 62R-0603SMT
R168
82R-0603SMT
R168
82R-0603SMT
R148
130R-0603SMT
R148
130R-0603SMT
U19B
MC100LVEL13D
U19B
MC100LVEL13D
CLKB
6
CLKB_N
7
VCC 8
Q0B_N 9
Q0B 10
VEE
11
Q1B_N 12
Q1B 13
Q2B_N 14
Q2B 15
R161
82R-0603SMT
R161
82R-0603SMT
U19A
MC100LVEL13D
U19A
MC100LVEL13D
Q0A_N 1
Q0A 2
VCC 3
CLKA
4
CLKA_N
5
VCC 16
Q2A_N 17
Q2A 18
Q1A_N 19
Q1A 20
R150
130R-0603SMT
R150
130R-0603SMT
R163
130R-0603SMT
R163
130R-0603SMT
R160
82R-0603SMT
R160
82R-0603SMT
R170
130R-0603SMT
R170
130R-0603SMT
J34J34
1
2
3
4
5
R162
130R-0603SMT
R162
130R-0603SMT
+
C199
100NF-0603SMT
+
C199
100NF-0603SMT
R146 62R-0603SMTR146 62R-0603SMT
R158
OPEN-0603SMT
R158
OPEN-0603SMT
+
C197
100NF-0603SMT
+
C197
100NF-0603SMT
R156
130R-0603SMT
R156
130R-0603SMT
R166
130R-0603SMT
R166
130R-0603SMT
R157
OPEN-0603SMT
R157
OPEN-0603SMT
R169
82R-0603SMT
R169
82R-0603SMT
R152
130R-0603SMT
R152
130R-0603SMT
R147 62R-0603SMTR147 62R-0603SMT
+
C198
100NF-0603SMT
+
C198
100NF-0603SMT
R155
82R-0603SMT
R155
82R-0603SMT
R171
82R-0603SMT
R171
82R-0603SMT
J31J31
1
2
3
4
5
R159
82R-0603SMT
R159
82R-0603SMT
R151
51R-0603SMT
R151
51R-0603SMT
R149
51R-0603SMT
R149
51R-0603SMT
R164 62R-0603SMTR164 62R-0603SMT
J32J32
1
2
3
4
5
R144
OPEN-0603SMT
R144
OPEN-0603SMT
25
LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Figure 12. QDR2 SRAM
5
5
4
4
3
3
2
2
1
1
DD
C C
BB
A A
QDR_D10
QDR_A4
QDR_A5
QDR_D11
QDR_A6
QDR_A7
QDR_A8
QDR_READ_N
QDR_A9
QDR_D13
QDR_A10
QDR_A11
QDR_D14
QDR_A12
QDR_A13
QDR_D15
QDR_A14
QDR_D16
VSENSE_QDR_VTT
QDR_K#
QDR_D1
QDR_D0
QDR_D2
QDR_D3
QDR_D5
QDR_D4
QDR_D6
QDR_D7
QDR_D8
QDR_D[0..17]
QDR_Q0
QDR_A15
QDR_Q1
QDR_Q2
QDR_Q3
QDR_Q4
QDR_Q5
QDR_Q7
QDR_Q8
QDR_Q6
QDR_Q9
QDR_Q10
QDR_Q12
QDR_Q14
QDR_Q13
QDR_Q11
QDR_Q15
QDR_K
QDR_Q16
QDR_Q17
QDR_A17
QDR_A16
QDR_A[0..17]
QDR_A0
QDR_A1
QDR_D9
QDR_A2
QDR_A3
QDR_D17
QDR_WRITE_N
QDR_VREF
QDR_CQ
QDR_Q[0..17]
QDR_VREF
QDR_D12
QDR_VREF
VDDQ
QDR_VTT
QDR_VTT
QDR_VTT
VDDQ
QDR_VTT
QDR_VTT
VDDQ
2_5V
1_8V VDDQ
QDR_VDD
1_8V
VDDQ
QDR_VDD
2_5V VDDQ
QDR_READ_N[12]
QDR_WRITE_N[12]
QDR_K[12]
QDR_K_#[12]
QDR_Q[0..17][12]
QDR_CQ
[12]
QDR_A[0..17]
[12]
QDR_D[0..17] [12]
Title
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SC PCI EXPRESS Card
1.0
QDR2 SRAM
C
914
Title
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SC PCI EXPRESS Card
1.0
QDR2 SRAM
C
914
Title
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SC PCI EXPRESS Card
1.0
QDR2 SRAM
C
914
Value should be 5 times
the desired output
Impedance
i.e. 50 ohms = 250 ohms
impedance
0 ohms = min. impedance
When Low
PLL bypassed
Place resistors
as close to
SRAM device
as possible
ALL Memory controller
buses, clocks, and control
traces must be 50 Ohm
Transmission lines
Place resistor pack as close to SRAM
device as possible
All Q lines should be
equal lengths and
length matched with CQ
Place resistors
as close to
SRAM device
as possible
All ADDRESS & DATA
lines should be
equal lengths and
length matched with
the K & K# and
WRITE# and READ#
Place resistor pack as close to
SRAM device as possible
C220
100NF-0603SMT
C220
100NF-0603SMT
C241
100NF-0603SMT
C241
100NF-0603SMT
R1R1
R1=50 Ohm
RP1
CTS-RT1402B7
R1R1
R1=50 Ohm
RP1
CTS-RT1402B7
A2 A2
B2 B2
C2 C2
D2 D2
E2 E2
F2 F2
G2 G2
H2 H2
J2 J2
A3
A3
B3
B3
C3
C3
D3
D3
E3
E3
F3
F3
G3
G3
H3
H3
J3
J3
A1 A1
B1 B1
C1 C1
D1 D1
E1 E1
F1 F1
G1 G1
H1 H1
J1 J1
C216
10NF-0603SMT
C216
10NF-0603SMT
C233
100NF-0603SMT
C233
100NF-0603SMT
R181
1K-0603SMT
R181
1K-0603SMT
C202
10NF-0603SMT
C202
10NF-0603SMT
C244
10NF-0603SMT
C244
10NF-0603SMT
R183
0R-0603SMT
R183
0R-0603SMT
C204
10NF-0603SMT
C204
10NF-0603SMT
C217
100NF-0603SMT
C217
100NF-0603SMT
+
C223
47UF-16V_TANTBSMT
+
C223
47UF-16V_TANTBSMT
C245
100NF-0603SMT
C245
100NF-0603SMT
C235
1UF-16V-0805SMT
C235
1UF-16V-0805SMT
C205
100NF-0603SMT
C205
100NF-0603SMT
C218
10NF-0603SMT
C218
10NF-0603SMT
R182
4_7K-0603SMT
R182
4_7K-0603SMT
C203
100NF-0603SMT
C203
100NF-0603SMT
C246
10NF-0603SMT
C246
10NF-0603SMT
+
C234
22UF-16V_TANTBSMT
+
C234
22UF-16V_TANTBSMT
C206
10NF-0603SMT
C206
10NF-0603SMT
C219
100NF-0603SMT
C219
100NF-0603SMT
C224
1UF-16V-0805SMT
C224
1UF-16V-0805SMT
C247
100NF-0603SMT
C247
100NF-0603SMT
R177
51R-0603SMT
R177
51R-0603SMT
C207
100NF-0603SMT
C207
100NF-0603SMT
C221
1UF-16V-0805SMT
C221
1UF-16V-0805SMT
C200
10NF-0603SMT
C200
10NF-0603SMT
C227
1UF-16V-0805SMT
C227
1UF-16V-0805SMT
R176
51R-0603SMT
R176
51R-0603SMT
C208
10NF-0603SMT
C208
10NF-0603SMT
R172
51R-0603SMT
R172
51R-0603SMT
+
C226
47UF-16V_TANTBSMT
+
C226
47UF-16V_TANTBSMT
C228
10NF-0603SMT
C228
10NF-0603SMT
C209
100NF-0603SMT
C209
100NF-0603SMT
R174
1K-0603SMT
R174
1K-0603SMT
C229
100NF-0603SMT
C229
100NF-0603SMT
C210
10NF-0603SMT
C210
10NF-0603SMT
R173
51R-0603SMT
R173
51R-0603SMT
U21
LP2996-SO8
U21
LP2996-SO8
GND
1
SD
2
VSENSE 3
VREF
4
VDDQ
5
AVIN 6
PVIN 7
VTT 8
C236
10NF-0603SMT
C236
10NF-0603SMT
C211
100NF-0603SMT
C211
100NF-0603SMT
C230
10NF-0603SMT
C230
10NF-0603SMT
FB2
BLM41PG471SN1L
FB2
BLM41PG471SN1L
C237
100NF-0603SMT
C237
100NF-0603SMT
C212
10NF-0603SMT
C212
10NF-0603SMT
R178
OPEN-0603SMT
R178
OPEN-0603SMT
C231
100NF-0603SMT
C231
100NF-0603SMT
C201
100NF-0603SMT
C201
100NF-0603SMT
R179
1K-0603SMT
R179
1K-0603SMT
C238
10NF-0603SMT
C238
10NF-0603SMT
+
C225
47UF-16V_TANTBSMT
+
C225
47UF-16V_TANTBSMT
QDRII-SRAM
U20A
CY7C1413AV18-2Mx18
QDRII-SRAM
U20A
CY7C1413AV18-2Mx18
D0 P10
D1 N11
D2 M11
D3 K10
D4 J11
D5 G11
D6 E10
D7 D11
D8 C11
D9 B3
D10 C3
D11 D2
D12 F3
D13 G2
D14 J3
D15 L3
D16 M3
D17 N2
NC B9
NC C9
NC D9
NC E9
NC F9
NC G9
NC J9
NC K9
NC L9
NC M9
NC N9
NC P9
NC B10
NC D10
NC F10
NC G10
NC L10
NC N10
DLL# H1
NC/SA21 A3
SA18
A9 BW0 B7
BW1 A5
NC B5
Q0
P11
Q1
M10
Q2
L11
Q3
K11
Q4
J10
Q5
F11
Q6
E11
Q7
C10
Q8
B11
Q9
B2
Q10
D3
Q11
E3
Q12
F2
Q13
G3
Q14
K3
Q15
L2
Q16
N3
Q17
P3
NC
B1
NC
C1
NC
D1
NC
E1
NC
F1
NC
G1
NC
J1
NC
K1
NC
L1
NC
M1
NC
N1
NC
P1
NC
C2
NC
E2
NC
J2
NC
K2
NC
M2
NC
P2
R# A8
W# A4
ZQ H11
CQ
A11
CQ#
A1
CP6
C# R6
KB6
K# A6
SA0
R3
SA1
R4
SA2
P4
SA3
R5
SA4
P5
SA5
N5
SA6
N6
SA7
N7
SA8
P7
SA9
R7
SA10
P8
SA11
R8
SA12
R9
SA13
B4
SA14
C5
SA15
C7
SA16
B8
SA17
C6
VSS/SA19
A2
VSS/SA20
A10
NC/SA22 A7
C213
100NF-0603SMT
C213
100NF-0603SMT
R1R1
R1=50 Ohm
RP2
CTS-RT1402B7
R1R1
R1=50 Ohm
RP2
CTS-RT1402B7
A2 A2
B2 B2
C2 C2
D2 D2
E2 E2
F2 F2
G2 G2
H2 H2
J2 J2
A3
A3
B3
B3
C3
C3
D3
D3
E3
E3
F3
F3
G3
G3
H3
H3
J3
J3
A1 A1
B1 B1
C1 C1
D1 D1
E1 E1
F1 F1
G1 G1
H1 H1
J1 J1
C239
100NF-0603SMT
C239
100NF-0603SMT
FB3
BLM41PG471SN1L
FB3
BLM41PG471SN1L
C214
10NF-0603SMT
C214
10NF-0603SMT
R175249R-0603SMT R175249R-0603SMT
C242
10NF-0603SMT
C242
10NF-0603SMT
C222
100NF-0603SMT
C222
100NF-0603SMT
C240
10NF-0603SMT
C240
10NF-0603SMT
R180
1K-0603SMT
R180
1K-0603SMT
C215
100NF-0603SMT
C215
100NF-0603SMT
C232
10NF-0603SMT
C232
10NF-0603SMT
C243
100NF-0603SMT
C243
100NF-0603SMT
QDR-II SRAM
Power/Gnd
U20B
CY7C1413AV18-2Mx18
QDR-II SRAM
Power/Gnd
U20B
CY7C1413AV18-2Mx18
VDDQ
G8
VDDQ
H9
VDDQ
G4
VDDQ
H4
VDDQ
H3
VDDQ
K4
VDDQ
H8
VDDQ
F4
VDDQ
K8
VDDQ
L8
VDDQ
J8
VDDQ
E4
VDDQ
F8
VDDQ
E8
VDDQ
J4
VDDQ
L4
VDD G5
VDD H7
VDD K7
VDD F5
VDD F7
VDD K5
VDD J5
VDD J7
VDD G7
VDD H5
VREF H2
VREF H10
VSS
M4
VSS
M5
VSS
M6
VSS
C8
VSS
L5
VSS
E7
VSS
E5
VSS
C4
VSS
F6
VSS
K6
VSS
L6
VSS
M7
VSS
L7
VSS
N8
VSS
M8
VSS
E6
VSS
D7
VSS
G6
VSS
H6
VSS
N4
VSS
D6
VSS
J6
VSS
D8
VSS
D4
VSS
D5
TCK R2
TDI R11
TDO R1
TMS R10
26
LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Figure 13. 10/100/1000 PHY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
4S
UB_A
IDM
3
P
_ID
M
PULL_DN
2S
U
B
_
A
IDM
2
P
_
I
D
M
0
SU
B
_
AIDM1P_
I
DM
PHY_TX_EN
PHY_TX_D3
MDIA_BUS0
ETH_EGP5
ETH_MAC_CLK_EN
ETH_COL
ETH_EGP5
ETH_EGP6
ETH_EGP7
ETH_EGP4
ETH_MDIO
PHY_TX_D4
3
SUB_AIDM2N_IDM
5SUB_AIDM3N_IDM
7SUB_AIDM4N_IDM
6S
UB_
A
IDM
4
P
_
I
DM
ETH_EGP2
X0
PULL_UPX1
ETH_EGP0
PHY_RX_D0
PHY_RX_D1
ETH_CRS
PHY_RX_D2
PHY_RX_D3
ETH_RESET_N
PHY_RX_ER
1
SUB_
A
IDM1N_IDM
PHY_TX_D5
MDIA_BUS3
ETH_MDC
MDIA_BUS4
MDIA_BUS2
MDIA_BUS7
MDIA_BUS6
MDIA_BUS1
ETH_RX_D2
ETH_RX_D0
ETH_RX_D3
ETH_RX_D1
ETH_RX_ER
ETH_RX_DV
ETH_RX_CLK
ETH_TX_CLK
PHY_TX_ER
PHY_TX_D6
ETH_CLK_TO_MAC
ETH_EGP6
PHY_TX_D7
PHY_RX_CLK
ETH_MAC_CLK_EN
ETH_EGP7
ETH_RX_D[0..7]
MDIA_BUS5
ETH_EGP0
PHY_TX_D[0..7]
PHY_TX_D0
PHY_TX_ENETH_TX_EN
ETH_TX_ER
ETH_TX_D4
ETH_TX_D6
ETH_TX_D5
ETH_TX_D7
ETH_TX_D0
ETH_TX_D1
ETH_TX_D2
ETH_TX_D3
ETH_GTX_CLK PHY_GTX_CLK
PHY_TX_D3
PHY_TX_D4
PHY_TX_D5
PHY_TX_D6
PHY_TX_D7
PHY_TX_D0
PHY_TX_D1
PHY_TX_D2
PHY_TX_CLK
MDIA_BUS[0..7]
ETH_EGP[0..7]
PHY_TX_ER
PHY_TX_D1
PHY_TX_D2
ETH_EGP4
PHY_RX_D4
PHY_RX_D5
ETH_RX_D4
PHY_RX_D7
PHY_RX_D6
ETH_RX_D7
ETH_RX_D5
ETH_RX_D6
ETH_EGP7
PHY_CRS
PHY_COL
ETH_RESET_N
ETH_EGP[0..7]
PHY_RX_DV
ETH_EGP1
ETH_EGP3
1_8V
2_5V
2_5V
2_5V
2_5V
2_5V
2_5V
2_5V
1_8V
2_5V
2_5V
2_5V
ETH_RX_D[0..7]
[12]
ETH_EGP[0..7][2]
ETH_TX_D[0..7][12]
ETH_RX_ER[2]
ETH_TX_CLK[12]
ETH_GTX_CLK
[12]
ETH_RX_DV[12]
ETH_MDIO
[2]
ETH_CRS[12]
ETH_MDC[2]
ETH_COL[12]
ETH_TX_ER[2]
ETH_RX_CLK[12]
ETH_TX_EN
[12]
ETH_RESET_N [2]
ETH_CLK_TO_MAC[12]
ETH_MAC_CLK_EN [2]
Title
veR
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:eta
Dof
SC-900fpBGA x1 PCI EXPRESS Card
1.0
10/100/1000 PHY
C
10 14
Title
veR
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c
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jorPe
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S
teehS:etaD of
SC-900fpBGA x1 PCI EXPRESS Card
1.0
10/100/1000 PHY
C
10 14
Title
veR
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jorPe
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S
teehS:etaD of
SC-900fpBGA x1 PCI EXPRESS Card
1.0
10/100/1000 PHY
C
10 14
Bypass for VDD_CORE and VDD pins. Bypass every
other VDD pair, alternating 0.1 and 0.01uF caps.
Place termination
resistors TX_D0-7,
TX_ER, TX_EN,
GTX_CLK as close to
FPGA as possible
using 50 ohm
impedence traces.
MDI IO traces must be 50 ohm impedence.
10/100/1000
Giga Phyter V
Place termination
resistors RX_D0-7,
RX_ER, RX_DV, RX_CLK,
TX_CLK, CRS, COL
as close to the
G-PHY as possible
using 50 ohm impedence
traces.
Giga Phyter
Decoupling Caps
Place 49 ohm termination resistors as
close as possible to G-PHY.
The associated 0.01uF capacitor should
be placed close to the 49 ohm resistors.
Place caps close to GPHY
Place these close to G-PHY
Giga Phyter address = 01h
(Hard Reset)
Place xtal
close to
G-PHY
Place R close to CLOCK_IN
Bypass for BG_VDD
MH1 and MH2
are 0.100"
diameter plated
through holes
(Do not
populate)
Ethernet RJ45 Connector
Place caps close to RJ45 jack TX1
Place 9.76K resistor as close
to G-PHY as possible
Bypass for IO_VDD pins. Bypass every other
IO_VDD pair, alternating 0.1 and 0.01uF caps.
(Do not
populate)
R237
324R-0402SMT
0402
R237
324R-0402SMT
0402
1 2
R221
2K-0402SMT
0402
R221
2K-0402SMT
0402
R195 33R-0402SMTR195 33R-0402SMT
R230
324R-0402SMT
0402
R230
324R-0402SMT
0402
1 2
R206 33R-0402SMTR206 33R-0402SMT
R236
49_9R-0402SMT
R236
49_9R-0402SMT
C248 10NF-0402SMT
0402
C248 10NF-0402SMT
0402
12
R185 10R-0402SMT
0402
R185 10R-0402SMT
0402
R231
324R-0402SMT
0402
R231
324R-0402SMT
0402
1 2
R205
2K-0402SMT
0402
R205
2K-0402SMT
0402
R220
33R-0402SMT
R220
33R-0402SMT
R215 470R-0603SMT
0402
R215 470R-0603SMT
0402
1 2
C266
100NF-0402SMT
0402
C266
100NF-0402SMT
0402
12
C250 22UF-16V_TANTBSMT
tantb
C250 22UF-16V_TANTBSMT
tantb
12
R196 33R-0402SMTR196 33R-0402SMT
R233
49_9R-0402SMT
R233
49_9R-0402SMT
R201 9_76K-0402SMT
0402
R201 9_76K-0402SMT
0402
1 2
R193 33R-0402SMTR193 33R-0402SMT
C272
100NF-0402SMT
0402
C272
100NF-0402SMT
0402
12
C267
10NF-0402SMT
0402
C267
10NF-0402SMT
0402
12
R234
49_9R-0402SMT
R234
49_9R-0402SMT
C262
10NF-0402SMT
0402
C262
10NF-0402SMT
0402
12
R222
2K-0402SMT
0402
R222
2K-0402SMT
0402
C265
10UF-Ceramic X5R/0805SMT
0805
C265
10UF-Ceramic X5R/0805SMT
0805
12
C273
10NF-0402SMT
0402
C273
10NF-0402SMT
0402
12
1
2
3
6
4
5
7
8
RJ45
J35
RJ-45 Belfuse 0826-1A1T-23
1
2
3
6
4
5
7
8
RJ45
J35
RJ-45 Belfuse 0826-1A1T-23
MDIA-
10 MDACT
12 MDIA+
11
SHLD1 19
MDIB+
4
MDIB-
5MDBCT
6
MDIC+
3
MDCCT
1
MDIC-
2
MDID+
8
MDDCT
7
MDID-
9SHLD2 20
LED1- 13
LED1+ 14
LED2- 15
LED2+ 16
D14
LED-SMT1206_GREEN
D14
LED-SMT1206_GREEN
R235
49_9R-0402SMT
R235
49_9R-0402SMT
D13
LED-SMT1206_GREEN
D13
LED-SMT1206_GREEN
C257
10NF-0402SMT
0402
C257
10NF-0402SMT
0402
R214 2K-0402SMTR214 2K-0402SMT
C268
100NF-0402SMT
0402
C268
100NF-0402SMT
0402
12
R208 33R-0402SMTR208 33R-0402SMT
C249 22UF-16V_TANTBSMT
tantb
C249 22UF-16V_TANTBSMT
tantb
1
2
C258
10NF-0402SMT
0402
C258
10NF-0402SMT
0402
Y6
25MHz/HC49U
HC-49/U
Y6
25MHz/HC49U
HC-49/U
C263
100NF-0402SMT
0402
C263
100NF-0402SMT
0402
12
R224
49_9R-0402SMT
R224
49_9R-0402SMT
R219 2K-0402SMT
0402
R219 2K-0402SMT
0402
C256
10NF-0402SMT
0402
C256
10NF-0402SMT
0402
12
R197 33R-0402SMTR197 33R-0402SMT
R207 33R-0402SMTR207 33R-0402SMT
C261
100NF-0402SMT
0402
C261
100NF-0402SMT
0402
12
R216
1M-0402SMT
0402
R216
1M-0402SMT
0402
2K-0402SMT
0402
8
C251
10PF-0402SMT
0402
C251
10PF-0402SMT
0402
12
R198 33R-0402SMTR198 33R-0402SMT
C255
10NF-0402SMT
0402
C255
10NF-0402SMT
0402
12
R225
49_9R-0402SMT
R225
49_9R-0402SMT
R209 33R-0402SMTR209 33R-0402SMT
R184 18R-0402SMT
0402
R184 18R-0402SMT
0402
C264
10NF-0402SMT
0402
C264
10NF-0402SMT
0402
12
R218 2K-0402SMT
0402
R218 2K-0402SMT
0402
C271
10NF-0402SMT
0402
C271
10NF-0402SMT
0402
12
R194 33R-0402SMTR194 33R-0402SMT
RX_VDD
U22
DP83865
RX_VDD
U22
DP83865
TMS
27
TDO
28
TDI
31
TRST
32
VDD25_0 96
VDD0 100
IO_VDD2 15
IO_VDD1 4
PGM_VDD0 98
CORE_VDD1 11
CORE_VDD2 19
CORE_VDD3 25
TCK
24
IO_VDD3 21
CORE_VDD4 35
IO_VDD4 29
IO_VDD5 37
CORE_VDD5 48
IO_VDD6 42
IO_VDD7 53
CORE_VDD6 63
IO_VDD8 58
CORE_VDD7 73
IO_VDD9 69
O_VDD0 83
IO_VDD10 77
CORE_VDD8 92
IO_VDD11 90
RX_DVDD0 103
VDD1 105
VDD2 111
VDD3 117
VDD4 123
VSS0
99
PGM_VSS0
97
IO_VSS1
5
CORE_VSS1
12
CORE_VSS2
20
IO_VSS2
16
CORE_VSS3
26
IO_VSS3
22
CORE_VSS4
36
IO_VSS4
30
IO_VSS5
38
CORE_VSS5
49
IO_VSS6
43
IO_VSS7
54
CORE_VSS6
64
IO_VSS8
59
CORE_VSS7
74
IO_VSS9
70
O_VSS0
82
IO_VSS10
78
CORE_VSS8
93
IO_VSS11
91
RX_DVSS0
104
VSS1
106
CD_VSS1
107
CD_VSS2
110
VSS2
112
CD2_VSS1
113
CD2_VSS2
116
VSS3
118
CD3_VSS2
122 CD3_VSS1
119
VSS4
124
CD4_VSS1
125
CD4_VSS2
128
EGP0 (NC_MODE) 1
EGP1 2
EGP2 (Interrupt) 3
EGP3 (TX_TCLK) 6
EGP4 (SPEED0 / ACT_LED) 7
EGP5 (SPEED1 / LINK10) 8
EGP6 (DUPLEX_EN / LINK100) 9
EGP7 (AN_EN / LINK1000) 10
GP0 (PHYAD0 / DUPLEX_LED) 13
GP1 (PHYAD1) 14
GP2 (PHYAD2) 17
GP3 (PHYAD3) 18
GP4 (PHYAD4) 95
GP5 (MULTI_EN) 94
GP6 (MDIX_EN) 89
GP7 (MAC_CLK_EN) 88
RXD0 / RGMII_RXD0
56
RXD1 / RGMII_RXD1
55
RXD2 / RGMII_RXD2
52
RXD3 / RGMII_RXD3
51
RXD4
50
RXD5
47
RXD6
46
RXD7
45
TXD0 / RGMII_TXD0
76
TXD1 / RGMII_TXD1
75
TXD2 / RGMII_TXD2
72
TXD3 / RGMII_TXD3
71
TXD4
68
TXD5
67
TXD6
66
TXD7
65
MDIA_P 108
MDIA_N 109
MDIB_P 114
MDIB_N 115
MDIC_P 120
MDIC_N 121
MDID_P 126
MDID_N 127
BG_REF 102
TM0
23
RESET_N 33
VDD_SEL 34
COL
39 CRS / RGMII_SEL1
40
RX_ER / RGMII_RX_CTL
41
RX_DV / RGMII_RXC
44
RX_CLK
57
TX_CLK / RGMII_SEL0
60
TX_ER
61
TX_EN / RGMII_TX_CTL
62
GTX_CLK / RGMII_TXC
79
MDIO
80
MDC
81
REF_SEL 84
CLK_TO_MAC 85
CLOCK_IN
86 CLOCK_OUT
87
BG_VDD 101
R199 33R-0402SMTR199 33R-0402SMT
R217 470R-0603SMT
0402
R217 470R-0603SMT
0402
12
R226
49_9R-0402SMT
R226
49_9R-0402SMT
R213 33R-0402SMTR213 33R-0402SMT
R186 33R-0402SMTR186 33R-0402SMT
C260
10NF-0402SMT
0402
C260
10NF-0402SMT
0402
12
C254
10NF-0402SMT
C254
10NF-0402SMT
12
MH2
MHOLE_1
0.100_PTH
MH2
MHOLE_1
0.100_PTH
1
R200 33R-0402SMTR200 33R-0402SMT
R192 33R-0402SMTR192 33R-0402SMT
C252
10PF-0402SMT
0402
C252
10PF-0402SMT
0402
12
R238
2K-0402SMT
0402
R238
2K-0402SMT
0402
1 2
R190 33R-0402SMTR190 33R-0402SMT
R187 33R-0402SMTR187 33R-0402SMT
C270
100NF-0402SMT
0402
C270
100NF-0402SMT
0402
12
R223
49_9R-0402SMT
R223
49_9R-0402SMT
C259
100NF-0402SMT
0402
C259
100NF-0402SMT
0402
12
C274
10NF-0402SMT
0402
C274
10NF-0402SMT
0402
12
R202 33R-0402SMTR202 33R-0402SMT
R191 33R-0402SMTR191 33R-0402SMT
R229
2K-0402SMT
0402
R229
2K-0402SMT
0402
1 2
MH1
MHOLE_1
0.100_PTH
MH1
MHOLE_1
0.100_PTH
1
R188 33R-0402SMTR188 33R-0402SMT
R211 33R-0402SMTR211 33R-0402SMT
R203 33R-0402SMTR203 33R-0402SMT
C269
10NF-0402SMT
0402
C269
10NF-0402SMT
0402
12
R232
2K-0402SMT
0402
R232
2K-0402SMT
0402
1 2
C253
1UF-16V-0805SMT
0805
C253
1UF-16V-0805SMT
0805
12
R189 33R-0402SMTR189 33R-0402SMT
R227
2K-0402SMT
0402
R227
2K-0402SMT
0402
1 2
R212 33R-0402SMTR212 33R-0402SMT
R228
324R-0402SMT
0402
R228
324R-0402SMT
0402
1 2
R204 33R-0402SMTR204 33R-0402SMT
27
LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Figure 14. RLDRAM
5
5
4
4
3
3
2
2
1
1
DD
C C
BB
A A
VREF_B
RLDRAM_REF#
RLDRAM_QK0
RLDRAM_D3
RLDRAM_D2
RLDRAM_D1
RLDRAM_D0
RLDRAM_D8
RLDRAM_D7
RLDRAM_D6
RLDRAM_D5
RLDRAM_D4
RLDRAM_D17
RLDRAM_D16
RLDRAM_D15
RLDRAM_D14
RLDRAM_D13
RLDRAM_D12
RLDRAM_D11
RLDRAM_D10
RLDRAM_D9
RLDRAM_QK1
RLDRAM_QVLD
RLDRAM_CS#
RLDRAM_WE#
RLDRAM_A8
RLDRAM_A6
RLDRAM_A5
RLDRAM_A4
RLDRAM_A3
RLDRAM_A7
RLDRAM_A2
RLDRAM_A1
RLDRAM_A0
RLDRAM_DM
RLDRAM_A16
RLDRAM_A15
RLDRAM_A14
RLDRAM_A13
RLDRAM_A12
RLDRAM_A11
RLDRAM_A10
RLDRAM_A9
RLDRAM_A18
RLDRAM_A19
RLDRAM_A20
RLDRAM_A21
RLDRAM_A22
RLDRAM_CK#
RLDRAM_CK
RLDRAM_DK#
RLDRAM_DK
RLDRAM_REF#
RLDRAM_BA2
RLDRAM_CS#
RLDRAM_WE#
RLDRAM_DM
RLDRAM_BA2
RLDRAM_BA1
RLDRAM_BA0
RLDRAM_A17 RLDRAM_Q8
RLDRAM_Q9
RLDRAM_Q10
RLDRAM_Q11
RLDRAM_Q12
RLDRAM_Q13
RLDRAM_Q14
RLDRAM_Q15
RLDRAM_Q1
RLDRAM_Q16
RLDRAM_Q17
RLDRAM_Q2
RLDRAM_Q3
RLDRAM_Q4
RLDRAM_Q5
RLDRAM_Q6
RLDRAM_Q7
RLDRAM_Q0
RLDRAM_A19
RLDRAM_A18
RLDRAM_A17
RLDRAM_A16
RLDRAM_A15
RLDRAM_A14
RLDRAM_A13
RLDRAM_A12
RLDRAM_A11
RLDRAM_A10
RLDRAM_A9
RLDRAM_A8
RLDRAM_A6
RLDRAM_A5
RLDRAM_A4
RLDRAM_A3
RLDRAM_A7
RLDRAM_A2
RLDRAM_A1
RLDRAM_A0
VREF_RLD
VREF_B_W
RLDRAM_BA1
RLDRAM_BA0
RLDRAM_A20
RLDRAM_A21
RLDRAM_A22
2_5V
RLDRAM_VTT
1_8V
RLDRAM_VTT
RLDRAM_VEXT
RLDRAM_VDD
RLDRAM_VEXT
2_5V
RLDRAM_VEXT
RLDRAM_VDD
1_8V
RLDRAM_VDD
RLDRAM_VDDQ
1_8V
RLDRAM_VDDQ
RLDRAM_VEXT
RLDRAM_VDDQ
RLDRAM_VDD
RLDRAM_VDDQ
RLDRAM_VDDQ
RLDRAM_VTT
RLDRAM_QK0 [12]
RLDRAM_D[0:17] [12]
RLDRAM_QVLD [12]
RLDRAM_CK [12]
RLDRAM_DK# [12]
RLDRAM_REF# [12]
RLDRAM_BA1 [12]
RLDRAM_WE# [12]
RLDRAM_CK# [12]
RLDRAM_DK [12]
RLDRAM_BA2 [12]
RLDRAM_CS# [12]
RLDRAM_BA0 [12]
RLDRAM_DM [12]
RLDRAM_QK1 [12]
RLDRAM_Q[0:17] [12]
RLDRAM_A[0:19] [12]
Title
veR
t
cejo
r
P
e
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iS
t
ee
h
S
:
etaD of
SC PCI EXPRESS Card
1.0
RLDRAM
C
11 14
Title
veR
t
c
e
jo
r
Pe
zi
S
t
e
e
h
S
:
etaD of
SC PCI EXPRESS Card
1.0
RLDRAM
C
11 14
Title
veR
t
c
e
jo
r
Pe
zi
S
t
e
e
h
S
:
etaD of
SC PCI EXPRESS Card
1.0
RLDRAM
C
11 14
Place resistors as close to RLDRAM device as possible.
Place SP Testpoints (.025 square pads)
around RLDRAM BGA
as close as possible to edge balls.
C307
100NF-0603SMT
C307
100NF-0603SMT
R247
220R-0603SMT
R247
220R-0603SMT
+
C297
47UF-16V_TANTBSMT
+
C297
47UF-16V_TANTBSMT
R1
R1
R1=50 Ohm
RP4
CTS-RT1402B7
R1
R1
R1=50 Ohm
RP4
CTS-RT1402B7
A2 A2
B2 B2
C2 C2
D2 D2
E2 E2
F2 F2
G2 G2
H2 H2
J2 J2
A3
A3
B3
B3
C3
C3
D3
D3
E3
E3
F3
F3
G3
G3
H3
H3
J3
J3
A1 A1
B1 B1
C1 C1
D1 D1
E1 E1
F1 F1
G1 G1
H1 H1
J1 J1
R240
1K_ADJ/SMT3MM
R240
1K_ADJ/SMT3MM
C314
100NF-0603SMT
C314
100NF-0603SMT
C290
10NF-0603SMT
C290
10NF-0603SMT
+
C284
47UF-16V_TANTBSMT
+
C284
47UF-16V_TANTBSMT
C304
1UF-16V-0805SMT
C304
1UF-16V-0805SMT
FB5
BLM41PG471SN1L
FB5
BLM41PG471SN1L
C285
1UF-16V-0805SMT
C285
1UF-16V-0805SMT
C299
1UF-16V-0805SMT
C299
1UF-16V-0805SMT
C315
10NF-0603SMT
C315
10NF-0603SMT
U24
LP2996-SO8
U24
LP2996-SO8
GND
1
SD 2
VSENSE
3VREF 4
VDDQ 5
AVIN 6
PVIN 7
VTT
8
C292
10NF-0603SMT
C292
10NF-0603SMT
R246
OPEN-0603SMT
R246
OPEN-0603SMT
SP2SP2
1
+
C298
22UF-16V_TANTBSMT
+
C298
22UF-16V_TANTBSMT
C283
100NF-0603SMT
C283
100NF-0603SMT
C291
100NF-0603SMT
C291
100NF-0603SMT
C316
100NF-0603SMT
C316
100NF-0603SMT
C280
10NF-0603SMT
C280
10NF-0603SMT
+
C303
22UF-16V_TANTBSMT
+
C303
22UF-16V_TANTBSMT
C288
1UF-16V-0805SMT
C288
1UF-16V-0805SMT
C309
100NF-0603SMT
C309
100NF-0603SMT
C313
1UF-16V-0805SMT
C313
1UF-16V-0805SMT
C310
1UF-16V-0805SMT
C310
1UF-16V-0805SMT
C308
100NF-0603SMT
C308
100NF-0603SMT
R242
0R-0603SMT
R242
0R-0603SMT
C282
10NF-0603SMT
C282
10NF-0603SMT
SP3SP3
1
+
C312
22UF-16V_TANTBSMT
+
C312
22UF-16V_TANTBSMT
+
C289
100UF-FKSMT
+
C289
100UF-FKSMT
C277
100NF-0603SMT
C277
100NF-0603SMT
C281
100NF-0603SMT
C281
100NF-0603SMT
+
C311
47UF-16V_TANTBSMT
+
C311
47UF-16V_TANTBSMT
C294
1UF-16V-0805SMT
C294
1UF-16V-0805SMT
SP4SP4
1
C287
100NF-0603SMT
C287
100NF-0603SMT
C279
10NF-0603SMT
C279
10NF-0603SMT
SP1SP1
1
R1R1
R1=50 Ohm
RP3
CTS-RT1402B7
R1R1
R1=50 Ohm
RP3
CTS-RT1402B7
A2 A2
B2 B2
C2 C2
D2 D2
E2 E2
F2 F2
G2 G2
H2 H2
J2 J2
A3
A3
B3
B3
C3
C3
D3
D3
E3
E3
F3
F3
G3
G3
H3
H3
J3
J3
A1 A1
B1 B1
C1 C1
D1 D1
E1 E1
F1 F1
G1 G1
H1 H1
J1 J1
+
C295
47UF-16V_TANTBSMT
+
C295
47UF-16V_TANTBSMT
C278
100NF-0603SMT
C278
100NF-0603SMT
R245
0R-0603SMT
R245
0R-0603SMT
SP5SP5
1
FB6
BLM41PG471SN1L
FB6
BLM41PG471SN1L
R241
1K-0603SMT
R241
1K-0603SMT
SP6SP6
1
C305
100NF-0603SMT
C305
100NF-0603SMT
RLDRAM-II
CIO/SIO
144-BALL FBGA
U23
RLDRAM_II_CIO_SIO_0
RLDRAM-II
CIO/SIO
144-BALL FBGA
U23
RLDRAM_II_CIO_SIO_0
VREF
A1 VREF
V1
ZQ
V2
NFU1
J1 NFU2
J2
VDDQ
C4 VDDQ
C9 VDDQ
E4 VDDQ
E9 VDDQ
P4 VDDQ
P9 VDDQ
T4 VDDQ
T9
VDD
K10
VDD
K9
VDD
K4
VDD
K3
VDD
B1
VDD
G4
VDD
G9
VDD
J3
VDD
J4
VDD
J9
VDD
J10
VDD
M9
VDD
M4
VDD
U1
VDD
U12
VDD
B12
VSS
V9
VSS
V4
VSS
R1
VSS
L10
VSS
L9
VSS
L4
VSS
L3
VSS
A2
VSS
A4
VSS
A9
VSS
D12
VSS
H3
VSS
H4
VSS
H9
VSS
H10
VSS
R12
VSSQ
U9
VSSQ
U4
VSSQ
B4
VSSQ
B9
VSSQ
D4
VSSQ
D9
VSSQ
F4
VSSQ
F9
VSSQ
N4
VSSQ
N9
VSSQ
R4
VSSQ
R9
TDI
V12
TDO
V11
TMS
A11
TCK
A12
VTT
T12
VTT
T1
VTT
C12
VTT
C1
VEXT
V10
VEXT
V3
VEXT
A10
VEXT
A3
Q17 U3
Q16 T3
Q15 P3
Q14 N3
Q13 U10
Q12 T10
Q11 R10
Q10 P10
Q9 N10
Q8 F3
Q7 E3
Q6 D3
Q5 C3
Q4 B3
Q3 F10
Q2 E10
Q1 C10
Q0 B10
QK0 D11
QK0# D10
QK1# R3
QK1 R2
A0 G12
A1 G11
A2 G10
A3 H12
A4 H11
A5 F1
A6 G2
A7 G3
A8 G1
A9 H2
A10 M12
A11 M11
A12 M10
A13 L12
A14 L11
A15 P1
A16 M2
A17 M3
A18 N1
A19 N12
A20 E12
A21 E1
A22 D1
D0 B11
D1 C11
D2 E11
D3 F11
D4 B2
D5 C2
D6 D2
D7 E2
D8 F2
D9 N11
D10 P11
D11 R11
D12 T11
D13 U11
D14 N2
D15 P2
D16 T2
D17 U2
REF# L1
CS# L2
WE# M1
DM P12
CK# K12
CK J12
B2 H1
B1 K11
B0 J11
DK K1
DK# K2
QVLD F12
C293
100NF-0603SMT
C293
100NF-0603SMT
SP7SP7
1
R244
OPEN-0603SMT
R244
OPEN-0603SMT
FB4
BLM41PG471SN1L
FB4
BLM41PG471SN1L
C300
100NF-0603SMT
C300
100NF-0603SMT
C306
10NF-0603SMT
C306
10NF-0603SMT
SP8SP8
1
C276
1UF-16V-0805SMT
C276
1UF-16V-0805SMT
R243
4_7K-0603SMT
R243
4_7K-0603SMT
C301
10NF-0603SMT
C301
10NF-0603SMT
+
C286
10UF-16V_TANTBSMT
+
C286
10UF-16V_TANTBSMT
+
C275
22UF-16V_TANTBSMT
+
C275
22UF-16V_TANTBSMT
C296
1UF-16V-0805SMT
C296
1UF-16V-0805SMT
R239
1K-0603SMT
R239
1K-0603SMT
C302
100NF-0603SMT
C302
100NF-0603SMT
28
LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Figure 15. FPGA Banks
5
5
4
4
3
3
2
2
1
1
DD
C C
BB
A A
QDR_READ_N
QDR_WRITE_N
QDR_A4
QDR_A0
QDR_A1
QDR_A2
QDR_A3
QDR_A5
QDR_A6
QDR_A7
QDR_A8
QDR_A9
QDR_A10
QDR_A11
QDR_A12
QDR_A13
QDR_A14
QDR_A15
QDR_A17
QDR_A16
QDR_D12
QDR_D10
QDR_D11
QDR_D13
QDR_D14
QDR_D15
QDR_D16
QDR_D3
QDR_D5
QDR_D0
QDR_D1
QDR_D17
QDR_D2
QDR_D4
QDR_D6
QDR_D9
QDR_D7
QDR_D8
QDR_Q[0..17]
QDR_Q0
QDR_Q1
QDR_Q2
QDR_Q3
QDR_Q4
QDR_Q5
QDR_Q7
QDR_Q8
QDR_Q6
QDR_Q9
QDR_Q10
QDR_Q12
QDR_Q14
QDR_Q13
QDR_Q11
QDR_Q15
QDR_Q16
QDR_Q17
QDR_K
QDR_K#
QDR_D[0..17]
LOOP_P2
LOOP_N2
LOOP_P3
LOOP_N3
LOOP_P1
LOOP_N1
LOOP_P0
LOOP_N0
LOOP_P0
LOOP_N0
LOOP_P1
LOOP_N1
DIFFR_3
DIFFR_3
LVDS_OUTP
LVDS_OUTN
SC_QDR_VREF
SC_QDR_VREF
SC_QDR_VREF
LOOP_N2
LOOP_P2
LOOP_N3
LOOP_P3
LVDS_INP
LVDS_INN
LVDS_PROBEN
LVDS_PROBEP
LA_12
LA_14
LA_11
LA_13
LA_7
LA_5
LA_10
LA_9
LA_6
LA_4
LA_2
LA_1
LA_8
LA_0
LA_3
LA_15
LA_31
LA_30
LA_25
LA_27
LA_22
LA_29
LA_21
LA_24
LA_20
LA_28
LA_26
LA_19
LA_17
LA_18
LA_16
LA_23
RLDRAM_A19
RLDRAM_A18
RLDRAM_A17
RLDRAM_A16
RLDRAM_A15
RLDRAM_A14
RLDRAM_A13
RLDRAM_A12
RLDRAM_A11
RLDRAM_A10
RLDRAM_A9
RLDRAM_A8
RLDRAM_A6
RLDRAM_A5
RLDRAM_A4
RLDRAM_A3
RLDRAM_A7
RLDRAM_A2
RLDRAM_A1
RLDRAM_A0
RLDRAM_Q1
RLDRAM_D0
RLDRAM_D4
RLDRAM_D17
RLDRAM_D16
RLDRAM_D15
RLDRAM_D14
RLDRAM_D12
RLDRAM_D11
RLDRAM_D13
RLDRAM_D10
RLDRAM_D1
RLDRAM_Q15
RLDRAM_Q2
RLDRAM_Q3
RLDRAM_Q0
RLDRAM_Q4
RLDRAM_Q11
RLDRAM_Q5
RLDRAM_Q10
RLDRAM_Q6
RLDRAM_Q17
RLDRAM_Q7
RLDRAM_Q16
RLDRAM_Q8
RLDRAM_Q9
RLDRAM_Q12
RLDRAM_Q13
RLDRAM_Q14
RLDRAM_BA0
RLDRAM_BA1
RLDRAM_BA2
RLDRAM_CK
RLDRAM_CK#
RLDRAM_CS#
RLDRAM_DM
RLDRAM_QVLD
RLDRAM_WE#
RLDRAM_REF#
SC_RLDRAM_VREF SC_RLDRAM_VREF
RLDRAM_DK#
RLDRAM_DK
RLDRAM_D2
RLDRAM_D3
RLDRAM_D8
RLDRAM_D7
RLDRAM_D9
RLDRAM_D6
RLDRAM_D5
LA_CLK2
LA_CLK1
LA_CLK2
LA_CLK1
LA_2
LA_1
LA_0
LA_3
LA_7
LA_5
LA_10
LA_9
LA_6
LA_4
LA_8
LA_12
LA_14
LA_11
LA_13
LA_22
LA_23
LA_19
LA_20
LA_21
LA_15
LA_17
LA_18
LA_16
LA_24
LA_31
LA_25
LA_27
LA_29
LA_30
LA_26
LA_28
SWITCH5
SWITCH6
SWITCH8
SWITCH3
SWITCH2
SWITCH4
SWITCH1
SWITCH7
QDR_A4
QDR_A5
QDR_A6
QDR_A7
QDR_A8
QDR_A9
QDR_A10
QDR_A11
QDR_A12
QDR_A13
QDR_A14
QDR_A15
QDR_A17
QDR_A16
QDR_A[0..17]
QDR_A0
QDR_A1
QDR_A2
QDR_A3
SC_QDR_VREF
SC_QDR_VREF
LED5
LED6
LED1
LED2
LED3
LED4
LED7
LED8
RLDRAM_QK0
RLDRAM_QK1
QDR_CQ
ETH_CLK_TO_MAC
ETH_RX_D1
ETH_RX_D3
ETH_RX_D0
ETH_RX_D2
ETH_TX_D4
ETH_TX_D6
ETH_TX_D5
ETH_TX_D7
ETH_TX_D0
ETH_TX_D1
ETH_TX_D2
ETH_TX_D3
ETH_TX_EN
ETH_TX_CLK
ETH_GTX_CLK
ETH_RX_DV
ETH_COL
ETH_CRS
ETH_RX_CLK
ETH_RX_D6
ETH_RX_D4
ETH_RX_D7
ETH_RX_D5
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
QDR_READ_N [9]
QDR_WRITE_N [9]
QDR_D[0..17] [9]
QDR_Q[0..17] [9]
QDR_K [9]
QDR_K_# [9]
SC_QDR_VREF[3]
LVDS_INP [13]
LVDS_INN [13]
LVDS_PROBEN [13]
LVDS_PROBEP [13]
LA_[0..31]
[13]
RLDRAM_Q[0:17] [11]
RLDRAM_A[0:19][11]
RLDRAM_BA0
[11]
RLDRAM_BA1
[11]
RLDRAM_BA2[11]
RLDRAM_CK [11]
RLDRAM_CK# [11]
RLDRAM_CS#
[11]
RLDRAM_DM
[11]
RLDRAM_QVLD [11]
RLDRAM_WE#
[11]
RLDRAM_REF#
[11]
SC_RLDRAM_VREF [3]
RLDRAM_DK# [11]
RLDRAM_DK [11]
RLDRAM_D[0:17] [11]
LA_CLK2[13]
LA_CLK1[13]
SWITCH[1..8]
[13]
QDR_A[0..17]
[9]
LVDS_OUTN [13]
LVDS_OUTP [13]
PCIE_CLKN[5]
PCIE_CLKP
[5]
FPGA_REFCLKP_R [8]
FPGA_REFCLKN_R [8]
LED[1..8]
[13]
RLDRAM_QK0 [11]
RLDRAM_QK1 [11]
QDR_CQ [9]
ETH_CLK_TO_MAC
[10]
FPGA_REFCLKP_L[8]
FPGA_REFCLKN_L
[8]
ETH_RX_D[0..7]
[10]
ETH_TX_D[0..7][10]
ETH_TX_CLK[10]
ETH_GTX_CLK[10]
ETH_TX_EN
[10]
ETH_RX_DV
[10]
ETH_CRS
[10]
ETH_COL[10]
ETH_RX_CLK
[10]
OSC_IN_3 [7]
OSC_IN_4 [7] Title
veR
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cejo
r
P
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h
S
:
etaD of
SC PCI EXPRESS Card
1.0
FPGA Banks
C
12 14
Title
veR
t
c
e
jo
r
Pe
zi
S
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e
e
h
S
:
etaD of
SC PCI EXPRESS Card
1.0
FPGA Banks
C
12 14
Title
veR
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c
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jo
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Pe
zi
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S
:
etaD of
SC PCI EXPRESS Card
1.0
FPGA Banks
C
12 14
LOOP[2:3],
Not
Available in SCM15
SCM15 QDR MACO PREFERRED PINS
MUST USE LVCMOS18
BUFFER TYPES
FOR LOGIC ANALYZER
LEDs
and
Switches
Available
in SCM15
& SCM25
SCM25 RLDRAM MACO PREFERRED PINS
BANK 2, 3, 4, 5, 6
VCCIO = 1.8V
BANK 7
VCCIO = 2.5V
PHY to MAC Interface/
Available in SCM15 & SCM25
Off Page Connections
R285
0R-0603SMT
R285
0R-0603SMT
R250
1_1K-0603SMT
R250
1_1K-0603SMT
R248
BOURNS-3224W-202E-2K
R248
BOURNS-3224W-202E-2K
SC-900FPBGA
LEFT
Bank 7
Bank 6
U1M
SC25-900fpBGA
SC-900FPBGA
LEFT
Bank 7
Bank 6
U1M
SC25-900fpBGA
PL55C/LLC_DLLT_IN_E/LLC_DLLT_FB_F AB6
PL55D/LLC_DLLC_IN_E/LLC_DLLC_FB_F AC5
PL57C/LLC_PLLT_IN_B/LLC_PLLT_FB_A AC6
PL57D/LLC_PLLC_IN_B/LLC_PLLC_FB_A AC7
PL30C/PCLKT6_3 P4
PL56A AE3
PL16C/DEBUG_BUS13
J6
PL16D
J5
PL17C/ULC_PLLT_IN_B/ULC_PLLT_FB_A
K4
PL17D/ULC_PLLC_IN_B/ULC_PLLC_FB_A
J4
PL18C/DEBUG_BUS12
K5
PL18D/VREF2_7/DEBUG_BUS6
K6
PL22C
E1
PL22D
D1
PL21A
L5
PL21B
M5
PL16A/ULC_PLLT_IN_A/ULC_PLLT_FB_B/DEBUG_BUS11
D3
PL16B/ULC_PLLC_IN_A/ULC_PLLC_FB_B/DEBUG_BUS10
D2
PL17A/ULC_DLLT_IN_C/ULC_DLLT_FB_D/DEBUG_BUS9
E3
PL17B/ULC_DLLC_IN_C/ULC_DLLC_FB_D/DEBUG_BUS8
E2
PL18A/ULC_DLLT_IN_D/ULC_DLLT_FB_C
F3
PL18B/ULC_DLLC_IN_D/ULC_DLLC_FB_C
G3
PL20A
G2
PL20B
G1
PL25A/TESTCFGN
K3
PL25B/DEBUG_BUS7
L3
PL22A
F2
PL22B
F1
PL29A/PCLKT6_0 N2
PL29B/PCLKC6_0 N1
PL30A N3
PL30B P3
PL31A P2
PL31B R2
PL34A P1
PL34B R1
PL35A T2
PL35B U2
PL47A Y2
PL47B AA2
PL48B AC1
PL48A AB1
PL56B AF3
PL25C/VREF1_7/DEBUG_BUS5
L6
PL25D/DIFFR_7/DEBUG_BUS4
M6
PL35C T6
PL29C/PCLKT6_1 R7
PL29D/PCLKC6_1 R6
PL31C/PCLKT6_2 T3
PL31D/PCLKC6_2 R3
PL34C/VREF1_6 R5
PL34D R4
PL47C Y3
PL47D W3
PL49A Y5
PL49B Y6
PL51A AD2
PL51B AE2
PL52A AC3
PL52B AD3
PL53A AC4
PL53B AD4
PL55A AF1
PL55B AG1
PL57A/LLC_DLLT_IN_F/LLC_DLLT_FB_E AF2
PL57B/LLC_DLLC_IN_F/LLC_DLLC_FB_E AG2
PL51D/VREF2_6 AB5
PL48C W5
PL26B/PCLKC7_1/DEBUG_BUS2
K1 PL26A/PCLKT7_1/DEBUG_BUS3
J1
PL27A/PCLKT7_0/DEBUG_BUS1
L1
PL27B/PCLKC7_0/DEBUG_BUS0
M1
PL27C/PCLKT7_2/DEBUG_BUS14
P8
PL27D/PCLKC7_2/DEBUG_BUS15
R8
PL36A U3
PL36B V3
PL38A T1
PL38B U1
PL39A T5
PL39B T4
PL40A U4
PL40B U5
PL42A V1
PL42B W1
PL42C U6
PL42D/DIFFR_6 V6
PL43A V2
PL43B W2
PL43C V5
PL43D V4
PL44A Y1
PL44B AA1
R249
0R-0603SMT
R249
0R-0603SMT
SC-900FPBGA
Bottom
Bank 5
Bank 4
U1J
SC25-900fpBGA
SC-900FPBGA
Bottom
Bank 5
Bank 4
U1J
SC25-900fpBGA
PB4C
AD6
PB5A
AJ2
PB5B
AK2
PB5C
AD7
PB7A
AF7
PB7B
AF6
PB8A
AH4
PB8B
AG5
PB9A
AF8
PB9B
AG8
PB11B
AJ3
PB11C
AF9
PB11D
AE10
PB12A
AK3
PB16B
AK5
PB28B
AK11
PB29A
AH15
PB29B
AG15
PB31A
AH12
PB31B
AJ13
PB31C
AD15
PB31D
AE15
PB32A
AK12
PB32B
AK13
PB33A
AJ14
PB33B
AJ15
PB35A
AK14
PB37A AK16
PB41B AK19
PB3A/LLC_PLLT_IN_A/LLC_PLLT_FB_B
AH1
PB4A/LLC_DLLT_IN_D/LLC_DLLT_FB_C
AG3
PB4B/LLC_DLLC_IN_D/LLC_DLLC_FB_C
AH2
PB23B/PCLKC5_0
AJ12
PB5D/VREF1_5
AD8
PB3B/LLC_PLLC_IN_A/LLC_PLLC_FB_B
AJ1
PB3C/LLC_DLLT_IN_C/LLC_DLLT_FB_D
AF4
PB3D/LLC_DLLC_IN_C/LLC_DLLC_FB_D
AE5
PB11A
AH3
PB35B
AK15
PB28A
AK10 PB25B/PCLKC5_2
AG14 PB25A/PCLKT5_2
AH14
PB12B
AJ4
PB13A
AE11
PB13B
AF10
PB15A
AH7
PB15B
AH8
PB15C
AE12
PB15D
AE13
PB16A
AK4
PB17A
AJ5
PB17B
AJ6
PB19A
AJ7
PB19B
AJ8
PB20A/PCLKT5_3
AH10
PB20B/PCLKC5_3
AH11
PB20C/PCLKT5_4
AF13
PB20D/PCLKC5_4
AE14
PB21A/PCLKT5_5
AK6
PB21B/PCLKC5_5
AK7
PB21C/DIFFR_5
AF14
PB21D
AF15
PB23A/PCLKT5_0
AJ11
PB23C
AG13
PB23D/VREF2_5
AH13
PB24B/PCLKC5_1
AK9 PB24A/PCLKT5_1
AK8
PB52C/PCLKT4_4 AE19
PB49D AF19
PB47B/PCLKC4_1 AG18
PB57B AE23
PB57A AD23
PB56C AH21
PB56B AH23
PB56A AH22
PB55B AG22
PB53B AF21
PB53A AE21
PB37B AK17
PB38A AJ16
PB38B AJ17
PB38C AE16
PB39A AH16
PB39B AG16
PB38D AF16
PB42A AH17
PB41A AK18
PB42B AH18
PB42C AF17
PB42D AG17
PB43A AJ18
PB43B AJ19
PB46A/PCLKT4_2 AK20
PB46B/PCLKC4_2 AK21
PB47A/PCLKT4_1 AF18
PB49A/PCLKT4_0 AJ20
PB49C/VREF2_4 AG19
PB51A/PCLKT4_5 AK22
PB51B/PCLKC4_5 AK23
PB51C/DIFFR_4 AH19
PB51D AH20
PB52D/PCLKC4_4 AE20
PB52B/PCLKC4_3 AK25
PB52A/PCLKT4_3 AK24
PB59A AH24
PB59B AH25
PB69C/LRC_DLLT_IN_D/LRC_DLLT_FB_C AG28
PB69D/LRC_DLLC_IN_D/LRC_DLLC_FB_C AG29
PB64B AF25
PB64A AG25
PB69B/LRC_PLLC_IN_A/LRC_PLLC_FB_B AH30
PB67A AJ28
PB67B AH28
PB67C/VREF1_4 AE24
PB67D AE25
PB68C AE26
PB68D AD25
PB60A AK28
PB63A AF24
PB63B AG24
PB60B AK29
PB60C AE22
PB61A AH26
PB61B AH27
PB68A/LRC_DLLT_IN_C/LRC_DLLT_FB_D AJ29
PB68B/LRC_DLLC_IN_C/LRC_DLLC_FB_D AH29
PB69A/LRC_PLLT_IN_A/LRC_PLLT_FB_B AJ30
PB65A AG26
PB65B AF27
PB55A AG21
PB49B/PCLKC4_0 AJ21
SC-900FPBGA
RIGHT
Bank 2
BANK 3
U1N
SC25-900fpBGA
SC-900FPBGA
RIGHT
Bank 2
BANK 3
U1N
SC25-900fpBGA
PR40A R27
PR40B T27
PR42A V28
PR42B W28
PR43A T30
PR43B U30
PR43C V26
PR43D W26
PR44A V29
PR44B W29
PR47A V30
PR47B W30
PR47C Y27
PR47D W27
PR48A Y30
PR48B AA30
PR49A AA25
PR49B AB25
PR51A AD30
PR51B AE30
PR52A AB28
PR52B AC28
PR53A AD29
PR53B AE29
PR55A AF30
PR55B AG30
PR55C/LRC_DLLT_IN_E/LRC_DLLT_FB_F AB26
PR55D/LRC_DLLC_IN_E/LRC_DLLC_FB_F AC26
PR56A AC27
PR56B AD28
PR57C/LRC_PLLT_IN_B/LRC_PLLT_FB_A AD26
PR57D/LRC_PLLC_IN_B/LRC_PLLC_FB_A AC25
PR25D/DIFFR_2
M26
PR42D/DIFFR_3 V25
PR48C Y25
PR42C U25
PR29C/PCLKT3_1 R26
PR29D/PCLKC3_1 R25
PR16A/URC_PLLT_IN_A/URC_PLLT_FB_B
D28
PR16B/URC_PLLC_IN_A/URC_PLLC_FB_B
E28
PR17A/URC_DLLT_IN_C/URC_DLLT_FB_D
D29
PR17B/URC_DLLC_IN_C/URC_DLLC_FB_D
D30
PR18A/URC_DLLT_IN_D/URC_DLLT_FB_C
G28
PR18B/URC_DLLC_IN_D/URC_DLLC_FB_C
F28
PR20A
G27
PR20B
H27
PR21A
L27
PR21B
M27
PR22A
E29
PR22B
E30
PR25A
F29
PR25B
G29
PR25C/VREF1_2
M25
PR26A/PCLKT2_1
H30
PR26B/PCLKC2_1
J30
PR27A/PCLKT2_0
K30
PR27B/PCLKC2_0
L30
PR16C
H26
PR16D
G26
PR18C
L25
PR18D/VREF2_2
L26
PR22C
J28
PR22D
H28
PR27D/PCLKC2_2
N27
PR57A/LRC_DLLT_IN_F/LRC_DLLT_FB_E AF29
PR57B/LRC_DLLC_IN_F/LRC_DLLC_FB_E AF28
PR27C/PCLKT2_2
P26
PR17D/URC_PLLC_IN_B/URC_PLLC_FB_A
K26 PR17C/URC_PLLT_IN_B/URC_PLLT_FB_A
K25
PR29A/PCLKT3_0 P28
PR29B/PCLKC3_0 R28
PR30A N28
PR30B N29
PR31A P29
PR31B R29
PR34A T28
PR34B U28
PR34C/VREF1_3 T26
PR35A M29
PR35B N30
PR36A T29
PR36B U29
PR38A P30
PR38B R30
PR39A U27
PR39B V27
PR30C/PCLKT3_3 P27
PR31C/PCLKT3_2 L29
PR31D/PCLKC3_2 M30
PR34D U26
PR35C T24
PR51D/VREF2_3 AB27
29
LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Figure 16. I2C RS232 Test
5
5
4
4
3
3
2
2
1
1
DD
C C
BB
A A
RS232_RXD
RS232_TXD
SDA
SCL
2_5V
PTEMP
SCL
SDA
LA_12
LA_15
LA_14
LA_11
LA_13
LA_7
LA_5
LA_10
LA_9
LA_1
LA_6
LA_4
LA_2
LA_8
LA_0
LA_CLK1
LA_3
LA_31
LA_30
LA_25
LA_27
LA_22
LA_29
LA_21
LA_24
LA_20
LA_28
LA_26
LA_19
LA_17
LA_18
LA_16
LA_CLK2
LA_23
SWITCH5
SWITCH6
SWITCH8
SWITCH3
SWITCH2
SWITCH4
SWITCH1
RED1
BLUE2
SWITCH7
LED1
LED7
LED4
LED6
LED8
LED1
LED2
LED3
LED4
LED5
LED6
LED7
LED8
LCD_RS LCD5
LCD_E LCD6
LCD_DB1 LCD7
LCD_DB3 LCD8
LCD_DB5 LCD9
LCD_DB7 LCD10
LCD_R/WLCD0
LCD_DB0LCD1
LCD_DB2LCD2
LCD_DB4LCD3
LCD_DB6LCD4
ANODE
LCD[0..10]
LVDS_PROBEN
LVDS_PROBEP
LVDS_INP
LVDS_INN
LVDS_OUTP
LVDS_OUTN
LED2 YELLOW1
GREEN1 BLUE1
RED2
LED3
LED5
GREEN2
YELLOW2
3_3V
3_3V
2_5V
12_0V
12_0V
1_8V
12_0V
12_0V
12_0V 12_0V
12_0V
12_0V
12_0V
SDA [2]
SCL [2]
RS232_RXD
[2]
RS232_TXD
[2]
LA_CLK2 [12]
LA_[0..31][12]
LA_CLK1
[12]
SWITCH[1..8] [12]
LED[1..8]
[12]
LCD[0..10] [2]
PTEMP[2]
LVDS_PROBEN [12]
LVDS_INP [12]
LVDS_INN [12]
LVDS_OUTP [12]
LVDS_OUTN [12]
LVDS_PROBEP [12]
Title
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SC-900fpBGA x1 PCI EXPRESS Card
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I2C,RS232,Test
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Title
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I2C,RS232,Test
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Title
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SC-900fpBGA x1 PCI EXPRESS Card
1.0
I2C,RS232,Test
C
13 14
Address-1001100
STATUS
LEDS
LOGIC ANALYZER PROBE
SWITCHES
EEPROM
TEMP SENSE
I2C
RS232
Backlight
Adjustment
Contrast
Adjustment
LCD Connector
LED1
LED2
LED3
LED4
LED5
LED6
LED7
LED8
D15
D16
D17
D18
D19
D20
D21
D22
Layout LEDs along
Backpanel PCB edge
G
D17
LED-SMT1206_GREEN
G
D17
LED-SMT1206_GREEN
RN2A
EXB2HV103JV
10K
RN2A
EXB2HV103JV
10K
116
+
C325
10UF-16V_TANTBSMT
+
C325
10UF-16V_TANTBSMT
8 9
Y
D20
LED-SMT1206_YELLOW
Y
D20
LED-SMT1206_YELLOW
R273
0R-0603SMT
R273
0R-0603SMT
G
D21
LED-SMT1206_GREEN
G
D21
LED-SMT1206_GREEN
RN2H
EXB2HV103JV
10K
RN2H
EXB2HV103JV
10K
8
9
R257
680R-0603SMT
R257
680R-0603SMT
J38
Johnson 142-0711-201
J38
Johnson 142-0711-201
1
2
C322
2200PF-0603SMT
C322
2200PF-0603SMT
J41
LCD_Connector
J41
LCD_Connector
ANODE
1CATHODE 2
VSS
3
RS 6
VO
5VDD 4
R/W
7E8
DB0
9DB1 10
DB2
11 DB3 12
DB4
13 DB5 14
DB6
15 DB7 16
SW4
TDA08H0SK1
SW4
TDA08H0SK1
1
12
23
34
45
56
67
78
8
99
10 10
11 11
12 12
13 13
14 14
15 15
16 16
R268
470R-1206SMT
R268
470R-1206SMT
R258
680R-0603SMT
R258
680R-0603SMT
R272
0R-0603SMT
R272
0R-0603SMT
RN3A
EXB2HV472JV
4.7K
RN3A
EXB2HV472JV
4.7K
116
R265
10K-0603SMT
R265
10K-0603SMT
R255
470R-1206SMT
R255
470R-1206SMT
J39
Johnson 142-0711-201
J39
Johnson 142-0711-201
1
2
R259
680R-0603SMT
R259
680R-0603SMT
R271
470R-1206SMT
R271
470R-1206SMT
RN2E
EXB2HV103JV
10K
RN2E
EXB2HV103JV
10K
512
R262
200R-0805SMT
R262
200R-0805SMT
314
RN2F
EXB2HV103JV
10K
RN2F
EXB2HV103JV
10K
611
Q11
2N2222/SOT23
Q11
2N2222/SOT23
3
1
2
U26
MAX6692
U26
MAX6692
VCC
1
DXP
2
DXN
3
OVERTN
4GND 5
ALERTN 6
SMDAT 7
SMCLK 8
R260
680R-0603SMT
R260
680R-0603SMT
J40
Johnson 142-0711-201
J40
Johnson 142-0711-201
1
2
VR2
20K POT Murata PV37W203C01
PV37W
VR2
20K POT Murata PV37W203C01
PV37W
13
2
R274
100R-0603SMT
R274
100R-0603SMT
U25
MAX3232
TSSOP16
U25
MAX3232
TSSOP16
GND 15
VCC
16
R1IN
13
R2IN
8
T2IN
10 T1IN
11
C1+
1
C1-
3
C2+
4
C2-
5
R1OUT 12
R2OUT 9
T1OUT 14
T2OUT 7
V+
2
V-
6
B
D18
LED-SMT1206_BLUE
B
D18
LED-SMT1206_BLUE
Q13
2N2222/SOT23
Q13
2N2222/SOT23
3
1
2
215
R261
680R-0603SMT
R261
680R-0603SMT
R269
100K-0603SMT
R269
100K-0603SMT
Q12
2N2222/SOT23
Q12
2N2222/SOT23
3
1
2
C318
100NF-0402SMT
0402
C318
100NF-0402SMT
0402
C317
100NF-0402SMT
0402
C317
100NF-0402SMT
0402
413
C323
100NF-0603SMT
C323
100NF-0603SMT
VR1
20K POT Murata PV37W101C01
PV37W
VR1
20K POT Murata PV37W101C01
PV37W
13
2
DP2DP2
1
2
3
RN2G
EXB2HV103JV
10K
RN2G
EXB2HV103JV
10K
7
10
R252
470R-1206SMT
R252
470R-1206SMT
+
C326
10UF-16V_TANTBSMT
+
C326
10UF-16V_TANTBSMT
R251
470R-1206SMT
R251
470R-1206SMT
U27
24AA1025-ISM
U27
24AA1025-ISM
GND
4VCC 8
SDA 5
SCL 6
A0
1
A1
2
A2
3WP 7
Q8
2N2222/SOT23
Q8
2N2222/SOT23
3
1
2
Y
D16
LED-SMT1206_YELLOW
Y
D16
LED-SMT1206_YELLOW
R267
470R-1206SMT
R267
470R-1206SMT
LA1
2_767004
LA1
2_767004
5V
1SCL 2
GND
3SDA 4
CLK1
5CLK 6
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27 28 28
29
29 30 30
31
31 32 32
33
33 34 34
35
35 36 36
37
37 38 38
R
D15
LED-SMT1206_RED
R
D15
LED-SMT1206_RED
C319
100NF-0402SMT
0402
C319
100NF-0402SMT
0402
R264
10K-0603SMT
R264
10K-0603SMT
R
D19
LED-SMT1206_RED
R
D19
LED-SMT1206_RED
R254
470R-1206SMT
R254
470R-1206SMT
Q9
2N2222/SOT23
Q9
2N2222/SOT23
3
1
2
611
R266
680R-0603SMT
R266
680R-0603SMT
C321
100NF-0603SMT
C321
100NF-0603SMT
R263
10K-0603SMT
R263
10K-0603SMT
R277
0R-0805SMT
R277
0R-0805SMT
RN2C
EXB2HV103JV
10K
RN2C
EXB2HV103JV
10K
3
14
Q10
2N2222/SOT23
Q10
2N2222/SOT23
3
1
2
J37
Johnson 142-0711-201
J37
Johnson 142-0711-201
1
2
R253
680R-0603SMT
R253
680R-0603SMT
U28
LD1085CDT50-DPAK
U28
LD1085CDT50-DPAK
GND
1
VOUT 2
VIN
3
512
C327
100NF-0603SMT
0603
C327
100NF-0603SMT
0603
Q14
2N2222/SOT23
Q14
2N2222/SOT23
3
1
2
J36
HEADER 5X2
J36
HEADER 5X2
2
4
6
8
10
1
3
5
7
9
R276
OPEN-0805SMT
R276
OPEN-0805SMT
B
D22
LED-SMT1206_BLUE
B
D22
LED-SMT1206_BLUE
R256
680R-0603SMT
R256
680R-0603SMT
Q15
2N2222/SOT23
Q15
2N2222/SOT23
3
1
2
C320
100NF-0402SMT
0402
C320
100NF-0402SMT
0402
710
RN2D
EXB2HV103JV
10K
RN2D
EXB2HV103JV
10K
413
C324
100NF-0603SMT
C324
100NF-0603SMT
R270
470R-1206SMT
R270
470R-1206SMT
R275
100R-0603SMT
R275
100R-0603SMT
RN2B
EXB2HV103JV
10K
RN2B
EXB2HV103JV
10K
215
30
LatticeSC PCI Express x1
Lattice Semiconductor Evaluation Board User’s Guide
Figure 17. VSS Decoupling
5
5
4
4
3
3
2
2
1
1
DD
C C
BB
A A
VDDOB
2_5V
VCC_CORE
2_5V
VCCIO1
1_8V
SC_RLDRAM_VTT
SC_QDR_VTT
2_5V
1_2VDDA
VDDIB
Title
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VSS/Decoupling
C
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ALL CAPS PLACED UNDER BGA
VCCAUX
VCCIO1
3.3V or
2.5V
VCCIO2
VCCIO3
VCCIO4
VCCIO6
VCCIO7
VDDOB
VDDAX25
VDDRX
VDDTX
VDDP
VCC CORE
HSTL
VTT
VCCIO5
VCC12
VDDIB
TWO HOLES NEEDED FOR
FACEPLATE ATTACHMENT
PER PCIe Spec
C415
1000PF-0402SMT
C415
1000PF-0402SMT
C432
1000PF-0402SMT
C432
1000PF-0402SMT
C477
1000PF-0402SMT
C477
1000PF-0402SMT
C464
1000PF-0402SMT
C464
1000PF-0402SMT
C474
1000PF-0402SMT
C474
1000PF-0402SMT
C450
1000PF-0402SMT
C450
1000PF-0402SMT
C349
1000PF-0402SMT
C349
1000PF-0402SMT
C416
1000PF-0402SMT
C416
1000PF-0402SMT
C396
1000PF-0402SMT
C396
1000PF-0402SMT
C356
1000PF-0402SMT
C356
1000PF-0402SMT
C361
1000PF-0402SMT
C361
1000PF-0402SMT
C404
1000PF-0402SMT
C404
1000PF-0402SMT
C382
1000PF-0402SMT
C382
1000PF-0402SMT
C422
1000PF-0402SMT
C422
1000PF-0402SMT
C355
1000PF-0402SMT
C355
1000PF-0402SMT
C419
1000PF-0402SMT
C419
1000PF-0402SMT
C476
1000PF-0402SMT
C476
1000PF-0402SMT
C491
1000PF-0402SMT
C491
1000PF-0402SMT
C408
1000PF-0402SMT
C408
1000PF-0402SMT
C483
1000PF-0402SMT
C483
1000PF-0402SMT
C388
22PF-0402SMT
C388
22PF-0402SMT
C423
1000PF-0402SMT
C423
1000PF-0402SMT
C449
1000PF-0402SMT
C449
1000PF-0402SMT
C375
1000PF-0402SMT
C375
1000PF-0402SMT
C342
1000PF-0402SMT
C342
1000PF-0402SMT
C362
1000PF-0402SMT
C362
1000PF-0402SMT
C386
22PF-0402SMT
C386
22PF-0402SMT
C330
1000PF-0402SMT
C330
1000PF-0402SMT
C379
1000PF-0402SMT
C379
1000PF-0402SMT
C427
1000PF-0402SMT
C427
1000PF-0402SMT
C337
1000PF-0402SMT
C337
1000PF-0402SMT
C344
1000PF-0402SMT
C344
1000PF-0402SMT
C490
1000PF-0402SMT
C490
1000PF-0402SMT
C470
1000PF-0402SMT
C470
1000PF-0402SMT
C417
1000PF-0402SMT
C417
1000PF-0402SMT
C394
1000PF-0402SMT
C394
1000PF-0402SMT
C412
1000PF-0402SMT
C412
1000PF-0402SMT
C331
1000PF-0402SMT
C331
1000PF-0402SMT
C343
1000PF-0402SMT
C343
1000PF-0402SMT
C406
1000PF-0402SMT
C406
1000PF-0402SMT
C475
1000PF-0402SMT
C475
1000PF-0402SMT
C351
1000PF-0402SMT
C351
1000PF-0402SMT
C410
1000PF-0402SMT
C410
1000PF-0402SMT
C478
1000PF-0402SMT
C478
1000PF-0402SMT
C363
1000PF-0402SMT
C363
1000PF-0402SMT
C429
1000PF-0402SMT
C429
1000PF-0402SMT
C459
1000PF-0402SMT
C459
1000PF-0402SMT
C433
1000PF-0402SMT
C433
1000PF-0402SMT
C488
1000PF-0402SMT
C488
1000PF-0402SMT
C395
1000PF-0402SMT
C395
1000PF-0402SMT
C390
1000PF-0402SMT
C390
1000PF-0402SMT
C402
1000PF-0402SMT
C402
1000PF-0402SMT
C446
1000PF-0402SMT
C446
1000PF-0402SMT
C414
1000PF-0402SMT
C414
1000PF-0402SMT
C411
1000PF-0402SMT
C411
1000PF-0402SMT
C405
1000PF-0402SMT
C405
1000PF-0402SMT
C461
1000PF-0402SMT
C461
1000PF-0402SMT
C431
1000PF-0402SMT
C431
1000PF-0402SMT
C389
1000PF-0402SMT
C389
1000PF-0402SMT
C462
1000PF-0402SMT
C462
1000PF-0402SMT
C333
1000PF-0402SMT
C333
1000PF-0402SMT
C358
1000PF-0402SMT
C358
1000PF-0402SMT
C458
1000PF-0402SMT
C458
1000PF-0402SMT
C401
1000PF-0402SMT
C401
1000PF-0402SMT
C454
1000PF-0402SMT
C454
1000PF-0402SMT
C430
1000PF-0402SMT
C430
1000PF-0402SMT
C357
1000PF-0402SMT
C357
1000PF-0402SMT
C480
1000PF-0402SMT
C480
1000PF-0402SMT
C338
1000PF-0402SMT
C338
1000PF-0402SMT
C385
1000PF-0402SMT
C385
1000PF-0402SMT
C424
1000PF-0402SMT
C424
1000PF-0402SMT
C420
1000PF-0402SMT
C420
1000PF-0402SMT
C437
1000PF-0402SMT
C437
1000PF-0402SMT
C463
1000PF-0402SMT
C463
1000PF-0402SMT
C384
1000PF-0402SMT
C384
1000PF-0402SMT
C457
1000PF-0402SMT
C457
1000PF-0402SMT
C494
1000PF-0402SMT
C494
1000PF-0402SMT
C472
1000PF-0402SMT
C472
1000PF-0402SMT
C336
1000PF-0402SMT
C336
1000PF-0402SMT
C498
1000PF-0402SMT
C498
1000PF-0402SMT
MH3
M HOLE2
MH3
M HOLE2
C387
1000PF-0402SMT
C387
1000PF-0402SMT
C334
1000PF-0402SMT
C334
1000PF-0402SMT
C493
1000PF-0402SMT
C493
1000PF-0402SMT
C365
1000PF-0402SMT
C365
1000PF-0402SMT
C434
1000PF-0402SMT
C434
1000PF-0402SMT
C465
1000PF-0402SMT
C465
1000PF-0402SMT
C374
1000PF-0402SMT
C374
1000PF-0402SMT
C366
1000PF-0402SMT
C366
1000PF-0402SMT
MH4
M HOLE2
MH4
M HOLE2
C409
1000PF-0402SMT
C409
1000PF-0402SMT
C487
1000PF-0402SMT
C487
1000PF-0402SMT
C383
1000PF-0402SMT
C383
1000PF-0402SMT
C469
1000PF-0402SMT
C469
1000PF-0402SMT
C399
1000PF-0402SMT
C399
1000PF-0402SMT
C380
1000PF-0402SMT
C380
1000PF-0402SMT
C369
1000PF-0402SMT
C369
1000PF-0402SMT
C341
1000PF-0402SMT
C341
1000PF-0402SMT
C486
1000PF-0402SMT
C486
1000PF-0402SMT
C381
1000PF-0402SMT
C381
1000PF-0402SMT
C456
1000PF-0402SMT
C456
1000PF-0402SMT
C492
1000PF-0402SMT
C492
1000PF-0402SMT
C352
1000PF-0402SMT
C352
1000PF-0402SMT
MH5
M HOLE2
MH5
M HOLE2
C364
1000PF-0402SMT
C364
1000PF-0402SMT
C359
1000PF-0402SMT
C359
1000PF-0402SMT
C373
1000PF-0402SMT
C373
1000PF-0402SMT
C413
1000PF-0402SMT
C413
1000PF-0402SMT
C481
1000PF-0402SMT
C481
1000PF-0402SMT
C397
1000PF-0402SMT
C397
1000PF-0402SMT
C482
1000PF-0402SMT
C482
1000PF-0402SMT
C403
1000PF-0402SMT
C403
1000PF-0402SMT
C495
1000PF-0402SMT
C495
1000PF-0402SMT
C353
1000PF-0402SMT
C353
1000PF-0402SMT
C368
1000PF-0402SMT
C368
1000PF-0402SMT
C455
1000PF-0402SMT
C455
1000PF-0402SMT
C347
1000PF-0402SMT
C347
1000PF-0402SMT
C468
1000PF-0402SMT
C468
1000PF-0402SMT
C489
1000PF-0402SMT
C489
1000PF-0402SMT
C473
1000PF-0402SMT
C473
1000PF-0402SMT
C367
1000PF-0402SMT
C367
1000PF-0402SMT
C453
1000PF-0402SMT
C453
1000PF-0402SMT
C377
1000PF-0402SMT
C377
1000PF-0402SMT
C354
1000PF-0402SMT
C354
1000PF-0402SMT
C346
1000PF-0402SMT
C346
1000PF-0402SMT
C393
1000PF-0402SMT
C393
1000PF-0402SMT
C479
1000PF-0402SMT
C479
1000PF-0402SMT
C435
1000PF-0402SMT
C435
1000PF-0402SMT
C335
1000PF-0402SMT
C335
1000PF-0402SMT
C378
1000PF-0402SMT
C378
1000PF-0402SMT
C398
1000PF-0402SMT
C398
1000PF-0402SMT
C328
1000PF-0402SMT
C328
1000PF-0402SMT
C376
1000PF-0402SMT
C376
1000PF-0402SMT
C345
1000PF-0402SMT
C345
1000PF-0402SMT
C466
1000PF-0402SMT
C466
1000PF-0402SMT
C407
1000PF-0402SMT
C407
1000PF-0402SMT
C436
1000PF-0402SMT
C436
1000PF-0402SMT
VSS
SC-900FPBGA
U1F
SC25-900fpBGA
VSS
SC-900FPBGA
U1F
SC25-900fpBGA
GND AJ10
GND AJ27
GND AK26
GND AJ22
GND AF20
GND AJ25
GND AF23
GND AF22
GND AE27
GND AA27
GND AB29
GND Y29
GND Y26
GND AC30
GND F27
GND E27
GND F30
GND P25
GND H29
GND K29
GND R24
GND M28
GND J27
GND N26
GND E20
GND E21
GND F21
GND F23
GND D21
GND D20
GND G23
GND E18
GND C20
GND C11
GND A12
GND F8
GND E11
GND G8
GND D11
GND D10
GND H7
GND F10
GND E10
GND
Y19
GND
Y20
GND
N15
GND
N16
GND
N17
GND
N18
GND
N19
GND
N20
GND
P11
GND
P12
GND
P13
GND
P14
GND
P15
GND
P16
GND
P17
GND
P18
GND
P19
GND
P20
GND
R10
GND
R11
GND
R12
GND
R13
GND
R14
GND
R15
GND
R16
GND
R17
GND
R18
GND
R19
GND
R20
GND
R21
GND
T10
GND
T11
GND
T12
GND
T13
GND
T14
GND
T15
GND
T16
GND
T17
GND
T18
GND
T19
GND
T20
GND
T21
GND U11
GND U12
GND U13
GND U14
GND U15
GND U16
GND U17
GND U18
GND U19
GND U20
GND V11
GND V12
GND V13
GND V14
GND V15
GND V16
GND V17
GND V18
GND V19
GND V20
GND W11
GND W12
GND W13
GND W14
GND W15
GND W16
GND W17
GND W18
GND W19
GND W20
GND Y11
GND Y12
GND Y13
GND Y14
GND Y15
GND Y16
GND Y17
GND Y18
GND M19
GND M20
GND A1
GND A30
GND
AA15
GND
AA16
GND
AK1
GND
AK30
GND
K15
GND
K16
GND
L11
GND
L12
GND
L13
GND
L14
GND
L15
GND
L16
GND
L17
GND
L18
GND
L19
GND
L20
GND
M11
GND
M12
GND
M13
GND
M14
GND
M15
GND
M16
GND
M17
GND
M18
GND
N12
GND
N13
GND
N11
GND
N14
GND AB4
GND AG9
GND K2
GND AE1
GND L4
GND H1
GND AG12
GND AA5
GND AE8
GND AA3
GND AG6
GND G4
GND AH5
GND Y4
GND H3
GND AE6
GND N5
GND AF11
GND M3
GND M2
GND P6
GND AC2
C452
1000PF-0402SMT
C452
1000PF-0402SMT
C497
1000PF-0402SMT
C497
1000PF-0402SMT
C391
1000PF-0402SMT
C391
1000PF-0402SMT
C467
1000PF-0402SMT
C467
1000PF-0402SMT
C400
1000PF-0402SMT
C400
1000PF-0402SMT
C329
1000PF-0402SMT
C329
1000PF-0402SMT
C428
1000PF-0402SMT
C428
1000PF-0402SMT
C371
1000PF-0402SMT
C371
1000PF-0402SMT
C460
1000PF-0402SMT
C460
1000PF-0402SMT
C350
1000PF-0402SMT
C350
1000PF-0402SMT
C426
1000PF-0402SMT
C426
1000PF-0402SMT
C485
1000PF-0402SMT
C485
1000PF-0402SMT
C339
1000PF-0402SMT
C339
1000PF-0402SMT
C471
1000PF-0402SMT
C471
1000PF-0402SMT
C425
1000PF-0402SMT
C425
1000PF-0402SMT
C484
1000PF-0402SMT
C484
1000PF-0402SMT
C447
1000PF-0402SMT
C447
1000PF-0402SMT
C340
1000PF-0402SMT
C340
1000PF-0402SMT
C499
1000PF-0402SMT
C499
1000PF-0402SMT
C418
1000PF-0402SMT
C418
1000PF-0402SMT
C392
1000PF-0402SMT
C392
1000PF-0402SMT
C448
1000PF-0402SMT
C448
1000PF-0402SMT
C332
1000PF-0402SMT
C332
1000PF-0402SMT
C370
1000PF-0402SMT
C370
1000PF-0402SMT
C421
1000PF-0402SMT
C421
1000PF-0402SMT
C451
1000PF-0402SMT
C451
1000PF-0402SMT
C496
1000PF-0402SMT
C496
1000PF-0402SMT
C348
1000PF-0402SMT
C348
1000PF-0402SMT
C360
1000PF-0402SMT
C360
1000PF-0402SMT
C372
1000PF-0402SMT
C372
1000PF-0402SMT
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Lattice:
LFSC25E-P1-EV