18-Channel Gamma Buffer
with Regulator
ADD8709
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
FEATURES
18 precision gamma reference outputs
Mask-programmable voltage regulator: 0.4% accuracy
Upper 9 buffers swing to VDD
Lower 9 buffers swing to GND
Single-supply operation: 7.5 V to 16.5 V
Gamma current drive: 15 mA per channel
Peak output current: 150 mA
Output voltage stable under load conditions
48-lead, Pb-free LQFP package
APPLICATIONS
LCD TV panels
LCD monitor panels
GENERAL DESCRIPTION
The ADD8709 is an 18-channel integrated gamma reference for
use in LCD TV and monitors panels. The output buffers feature
high current drive and low offset voltage to provide an accurate
and stable gamma curve. The top nine channels swing to VDD
and the lower nine channels swing to GND.
An on-board voltage regulator provides a fixed input for the
gamma buffers, isolating the gamma curve from supply ripple.
The ADD8709 is specified over the temperature range of
–40°C to +105°C and comes in a 48-lead, Pb-free, low-profile
quad flat package.
FUNCTIONAL BLOCK DIAGRAM
04715-001
GND GND
V
DD
V
DD
V
OUT
18
GAMMA
BUFFERS
V
IN
18
V
REG OUT
V
OUT
17
V
IN
17
V
OUT
16
V
IN
16
V
OUT
15
V
IN
15
V
OUT
14
V
IN
14
V
OUT
13
V
IN
13
V
OUT
12
V
IN
12
V
OUT
11
V
IN
11
V
OUT
10
V
IN
10
V
OUT
9
V
IN
9
V
OUT
8
V
IN
8
V
OUT
7
V
IN
7
V
OUT
6
V
IN
6
V
OUT
5
V
IN
5
V
OUT
4
V
IN
4
V
OUT
3
V
IN
3
V
OUT
2
V
IN
2
V
OUT
1
V
IN
1
V
DD
FB
GND
VOLTAGE
REGULATOR
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
*ESD PROTECTION RESISTORS
Figure 1. 48-Lead LQFP
ADD8709
Rev. A | Page 2 of 16
TABLE OF CONTENTS
Electrical Characteristics ................................................................. 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 7
Application Notes ........................................................................... 10
Voltage Regulator ....................................................................... 10
Maximum Power Dissipation ................................................... 10
Operating Temperature Range ................................................. 10
Typical Applications Circuit.......................................................... 12
Outline Dimensions ....................................................................... 13
Ordering Guide........................................................................... 13
REVISION HISTORY
10/04—Data Sheet Changed from Rev. 0 to Rev. A
Changes to Product Overview Section.......................................... 1
Changes to Figure 1.......................................................................... 1
Changes to Electrical Characteristics Section .............................. 3
Changes to Absolute Maximum Ratings Section......................... 4
Changes to Pin Configuration and Function Description.......... 5
Changes to Typical Performance Characteristics Section........... 7
Changes to Applications Notes Section....................................... 10
Changes to Figure 28, Typical Applications Circuit................... 12
Changes to Ordering Guide .......................................................... 13
8/04—Revision 0: Initial Version
ADD8709
Rev. A | Page 3 of 16
ELECTRICAL CHARACTERISTICS
VDD = 16 V, TA @ 25°C, unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
BUFFER CHARACTERISTICS
OUTPUTS
Output Voltage Range (Ch18 to Ch10) VOUT IL = 100 µA 1.4 VDD V
Output Voltage Range (Ch9 to Ch1) VOUT IL = 100 µA 0 VDD − 1.4 V
Output vs. Load (Ch18, Ch17, Ch2, Ch1) ∆VOUT1IL = 20 mA 15 mV
Output vs. Load (Ch16 to Ch3) ∆VOUT1IL = 5 mA 5 mV
INPUTS
Offset Voltage VOS 5 15 mV
Offset Voltage Drift ∆VOS/∆T −40°C ≤ TA ≤ +105°C 20 µV/°C
Input Bias Current IB−40°C ≤ TA ≤ +105°C 0.5 1.5 µA
Input Voltage Range (Ch18 to Ch10) VIN 1.4 VDD V
Input Voltage Range (Ch9 to Ch1) VIN 0
VDD − 1.4 V
DYNAMIC PERFORMANCE
Slew Rate SR RL = 10 kΩ, CL = 200 pF 4 6 V/µs
Bandwidth BW –3 dB, RL = 10 kΩ, CL = 200 pF 4.5 MHz
Settling Time to 0.1% tS1 V step, RL = 10 kΩ, CL = 200 pF 1.1 µs
Phase Margin ФoRL = 10 kΩ, CL = 200 pF 55 Degrees
Power Supply Rejection Ratio PSRR VDD = 7 V to 17 V, −40°C ≤ TA ≤ +105°C 68 90 dB
VOLTAGE REGULATOR
Programmable Range VREG OUT 5
VDD − 0.6 V
Initial Regulator Accuracy VACC No load; VREG OUT = 14.4 V 0.4 1.5 %
Dropout Voltage VDO IL = 100 µA 100 150 mV
I
L = 5 mA 310 350 mV
Line Regulation REGLINE VIN = 8.5 V to 16.5 V, VOUT = 8 V 0.01 0.20 %/V
Load Regulation REGLOAD IO = 100 µA to 10 mA 0.02 0.10 %/mA
Maximum Load Current IO−40°C ≤ TA ≤ +105°C 5 mA
Feedback Reference Voltage VREF 1.2 V
Feedback Input Bias Current IBFB −40°C ≤ TA ≤ +105°C −150 10 150 nA
POWER SUPPLY
Supply Voltage VS 7.5 16.5 V
Supply Current ISY No load, −40°C ≤ TA ≤ +105°C 10.5 17 mA
1 ∆VOUT is the shift from the desired output voltage under the specified current load.
ADD8709
Rev. A | Page 4 of 16
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage (VDD) 18 V
Input Voltage –0.5 V to VDD
Storage Temperature Range –65°C to +150°C
Operating Temperature Range1−40°C to +105°C
Junction Temperature Range –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) 300°C
ESD Tolerance (HBM) ±2000 V
ESD Tolerance (MM) ±150 V
Table 3. Package Characteristics
Package Type θJA Unit
LQFP (ST) 74.57 °C/W
1 See section. Application Notes
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods
may affect device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
ADD8709
Rev. A | Page 5 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
04715-002
13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37
36
35
34
33
32
31
30
29
28
27
26
25
VOUT10
VOUT9
VOUT8
VOUT7
VDD
GND
VOUT6
VOUT5
VOUT4
VOUT3
VOUT2
VOUT1
V
IN10
VIN9
VIN8
VIN7
VIN6
VIN5
VIN4
VIN3
VIN2
VIN1
GND
VDD
VDD
GND
VOUT18
VOUT17
VOUT16
VOUT15
VOUT14
VOUT13
VDD
GND
VOUT12
VOUT11
1
2
3
4
5
6
7
8
9
10
11
12
REGFB
GND
VDD
VREG OUT
VIN18
VIN17
VIN16
VIN15
VIN14
VIN13
VIN12
VIN11
ADD8709
TOP VIEW
(Not to Scale)
Figure 2. 48-Lead Low-Profile Quad Flat Package (ST-48)
Table 4. Pin Function Descriptions
Pin No. Name Description
1 REGFB Regulator feedback. Compares a percentage of the regulator output to the internal 1.2 V voltage
reference.
2 GND Ground. Normally 0 V.
3 VDD Supply voltage. Normally 16 V.
4 REGOUT Regulator output voltage. Provides a regulated output voltage for use as a reference for the gamma
resistors.
5 VIN18
6 VIN17
7 VIN16
8 VIN15
9 VIN14
10 VIN13
11 VIN12
12 VIN11
13 VIN10
14 VIN9
15 VIN8
16 VIN7
17 VIN6
18 VIN5
19 VIN4
20 VIN3
21 VIN2
22 VIN1
Buffer inputs. An external resistor calculator is available upon request from your local sales office.
23 GND Ground. Normally 0 V.
24 VDD Supply voltage. Normally 16 V.
25 VOUT1
26 VOUT2 Buffer outputs. These buffers can swing to ground.
ADD8709
Rev. A | Page 6 of 16
Pin No. Name Description
27 VOUT3
28 VOUT4
29 VOUT5
30 VOUT6
Buffer outputs. These buffers can swing to ground.
31 GND Ground. Normally 0 V.
32 VDD Supply voltage. Normally 16 V.
33 VOUT7
34 VOUT8
35 VOUT9
Buffer outputs. These buffers can swing to ground.
36 VOUT10
37 VOUT11
38 VOUT12
Buffer outputs. These buffers can swing to VDD.
39 GND Ground. Normally 0 V.
40 VDD Supply Voltage. Normally 16V.
41 VOUT13
42 VOUT14
43 VOUT15
44 VOUT16
45 VOUT17
46 VOUT18
Buffer outputs. These buffers can swing to VDD.
47 GND Ground. Normally 0 V.
48 VDD Supply voltage. Normally 16 V.
ADD8709
Rev. A | Page 7 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
20
–35
–30
–25
–20
–15
–10
–5
0
5
10
15
–20–100 102030405060708090100110120
04715-003
TEMPERATURE (°C)
OUTPUT VOLTAGE ERROR (mV)
I
SINK
= 15mA
I
SINK
= 5mA
I
LOAD
= 0mA
I
SINK
= 25mA
I
SOURCE
= 5mA
I
SOURCE
= 15mA
I
SOURCE
= 25mA
Figure 3. Output Voltage Error vs. Temperature
30
25
20
15
10
5
0
0.1 1 10 100
04715-004
LOAD CURRENT (mA)
OUTPUT VOLTAGE ERROR (mV)
CH17 SINK
CH17 SOURCE
CH18 SOURCE
CH18 SINK
Figure 4. Output Voltage Error vs. Load Current (Channels 17 and 18)
30
25
20
15
10
5
0
0.1 1 10 100
04715-005
LOAD CURRENT (mA)
OUTPUT VOLTAGE ERROR (mV)
CH16 SINK
CH10 SOURCE
CH16 SOURCE CH10 SINK
Figure 5. Output Voltage Error vs. Load Current (Channels 10 and 16)
25
20
15
10
5
0
0.1 1 10 100
04715-006
LOAD CURRENT (mA)
OUTPUT VOLTAGE ERROR (mV)
CH3 SINK
CH9 SOURCE
CH3 SOURCE
CH9 SINK
Figure 6. Output Voltage Error vs. Load Current (Channels 3 and 9)
25
20
15
10
5
0
0.1 1 10 100
04715-007
LOAD CURRENT (mA)
OUTPUT VOLTAGE ERROR (mV)
CH1 SINK
CH1 SOURCE
CH2 SOURCE
CH2 SINK
Figure 7. Output Voltage Error vs. Load Current (Channels 1 and 2)
1000
900
800
700
600
500
400
300
200
100
0
–0.30 –0.18 –0.10 –0.02 0.06 0.14 0.22 0.30
04715-009
GAMMA OUTPUT ERROR DUE TO OFFSET (% OF FS)
NUMBER OF AMPLIFIERS
Figure 8. Gamma Output Voltage Error
ADD8709
Rev. A | Page 8 of 16
11
10
9
8
7
6
5
4
3
2
1
0
–200 180016001400120010008006004002000
04715-008
TIME (ns)
AMPLITUDE (V)
10V PULSE
120pF
10nF
1nF
520pF
320pF
Figure 9. Gamma Buffers Load Transient Response vs. Capacitive Loading
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
017 012345678910111213141516
04715-011
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
I
LOAD
= 0mA
I
LOAD
= 5mA
I
LOAD
= 10mA
Figure 10. Dropout Characteristics
0
100
200
300
400
500
600
700
800
900
1000 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
04715-012
OUTPUT CURRENT (mA)
DROPOUT VOLTAGE (mV)
Figure 11. Dropout Voltage vs. Output Current
800
750
700
650
600
550
500
450
400
350
300
250
200
150
100
50
0
–25–15–5 5 152535455565758595105115
04715-013
TEMPERATURE (°C)
DROPOUT VOLTAGE (mV)
10mA
5mA
0mA
Figure 12. Dropout Voltage vs. Temperature
14.5
14.4
14.3
14.2
14.1
14.0
13.9
13.8
13.7
13.60 2 4 6 8 10 12 14 16 18 20
04715-014
LOAD CURRENT (mA)
REGULATOR OUTPUT (V)
–20°C
0°C
+25°C
+55°C
+85°C
+95°C
+105°C
Figure 13. Regulator Output vs. ILOAD over Temperature
14.45
14.40
14.35
14.30
14.25
14.20
–20–100 102030405060708090100110
04715-015
TEMPERATURE (°C)
REGULATOR OUTPUT (V)
10mA
5mA
0mA
Figure 14. Regulator Output vs. Temperature
ADD8709
Rev. A | Page 9 of 16
04715-016
TIME (100µs/DIV)
INPUT VOLTAGE (V)
OUTPUT VOLTAGE CHANGE (mV)
17
18
15
16
400
200
0
–200
–400
14
C
LOAD
= 1µF
Figure 15. Regulator Line Transient Response
04715-017
TIME (100
µ
s/DIV)
LOAD CURRENT (mA)
OUTPUT VOLTAGE CHANGE (mV)
0.1
–40
–20
0
20
40
5
C
LOAD
= 1
µ
F
Figure 16. Regulator Load Transient Response
12
0
1
2
3
4
5
6
7
8
9
10
11
0 2 4 6 8 10 12 14 16 18
04715-018
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
Figure 17. Supply Current vs. Supply Voltage
11.0
10.4
10.5
10.6
10.7
10.8
10.9
–20 120100806040200
04715-019
TEMPERATURE (
°
C)
SUPPLY CURRENT (mA)
Figure 18. Supply Current vs. Temperature
ADD8709
Rev. A | Page 10 of 16
APPLICATION NOTES
The ADD8709 is a gamma reference generator that allows
source drivers to be optimized for the different combinations
of liquid crystals, glass sizes, etc. in large LCD panels.
In a typical panel application, the selected source drivers have
an internal gamma curve that is not ideal for the specific panel,
as shown in Figure 19. The ADD8709 allows the gamma curve
in the source drivers to be adjusted appropriately, and also
ensures that all of the source drivers have the same gamma
curve.
16
14
12
10
PANEL GAMMA CURVE
CORRECTED BY ADD8709
ORIGINAL GAMMA CURVE
IN SOURCE DRIVERS
8
6
4
2
0
04715-020
GAMMA REFERENCE INPUT POINTS
GAMMA VOLTAGE (V)
Figure 19. Original and Corrected Gamma Curves
The ADD8709 also includes a low dropout linear regulator to
provide a stable reference level for the gamma curve for best
panel performance.
VOLTAGE REGULATOR
The on-board voltage regulator provides a regulated voltage to
the external resistors to set different gamma voltages.
The output of the regulator is set by the two resistors, R1 and R2,
and an internal reference voltage of 1.2V. In the ADD8709, R1
and R2 are external components. The output voltage can is
found by
VREG OUT = VREF × (R2/R1 + 1)
04715-021
V
REF
1.2V +
–
R
2
55kΩ
R
1
5kΩ
V
REG OUT
Figure 20. Voltage Regulator
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the ADD8709 package
is limited by the associated rise in junction temperature (TJ) on
the die. At approximately 150°C, the glass transition temper-
ature, the properties of the plastic change. Even temporarily
exceeding this temperature limit may change the stresses that
the package exerts on the die, permanently shifting the para-
metric performance of the ADD8709. Exceeding a junction
temperature of 175°C for an extended period can result in
changes in the silicon devices, potentially causing failure.
OPERATING TEMPERATURE RANGE
The junction temperature is
TJ = TAMB + θJA × PDIS
where:
TAMB = ambient temperature.
θJA = junction-to-ambient thermal resistance, in °C/watt.
PDIS = power dissipated in the device, in watts.
For the ADD8709, PDIS can be calculated by
PDIS = VDD × IDQ + Σ(IOUT X(+) × (VDD − VOUT X)) +
Σ(−IOUT X(-) × VOUTX) + (VDD – VREG OUT) × ILOAD
where:
VDD × IDQ = nominal system power requirements.
IOUT X(+) × (VDD − VOUT X) = positive-current amplifier load power
dissipation (current comes from VDD).
−IOU XT(-) × VOUT X = negative-current amplifier load power
dissipation (current goes to GND).
(VDD – VREG OUT) × ILOAD = regulator load power dissipation.
Example 1
To calculate an estimated power consumption of the ADD8709
assume:
VDD × IDQ = 16 V × 15 mA = 0.240 W.
(VDD – VREG OUT) × ILOAD = (16 V – 14.4 V) × 5 mA = 0.008 W.
ADD8709
Rev. A | Page 11 of 16
Table 5.
V
OUT X (V) IOUT X (mA) P (W)
VOUT18 14.400 4.3 0.00688
VOUT17 11.405 5.2 0.0239
VOUT16 10.627 −4.4 0.0468
VOUT15 10.397 7.3 0.0409
VOUT14 10.195 7.6 0.0441
VOUT13 10.080 −3.9 0.0393
VOUT12 9.821 8.3 0.0513
VOUT11 9.130 7.9 0.0543
VOUT10 8.611 −4.5 0.0389
VOUT9 6.480 −4.2 0.0272
VOUT8 6.077 5.6 0.0556
VOUT7 5.098 -3.3 0.0168
VOUT6 4.810 −6.9 0.0332
VOUT5 4.694 5.7 0.0644
VOUT4 4.435 3.5 0.0405
VOUT3 4.205 9.6 0.113
VOUT2 3.398 −9.5 0.0323
VOUT1 0.202 −7.2 0.00145
Σ(IOUT X(+) × (VDD − VOUT X)) + Σ(−IOUT X(-) × VOUT X) 0.731
PDIS = 0.240 W + 0.731 W + 0.008 W =0.979 W
θJA = 74.57°C/W, TAMB = 45°C
TJ = 45°C + (74.57°C/W) × (0.979 W) = 118.0°C
Here, 150°C is the maximum junction temperature that is
guaranteed before the part breaks down, while 125°C is the
maximum process limit. Because TJ is < 150°C and < 125°C,
this example demonstrates a condition where the part should
perform within process limits.
ADD8709
Rev. A | Page 12 of 16
TYPICAL APPLICATIONS CIRCUIT
04715-022
GND GND
V
DD
16V
GAMMA
BUFFERS
1.2V
+
–
V
OUT
18
V
OUT
17
V
OUT
16
V
OUT
15
V
OUT
14
V
OUT
13
V
OUT
12
V
OUT
11
V
OUT
10
V
OUT
9
V
OUT
8
V
OUT
7
V
OUT
6
V
OUT
5
V
OUT
4
V
OUT
3
V
OUT
2
V
OUT
1
0Ω
3.12kΩ
810Ω
240Ω
210Ω
120Ω
270Ω
720Ω
540Ω
2.22kΩ
420Ω
300Ω
120Ω
270Ω
240Ω
840Ω
1.02kΩ
3.33kΩ
210Ω
14.400V
11.405V
10.627V
10.397V
10.195V
10.080V
9.821V
9.130V
8.611V
6.480V
6.077V
5.098V
4.810V
4.694V
4.435V
4.205V
3.398V
0.202V
V
IN
18
V
IN
17
V
IN
16
V
IN
15
V
IN
14
V
IN
13
V
IN
12
V
IN
11
V
IN
10
V
IN
9
V
IN
8
V
IN
7
V
IN
6
V
IN
5
V
IN
4
V
IN
3
V
IN
2
V
IN
1
EXTERNAL
RESISTORS
TO SET
GAMMA
VOLTAGES
55kΩ
5kΩVOLTAGE
REGULATOR
GAMMA 17
GAMMA 16
GAMMA 18
GAMMA 15
GAMMA 14
GAMMA 13
GAMMA 12
GAMMA 11
GAMMA 10
GAMMA 9
GAMMA 8
GAMMA 7
GAMMA 6
GAMMA 5
GAMMA 4
GAMMA 3
GAMMA 2
GAMMA 1
GAMMA 17
GAMMA 16
GAMMA 18
GAMMA 15
GAMMA 14
GAMMA 13
GAMMA 12
GAMMA 11
GAMMA 10
GAMMA 9
GAMMA 8
GAMMA 7
GAMMA 6
GAMMA 5
GAMMA 4
GAMMA 3
GAMMA 2
GAMMA 1
GAMMA 17
GAMMA 16
GAMMA 18
GAMMA 15
GAMMA 14
GAMMA 13
GAMMA 12
GAMMA 11
GAMMA 10
GAMMA 9
GAMMA 8
GAMMA 7
GAMMA 6
GAMMA 5
GAMMA 4
GAMMA 3
GAMMA 2
GAMMA 1
0.1µF
14.4V
FB
0.1µF
V
REG OUT
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
*ESD PROTECTION RESISTORS
Figure 21. Typical Applications Circuit
ADD8709
Rev. A | Page 13 of 16
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MS-026BBC
TOP VIEW
(PINS DOWN)
1
12 13 25
24
36
37
48
0.27
0.22
0.17
0.50
BSC
LEAD PITCH
7.00
BSC SQ
1.60
MAX
0.75
0.60
0.45
VIEW A
9.00 BSC
SQ
PIN 1
0.20
0.09
1.45
1.40
1.35
0.08 MAX
COPLANARITY
VIEW A
ROTATED 90° CCW
SEATING
PLANE
7°
3.5°
0°
0.15
0.05
Figure 22. 48-Lead Low Profile Quad Flat Package [LQFP]
(ST-48)
Dimensions shown in millimeters
ORDERING GUIDE
Model1Temperature Range Package Description Package Option
ADD8709ASTZ-REEL2, 3−40°C to +100°C 48-Lead Low Profile Quad Flat Package ST-48
ADD8709ASTZ-REEL72, 3 −40°C to +100°C 48-Lead Low Profile Quad Flat Package ST-48
ADD8709WSTZ-REEL2 −40°C to +105°C 48-Lead Low Profile Quad Flat Package ST-48
ADD8709WSTZ-REEL72 −40°C to +105°C 48-Lead Low Profile Quad Flat Package ST-48
1 Available in reels only.
2 Z = Pb-free part.
3 WARNING: Not to be used in new design. Option for existing designs only.
ADD8709
Rev. A | Page 14 of 16
NOTES
ADD8709
Rev. A | Page 15 of 16
NOTES
ADD8709
Rev. A | Page 16 of 16
NOTES
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04715–0–10/04(A)
