AO4292
General Description Product Summary
V
DS
I
D
(at V
GS
=10V) 8A
R
DS(ON)
(at V
GS
=10V) < 23mΩ
R
DS(ON)
(at V
GS
=4.5V) < 33mΩ
Applications
100% UIS Tested
100% Rg Tested
Symbol
V
100V N-Channel AlphaMOS
Orderable Part Number Package Type Form Minimum Order Quantity
100V
• Trench Power AlphaMOS (αMOS MV) technology
• Low R
DS(ON)
• Low Gate Charge
• Optimized for fast-switching applications
• RoHS and Halogen-Free Compliant
Absolute Maximum Ratings T
A
=25°C unless otherwise noted
V
Maximum Units
AO4292 SO-8 Tape & Reel 3000
• Synchronus Rectification in DC/DC and AC/DC Converters
• Isolated DC/DC Converters in Telecom and Industrial
100
Parameter
Drain-Source Voltage
G
D
S
SOIC-8
Top View Bottom View
S
S
S
G
V
DS
V
GS
I
DM
I
AS
Avalanche energy L=0.1mH
C
E
AS
V
DS
Spike V
SPIKE
T
J
, T
STG
Symbol
t ≤ 10s
Steady-State
Steady-State
R
θJL
T
A
=25°C
T
A
=70°C
T
A
=25°C
Avalanche Current
C
Thermal Characteristics
W
I
D
V
A15
32
mJ11
8
Parameter Max
°C
Units
Junction and Storage Temperature Range -55 to 150
Typ
Maximum Junction-to-Ambient
A
°C/W
R
θJA
31
59 40
V
A
±20
V
Maximum Junction-to-Lead °C/W
°C/W
Maximum Junction-to-Ambient
A D
16 75
24
Power Dissipation
B
2.0
T
A
=70°C
10µs
P
D
100
120
3.1
Gate-Source Voltage
Pulsed Drain Current
C
6.2
Drain-Source Voltage
Continuous Drain
Current
Rev.1.0: January 2014
www.aosmd.com Page 1 of 5
Symbol Min Typ Max Units
BV
DSS
100 V
V
DS
=100V, V
GS
=0V 1
T
J
=55°C 5
I
GSS
±100 nA
V
GS(th)
Gate Threshold Voltage 1.6 2.15 2.7 V
18 23
T
J
=125°C 32.5 42
24 33 mΩ
g
FS
30 S
V
SD
0.72 1 V
I
S
4 A
C
iss
1190 pF
C
oss
95 pF
C
rss
7 pF
R
g
0.5 1.1 1.7 Ω
Q
g
(10V)
16.5 25 nC
Q
g
(4.5V)
7 12 nC
Q
gs
4.5 nC
Q
gd
2.5 nC
t
D(on)
7 ns
t
r
3 ns
t
D(off)
20 ns
t
f
3
ns
mΩ
V
GS
=10V, V
DS
=50V, I
D
=8A
Total Gate Charge
Electrical Characteristics (T
J
=25°C unless otherwise noted)
STATIC PARAMETERS
Parameter Conditions
Gate resistance f=1MHz
I
DSS
µAZero Gate Voltage Drain Current
Drain-Source Breakdown Voltage I
D
=250µA, V
GS
=0V
R
DS(ON)
Static Drain-Source On-Resistance
Gate Source Charge
Gate Drain Charge
Total Gate Charge
SWITCHING PARAMETERS
Turn-On DelayTime
V
DS
=0V, V
GS
=±20V
Maximum Body-Diode Continuous Current
Input Capacitance
Gate-Body leakage current
Turn-Off DelayTime
Turn-Off Fall Time
V
GS
=10V, V
DS
=50V, R
L
=6.25Ω,
R
GEN
=3Ω
Diode Forward Voltage
DYNAMIC PARAMETERS
V
GS
=4.5V, I
D
=6A
Turn-On Rise Time
Reverse Transfer Capacitance V
GS
=0V, V
DS
=50V, f=1MHz
V
DS
=V
GS,
I
D
=250µA
Output Capacitance
Forward Transconductance I
S
=1A,V
GS
=0V
V
DS
=5V, I
D
=8A
V
GS
=10V, I
D
=8A
t
f
3
ns
t
rr
20 ns
Q
rr
90 nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Charge
Body Diode Reverse Recovery Time I
F
=8A, dI/dt=500A/µs
Turn-Off Fall Time
I
F
=8A, dI/dt=500A/µs
A. The value of RθJA is measured with the device mounted on 1in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation PDis based on TJ(MAX)=150°C, using ≤10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initialTJ=25°C.
D. The RθJA is the sum of the thermal impedance from junction to lead RθJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedance which is measured with the device mounted on 1in2FR-4 board with
2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
Rev.1.0: January 2014 www.aosmd.com Page 2 of 5
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
10
20
30
40
12345
ID(A)
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
10
15
20
25
30
0 5 10 15 20
RDS(ON) (mΩ
Ω
Ω
Ω)
I
D
(A)
Figure 3: On
-
Resistance vs. Drain Current and Gate
0.8
1
1.2
1.4
1.6
1.8
2
2.2
0 25 50 75 100 125 150 175
Normalized On-Resistance
Temperature (°C)
Figure 4: On
-
Resistance vs. Junction Temperature
VGS=4.5V
ID=6A
VGS=10V
ID=8A
25°C
125°C
VDS=5V
VGS=4.5V
VGS=10V
0
10
20
30
40
012345
ID(A)
VDS (Volts)
Figure 1: On-Region Characteristics (Note E)
VGS=3V
3.5V
4.5V
10V 4V
D
Figure 3: On
-
Resistance vs. Drain Current and Gate
Voltage (Note E)
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
0.0 0.2 0.4 0.6 0.8 1.0
IS(A)
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
25°C
125°C
Figure 4: On
-
Resistance vs. Junction Temperature
(Note E)
10
20
30
40
50
60
2 4 6 8 10
RDS(ON) (mΩ
Ω
Ω
Ω)
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
ID=8A
25°C
125°C
Rev.1.0: January 2014 www.aosmd.com Page 3 of 5
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
2
4
6
8
10
0 4 8 12 16 20
VGS (Volts)
Qg(nC)
Figure 7: Gate-Charge Characteristics
0
200
400
600
800
1000
1200
1400
1600
0 20 40 60 80 100
Capacitance (pF)
VDS (Volts)
Figure 8: Capacitance Characteristics
Ciss
1
10
100
1000
1E-05 0.001 0.1 10
Power (W)
Pulse Width (s)
Coss
C
rss
VDS=50V
ID=8A
TJ(Max)=150°C
TA=25°C
10
µ
s
0.0
0.1
1.0
10.0
100.0
0.01 0.1 1 10 100 1000
ID(Amps)
VDS (Volts)
V
> or equal to 4.5V
10µs
1ms
DC
RDS(ON)
limited
TJ(Max)=150°C
TA=25°C
100
µ
s
10ms
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Ambient (Note F)
0.001
0.01
0.1
1
10
1E-05 0.0001 0.001 0.01 0.1 1 10 100
Zθ
θ
θ
θJA Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Single Pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
T
on
T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
V
GS
> or equal to 4.5V
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
RθJA=75°C/W
Rev.1.0: January 2014 www.aosmd.com Page 4 of 5
-
+
VDC
Ig
Vds
DUT
-
+
VDC
Vgs
Vgs
10V
Qg
Qgs Qgd
Charge
Gate Charge Test Circuit & Waveform
-
+
VDC
DUT Vdd
Vgs
Vds
Vgs
RL
Rg
Vgs
Vds
10%
90%
Resistive Switching Test Circuit & Waveforms
t t
r
d(on)
ton
td(off) t
f
toff
L
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
Vdd
Vgs
Id
Vgs
Rg
DUT
-
+
VDC
L
Vgs
Vds
Id
Vgs
BV
I
Ig
Vgs
-
+
VDC
DUT
L
Vds
Vgs
Vds
Isd
Isd
Diode Recovery Test Circuit & Waveforms
Vds -
Vds +
IF
AR
DSS
2
E = 1/2 LI
dI/dt
IRM
rr
Vdd
Vdd
Q = - Idt
AR
AR
t
rr
Rev.1.0: January 2014 www.aosmd.com Page 5 of 5