R
D
R
D
DE
RE
Y
Z
B
A
GND
VCC
R
D
R
DY
Z
B
A
VCC
GND
VCC
SN65HVD1470,
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SN65HVD147x 3.3-V Full-Duplex RS-485 Transceivers With ±16-kV IEC ESD
These devices each combine a differential driver and
1 Features a differential receiver, which operate from a single
1• 1/8 Unit-Load Options Available 3.3-V power supply. Each driver and receiver has
– Up to 256 Nodes on the Bus separate input and output pins for full-duplex bus
communication designs. These devices all feature a
• Bus I/O Protection wide common-mode voltage range which makes the
– > ±30 kV HBM protection devices suitable for multi-point applications over long
– > ±16 kV IEC61000-4-2 Contact Discharge cable runs.
– > ±4 kV IEC61000-4-4 Fast Transient Burst The SN65HVD1471, SN65HVD1474, and
• Extended Industrial Temperature Range: SN65HVD1477 devices are fully enabled with no
external enabling pins.
–40°C to 125°C
• Large Receiver Hysteresis (70 mV) for Noise The SN65HVD1470, SN65HVD1473, and
Rejection SN65HVD1476 devices have active-high driver
enables and active-low receiver enables. A low, less
• Low Power Consumption than 5-µA standby current can be achieved by
– < 1.1 mA Quiescent Current During Operation disabling both the driver and receiver.
– Low Standby Supply Current: 10 nA Typical, These devices are characterized from –40°C to
< 5 µA (maximum) 125°C.
• Glitch-Free Power-Up and Power-Down Protection
for Hot-Plugging Applications Device Information(1)
• 5-V Tolerant Logic Inputs Compatible With 3.3-V PART NUMBER PACKAGE BODY SIZE (NOM)
or 5-V Controllers SN65HVD1471 MSOP (8) 3.00 mm × 3.00 mm
SN65HVD1474
• Signaling Rate Options Optimized for: SOIC (8) 4.90 mm × 3.91 mm
SN65HVD1477
400 kbps (1470, 1471), 20 Mbps (1473, 1474), 50 SN65HVD1470 MSOP (10) 3.00 mm × 3.00 mm
Mbps (1476, 1477) SN65HVD1473 SOIC (14) 8.65 mm × 3.91 mm
SN65HVD1476
2 Applications (1) For all available packages, see the orderable addendum at
the end of the datasheet.
• Industrial Automation
• Encoders and Decoders Block Diagram
• Building Automation
• Security and Surveillance Networks
• Telecommunications
3 Description
The SN65HVD147x family of full-duplex transceivers
feature the highest ESD protection in the RS-485
portfolio, supporting ±16-kV IEC61000-4-2 contact
discharge and > ±30-kV HBM ESD protection. These
RS-485 transceivers have robust 3.3-V drivers and
receivers and are offered in a standard SOIC
package as well as in a small-footprint MSOP
package. The large receiver hysteresis of the
SN65HVD147x devices provides immunity to
conducted differential noise and the wide operating
temperature enables reliability in harsh operating
environments.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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Table of Contents
1 Features.................................................................. 19 Detailed Description............................................ 17
9.1 Overview................................................................. 17
2 Applications ........................................................... 19.2 Functional Block Diagram....................................... 17
3 Description............................................................. 19.3 Feature Description................................................. 17
4 Revision History..................................................... 29.4 Device Functional Modes........................................ 17
5 Device Comparison Table..................................... 310 Application and Implementation........................ 20
6 Pin Configuration and Functions......................... 310.1 Application Information.......................................... 20
7 Specifications......................................................... 610.2 Typical Application................................................ 20
7.1 Absolute Maximum Ratings ...................................... 611 Power Supply Recommendations ..................... 26
7.2 Handling Ratings....................................................... 612 Layout................................................................... 26
7.3 Recommended Operating Conditions....................... 712.1 Layout Guidelines ................................................. 26
7.4 Thermal Information — D Packages......................... 712.2 Layout Example .................................................... 27
7.5 Thermal Information — DGS and DGK Packages.... 713 Device and Documentation Support................. 28
7.6 Power Dissipation ..................................................... 813.1 Device Support...................................................... 28
7.7 Electrical Characteristics........................................... 813.2 Related Links ........................................................ 28
7.8 Switching Characteristics — 400 kbps...................... 913.3 Trademarks........................................................... 28
7.9 Switching Characteristics — 20 Mbps .................... 10 13.4 Electrostatic Discharge Caution............................ 28
7.10 Switching Characteristics — 50 Mbps .................. 10 13.5 Glossary................................................................ 28
7.11 Typical Characteristics.......................................... 11 14 Mechanical, Packaging, and Orderable
8 Parameter Measurement Information ................ 13 Information........................................................... 28
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (August 2014) to Revision D Page
• Updated the MSOP–10 logic diagram ................................................................................................................................... 4
Changes from Revision B (July 2014) to Revision C Page
• Updated the Device Comparison Table.................................................................................................................................. 3
Changes from Revision A (June 2014) to Revision B Page
• Updated SN65HVD1470 and SN65HVD1471 specifications to production values ............................................................... 3
Changes from Original (May 2014) to Revision A Page
• Changed device status from Product Preview to Production Data (mixed status) ................................................................ 1
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D
Z
Y
6
5
3
R
B
A
7
8
2
1
2
3
4
8
7
6
5
R
D
VCC
B
A
Z
Y
GND
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5 Device Comparison Table
PART NUMBER(1) SIGNALING RATE DUPLEX ENABLES PACKAGE NODES
SOIC-14
SN65HVD1470 up to 400 kbps Full DE, RE 256
MSOP-10
SOIC-8
SN65HVD1471 up to 400 kbps Full None 256
MSOP-8
SOIC-14
SN65HVD1473 up to 20 Mbps Full DE, RE 256
MSOP-10
SOIC-8
SN65HVD1474 up to 20 Mbps Full None 256
MSOP-8
SOIC-14
SN65HVD1476 up to 50 Mbps Full DE, RE 96
MSOP-10
SOIC-8
SN65HVD1477 up to 50 Mbps Full None 96
MSOP-8
(1) For device status, see the Mechanical, Packaging, and Orderable Information section.
6 Pin Configuration and Functions
SN65HVD1471, SN65HVD1474, SN65HVD1477
8-Pin SOIC, D Package, and 8-Pin MSOP, DGK Package
(Top View)
Pin Functions — SOIC-8 and MSOP-8
PIN TYPE DESCRIPTION
NAME NO.
VCC 1 Supply 3-V to 3.6-V supply
R 2 Digital output Receive data output
D 3 Digital input Driver data input
GND 4 Reference potential Local device ground
Y 5 Bus output Digital bus output, Y (Complementary to Z)
Z 6 Bus output Digital bus output, Z (Complementary to Y)
B 7 Bus input Digital bus input, B (Complementary to A)
A 8 Bus input Digital bus input, A (Complementary to B)
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R VCC
Z
Y
B
A
DE
RE
GND
1
2
3
4
56
7
8
9
10
3
4
2
1
6
7
9
8
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SN65HVD1470, SN65HVD1473, SN65HVD1476
10-Pin MSOP, DGS Package
(Top View)
Pin Functions — MSOP–10
PIN TYPE DESCRIPTION
NAME NO.
R 1 Digital output Receive data output
RE 2 Digital input Receive enable Low
DE 3 Digital input Driver enable High
D 4 Digital input Driver data input
GND 5 Reference potential Local device ground
Y 6 Bus output Digital bus output, Y (Complementary to Z)
Z 7 Bus output Digital bus output, Z (Complementary to Y)
B 8 Bus input Digital bus input, B (Complementary to A)
A 9 Bus input Digital bus input, A (Complementary to B)
VCC 10 Supply 3-V to 3.6-V supply
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1
2
3
4
5
6
7
14
13
12
11
10
9
8
NC
R
RE
DE
D
GND
GND
VCC
VCC
A
B
Z
Y
NC
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SN65HVD1470, SN65HVD1473, SN65HVD1476
14-Pin SOIC, D Package
(Top View)
NC = no internal connection
Pin Functions — SOIC-14
PIN TYPE DESCRIPTION
NAME NO.
1
NC No connect Not connected
8
R 2 Digital output Receive data output
RE 3 Digital input Receive enable Low
DE 4 Digital input Driver enable High
D 5 Digital input Driver data input
6(1)
GND Reference potential Local device ground
7(1)
Y 9 Bus output Digital bus output, Y (Complementary to Z)
Z 10 Bus output Digital bus output, Z (Complementary to Y)
B 11 Bus input Digital bus input, B (Complementary to A)
A 12 Bus input Digital bus input, A (Complementary to B)
13(2)
VCC Supply 3-V to 3.6-V supply
14(2)
(1) Pin 6 and pin 7 are connected internally.
(2) Pin 13 and pin 14 are connected internally.
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltage VCC –0.5 5.5 V
Voltage Range at any bus pin (A, B, Y, or Z) –13 16.5 V
Input voltage Range at any logic pin (D, DE, or RE) –0.3 5.7 V
Voltage input range, transient pulse, any bus pin (A, B, Y, or Z) through 100 Ω–100 100 V
Output current Receiver output –24 24 mA
Junction temperature, TJ170 °C
Continuous total power dissipation See the Thermal
Information table
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 Handling Ratings MIN MAX UNIT
Tstg Storage temperature range –65 150 °C
IEC 61000-4-2 ESD (Contact Discharge), bus pins and GND –16 16 kV
IEC 61000-4-2 ESD (Air-Gap Discharge), bus pins and GND(1)(2) –16 16 kV
IEC 61000-4-4 EFT (Fast transient or burst), bus pins and GND –4 4 kV
IEC 60749-26 ESD (Human Body Model), bus pins and GND(2) –30 30 kV
V(ESD) Electrostatic discharge Human body model (HBM), bus pins and GND(3) –40 40 kV
Human body model (HBM), per JEDEC specification JESD22-A114, all pins –8 8 kV
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins –1.5 1.5 kV
Machine model (MM), all pins –300 300 kV
(1) By inference from contact-discharge results, see the Application and Implementation section
(2) Limited by tester capability.
(3) Modeled performance only; based on measured IEC ESD (Contact) capability.
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7.3 Recommended Operating Conditions
IEC 61000-4-2 ESD (Contact Discharge), bus pins and GND MIN NOM MAX UNIT
VCC Supply voltage 3 3.3 3.6 V
VIInput voltage at any bus pin (separately or common mode) (1) –7 12 V
VIH High-level input voltage (Driver, driver enable, and receiver enable inputs) 2 VCC V
VIL Low-level input voltage (Driver, driver enable, and receiver enable inputs) 0 0.8 V
VID Differential input voltage –12 12 V
IOOutput current, Driver –60 60 mA
IOOutput current, Receiver –8 8 mA
RLDifferential load resistance 54 60 Ω
CLDifferential load capacitance 50 pF
HVD1470, HVD1471 400 kbps
1/tUI Signaling rate HVD1473, HVD1474 20 Mbps
HVD1476, HVD1477 50
TA(2) Operating free-air temperature (See the Application and Implementation for thermal –40 125 °C
information)
TJJunction Temperature –40 150 °C
(1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
(2) Operation is specified for internal (junction) temperatures up to 150°C. Self-heating because of internal power dissipation should be
considered for each application. Maximum junction temperature is internally limited by the thermal shut-down (TSD) circuit which
disables the driver outputs when the junction temperature reaches 170°C.
7.4 Thermal Information — D Packages
THERMAL METRIC D D UNIT
(8 PINS) (14 PINS)
RθJA Junction-to-ambient thermal resistance 110.7 83.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 54.7 42.9
RθJB Junction-to-board thermal resistance 51.3 37.8
ψJT Junction-to-top characterization parameter 9.2 9.3
ψJB Junction-to-board characterization parameter 50.7 37.5
TJ(TSD) Thermal shut-down junction temperature 170 °C
7.5 Thermal Information — DGS and DGK Packages
THERMAL METRIC DGS DGK UNIT
(10 PINS) (8 PINS)
RθJA Junction-to-ambient thermal resistance 165.5 168.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 37.7 62.2
RθJB Junction-to-board thermal resistance 86.4 89.5
ψJT Junction-to-top characterization parameter 1.4 7.4
ψJB Junction-to-board characterization parameter 84.8 87.9
TJ(TSD) Thermal shut-down junction temperature 170 °C
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7.6 Power Dissipation
PARAMETER TEST CONDITIONS VALUE UNIT
HVD1470, 150
HVD1471
RL= 300 Ω, HVD1473, 180
Unterminated mW
CL= 50 pF (driver) HVD1474
HVD1476, 220
HVD1477
Power Dissipation HVD1470, 190
driver and receiver enabled, HVD1471
VCC = 3.6 V, TJ= 150°C
50% duty cycle square-wave signal at RL= 100 Ω, HVD1473, 220
PD RS-422 load mW
signaling rate: CL= 50 pF (driver) HVD1474
• HVD1470 and HVD1471 at 400 kbps HVD1476, 250
• HVD1473 and HVD1474 at 20 Mbps HVD1477
• HVD1476 and HVD1477 at 50 Mbps HVD1470, 230
HVD1471
RL= 54 Ω, HVD1473, 255
RS-485 load mW
CL= 50 pF (driver) HVD1474
HVD1476, 285
HVD1477
7.7 Electrical Characteristics
over recommended operating range (unless otherwise specified)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
RL= 60 Ω, 375 Ωon each 1.5 2 V
output to –7 V to 12 V, See Figure 15
|VOD| Driver differential output voltage magnitude RL= 54 Ω(RS-485), See Figure 16 1.5 2 V
RL= 100 Ω(RS-422) TJ≥0°C, 2 V
VCC ≥3.2 V, See Figure 16
Δ|VOD| Change in magnitude of driver differential output voltage RL= 54 Ω, CL= 50 pF, See Figure 16 –50 0 50 mV
VOC(SS) Steady-state common-mode output voltage 1 VCC / 2 3 V
Center of two 27-Ωload resistors,
ΔVOC Change in differential driver output common-mode voltage –50 0 50 mV
See Figure 16
VOC(PP) Peak-to-peak driver common-mode output voltage 500 mV
COD Differential output capacitance 15 pF
VIT+ Positive-going receiver differential input voltage threshold See (1) -70 –20 mV
VIT– Negative-going receiver differential input voltage threshold –200 -140 See (1) mV
Receiver differential input voltage threshold hysteresis
Vhys 40 70 mV
(VIT+ – VIT–)
VOH Receiver high-level output voltage IOH = –8 mA 2.4 VCC–0.3 V
VOL Receiver low-level output voltage IOL = 8 mA 0.2 0.4 V
IIDriver input, driver enable, and receiver enable input current –3 3 µA
Receiver output high-impedance HVD1470, HVD1473,
IOZ VO= 0 V or VCC, RE = VCC –1 1 µA
current HVD1476
IOS Driver short-circuit output current –150 150 mA
VI= 12 V 75 125
HVD1470,
HVD1473 VI= –7 V –100 –40
VCC = 0 to ROC (max),
IIBus input current (disabled driver) µA
DE = GND VI= 12 V 240 333
HVD1476 VI= –7 V –267 –180
(1) Under any specific conditions, VIT+ is assured to be at least Vhys higher than VIT–.
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Electrical Characteristics (continued)
over recommended operating range (unless otherwise specified)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Driver and Receiver DE = VCC,750 1100 µA
enabled RE = GND, No load
Driver enabled, DE = VCC, RE = VCC,350 650 µA
receiver disabled No load
ICC Supply current (quiescent) Driver disabled, DE = GND, 650 800 µA
receiver enabled RE = GND, No load
Driver and receiver DE = GND, D = open, 0.1 5 µA
disabled RE = VCC, No load
Supply current (dynamic) See the Typical Characteristics section
Tsd Thermal Shut-down junction temperature 170 °C
7.8 Switching Characteristics — 400 kbps
400-kbps devices (SN65HVD1470, SN65HVD1471) bit time ≥2 µs (over recommended operating conditions)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DRIVER
tr, tfDriver differential output rise/fall time 100 400 750 ns
tPHL, tPLH Driver propagation delay RL= 54 Ω, CL= 50 pF See Figure 17 350 550 ns
tSK(P) Driver pulse skew, |tPHL – tPLH| 40 ns
tPHZ, tPLZ Driver disable time 50 200 ns
See Figure 18
HVD1470 Receiver enabled 300 750 ns
and Figure 19
tPZH, tPZL Driver enable time Receiver disabled 3 8 µs
RECEIVER
tr, tfReceiver output rise/fall time 13 25 ns
tPHL, tPLH Receiver propagation delay time CL= 15 pF See Figure 20 70 110 ns
tSK(P) Receiver pulse skew, |tPHL – tPLH| 7 ns
tPLZ, tPHZ Receiver disable time 45 60 ns
tPZL(1), Driver enabled See Figure 21 20 115 ns
HVD1470
tPZH(1) 3 8 µs
Receiver enable time
tPZL(2),Driver disabled See Figure 22
tPZH(2)
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7.9 Switching Characteristics — 20 Mbps
20-Mbps devices (SN65HVD1473, SN65HVD1474) bit time ≥50 ns (over recommended operating conditions)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DRIVER
tr, tfDriver differential output rise/fall time 4 7 14 ns
tPHL, tPLH Driver propagation delay RL= 54 Ω, CL= 50 pF See Figure 17 4 10 20 ns
tSK(P) Driver pulse skew, |tPHL – tPLH| 0 4 ns
tPHZ, tPLZ Driver disable time 12 25 ns
See Figure 18 and
HVD1473 Receiver enabled 10 20 ns
Figure 19
tPZH, tPZL Driver enable time Receiver disabled 3 8 µs
RECEIVER
tr, tfReceiver output rise/fall time 5 10 ns
tPHL, tPLH Receiver propagation delay time CL= 15 pF See Figure 20 60 90 ns
tSK(P) Receiver pulse skew, |tPHL – tPLH| 0 5 ns
tPLZ, tPHZ Receiver disable time 17 25 ns
HVD1473 Driver enabled See Figure 21 12 90 ns
tpZL(1), tPZH(1) Receiver enable time
tPZL(2), tPZH(2) Driver disabled See Figure 22 3 8 µs
7.10 Switching Characteristics — 50 Mbps
50-Mbps devices (SN65HVD1476, SN65HVD1477) bit time ≥20 ns (over recommended operating conditions)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DRIVER
tr, tfDriver differential output rise/fall time 2 3 6 ns
tPHL, tPLH Driver propagation delay RL= 54 Ω, CL= 50 pF See Figure 17 3 10 16 ns
tSK(P) Driver pulse skew, |tPHL – tPLH| 0 3.5 ns
tPHZ, tPLZ Driver disable time 10 20 ns
See Figure 18 and
HVD1476 Receiver enabled 10 20 ns
Figure 19
tPZH, tPZL Driver enable time Receiver disabled 3 8 µs
RECEIVER
tr, tfReceiver output rise/fall time 1 3 6 ns
tPHL, tPLH Receiver propagation delay time CL= 15 pF See Figure 20 25 40 ns
tSK(P) Receiver pulse skew, |tPHL – tPLH| 0 2 ns
tPLZ, tPHZ Receiver disable time 8 15 ns
HVD1476 Driver enabled See Figure 21 8 90 ns
tpZL(1), tPZH(1) Receiver enable time
tPZL(2), tPZH(2) Driver disabled See Figure 22 3 8 µs
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Temperature (qC)
Driver Rise and Fall Time (ns)
-40 -20 0 20 40 60 80 100 120
315
320
325
330
335
340
345
350
355
360
D009
Temperature (qC)
Driver Propagation Delay (ns)
-40 -20 0 20 40 60 80 100 120
315
320
325
330
335
340
345
350
355
360
D010
Driver Common-Mode Voltage (V)
Driver Differential-Output Voltage (V)
-7 -5 -3 -1 1 3 5 7 9 11
1.9
1.95
2
2.05
2.1
2.15
2.2
D003
Supply Voltage (V)
Driver Output Current (mA)
0 0.5 1 1.5 2 2.5 3 3.5
0
5
10
15
20
25
30
35
40
45
50
D004
Driver Output Current (mA)
Driver Output Voltage (V)
0 10 20 30 40 50 60 70 80 90 100
0
0.3
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3
3.3
3.6
D001
VOH
VOL
Driver Output Current (mA)
Driver Differential-Output Voltage (V)
0 10 20 30 40 50 60 70 80 90 100
0
0.5
1
1.5
2
2.5
3
3.5
D002
Differential Driver Output Voltage (V)
100 : Load Line
60 : Load Line
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7.11 Typical Characteristics
Figure 1. Driver Output Voltage vs Driver Output Current Figure 2. Driver Differential-Output Voltage vs Driver Output
Current
Figure 3. Driver Differential-Output Voltage vs Driver Figure 4. Driver Output Current vs Supply Voltage
Common-Mode Voltage
Figure 5. SN65HVD1470, SN65HVD1471 Driver Rise and Fall Figure 6. SN65HVD1470, SN65HVD1471 Driver Propagation
Time vs Temperature Delay vs Temperature
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Signaling Rate (Mbps)
Supply Current (mA)
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
41
41.2
41.4
41.6
41.8
42
D013
Signaling Rate (Mbps)
Supply Current (mA)
0 2 4 6 8 10 12 14 16 18 20
0
10
20
30
40
50
60
70
80
D007
Temperature (qC)
Driver Rise and Fall Time (ns)
-40 -20 0 20 40 60 80 100 120
0
0.5
1
1.5
2
2.5
3
3.5
4
D011
Series1
Temperature (qC)
Driver Propagation Delay (ns)
-40 -20 0 20 40 60 80 100 120
0
2
4
6
8
10
12
D012
Temperature (qC)
Driver Rise and Fall Time (ns)
-40 -20 0 20 40 60 80 100 120
0
1
2
3
4
5
6
7
8
9
10
D005
Temperature (qC)
Driver Propagation Delay (ns)
-40 -20 0 20 40 60 80 100 120
0
2
4
6
8
10
12
14
D006
SN65HVD1470
,
SN65HVD1471
,
SN65HVD1473
SN65HVD1474
,
SN65HVD1476
,
SN65HVD1477
SLLSEJ8D –JUNE 2014–REVISED OCTOBER 2014
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Typical Characteristics (continued)
Figure 7. SN65HVD1473, SN65HVD1474 Driver Rise and Fall Figure 8. SN65HVD1473, SN65HVD1474 Driver Propagation
Time vs Temperature Delay vs Temperature
Figure 9. SN65HVD1476, SN65HVD1477 Driver Rise and Fall Figure 10. SN65HVD1476, SN65HVD1477 Driver Propagation
Time vs Temperature Delay vs Temperature
VCC = 3.3 V TA= 25°C
Figure 11. SN65HVD1470, SN65HVD1471 Supply Current vs Figure 12. SN65HVD1473, SN65HVD1474 Supply Current vs
Signal Rate Signal Rate
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VOC
VOD
0 V or 3 V
Y
Z
V(Y)
V(Z)
VOC(PP) DVOC(SS)
VOC
CL
D
Y
RL / 2
Z
S0302-01
RL / 2
60 1%W ±
VOD
0 V or 3 V
_
+–7 V < V (test) < 12 V
DE
VCC
Y
Z
D
375 1%W ±
375 1%W ±
S0301-01
Signaling Rate (Mbps)
Supply Current (mA)
0 5 10 15 20 25 30 35 40 45 50
0
10
20
30
40
50
60
70
80
D014
Differential Input Voltage (mV)
Receiver output, R (V)
-150 -130 -110 -90 -70 -50
0
0.5
1
1.5
2
2.5
3
3.5
4
D008
VCM = 12 V
VCM = 0 V
VCM = -7 V
SN65HVD1470
,
SN65HVD1471
,
SN65HVD1473
SN65HVD1474
,
SN65HVD1476
,
SN65HVD1477
www.ti.com
SLLSEJ8D –JUNE 2014–REVISED OCTOBER 2014
Typical Characteristics (continued)
VCC = 3.3 V TA= 25°C
Figure 13. SN65HVD1476, SN65HVD1477 Supply Current vs Figure 14. Receiver Output vs Input
Signal Rate
8 Parameter Measurement Information
The input generator rate is 100 kbps with 50% duty cycle, than 6-ns rise and fall times, and 50-Ωoutput
impedance.
Figure 15. Measurement of Driver Differential Output Voltage With Common-Mode Load
Figure 16. Measurement of Driver Differential and Common-Mode Output With RS-485 Load
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Input
Generator 50 W
VO
1.5 V
0 V
50% 50%
3 V
VOH
VOL
50%
10%
50%
tPLH tPHL
tf
tr
90%
VI
VO
C = 15 pF 20%
L±
C Includes Fixture
and Instrumentation
Capacitance
L
A
B
RE
VI
R
0 V
90%
10%
S0306-01
Input
Generator 50 W
3 V VO
S1
3 V
50%
50%
50%
tPZL tPLZ
10%
»3 V
0 V
VOL
VI
VO
R = 110
1%
LW
±
CL = 50 pF 20%±
C Includes Fixture
and Instrumentation
Capacitance
L
D
Y
Z
DE
VI
»3 V
S0305-01
3 V
0 V
VOH
»0 V
tPHZ
tPZH
50% 50%
VI
VO50%
90%
R = 110
1%
LW
±
Input
Generator 50 W
3 V
S1
C = 50 pF 20%
L±
C Includes Fixture
and Instrumentation
Capacitance
L
DY
Z
DE
VO
VI
S0304-01
Y
50%
Z
W
W
»
»
50%
SN65HVD1470
,
SN65HVD1471
,
SN65HVD1473
SN65HVD1474
,
SN65HVD1476
,
SN65HVD1477
SLLSEJ8D –JUNE 2014–REVISED OCTOBER 2014
www.ti.com
Parameter Measurement Information (continued)
Figure 17. Measurement of Driver Differential Output Rise and Fall Times and Propagation Delays
D at 3 V to test non-inverting output, D at 0 V to test inverting output.
Figure 18. Measurement of Driver Enable and Disable Times with Active-High Output and Pulldown Load
D at 0 V to test non-inverting output, D at 3 V to test inverting output.
Figure 19. Measurement of Driver Enable and Disable Times with Active-Low Output and Pullup Load
Figure 20. Measurement of Receiver Output Rise and Fall Times and Propagation Delays
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50 W
VO
RE
R
A
B
3 V
0 V or 3 V
VCC
50% 50%
tPZH(1) tPHZ
50%
90%
3 V
0 V
VOH
»0 V
VO
C = 15 pF 20%
L±
C Includes Fixture
and Instrumentation
Capacitance
L
VI
DE
D1 k 1%W ±
VI
S1
D at 3 V
S1 to GND
tPZL(1) tPLZ
50%
10%
VCC
VOL
VO
D at 0 V
S1 to VCC
Input
Generator
S0307-01
Y
Z
SN65HVD1470
,
SN65HVD1471
,
SN65HVD1473
SN65HVD1474
,
SN65HVD1476
,
SN65HVD1477
www.ti.com
SLLSEJ8D –JUNE 2014–REVISED OCTOBER 2014
Parameter Measurement Information (continued)
Figure 21. Measurement of Receiver Enable and Disable Times With Driver Enabled
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