112 AVG semiconductors DDi" Technical Data DV74HCT112 Available Q2, 1995 Dual J-K Flip-Flop ante with Set and Reset DV74HCT112 This device identical in pinout to the LS112. Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Resat inputs. N Suffix . Plastic DIP Output Drive Capability: 10 LSTTL Loads AVG-003 Case * Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V for HC devices Low Input Current: 1 pA D Suttix * DC, AC parameters guaranteed from -55C to 125C ir pe 9 Plastic SOP AVG-004 Case PIN ASSIGNMENT TRUTH TABLE Clock 1[ |) 161] ec - Inputs. | Outputs ar , | Set_|Reset|Clock| J | K Q Qo i C2 15[] Clear L H % % x H L : ans 14] ] Clear 2 H L x x x L H 4 i a Seti ( ia 13|] Clock 2 | L L | x |x x Ll" | L* | ns 391 o: Cs 21) xe H | H | | L | L | NoChange Clock 1 Lp | oI) 6 1] | J? HH t . H L | 4H 2 | 6 _ Y H H 4 H L H L Ki | . | 4 | i o2[|7 10) |] Set 2 H H 1 7" H ToggI ea GND [ls 9| | 92 - yw TT H | H | L | X | X | NoChange _10 | H | H H x X__| No Change ar. . H | H | ft | x | X | NoChange a [ a "Both outputs will remain low as long as Set and Clock 2 13 Reset are low, but the output states are unpre 12 | 4 7" dictable if Set and Reset go high simultaneously , - H = High Logic Level CLEAR 7? L= Low logic Level mm 16 = Yee T= Low to High Transition PIN & = GND 4 = High to Low Transition A = Don't Care ABSOLUTE MAXIMUM RATINGS Maximum ratings are those values beyond which damage to the device may occur. Symbol Parameter Value _ Unit Voc | OC Supply Voltage (Referenced to GND) =.5 to +7.0 ve Vin | OC Input Voltage (Referenced to GND) _ 1.5 to Veo +1.5 Vv Vout__| OC Output Voltage (ReferencedtoGND) _ 0.5 to Veco +0.5 Vv lin DC Input Current, per Pin +20 mA lour | OC Output Current, per Pin 25 mA lec: DC Supply Current, Vec and GND Pins 250 | mA Pp | Power Dissipation in Still Air, Plastic DIP 750 mW SOP Package - 500 __Tst__| Storage Temperature Range ee __ =65 to +150 C | Ti | Lead Temperature, 1mm from Case for 10 Seconds - 260 sc DC74HC112, DV74HCTI12 5-60 1-800-AVG-SEMIGUARANTEED OPERATING CONDITIONS CLL Symbol Parameter | omin | max | unit Vec _| DC Supply Voltage, HC (HCT), Referenced to GND 2.0 (4.5) 6.0 (5.5) V Vin. Vout | OC Input Voltage, Output Voltage, Referenced to GND 0 Vee Vv Ta Ambient Temperature -55 +125 i tr, ty Input Rise and Fall Time: HC: Vcc=2.0V 0 1000 ns HCT: Vec=5.5V / HC: Vec=4.5V 0 500 HC: Vee=6.0V 0 400 HC - 112 DC ELECTRICAL CHARACTERISTICS a - Symbol Parameter Conditions Vec Guaranteed Limits Unit Vv 25c | <85C | <125C to 55C Vie Minimum High-Level Vour =0.1 V, Nourl<20uA 2.0 15 1.5 1.5 Vv Input Voltage or Vout = Vec0.1V 4.5 3.15 3.15 3.15 6.0 4.2 42 4.2 Vi. | Maximum Low- Level Vour =0.1 V, liouTls20uA 2.0 0.3 0.3 0.3 Vv Input Voltage or Vour = Vec0.1V 4.5 0.9 0.9 0.9 a 6.0 1.2 1.2 1.2 VoH Minimum High-Level Vin = Vin or Vit 2.0 1.9 1.9 1.9 V Output Voltage llourls 20 WA. 45 4.4 4.4 4.4 6.0 5.9 5.9 5.9 Vin = Vin or Vic, lloutl< 4.0mA 4.5 3.98 3.84 3.7 llourle 5.2 mA 6.0 548 | 5.34 5.2 Vor Maximum Low Level Vin = Vin or Vic. 2.0 0.1 0.1 0.1 Vv Output Voltage Hourls 20 pA 4.5 0.1 0.1 0.1 6.0 0.1 0.1 0.1 Vie = Viwor Vit. thourl< 4.0mA 4.5 0.26 0.33 0.40 Vv lloutls 5.2 mA 6.0 0.26 0.33 0.40 lin Maximum Input Vin = Vec or GND 6.0 +0.1 +1.0 + 1.0 pA Leakage Current Icc Maximum Quiescent Vin = Voc or GND, Ilouris 0 pA 6.0 4.0 40 80 pA Supply Current AC ELECTRICAL CHARACTERISTICS over full operating conditions (C\=50pF, Input tf=t=6ns) Symbol Parameter Vec Guaranteed Limit Unit Vv 25C | <85C | <125C to =5C imax Maximum Clock Frequency (50% Cycle) 2.0 6.0 4.6 4.0 MHz 4.5 20 24 20 6.0 35 28 24 teu, | Maximum P tion Delay Time, 2.0 125 155 190 ns {PHL Clock to O or 4.5 25 31 38 6.0 el 26 32 tFLH, Maximum Propagation Delay Time, 2.0 155 195 235 ns tea. =| Reset toQorG 4.5 31 39 47 - 6.0 | 26 33 40 tPLH, Maximum Propagation Delay Time, 2.0 165 205 250 ns tex. | SettoQord 4.5 33 41 50 7 6.0 28 35 43 tTLH, Maximum Output Transition Time 2.0 75 95 110 | Ons tra. | Any Output 4.5 15 19 22 _ 6.0 13 16 19 Cin__| Maximum Input Capacitance | 10 | 10 | 10 | pF 1-800-AVG-SEMI 5-61 DC74HC112, DV74HCT112Power Dissipation Capacitance (Per Gate) Typical @ 25C, Vec=5V Used to determine the no-load dynamic power consumption, 45 pF Po = Crp Vec*l + lec Vee TIMING REQUIREMENTS (Input t=tr=6 ns) Symbol Parameter Veco | Guaranteed Limit Unit Vo | 25C to! <85C | <125 C -55C tsu Minimum Setup Time, J or K to Clock 2.0 100 125 150 ns 4.5 20 25 30 6.0 17 21 26 th Minimum Hold Time, Clock to J or K 2.0 3 3 3 ns 4.5 3 3 3 6.0 3 3 3 bege Minimum Recovery Time, Set or Reset Inactive to Clock 2.0 100 125 150 ns 4.5 20 25 30 6.0 17 21 26 tw Minimum Pulse Width, Set or Reset 2.0 80 100 120 ns 4.5 16 20 24 6.0 14 17 20 lw Minimum Pulse Width, Clock 2.0 80 100 120 ns 4.5 16 20 24 6.0 14 17 20 HCT- 112 DC ELECTRICAL CHARACTERISTICS Symbol Parameter Conditions Vec |___ Guaranteed Limits ._| Unit N Vi | 25Cto | <esC | <125C Tm 55C Min | Max | Min | Max | Min | Max Ve | Minimum High-Level Vour = 0.1 V or Voc0.1 V 4.5 | 2.00 2.00 2.00 V Input Voltage lloutls 20 WA 5.5 | 2.00 2.00 2.00 Va | Masamum Low- Level Vout =0.1V or Vec 0.1 V 4.5 0.80 0.80 0.80) V Input Vokage lhourrls 20 pA 6.5 0.60 0.80 0.80 Vow | Minimum High-Level Vin = Vira VIH 4.5 | 4.40 4,40 4.40 V Output Voltage llouTls 20 pA 5.5 | 5.40 5.40 5.40 Vin =Vi.or Vin Noutls4.0 mA 4.5 | 3.98 3.84 3.70 V Vo. | Maximum Low Level Vin = Vinor Vic 4.5 0.1 0.1 0.1 V Output Voltage hours 20 ywA 5.5 0.1 0.1 0.1 Vin = Via or Vie lloutis 4.0mA 4.5 0.26 0.33 0.40] V lin Maximum Input Vin = Vec or GND 5.5 +0.1 +1.0 $1.0) BA Leakage Current lcc | Maximum Quiescent Vin = Vec or GND 5.5 4.0 40 BO) pA Supply Current lout! = O pA Alec | Additional Quiescent | Viw=2.4V, Any One Input >-55C 25C to 125C Supply Current Vin=Vec or GND, Other Inputs 5.5 29 2.4 mA louT=0 WA DC7T4HC112, DV7T4HCTI12 5-62 1-800-AVG-SEMIAC ELECTRICAL CHARACTERISTICS over full operating conditions (GCL=50pF, Input t=t=6ns) Symbol Parameter Vee Guaranteed Limit Unit V 25C | <85C | <125C to 5C fimax Maximum Clock Frequency (50% Cycle} 5.0 30 24 20 MHz tPLH; Maximum Propagation Delay Time, 5.0 35 44 53 ns (PHL Glock to Q or tPLH, Maximum Propagation Delay Time, 5.0 46 58 69 ns tPHL Set or Reset to OQ or Q tTLH, Maximum Output Transition Time 5.0 15 19 22 ns tTHL Any Output Cin Maximum Input Capacitance 10 10 10 pF CPD Power Dissipation Capacitance (Per Inverter) Typical @ 25C, Veg =5 V Unit Used to determine the no-load dynamic power consumption, 15 pF Pp = Cep Vec*f + lec Voc TIMING REQUIREMENTS (Input t=t=6 ns) Symbol Parameter Vec Guaranteed Limit Unit 25C to | <85C | <125 C 55C teu Minimum Setup Time, J or K to Clock 5.0 20 25 30 ns th Minimum Hold Time, Clock to J or K 5.0 5 a 3 ns trec Minimum Recovery Time, Set or Reset Inactive to Clock 5.0 5 5 5 ns tw Minimum Pulse Width, Set or Reset 5.0 16 20 24 ns tw Minimum Pulse Width, Clock 5.0 16 20 24 ns SWITCHING WAVEFORMS tf re v Clock wo Sei py fe " Rezet 10% GND hw r ipeL| - hPL Q or G WT | treo tPLH 90% 5 WT 10% ttTuy VALID W Vu H , Data Vy ve GND GND teu th Vr Clock 0 or GND Input and Output Threshold Voltage: Vr =50% Vcc for HC, 1.3V for HCT, VH= Vee for HC, 3V for HCT 1-800-AVG-SEMI 5-63 DCT4HC112, DV74HCT112 CLL