 
   
  
SCLS242K − O C TOBER 1995 − REVISED JANUARY 2004
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
DOperating Range 2-V to 5.5-V VCC
D3-State Outputs Directly Drive Bus Lines
DLatch-Up Performance Exceeds 250 mA Per
JESD 17
description/ordering information
The ’AHC573 devices are octal transparent
D-type latches designed for 2-V to 5.5-V VCC
operation.
When the latch-enable (LE) input is high, the
Q outputs follow the data (D) inputs. When LE is
low, the Q outputs are latched at the logic levels
of the D inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low) or the high-impedance state. In
the high-impedance state, the outputs neither
load nor drive the bus lines significantly. The
high-impedance state and increased drive
provide the capability to drive bus lines without
interface or pullup components.
OE does not affect the internal operations of the
latches. Old data can be retained or new data can
be entered while the outputs are in the
high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TAPACKAGEORDERABLE
PART NUMBER TOP-SIDE
MARKING
PDIP − N Tube SN74AHC573N SN74AHC573N
SOIC − DW
Tube SN74AHC573DW
AHC573
SOIC − DW
Tape and reel SN74AHC573DWR
AHC573
−40
°
C to 85
°
C
SOP − NS Tape and reel SN74AHC573NSR AHC573
−40
°
C to 85
°
C
SSOP − DB Tape and reel SN74AHC573DBR HA573
TSSOP − PW
Tube SN74AHC573PW
HA573
TSSOP − PW Tape and reel SN74AHC573PWR HA573
TVSOP − DGV Tape and reel SN74AHC573DGVR HA573
CDIP − J Tube SNJ54AHC573J SNJ54AHC573J
−55°C to 125°CCFP − W Tube SNJ54AHC573W SNJ54AHC573W
−55 C to 125 C
LCCC − FK Tube SNJ54AHC573FK SNJ54AHC573FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright 2004, Texas Instruments Incorporated
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN54AHC573 ...J OR W PACKAGE
SN74AHC573 . . . DB, DGV, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
SN54AHC573 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
VCC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
LE
3212019
910111213
4
5
6
7
8
18
17
16
15
14
2Q
3Q
4Q
5Q
6Q
3D
4D
5D
6D
7D
2D
1D
OE
8Q
7Q 1Q
8D
GND
LE VCC
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"&# )#+# #'(  && )# $'"! $'"!
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   
  
SCLS242K − O C TOBER 1995 − REVISED JANUARY 2004
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
OE LE D
OUTPUT
Q
L H H H
LHL L
LLX Q
0
H X X Z
logic diagram (positive logic)
OE
To Seven Other Channels
1
11
219
LE
1D
C1
1D 1Q
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1) −0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) −20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±75 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 92°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
 
   
  
SCLS242K − O C TOBER 1995 − REVISED JANUARY 2004
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
SN54AHC573 SN74AHC573
UNIT
MIN MAX MIN MAX
UNIT
VCC Supply voltage 2 5.5 2 5.5 V
VCC = 2 V 1.5 1.5
V
IH
High-level input voltage VCC = 3 V 2.1 2.1 V
VIH
High-level input voltage
VCC = 5.5 V 3.85 3.85
V
VCC = 2 V 0.5 0.5
V
IL
Low-level input voltage VCC = 3 V 0.9 0.9 V
VIL
Low-level input voltage
VCC = 5.5 V 1.65 1.65
V
VIInput voltage 0 5.5 0 5.5 V
VOOutput voltage 0 VCC 0 VCC V
VCC = 2 V −50 −50 mA
I
OH
High-level output current VCC = 3.3 V ± 0.3 V −4 −4
mA
IOH
High-level output current
VCC = 5 V ±0.5 V −8 −8 mA
VCC = 2 V 50 50 mA
I
OL
Low-level output current VCC = 3.3 V ± 0.3 V 4 4
mA
IOL
Low-level output current
VCC = 5 V ±0.5 V 8 8 mA
t/∆v
Input transition rise or fall rate
VCC = 3.3 V ± 0.3 V 100 100
ns/V
t/∆vInput transition rise or fall rate VCC = 5 V ±0.5 V 20 20 ns/V
TAOperating free-air temperature −55 125 −40 85 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25°C SN54AHC573 SN74AHC573
UNIT
PARAMETER
TEST CONDITIONS
V
CC MIN TYP MAX MIN MAX MIN MAX
UNIT
2 V 1.9 2 1.9 1.9
I
OH
= −50 mA3 V 2.9 3 2.9 2.9
VOH
IOH = −50 mA
4.5 V 4.4 4.5 4.4 4.4
V
VOH
IOH = −4 mA 3 V 2.58 2.48 2.48
V
IOH = −8 mA 4.5 V 3.94 3.8 3.8
2 V 0.1 0.1 0.1
I
OL
= 50 mA3 V 0.1 0.1 0.1
VOL
IOL = 50 mA
4.5 V 0.1 0.1 0.1
V
VOL
IOL = 4 mA 3 V 0.36 0.5 0.44
V
IOL = 8 mA 4.5 V 0.36 0.5 0.44
IIVI = 5.5 V or GND 0 V to 5.5 V ±0.1 ±1* ±1mA
IOZ VI = VIL or VIH, VO = VCC or GND 5.5 V ±0.25 ±2.5 ±2.5 mA
ICC VI = VCC or GND, IO = 0 5.5 V 4 40 40 mA
CiVI = VCC or GND 5 V 2.5 10 10 pF
CoVO = VCC or GND 5 V 3.5 pF
* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
 
   
  
SCLS242K − O C TOBER 1995 − REVISED JANUARY 2004
4POST OFFICE BOX 655303 DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
TA = 25°C SN54AHC573 SN74AHC573
UNIT
MIN MAX MIN MAX MIN MAX
UNIT
twPulse duration, LE high 5 5 5 ns
tsu Setup time, data before LE3.5 3.5 3.5 ns
thHold time, data after LE1.5 1.5 1.5 ns
timing requirements over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
TA = 25°C SN54AHC573 SN74AHC573
UNIT
MIN MAX MIN MAX MIN MAX
UNIT
twPulse duration, LE high 5 5 5 ns
tsu Setup time, data before LE3.5 3.5 3.5 ns
thHold time, data after LE1.5 1.5 1.5 ns
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ±0.3 V (unless otherwise noted) (see Figure 1)
FROM
TO
TA = 25°C SN54AHC573 SN74AHC573
UNIT
FROM
(INPUT)
TO
(OUTPUT)
CAPACITANCE MIN TYP MAX MIN MAX MIN MAX
UNIT
tPLH
D
Q
7* 11* 1* 13* 1 13
ns
tPHL D Q CL = 15 pF 7* 11* 1* 13* 1 13 ns
tPLH
LE
Q
7.6* 11.9* 1* 14* 1 14
ns
tPHL LE Q CL = 15 pF 7.6* 11.9* 1* 14* 1 14 ns
tPZH
OE
Q
7.3* 11.5* 1* 13.5* 1 13.5
ns
tPZL OE Q CL = 15 pF 7.3* 11.5* 1* 13.5* 1 13.5 ns
tPHZ
OE
Q
8.3* 11* 1* 13* 1 13
ns
tPLZ OE Q CL = 15 pF 8.3* 11* 1* 13* 1 13 ns
tPLH
D
Q
9.5 14.5 1 16.5 1 16.5
ns
tPHL D Q CL = 50 pF 9.5 14.5 1 16.5 1 16.5 ns
tPLH
LE
Q
10.1 15.4 1 17.5 1 17.5
ns
tPHL LE Q CL = 50 pF 10.1 15.4 1 17.5 1 17.5 ns
tPZH
OE
Q
9.8 15 1 17 1 17
ns
tPZL OE Q CL = 50 pF 9.8 15 1 17 1 17 ns
tPHZ
OE
Q
10.7 14.5 1 16.5 1 16.5
ns
tPLZ OE Q CL = 50 pF 10.7 14.5 1 16.5 1 16.5 ns
tsk(o) CL = 50 pF 1.5** 1.5 ns
On products compliant to MIL-PRF-38535, this parameter is not production tested.
∗∗ On products compliant to MIL-PRF-38535, this parameter does not apply.
 
   
  
SCLS242K − O C TOBER 1995 − REVISED JANUARY 2004
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ±0.5 V (unless otherwise noted) (see Figure 1)
FROM
TO
TA = 25°C SN54AHC573 SN74AHC573
UNIT
FROM
(INPUT)
TO
(OUTPUT)
CAPACITANCE MIN TYP MAX MIN MAX MIN MAX
UNIT
tPLH
D
Q
4.5* 6.8* 1 8* 1 8
ns
tPHL D Q CL = 15 pF 4.5* 6.8* 1 8* 1 8 ns
tPLH
LE
Q
5* 7.7* 1 9* 1 9
ns
tPHL LE Q CL = 15 pF 5* 7.7* 1 9* 1 9 ns
tPZH
OE
Q
5.2* 7.7* 1 9* 1 9
ns
tPZL OE Q CL = 15 pF 5.2* 7.7* 1 9* 1 9 ns
tPHZ
OE
Q
5.2* 7.7* 1 9* 1 9
ns
tPLZ OE Q CL = 15 pF 5.2* 7.7* 1 9* 1 9 ns
tPLH
D
Q
6 8.8 1 10 1 10
ns
tPHL D Q CL = 50 pF 6 8.8 1 10 1 10 ns
tPLH
LE
Q
6.5 9.7 1 11 111
ns
tPHL LE Q CL = 50 pF 6.5 9.7 1 11 111 ns
tPZH
OE
Q
6.7 9.7 1 11 111
ns
tPZL OE Q CL = 50 pF 6.7 9.7 1 11 111 ns
tPHZ
OE
Q
6.7 9.7 1 11 111
ns
tPLZ OE Q CL = 50 pF 6.7 9.7 1 11 111 ns
tsk(o) CL = 50 pF 1** 1 ns
On products compliant to MIL-PRF-38535, this parameter is not production tested.
∗∗ On products compliant to MIL-PRF-38535, this parameter does not apply.
noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 4)
PARAMETER
SN74AHC573
UNIT
PARAMETER
MIN MAX
UNIT
VOL(P) Quiet output, maximum dynamic VOL 1 V
VOL(V) Quiet output, minimum dynamic VOL −0.8 V
VOH(V) Quiet output, minimum dynamic VOH 4 V
VIH(D) High-level dynamic input voltage 3.5 V
VIL(D) Low-level dynamic input voltage 1.5 V
NOTE 4: Characteristics are for surface-mount packages only.
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance No load, f = 1 MHz 16 pF
 
   
  
SCLS242K − O C TOBER 1995 − REVISED JANUARY 2004
6POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
50% VCC
VCC
VCC
0 V
0 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Data Input
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
VCC
0 V
50% VCC
50% VCC
Input
Out-of-Phase
Output
In-Phase
Output
Timing Input
50% VCC
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Control
Output
Waveform 1
S1 at VCC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
VCC
0 V
50% VCC VOL + 0.3 V
50% VCC 0 V
VCC
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
TEST S1
VCC
0 V
50% VCC
tw
VOLTAGE WAVEFORMS
PULSE DURATION
Input
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr 3 ns, tf 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
From Output
Under Test CL
(see Note A)
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
S1
V
CC
RL = 1 k
GND
From Output
Under Test CL
(see Note A)
Test
Point
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
Open
50% VCC
50% VCC 50% VCC
50% VCC
50% VCC 50% VCC
50% VCC 50% VCC
VOH 0.3 V
Figure 1. Load Circuit and Voltage Waveforms
PACKAGE OPTION ADDENDUM
www.ti.com 18-Oct-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
5962-9685601Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9685601Q2A
SNJ54AHC
573FK
5962-9685601QRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9685601QR
A
SNJ54AHC573J
5962-9685601QSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9685601QS
A
SNJ54AHC573W
SN74AHC573DBLE OBSOLETE SSOP DB 20 TBD Call TI Call TI -40 to 85
SN74AHC573DBR ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA573
SN74AHC573DBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA573
SN74AHC573DBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA573
SN74AHC573DGVR ACTIVE TVSOP DGV 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA573
SN74AHC573DGVRE4 ACTIVE TVSOP DGV 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA573
SN74AHC573DGVRG4 ACTIVE TVSOP DGV 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA573
SN74AHC573DW ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC573
SN74AHC573DWE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC573
SN74AHC573DWG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC573
SN74AHC573DWR ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC573
SN74AHC573DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC573
SN74AHC573DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC573
PACKAGE OPTION ADDENDUM
www.ti.com 18-Oct-2013
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
SN74AHC573N ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SN74AHC573N
SN74AHC573NE4 ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SN74AHC573N
SN74AHC573NSR ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC573
SN74AHC573NSRE4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC573
SN74AHC573NSRG4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC573
SN74AHC573PW ACTIVE TSSOP PW 20 70 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA573
SN74AHC573PWE4 ACTIVE TSSOP PW 20 70 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA573
SN74AHC573PWG4 ACTIVE TSSOP PW 20 70 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA573
SN74AHC573PWLE OBSOLETE TSSOP PW 20 TBD Call TI Call TI -40 to 85
SN74AHC573PWR ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 HA573
SN74AHC573PWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA573
SN74AHC573PWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA573
SNJ54AHC573FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9685601Q2A
SNJ54AHC
573FK
SNJ54AHC573J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9685601QR
A
SNJ54AHC573J
SNJ54AHC573W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9685601QS
A
SNJ54AHC573W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
PACKAGE OPTION ADDENDUM
www.ti.com 18-Oct-2013
Addendum-Page 3
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54AHC573, SN74AHC573 :
Catalog: SN74AHC573
Automotive: SN74AHC573-Q1, SN74AHC573-Q1
Military: SN54AHC573
PACKAGE OPTION ADDENDUM
www.ti.com 18-Oct-2013
Addendum-Page 4
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74AHC573DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1
SN74AHC573DGVR TVSOP DGV 20 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
SN74AHC573DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
SN74AHC573NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1
SN74AHC573PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
SN74AHC573PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
SN74AHC573PWRG4 TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 26-Jan-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74AHC573DBR SSOP DB 20 2000 367.0 367.0 38.0
SN74AHC573DGVR TVSOP DGV 20 2000 367.0 367.0 35.0
SN74AHC573DWR SOIC DW 20 2000 367.0 367.0 45.0
SN74AHC573NSR SO NS 20 2000 367.0 367.0 45.0
SN74AHC573PWR TSSOP PW 20 2000 367.0 367.0 38.0
SN74AHC573PWR TSSOP PW 20 2000 364.0 364.0 27.0
SN74AHC573PWRG4 TSSOP PW 20 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 26-Jan-2013
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUAR Y 1996 – REVISED AUGUST 2000
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
14
3,70
3,50 4,90
5,10
20
DIM
PINS **
4073251/E 08/00
1,20 MAX
Seating Plane
0,05
0,15
0,25
0,50
0,75
0,23
0,13
112
24 13
4,30
4,50
0,16 NOM
Gage Plane
A
7,90
7,70
382416
4,90
5,103,70
3,50
A MAX
A MIN
6,60
6,20
11,20
11,40
56
9,60
9,80
48
0,08
M
0,07
0,40
0°8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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