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ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. "Typical" parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. FDMD8580 Dual N-Channel PowerTrench(R) MOSFET Q1: 80 V, 82 A, 4.6 m Q2: 80 V, 82 A, 4.6 m Features General Description Q1: N-Channel This device includes two 80V N-Channel MOSFETs in a dual power (5 mm X 6 mm) package. HS source and LS drain internally connected for half/full bridge, low source inductance package, low rDS(on)/Qg FOM silicon. Max rDS(on) = 4.6 m at VGS = 10 V, ID = 16 A Max rDS(on) = 6.0 m at VGS = 8 V, ID = 14 A Q2: N-Channel Applications Max rDS(on) = 4.6 m at VGS = 10 V, ID = 16 A Synchronous Buck: Primary Switch of Half / Full Bridge Converter for Telecom Max rDS(on) = 6.0 m at VGS = 8 V, ID = 14 A Ideal for Flexible Layout in Primary Side of Bridge Topology 100% UIL Tested Motor Bridge: Primary Switch of Half / Full Bridge Converter for BLDC Motor Kelvin High Side MOSFET Drive Pin-out Capability MV POL: 48V Synchronous Buck Switch RoHS Compliant Half/Full Bridge Secondary Synchronous Rectification Bottom Top D2/S1 D2/S1 D2/S1 G2 S2 Pin 1 D1 D1 D1 GR G1 G2 GR D2/S1 D1 D2/S1 D1 D2/S1 Pin 1 G1 Power 5 x 6 MOSFET Maximum Ratings TA = 25 C unless otherwise noted. Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current -Continuous ID TC = 25 C (Note 5) -Continuous TC = 100 C (Note 5) -Continuous TA = 25 C -Pulsed Single Pulse Avalanche Energy EAS PD TJ, TSTG Power Dissipation TC = 25 C Power Dissipation TA = 25 C Q1 80 Q2 80 Units V 20 20 V 82 82 52 52 161a 161b A (Note 4) 482 482 (Note 3) 337 337 59 59 2.31a 2.31b Operating and Storage Junction Temperature Range mJ -55 to +150 W C Thermal Characteristics RJC RJA Thermal Resistance, Junction-to-Case 2.1 1a Thermal Resistance, Junction-to-Ambient 55 2.1 55 1b C/W Package Marking and Ordering Information Device Marking FDMD8580 Device FDMD8580 (c)2015 Fairchild Semiconductor Corporation FDMD8580 Rev.1.0 Package Power 5 x 6 1 Reel Size 13 '' Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMD8580 Dual N-Channel PowerTrench(R) MOSFET December 2015 Symbol Parameter Test Conditions Type Min. 80 80 Typ. Max. Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 A, VGS = 0 V Q1 Q2 BVDSS TJ Breakdown Voltage Temperature Coefficient ID = 250 A, referenced to 25 C Q1 Q2 IDSS Zero Gate Voltage Drain Current VDS = 64 V, VGS = 0 V Q1 Q2 1 1 A IGSS Gate to Source Leakage Current VGS = 20 V, VDS = 0 V Q1 Q2 100 100 nA 4.5 4.5 V V 50 50 mV/C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 A Q1 Q2 VGS(th) TJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 A, referenced to 25 C Q1 Q2 2.0 2.0 -10 -10 VGS = 10 V, ID = 16 A VGS = 8 V, ID = 14 A rDS(on) Static Drain to Source On Resistance 3.5 4.6 6.0 VGS = 10 V, ID = 16 A, TJ = 125 C 5.3 7.0 VGS = 10 V, ID = 16 A 3.5 4.6 4.2 6.0 5.3 7.0 VGS = 8 V, ID = 14 A Forward Transconductance mV/C 4.2 Q1 Q2 VGS = 10 V, ID = 16 A, TJ = 125 C gFS 3.4 3.4 VDD = 10 V, ID = 16 A m Q1 Q2 51 51 Q1 Q2 4195 4195 5875 5875 pF Q1 Q2 602 602 845 845 pF 19 19 38 38 pF 1.7 1.7 3.5 3.5 Q1 Q2 25 25 40 40 ns Q1 Q2 19 19 34 34 ns Q1 Q2 31 31 50 50 ns Q1 Q2 10 10 20 20 ns Q1 Q2 57 57 80 80 nC Q1 Q2 21 21 nC Q1 Q2 12 12 nC S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Q1 Q2 Rg Gate Resistance Q1 Q2 VDS = 40 V, VGS = 0 V f = 1 MHz 0.1 0.1 Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg(TOT) Total Gate Charge Qgs Gate to Source Charge Qgd Gate to Drain "Miller" Charge (c)2015 Fairchild Semiconductor Corporation FDMD8580 Rev.1.0 VDD = 40 V, ID = 16 A VGS = 10 V, RGEN = 6 VGS = 0 V to 10 V VDD = 40 V, ID =16 A 2 www.fairchildsemi.com FDMD8580 Dual N-Channel PowerTrench(R) MOSFET Electrical Characteristics TJ = 25 C unless otherwise noted. Symbol Parameter Test Conditions Type Min. Typ. Max. Units Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = 16 A (Note 2) Q1 Q2 0.8 0.8 1.3 1.3 V VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = 2 A (Note 2) Q1 Q2 0.7 0.7 1.2 1.2 V trr Reverse Recovery Time Q1 Q2 46 46 73 73 ns Q1 Q2 34 34 55 55 nC IF = 16 A, di/dt = 100 A/s Qrr Reverse Recovery Charge NOTES: 1. RJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RJC is guaranteed by design while RCA is determined by the user's board design. b. 55 C/W when mounted on a 1 in2 pad of 2 oz copper a. 55 C/W when mounted on a 1 in2 pad of 2 oz copper SS SF DS DF G SS SF DS DF G c. 155 C/W when mounted on a minimum pad of 2 oz copper d. 155 C/W when mounted on a minimum pad of 2 oz copper SS SF DS DF G SS SF DS DF G 2. Pulse Test: Pulse Width < 300 s, Duty cycle < 2.0 %. 3. Q1: EAS of 337 mJ is based on starting TJ = 25 oC, L = 3 mH, IAS = 15 A, VDD = 80 V, VGS = 10 V. 100% tested at L = 0.1mH, IAS = 49 A. Q2: EAS of 337 mJ is based on starting TJ = 25 oC, L = 3 mH, IAS = 15 A, VDD = 80 V, VGS = 10 V. 100% tested at L = 0.1mH, IAS = 49 A. 4. Pulsed Id please refer to Fig 11 and Fig 24 SOA graph for more details. 5. Computed continuous current limited to max junction temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design. (c)2015 Fairchild Semiconductor Corporation FDMD8580 Rev.1.0 3 www.fairchildsemi.com FDMD8580 Dual N-Channel PowerTrench(R) MOSFET Electrical Characteristics TJ = 25 C unless otherwise noted. 180 150 ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 6.0 VGS = 10 V VGS = 8 V PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX VGS = 7 V 120 90 VGS = 6 V 60 VGS = 5.5 V 30 0 0.0 0.5 1.0 1.5 VDS, DRAIN TO SOURCE VOLTAGE (V) PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 4.5 VGS = 5.5 V 3.0 VGS = 10 V 0.0 0 2.0 rDS(on), DRAIN TO SOURCE ON-RESISTANCE (m) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE IS, REVERSE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 90 60 TJ = 25 oC TJ = -55 oC 5 6 7 8 9 ID = 16 A 15 10 TJ = 125 oC 5 TJ = 25 oC 4 200 100 5 6 7 8 9 10 VGS = 0 V 10 TJ = 150 oC 1 TJ = 25 oC 0.1 0.01 TJ = -55 oC 0.001 0.0 10 VGS, GATE TO SOURCE VOLTAGE (V) 0.2 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics (c)2015 Fairchild Semiconductor Corporation FDMD8580 Rev.1.0 180 Figure 4. On-Resistance vs. Gate to Source Voltage VDS = 5 V 4 150 VGS, GATE TO SOURCE VOLTAGE (V) 120 3 120 PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 20 0 PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 2 90 25 180 0 60 Figure 2. Normalized On-Resistance vs. Drain Current and Gate Voltage Figure 3. Normalized On Resistance vs. Junction Temperature 30 30 ID, DRAIN CURRENT (A) 2.0 ID = 16 A 1.9 1.8 VGS = 10 V 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -75 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) TJ = 150 oC VGS = 8 V 1.5 Figure 1. On Region Characteristics 150 VGS = 7 V VGS = 6 V Figure 6. Source to Drain Diode Forward Voltage vs. Source Current 4 www.fairchildsemi.com FDMD8580 Dual N-Channel PowerTrench(R) MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25C unless otherwise noted. 10000 ID = 16 A Ciss 8 VDD = 30 V VDD = 40 V 6 VDD = 50 V 4 2 0 0 12 24 36 48 1000 CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 Coss 100 10 f = 1 MHz VGS = 0 V 1 0.1 60 1 Figure 7. Gate Charge Characteristics 80 Figure 8. Capacitance vs. Drain to Source Voltage 90 ID, DRAIN CURRENT (A) 100 IAS, AVALANCHE CURRENT (A) 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) TJ = 25 oC 10 TJ = 125 TJ = 100 oC oC 72 VGS = 10 V 54 VGS = 8 V 36 18 o RJC = 2.1 C/W 1 0.001 0.01 0.1 1 10 100 0 25 1000 50 150 P(PK), PEAK TRANSIENT POWER (W) 10000 100 THIS AREA IS LIMITED BY rDS(on) 100 s SINGLE PULSE TJ = MAX RATED RJC = 2.1 oC/W TC = 25 oC 1 ms 10 ms 100 ms CURVE BENT TO MEASURED DATA 1 10 100 300 TC = 25 oC 100 10 -5 10 -4 10 -3 10 -2 10 -1 10 1 t, PULSE WIDTH (sec) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 11. Forward Bias Safe Operating Area (c)2015 Fairchild Semiconductor Corporation FDMD8580 Rev.1.0 SINGLE PULSE RJC = 2.1 oC/W 1000 10 s 0.1 0.1 125 Figure 10. Maximum Continuous Drain Current vs. Case Temperature 1000 1 100 TC, CASE TEMPERATURE ( C) Figure 9. Unclamped Inductive Switching Capability 10 75 o tAV, TIME IN AVALANCHE (ms) ID, DRAIN CURRENT (A) Crss Figure 12. Single Pulse Maximum Power Dissipation 5 www.fairchildsemi.com FDMD8580 Dual N-Channel PowerTrench(R) MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25C unless otherwise noted. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 2 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 0.01 NOTES: ZJC(t) = r(t) x RJC RJC = 2.1 oC/W Peak TJ = PDM x ZJC(t) + TC Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 -5 10 -4 10 -3 -2 10 10 -1 10 1 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Case Transient Thermal Response Curve (c)2015 Fairchild Semiconductor Corporation FDMD8580 Rev.1.0 6 www.fairchildsemi.com FDMD8580 Dual N-Channel PowerTrench(R) MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25C unless otherwise noted. 180 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE ID, DRAIN CURRENT (A) 150 6.0 VGS = 10 V VGS = 8 V PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX VGS = 7 V 120 90 VGS = 6 V 60 VGS = 5.5 V 30 0 0.0 0.5 1.0 1.5 PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 4.5 VGS = 5.5 V 3.0 VGS = 8 V 1.5 VGS = 10 V 0.0 0 2.0 30 VDS, DRAIN TO SOURCE VOLTAGE (V) rDS(on), DRAIN TO SOURCE ON-RESISTANCE (m) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE IS, REVERSE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) VDS = 5 V 90 60 TJ = 25 oC 30 TJ = -55 oC 5 6 7 8 9 ID = 16 A 15 10 TJ = 125 oC 5 TJ = 25 oC 4 5 6 7 8 9 200 100 VGS = 0 V 10 TJ = 150 oC 1 TJ = 25 oC 0.1 0.01 TJ = -55 oC 0.001 0.0 10 0.2 0.4 0.6 0.8 1.0 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 18. Transfer Characteristics Figure 19. Source to Drain Diode Forward Voltage vs. Source Current (c)2015 Fairchild Semiconductor Corporation FDMD8580 Rev.1.0 10 Figure 17. On-Resistance vs. Gate to Source Voltage 120 4 180 VGS, GATE TO SOURCE VOLTAGE (V) PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 3 150 PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 20 0 180 2 120 25 Figure 16. Normalized On-Resistance vs. Junction Temperature 0 90 Figure 15. Normalized on-Resistance vs. Drain Current and Gate Voltage 2.0 ID = 16 A 1.9 1.8 VGS = 10 V 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -75 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) TJ = 150 oC 60 ID, DRAIN CURRENT (A) Figure 14. On- Region Characteristics 150 VGS = 7 V VGS = 6 V 7 1.2 www.fairchildsemi.com FDMD8580 Dual N-Channel PowerTrench(R) MOSFET Typical Characteristics (Q2 N-Channel) TJ = 25 C unless otherwise noted. 10000 ID = 16 A Ciss 8 VDD = 30 V CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 40 V 6 VDD = 50 V 4 1000 Coss 100 10 2 0 0 12 24 36 48 f = 1 MHz VGS = 0 V 1 0.1 60 10 80 Figure 21. Capacitance vs. Drain to Source Voltage Figure 20. Gate Charge Characteristics 90 ID, DRAIN CURRENT (A) 100 IAS, AVALANCHE CURRENT (A) 1 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) TJ = 25 oC 10 TJ = 100 TJ = 125 oC oC 72 VGS = 10 V 54 VGS = 8 V 36 18 o RJC = 2.1 C/W 1 0.001 0.01 0.1 1 10 100 0 25 1000 50 150 P(PK), PEAK TRANSIENT POWER (W) 10000 100 THIS AREA IS LIMITED BY rDS(on) 100 s SINGLE PULSE TJ = MAX RATED 1 ms RJC = 2.1 oC/W TC = 25 oC 10 ms 100 ms CURVE BENT TO MEASURED DATA 1 10 100 300 TC = 25 oC 100 10 -5 10 -4 10 -3 10 -2 10 -1 10 1 t, PULSE WIDTH (sec) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 24. Forward Bias Safe Operating Area (c)2015 Fairchild Semiconductor Corporation FDMD8580 Rev.1.0 SINGLE PULSE RJC = 2.1 oC/W 1000 10 s 0.1 0.1 125 Figure 23. Maximum Continuous Drain Current vs. Case Temperature 1000 1 100 TC, CASE TEMPERATURE ( C) Figure 22. Unclamped Inductive Switching Capability 10 75 o tAV, TIME IN AVALANCHE (ms) ID, DRAIN CURRENT (A) Crss Figure 25. Single Pulse Maximum Power Dissipation 8 www.fairchildsemi.com FDMD8580 Dual N-Channel PowerTrench(R) MOSFET Typical Characteristics (Q2 N-Channel) TJ = 25C unless otherwise noted. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 2 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: 0.01 ZJC(t) = r(t) x RJC RJC = 2.1 oC/W Peak TJ = PDM x ZJC(t) + TC Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 -5 10 -4 10 -3 -2 10 10 -1 10 1 t, RECTANGULAR PULSE DURATION (sec) Figure 26. Junction-to-Case Transient Thermal Response Curve (c)2015 Fairchild Semiconductor Corporation FDMD8580 Rev.1.0 9 www.fairchildsemi.com FDMD8580 Dual N-Channel PowerTrench(R) MOSFET Typical Characteristics (Q2 N-Channel) TJ = 25 C unless otherwise noted. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. 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