1
FEATURES SUPPORTS DEFENSE, AEROSPACE AND
VIN
VIN
SD/CT
VOUT
VIN
VOUTS
VIN
GND
1
2
3
4
8
7
6
5
DESCRIPTION
UCC284-EP
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....................................................................................................................................... SLVS862A – NOVEMBER 2008 – REVISED NOVEMBER 2008
LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR
MEDICAL APPLICATIONS•Precision Negative Series Pass Voltage
•Controlled BaselineRegulation
•One Assembly/Test Site•0.2-V Dropout at 0.5 A
•One Fabrication Site•Wide Input Voltage Range – 3.2 V to – 15 V
•Available in S-Temp ( – 55 ° C/100 ° C)•Low Quiescent Current Irrespective of Load D
Temperature Range
(1)Simple Logic Shutdown Interfacing
•Extended Product Life Cycle•– 5 V, – 12 V, and Adjustable Output
•Extended Product-Change Notification•2.5% Duty Cycle Short Circuit Protection
•Product Traceability(1) Additional temperature ranges are available – contact factory.
D PACKAGE
(FRONT VIEW)
The UCC284-x family of negative linear-series pass regulators is tailored for low-dropout applications wherelow-quiescent power is important. Fabricated with a BCDMOS technology ideally suited for low input-to-outputdifferential applications, the UCC284-x passes 0.5 A while requiring only 0.2 V of input-voltage headroom.Dropout voltage decreases linearly with output current, so that dropout at 50 mA is less than 20 mV.
Quiescent current consumption for the device under normal (non-dropout) conditions is typically 200 µA. Anintegrated charge pump is internally enabled only when the device is operating near dropout with low VIN. Thisensured that the device meets the dropout specifications even for maximum load current and a VIN of – 3.2 Vwith only a modest increase in quiescent current. Quiescent current is always less than 360 µA, with the chargepump enabled. The quiescent current of the UCC284 does not increase with load current.
Short-circuit current is internally limited. The device responds to a sustained overcurrent condition by turning offafter a t
ON
delay. The device then stays off for a period, t
OFF
, that is 40 times the t
ON
delay. The device thenbegins pulsing on and off at the t
ON
/t
OFF
duty cycle of 2.5%. This drastically reduces the power dissipation duringshort circuit such that heat sinking, if at all required, must only accommodate normal operation. An externalcapacitor sets the on time. The off time is always 40 times t
ON
.
The UCC284-x can be shutdown to 45 µA (maximum) by pulling the SD/CT pin more positive than – 0.7 V. Toallow for simpler interfacing, the SD/CT pin may be pulled up to 6 V above the ground pin without turning onclamping diodes.
Internal power dissipation is further controlled with thermal-overload protection circuitry. Thermal shutdownoccurs if the junction temperature exceeds 140 ° C. The chip remains off until the temperature has dropped 20 ° C(T
J
= 120 ° C).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
3
8
2
6
7 5
R1
R2
1
4 GND
VOUTS
VOUT
1.25 V
−2.6 V
−1.6 V
OVERCURRENT
SQ
Q
R
THERMAL
SHUTDOWN
1−
µA
DISCHARGE
40 µA
VPUMP
SD/CT
CHARGE
700 mA
50 k
GM
TON
TOFF
UVLO
VIN
VIN
VIN
VIN
−2.2 V
R1 R2
0 OPENUCC384−ADJ
UCC384−5
UCC384−12
375K
375K
125K
43.6K
SHUTDOWN
−0.7 V
(−)
(+)
+
+
+
+
+
(−)
UDG−99030
UCC284-EP
SLVS862A – NOVEMBER 2008 – REVISED NOVEMBER 2008 .......................................................................................................................................
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ORDERING INFORMATION
(1)
OUTPUT VOLTAGE (V) PACKAGE DEVICEST
A
TYP (SOIC) D
(2)
– 55 ° C to 100 ° C – 5 UCC284SDR-5EP– 55 ° C to 100 ° C – 12 UCC284SDR-12EP
(3)
– 55 ° C to 100 ° C – 5 (Adj) UCC284SDR-ADJEP
(3)
(1) For the most current package and ordering information, see thePackage Option Addendum at the end of this document, or see theTI website at www.ti.com .(2) Package drawings, standard packing quantities, symbolization, andPCB design guidelines are available at www.ti.com/sc/package .Thermal data can be found athttp://www-s.ti.com/cgi-bin/sc/thermal_derating_curve.cgi .(3) Product preview only.
functional block diagram
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ABSOLUTE MAXIMUM RATINGS
(1) (2)
ELECTRICAL CHARACTERISTICS
UCC284-EP
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....................................................................................................................................... SLVS862A – NOVEMBER 2008 – REVISED NOVEMBER 2008
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
IN
Input voltage range
(2)
-16 VSD/CT Shutdown voltage range -5 6 VT
J
Operating virtual junction temperature range -55 150 VT
stg
Storage temperature range -65 150 ° CLead temperature (Soldering, 10 seconds) 300 ° C
(1) Stresses beyond those listed under " absolute maximum ratings " may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under " recommended operatingconditions " is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) All voltages are with respect to ground. Currents are positive into and negative out of the specified terminals.
T
A
= – 55 ° C to 100 ° C for the UCC284, VIN = VOUT – 1.5 V, I
OUT
= 0 mA, C
OUT
= 4.7 µF, and CT = 0.015 µF. ForUCC284-ADJ, VOUT is set to – 3.3 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
UCC284-5 Fixed – 5-V 0.5-A Regulation Section
T
A
= 25 ° C – 5.075 – 5 – 4.925 VOutput voltage
Over all temperature conditions – 5.150 – 4.850 VLine regulation T
A
= 25 ° C, VIN = – 5.2 V to – 15 V 1.5 10 mVOver all temperature conditions 12Load regulation T
A
= 25 ° C, I
OUT
= 0 mA to 0.5 A 0.1 0.25 %Over all temperature conditions 0.1 0.30Output noise voltage T
A
= 25 ° C, BW = 10 Hz to 10 kHz 200 µVRMST
A
= 25 ° C, I
OUT
0.5 A, VOUT = – 4.8 V 0.2 0.5 VOver all temperature conditions 0.2 0.55Dropout voltage, VOUT – VIN
T
A
= 25 ° C, I
OUT
50 mA, VOUT = – 4.8 V 20 50 mVOver all temperature conditions 20 55
UCC284-5 Fixed – 5-V 0.5-A Power Supply Section
Input voltage range – 15 – 5.2 VQuiescent current charge pump on T
A
= 25 ° C, VIN = – 4.85 V
(1)
280 350 µAOver all temperature conditions 360Quiescent current T
A
= 25 ° C, VIN = – 15 V 200 250 µAOver all temperature conditions 260VIN = – 13 V, SD/CT = 0 V, T
A
= 0 ° C to 100 ° C
(2)
15 45 µAQuiescent current in shutdown
VIN = – 13 V, SD/CT = 0 V, T
A
= – 55 ° C to 0 ° C
(2)
100 µAShutdown threshold T
A
= 25 ° C, At shutdown pin (SD/CT) – 1.0 – 0.7 – 0.4 VOver all temperature conditions -1.2 -0.2Shutdown input current T
A
= 25 ° C, SD/CT = 0 V 5 10 25 µAOver all temperature conditions 3 10 30Output leakage in shutdown VIN = – 15 V, VOUT = 0 V
(3)
1 50 µAOvertemperature shutdown 140 ° COvertemperature hysteresis 20 ° C
UCC284-5 Fixed – 5-V 0.5-A Current Limit Section
(1) The internal charge pump is enabled only for dropout condition with low VIN. Only in this condition is the charge pump required toprovide additional output FET fate drive to maintain dropout specifications. For conditions where the charge pump is not required, it isdisabled, which lowers overall device power consumption.(2) Ensured by design. Not production tested.(3) In the application during shutdown mode, output leakage current adds to quiescent current.
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ELECTRICAL CHARACTERISTICS
UCC284-EP
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ELECTRICAL CHARACTERISTICS (continued)T
A
= – 55 ° C to 100 ° C for the UCC284, VIN = VOUT – 1.5 V, I
OUT
= 0 mA, C
OUT
= 4.7 µF, and CT = 0.015 µF. ForUCC284-ADJ, VOUT is set to – 3.3 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Peak current limit T
A
= 25 ° C, VOUT = 0 V 0.7 1.1 1.5 AOver all temperature conditions 0.5 1.7Overcurrent threshold 0.55 0.7 0.9 ACurrent limit duty cycle VOUT = 0 V 2.5 4 %Overcurrent time out, t
ON
T
A
= 25 ° C, VOUT = 0 V 300 500 700 µsOver all temperature conditions 300 720
UCC284-12 Fixed 12-V 0.5-A Regulation Section
T
A
= 25 ° C – 12.18 – 12 – 11.82 VOutput voltage
Over all conditions – 12.24 – 11.64 VLine regulation VIN = – 12.5 V to – 15 V 5 15 mVLoad regulation I
OUT
= 0 mA to 0.5 A 0.1 0.3 %Output noise voltage T
A
= 25 ° C, BW = 10 Hz to 10 kHz 200 µVRMSI
OUT
= 0.5 A, VOUT = – 11.6 V 0.15 0.5 VDropout voltage, VOUT - VIN
I
OUT
= 50 mA, VOUT = – 11.6 V 15 50 mV
UCC284-12 Fixed – 12-V 0.5-A Power Supply Section
Input voltage range – 15 – 12.5 VQuiescent current VIN = -15 V 220 350 µAVIN = – 13 V, SD/CT = 0 V
15 45 µAT
A
= 0 ° C to 100 ° C
(4)Quiescent current in shutdown
VIN = – 13 V, SD/CT = 0 V
100 µAT
A
= – 55 ° C to 0 ° C
(4)
(4) Ensured by design. Not production tested.
T
A
= – 55 ° C to 100 ° C for the UCC284, VIN = VOUT – 1.5 V, I
OUT
= 0 mA, C
OUT
= 4.7 µF, and CT = 0.015 µF. ForUCC284-ADJ, VOUT is set to – 3.3 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
UCC284-12 Fixed – 12 V – 0.5-A Power Supply Section (continued)
Shutdown threshold At shutdown pin (SD/CT) – 1.0 – 0.7 – 0.4 VShutdown input current SD/CT = 0 V 5 10 25 µAOutput leakage in shutdown VIN = – 15 V, VOUT = 0 V
(1)
1 50 µAOvertemperature shutdown 140 ° COvertemperature hysteresis 20 ° C
UCC284-12 Fixed – 12-V 0.5-A Current Limit Section
Peak current limit VOUT = 0 V 0.7 1.1 1.5 AOvercurrent threshold 0.55 0.7 0.9 ACurrent limit duty cycle VOUT = 0 V 2.5 4 %Overcurrent time out, t
ON
VOUT = 0 V 300 500 700 µs
UCC284-ADJ Adjustable 0.5-A Regulation Section
T
A
= 25 ° C – 1.27 – 1.25 – 1.23 VReference voltage
Over temperature – 1.275 – 1.215 VLine regulation VIN = – 3.5 V to – 15 V, VOUT = VOUTS 0.5 3 mVLoad regulation I
OUT
= 0 mA to 0.5 A 0.1 0.18 %Output noise voltage BW = 10 Hz to 10 kHz, T
A
= 25 ° C 200 µVRMS
(1) In the application during shutdown mode, output leakage current adds to quiescent current.
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PIN DESCRIPTION
UCC284-EP
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....................................................................................................................................... SLVS862A – NOVEMBER 2008 – REVISED NOVEMBER 2008
ELECTRICAL CHARACTERISTICS (continued)T
A
= – 55 ° C to 100 ° C for the UCC284, VIN = VOUT – 1.5 V, I
OUT
= 0 mA, C
OUT
= 4.7 µF, and CT = 0.015 µF. ForUCC284-ADJ, VOUT is set to – 3.3 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
OUT
0.5 A, VOUT = – 3.15 V 0.25 0.5 VDropout voltage, VOUT - VIN
I
OUT
50 mA, VOUT = – 3.15 V 25 50 mVSense pin input current 100 250 nA
UCC284-ADJ Adjustable 0.5-A Power Supply Section
Input voltage range – 15 – 3.5 VUndervoltage lockout – 3.2 – 2.95 – 2.7 VQuiescent current charge pump on VIN = – 3.15 V
(2)
200 350 µAQuiescent current VIN = – 15 V 200 250 µAVIN = – 13 V, SD/CT = 0 V
15 45 µAT
A
= 0 ° C to 100 ° C
(3)Quiescent current in shutdown
VIN = – 13 V, SD/CT = 0 V
100 µAT
A
= – 55 ° C to 0 ° C
(3)
Shutdown threshold At shutdown pin (SD/CT) – 1.0 – 0.7 – 0.4 VShutdown input current SD/CT = 0 V 5 10 25 µAOutput leakage in shutdown VIN = – 15 V, VOUT = 0 V
(4)
1 50 µAOvertemperature shutdown 140 ° COvertemperature hysteresis 20 ° C
UCC284-ADJ Adjustable 0.5-A Current Limit Section
Peak current limit VOUT = 0 V 0.7 1.1 1.5 AOvercurrent threshold 0.55 0.7 0.9 ACurrent limit duty cycle VOUT = 0 V 2.5 4 %Overcurrent time out, t
ON
VOUT = 0 V 300 500 700 µs
(2) The internal charge pump is enabled only for dropout condition with low VIN. Only in this condition is the charge pump required toprovide additional output FET fate drive to maintain dropout specifications. For conditions where the charge pump is not required, it isdisabled, which lowers overall device power consumption.(3) Ensured by design. Not production tested.(4) In the application during shutdown mode, output leakage current adds to quiescent current.
GND: This is the low noise ground reference input. All voltages are measured with respect to the GND pin.
SD/CT: This is the shutdown pin and also the short-circuit timing pin. Pulling this pin more positive than – 0.7 Vputs the circuit in a low-current shutdown mode. Placing a timing capacitor between this pin and GND sets theshort-circuit charging time, t
ON
during an overcurrent condition. During an overcurrent condition, the output pulsesat approximately a 2.5% duty cycle.
NOTE:
The CT capacitor must be connected between this pin and GND, not VIN, to assurethat the SD/CT pin is not pulled significantly negative during power-up. This pinshould not be externally driven more negative than – 5 V or the device will bedamaged.
VIN: This is the negative input supply. Bypass this pin to GND with at least 1 µF of low ESR or ESL capacitance.
VOUT: Regulated negative-output voltage. A single 4.7 – µF capacitor should be connected between this pin andGND. Smaller value capacitors can be used for light loads, but this degrades the load-step performance of theregulator.
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UCC284-EP
SLVS862A – NOVEMBER 2008 – REVISED NOVEMBER 2008 .......................................................................................................................................
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VOUTS: This is the feedback pin for sensing the output of the regulator. For the UCC284-5 and UCC284-12versions, VOUTS can be connected directly to VOUT. If the load is placed at a considerable distance from theregulator, the VOUTS lead can be used as a Kelvin connection to minimize errors due to lead resistance.Connecting VOUTS at the load moves the resistance of the VOUT wire into the control loop of the regulator,thereby effectively canceling the IR drop associated with the load path.
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Product Folder Link(s): UCC284-EP
APPLICATION INFORMATION
overview
programming the output voltage on the UCC284
5
4
1
32
R1
R2
VOUT
VOUTS
GND
6 7
VIN VIN VIN VIN
CIN
VIN
8
CT
SD/CT COUT
VOUT
+
+
(+)
(−)
(+)
(−)
C1
UCC384−ADJ
1µF4.7µF
0.015µF
VOUT + * 1.25 ǒ1)R1
R2Ǔ(1)
dropout performance
UCC284-EP
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....................................................................................................................................... SLVS862A – NOVEMBER 2008 – REVISED NOVEMBER 2008
The UCC284 – x family of negative low-dropout linear (LDO) regulators provides a regulated-output voltage forapplications with up to 0.5 A of load current. The regulators feature a low-dropout voltage and short-circuitprotection, making their use ideal for demanding applications requiring fault protection.
The UCC284 – 5 and UCC284 – 12 have output voltages that are fixed at – 5 V and – 12 V respectively. ConnectingVOUTS to VOUT gives the proper output voltage with respect to ground.
The UCC284 – ADJ can be programmed for any output voltage between – 1.25 V and – 15 V. This is easilyaccomplished with the addition of an external resistor divider connected between GND and VOUT with VOUTSconnected to the center tap of the divider. For an output of – 1.25 V, no resistors are needed and VOUTS isconnected directly to VOUT. The regulator-input voltage cannot be more positive than the UVLO threshold, orapproximately – 3 V. Thus, low dropout cannot be achieved when programming the output voltage more positivethan approximately – 3.3 V. A typical application circuit is shown in Figure 1 .
Figure 1. Typical Application Circuit
For the UCC284-ADJ, the output voltage is programmed by the following equation:
When R1 or R2 are selected to be greater than about 100 k Ω, a small ceramic capacitor should be placed acrossR1 to cancel the input pole created by R1 and the parasitic capacitance appearing on VOUTS. Values ofapproximately 20 pF should be adequate.
The UCC284 is tailored for low-dropout applications where low-quiescent power is important. Fabricated with aBCDMOS technology ideally suited for low input-to-output differential applications, the UCC284 passes 0.5 Awhile requiring only 0.2 V of headroom. The dropout voltage is dependent on operating conditions such as loadcurrent, input and load voltages, and temperature. The UCC284 achieves a low RDS(on) through the use of aninternal charge-pump that drives the MOSFET gate.
Figure 2 shows typical dropout voltages versus output voltage for the UCC284 – 5 V and – 12 V versions as wellas the UCC284-ADJ version programmed between – 3.3 V and – 15 V. Since the dropout voltage is also affectedby output current, Figure 3 shows typical dropout voltages versus load current for different values of VOUT.
Operating temperatures also affect the R
DS(on)
and the dropout voltage of the UCC284. Figure 4 shows typicaldropout voltages for the UCC284 over temperature under a full load of 0.5 A.
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 7
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short-circuit protection
IOUT = 0.1 A
IOUT = 0.2 A
IOUT = 0.3 A
IOUT = 0.4 AIOUT = 0.5 A
3
0.00 6 9 12 15
0.05
0.10
0.15
0.20
0.25
0.30
VOUT − Output Voltage − V
(VIN−VOUT) − Dropout Voltage − V
DROPOUT VOLTAGE
vs
OUTPUT VOLTAGE
VOUT = −15 V
VOUT = −12 V
VOUT = −5 V
0.05
0.05
0.15
0.10
0.25 0.35 0.45
0.15
0.20
0.25
IOUT− Load Current − A
DROPOUT VOLTAGE
vs
LOAD CURRENT
(VIN−VOUT) − Dropout Voltage − V
VOUT = −3.3 V
DROPOUT VOLTAGE
vs
TEMPERATURE
(VIN−VOUT) − Dropout Voltage − V
VOUT = −3.3 V
VOUT = −5 V
VOUT = −15 V
VOUT = −12 V
−50 −25 0 50 7525 100
0.05
0.10
0
0.20
0.25
0.15
0.35
0.40
0.30
TA − Free-Air Temperature − _C
UCC284-EP
SLVS862A – NOVEMBER 2008 – REVISED NOVEMBER 2008 .......................................................................................................................................
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The UCC284 provides unique short-circuit protection circuitry that reduces power dissipation during a fault. Whenan overcurrent condition is detected, the device enters a pulsed mode of operation, limiting the output to a 2.5%duty cycle. This reduces the heat sink requirements during a fault. The operation of the UCC284 during anovercurrent condition is shown in Figure 5 .
Figure 2. Figure 3.
Figure 4.
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IOUT=0A
IOUT (NOM)
IOVER
IPEAK
VOUT = 0V
VOUT
=(IPEAK)(RL)
VOUT NOM. (−V)
CT = 0V
CT (NOM) = − 1.6V
CT = − 2.6V
NOTE: CURRENT FLOW IS INTO THE DEVICE
tON
tOFF tON
tOFF tON
UDG−99031
~40 x tON ~40 x tON
UCC284-EP
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....................................................................................................................................... SLVS862A – NOVEMBER 2008 – REVISED NOVEMBER 2008
Figure 5. Short Circuit Timing
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Product Folder Link(s): UCC284-EP
short-circuit timing
tON +CT (mF) 1 V
40 mAseconds (3)
tOFF +CT (mF) 1 V
1mAseconds (4)
capacitive loads
COUT(max) +ƪIPEAK(A) *ILOAD(A)ƫ tON(sec)
VOUT(V) Farads (5)
COUT(max) +tON(sec)
RLOAD (W) ȏnȧ
ȧ
ȧ
ȧ
ȡ
Ȣ
1
1*ǒVOUT (V)
IMAX(A) RLOAD(W)Ǔȧ
ȧ
ȧ
ȧ
ȣ
Ȥ
Farads (6)
UCC284-EP
SLVS862A – NOVEMBER 2008 – REVISED NOVEMBER 2008 .......................................................................................................................................
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During normal operation the output voltage is in regulation and the SD/CT pin is held to -1.5 V via a 50-k Ωinternal-source impedance. If the output-current rises above the overcurrent threshold, the CT capacitor ischarged by a 40- µA current sink. The voltage on the SD/CT pin moves in a negative direction with respect toGND.
During an overcurrent condition, the regulator actively limits the maximum output current to the peak-current limit.This limits the output voltage of the regulator to:
If the output current stays above the overcurrent threshold, the voltage on the SD/CT pin reaches – 2.6 V withrespect to GND and the output turns off. The CT capacitor is then discharged by a 1- µA current source. Whenthe voltage on the SD/CT pin reaches – 1.6 V with respect to GND, the output turns back on. This processrepeats until the output current falls below the overcurrent threshold.
tON, the time the output is on during an overcurrent condition is determined by the following equation:
tOFF, the time the output is off during an overcurrent condition is determined by the following equation:
A capacitive load on the regulator's output appears as a short-circuit during start-up. If the capacitance is toolarge, the output voltage does not begin to regulate during the initial t
ON
period and the UCC284 enters a pulsedmode operation. For a constant current load the maximum allowed output capacitance is calculated as follows:
For worst case calculations, the minimum value for t
ON
should be used, which is based on the value of CTcapacitor selected. For a resistive load the maximum output capacitor can be estimated as follows:
Figure 6 and Figure 7 are oscilloscope photos of the UCC284-ADJ operating during an overcurrent condition.Figure 6 shows operation of the circuit as the output current initially rises above the overcurrent threshold. This isshown on a 1 ms/div. scale. Figure 7 shows operation of the same circuit on a 25 ms/div. scale showing onecomplete cycle of operation during an overcurrent condition.
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UCC284−ADJ
OVERCURRENT CONDITION OPERATION
1 ms/div
UCC284−ADJ
OVERCURRENT CONDITION OPERATION
25 ms/div
shutdown feature of the UCC284
UCC284-EP
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....................................................................................................................................... SLVS862A – NOVEMBER 2008 – REVISED NOVEMBER 2008
Figure 6.
Figure 7.
The shutdown feature of the UCC284 allows the device to be placed in a low quiescent current mode. TheUCC284 is shut down by pulling the SD/CT pin more positive than -0.7 V with respect to GND. Figure 8 showshow a shutdown circuit can be configured for the UCC284 using a standard transistor-transistor logic signal tocontrol it.
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Product Folder Link(s): UCC284-EP
5
4
1
32
R1
R2
VOUT
VOUTS
GND
6 7
VIN VIN VIN VIN
CIN
VIN
8
CT
SD/CT COUT
VOUT
+
+
(+)(+)
(−)
C1
UCC384−ADJ
TTL SHUTDOWN CIRCUIT
1µF
0.015µF
4.7µF
470 k
+5 V
LOGIC
INPUT
+5 V
GND
(−)
controlling the SD/CT pin
UCC284-EP
SLVS862A – NOVEMBER 2008 – REVISED NOVEMBER 2008 .......................................................................................................................................
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Figure 8. TTL Controlled Shutdown Circuit
Forcing the SD/CT pin to any fixed voltage affects the operation of the circuit. As mentioned before, pulling theSD/CT pin more positive than – 0.7 V puts the circuit in a shutdown mode, limiting the quiescent current to lessthan 45 µA. Pulling this pin more positive than 6 V with respect to GND damages the device.
Forcing the SD/CT pin to any fixed voltage between – 0.7 V and – 1.6 V with respect to GND enables the output.However, in an overcurrent condition, the output does not pulse at a 2.5% duty cycle, but the output current isstill limited to the peak current limit. This circuit may be used where a fixed current limit is needed, where a 2.5%duty cycle is undesirable. The UCC284 supplies a maximum current in this configuration as long as thetemperature of the device does not exceed the overtemperature shutdown. This is determined by the peakcurrent being supplied, the input and output voltages, and the type of heat sink being used. Thermal design isdiscussed later on in this data sheet.
Forcing the SD/CT pin to a voltage level between approximately – 1.6 V and – 2.6 V with respect to GND is notrecommended as the output may or may not be enabled.
Forcing the SD/CT pin to a voltage level between approximately – 2.6 V and – 5 V with respect to GND turns theoutput off completely. The output remains off as long as the voltage is applied. Pulling this pin more negativethan – 5 V with respect to GND damages the device (see Table 1 ).
Table 1. SD/CT Voltage Levels
SD/CT STATE
6 V to – 0.7 V Output disabled and device in low quiescent shutdown mode.– 0.7 V to – 1.6 V Output enabled– 1.6 V to – 2.6 V Output enabled or disabled depending on the previous state.– 2.6 V to – 5 V Output disabled
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VIN TO VOUT DELAY TIME
DURING POWER-UP WITH CT = 0.22 µF
VIN to VOUT Delay
5
4
1
32
R1
R2
VOUT
VOUTS
GND
6 7
VIN VIN VIN VIN
CINVIN
8
CT
SD/CT COUT VOUT
+
+
(+)(+)
C1
UCC384−ADJ
R3
C2
2N7000
QUICK START CURRENT
R4
0.22µF
0.1µF18 k
12 k
1µF
4.7µF
Q1 (−)
(−)
UCC284-EP
www.ti.com
....................................................................................................................................... SLVS862A – NOVEMBER 2008 – REVISED NOVEMBER 2008
Figure 9.
During power-up there is a delay between VIN and VOUT. The majority of this delay time is due to the chargingtime of the CT capacitor. When VIN moves more negative than the UVLO of the device with respect to GND, theCT capacitor begins to charge. A 17- µA current sink is used only during power up to charge the CT capacitor.When the voltage on the SD/CT pin reaches approximately – 1.6 V with respect to GND, the output turns on andregulates. The larger the value of the CT capacitor, the greater the delay time between VIN and VOUT. Figure 9shows the VIN to VOUT start-up delay, approximately 16 ms for a circuit with CT = 0.22 µF.
Shorter delay times can be achieved with a smaller CT capacitor. The problem with a smaller CT capacitor is thatwith a very large load, the circuit may stay in overcurrent mode and never turn on. A circuit with a largecapacitive load needs a large CT capacitor to operate properly.
One way to shorten the delay from VIN to VOUT during powerup is with the use of the quick start-up circuitshown in Figure 10 .
Figure 10. Quick Start-Up Circuit
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): UCC284-EP
VIN TO VOUT DELAY TIME
WITH CT CAPACITOR REMOVED
VIN TO VOUT DELAY TIME
WITH QUICK START-UP CIRCUIT
operation of the quick start-up circuit
R4 +VIN(V) TDseconds
1.6 CT (F) ohms (7)
tM+2.6
1.6 tDseconds (8)
UCC284-EP
SLVS862A – NOVEMBER 2008 – REVISED NOVEMBER 2008 .......................................................................................................................................
www.ti.com
With the quick start-up circuit, the delay time between VIN and VOUT during start-up can be reduceddramatically. Figure 11 shows that with the quick start-up circuit, the VIN to VOUT delay time has been reducedto approximately 1 ms.
Figure 11. Figure 12.
During normal start-up, the UCC284 does not turn on until the voltage on the SD/CT pin reaches approximately– 1.6 V with respect to ground. It takes a certain amount of time for the CT capacitor to charge to this point. For acircuit that has a very large load, the CT capacitor needs to be large in order for the overcurrent timing to workproperly. A large value of capacitance on the SD/CT pin increases the VIN to VOUT delay time.
The quick start-up circuit uses Q1 to quickly pull the SD/CT pin in a negative direction during start-up, thusdecreasing the VIN-to-VOUT delay time. When VIN is applied to the circuit, Q1 turns on and starts to charge theCT capacitor. The current pulled through R4 determines the rate at which CT is charged. R4 can be calculatedas follows:
t
D
is the approximate VIN-to-VOUT delay time desired.
Q1 needs to be turned off after a fixed time to prevent the SD/CT pin from going too far negative with respect toGND. If the SD/CT pin is allowed to go too far negative with respect to GND, the output turns off again orpossibly even damages the SD/CT pin. The maximum amount of time that Q1 should be allowed to be on isreferred to as tM and can be calculated as follows:
14 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): UCC284-EP
R3 +0.9 tMseconds
C2(F) ȏnǒ1*VIN(V)*1.6
VIN(V) ǓOhms (9)
minimum VIN to VOUT delay time
thermal design
Pavg +ƪVIN(V) *VOUT(V)ƫ IPEAK(A) ǒtON(seconds)
40 tON(seconds)ǓWatts (11)
UCC284-EP
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....................................................................................................................................... SLVS862A – NOVEMBER 2008 – REVISED NOVEMBER 2008
R3 along with C2 set the time that Q1 is allowed to be on. Since t
M
is the maximum amount of time that Q1should be allowed to stay on, an added safety margin may be to use 0.9 × t
M
instead. This ensures that Q1 isturned off in the proper amount of time. With a chosen value for C2, R3 can be calculated as follows:
After the CT capacitor has charged up for a time equal to 0.9 × t
M
, Q1 turns off and allows the SD/CT pin to bepulled back to – 1.5 V with respect to GND through a 50-k Ωresistor. At this point, the SD/CT pin can be used bythe UCC284 overcurrent timing control.
Although it may desirable to have as short a delay time as possible, a small portion of this delay time is fixed bythe UCC284 and cannot be shortened. This is shown in Figure 12 , where the CT capacitor has been removedfrom the circuit completely, giving a fixed VIN to VOUT delay of approximately 150 µs for a circuit withVIN = – 6 V and VOUT = – 5 V.
The Packaging Information section of the Power Supply Control Products Data Book (literature numberSLUD003) contains reference material for the thermal ratings of various packages. The section also includes anexcellent article entitled Thermal Characteristics of Surface Mount Packages, which is the basis for the followingdiscussion.
Thermal design for the UCC284 includes two modes of operation, normal and pulsed. In normal mode, the linearregulator and heat sink must dissipate power equal to the maximum forward voltage drop multiplied by themaximum load current. Assuming a constant current load, the expected heat rise at the regulator ’ s junction canbe calculated as follows:
Theta ( θ) is the thermal resistance and PDISS is the power dissipated. The junction-to-case thermal resistance(θjc) of the SOIC-8 D package is 22 ° C/W. In order to prevent the regulator from going into thermal shutdown, thecase-to-ambient thermal resistance ( θca) must keep the junction temperature below 150 ° C. If the UCC284 ismounted on a 5 square inch pad of 1-ounce copper, for example, the thermal resistance ( θja) becomes40-70 ° C/W. If a lower thermal resistance is required for the application, the device heat sinking needs to beimproved.
When the UCC284 is in a pulsed mode, due to an overcurrent condition, the maximum average powerdissipation is calculated as follows:
As seen in equation (10), the average power during a fault is reduced dramatically by the duty cycle, allowing theheat sink to be sized for normal operation. Although the peak power in the regulator during the t
ON
period can besignificant, the thermal mass of the package normally keeps the junction temperature from rising unless the t
ONperiod is increased to several milliseconds.
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): UCC284-EP
PACKAGE OPTION ADDENDUM
www.ti.com 21-Apr-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
UCC284SDR-5EP ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
V62/09609-01XE ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
UCC284SDR-5EP SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
UCC284SDR-5EP SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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