Supertex inc.
Supertex inc.
www.supertex.com
Doc.# DSFP-VP0104
C082313
VP0104
P-Channel Enhancement-Mode
Vertical DMOS FETs
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
SiVP
0104
YYWW
Features
Free from secondary breakdown
Low power drive requirement
Ease of paralleling
Low CISS and fast switching speeds
Excellent thermal stability
Integral source-drain diode
High input impedance and high gain
Applications
Motor controls
Converters
Ampliers
Switches
Power supply circuits
Drivers (relays, hammers, solenoids, lamps, memories,
displays, bipolar transistors, etc.)
General Description
This enhancement-mode (normally-off) transistor utilizes
a vertical DMOS structure and Supertex’s well-proven,
silicon-gate manufacturing process. This combination
produces a device with the power handling capabilities
of bipolar transistors and the high input impedance and
positive temperature coefcient inherent in MOS devices.
Characteristic of all MOS structures, this device is free
from thermal runaway and thermally-induced secondary
breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high
input impedance, low input capacitance, and fast switching
speeds are desired.
Absolute Maximum Ratings
Parameter Value
Drain-to-source voltage BVDSS
Drain-to-gate voltage BVDGS
Gate-to-source voltage ±20V
Operating and storage temperature -55OC to +150OC
Absolute Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation under these conditions is not implied. Continuous operation
of the device at the absolute rating level may affect device reliability. All voltages are
referenced to device ground.
TO-92
Product Marking
Package may or may not include the following marks: Si or
Pin Conguration
TO-92
GATE
SOURCE
DRAIN
Product Summary
BVDSS/BVDGS
RDS(ON)
(max)
ID(ON)
(min)
-40V 8.0Ω-500mA
Typical Thermal Resistance
Package θja
TO-92 132OC/W
Ordering Information
Part Number Package Option Packing
VP0104N3-G TO-92 1000/Bag
VP0104N3-G P002
TO-92 2000/Reel
VP0104N3-G P003
VP0104N3-G P005
VP0104N3-G P013
VP0104N3-G P014
-G denotes a lead (Pb)-free / RoHS compliant package.
Contact factory for Wafer / Die availablity.
Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.
2
Supertex inc.
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Doc.# DSFP-VP0104
C082313
VP0104
Electrical Characteristics (TA = 25°C unless otherwise specied)
Sym Parameter Min Typ Max Units Conditions
BVDSS Drain-to-source breakdown voltage -40 - - V VGS = 0V, ID = -1.0mA
VGS(th) Gate threshold voltage -1.5 - -3.5 V VGS = VDS, ID = -1.0mA
ΔVGS(th) Change in VGS(th) with temperature - 5.8 6.5 mV/OC VGS = VDS, ID = -1.0mA
IGSS Gate body leakage current - -1.0 -100 nA VGS = ±20V, VDS = 0V
IDSS Zero gate voltage drain current
- - -10 µA VGS = 0V, VDS = Max Rating
- - -1.0 mA VDS = 0.8 Max Rating,
VGS = 0V, TA = 125OC
ID(ON) On-state drain current -0.15 -0.25 - AVGS = -5.0V, VDS = -25V
-0.5 -1.2 - VGS = -10V, VDS = -25V
RDS(ON)
Static drain-to-source
on-state resistance
-11 15 ΩVGS = -5.0V, ID = -100mA
- 6.0 8.0 VGS = -10V, ID = -500mA
ΔRDS(ON) Change in RDS(ON) with temperature - 0.55 1.0 %/OC VGS = -10V, ID = -500mA
GFS Forward transconductance 150 190 - mmho VDS = -25V, ID = -500mA
CISS Input capacitance - 45 60
pF
VGS = 0V,
VDS = -25V,
f = 1.0MHz
COSS Common source output capacitance - 22 30
CRSS Reverse transfer capacitance - 3.0 8.0
td(ON) Turn-on delay time - 4.0 6.0
ns
VDD = -25V,
ID = -500mA,
RGEN = 25Ω
trRise time - 3.0 10
td(OFF) Turn-off delay time - 8.0 12
tfFall time - 4.0 10
VSD Diode forward voltage drop - -1.2 -2.0 V VGS = 0V, ISD = -1.0A
trr Reverse recovery time - 400 - ns VGS = 0V, ISD = -1.0A
Notes:
1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Switching Waveforms and Test Circuit
90%
10%
90% 90%
10%
10%
Pulse
Generator
VDD
RL
OUTPUT
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
f
t
r
INPUT
RGEN
INPUT
OUTPUT
0V
VDD
0V
-10V
Notes:
† ID (continuous) is limited by max rated Tj .
Thermal Characteristics
Package ID
(continuous)
ID
(pulsed)
Power Dissipation
@TC = 25OCIDR
IDRM
TO-92 -250mA -800mA 1.0W -250mA -800A
3
Supertex inc.
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Doc.# DSFP-VP0104
C082313
VP0104
Typical Performance Curves
BVDSS Variation with Temperature
BVDSS (normalized)
1.10
1.06
1.02
0.98
0.94
0.90
-50 0 50 100 150
Tj (OC)
Transfer Characteristics
On-Resistance vs. Drain Current
RDS(ON) (ohms)
50
40
30
20
10
0
ID (amperes)
0 -0.3 -0.6 -0.9 -1.2 -1.5
VGS = -5.0V
VGS = -10V
-1.0
-0.8
-0.6
-0.4
-0.2
0
0 -2 -4 -6 -8 -10
VGS (volts)
VDS = -25V
TA = -55OC
TA = 25OC
TA = 125OC
VDS = -10V
VDS = -40V
70pf
70pf
-50 0 50 100 150
-1.6
-1.4
-1.2
-1.0
-0.8
0.6
V(th) and RDS Variation with Temperature
Capacitance vs. Drain-to-Source Voltage Gate Drive Dynamic Characteristics
VDS (volts)
0 -10 -20 -30 -40
-10
-8
-6
-4
-2
0
VGS(th) (normalized)
VGS (volts)
C (picofarads)
100
75
50
25
0
f = 1MHz
CISS
COSS
CRSS
-1.6
-1.4
-1.2
-1.0
-0.8
RDS(ON) (normalized)
RDS(ON) @ 10V, -0.5A
RDS(ON) @ -5V, -0.1A
V(th) @ -1.0mA
0 0.2 0.4 0.6 0.8 1.0
QG (nanocoulombs)
45pf
Tj (OC)
ID (amperes)
4
Supertex inc.
www.supertex.com
Doc.# DSFP-VP0104
C082313
VP0104
Typical Performance Curves (cont.)
Transconductance vs. Drain Current
0 -0.2 -0.4 -0.6 -0.8 -1.0
ID (amperes)
GFS (millisiemens)
250
200
150
100
50
0
TA = 125OC
TA = 25OC
TA = -55OC
VDS = -25V
Maximum Rated Safe Operating Area
ID (amperes)
-0.1 -1.0 -10 -100
VDS (volts)
-10
-1.0
-0.1
-0.01
TO-92 (DC)
TC = 25OC
Output Characteristics
ID (amperes)
0 -10 -20 -30 -40
-2.0
-1.6
-1.2
-0.8
-0.4
0
VDS (volts)
VGS = -10V
-8V
-4V
-6V
Saturation Characteristics
ID (amperes)
-1.0
-0.8
-0.6
-0.4
-0.2
0
VDS (volts)
0 25 50 75 100 125 150
Power Dissipation vs. Case Temperature
2.0
1.0
0
TO-92
PD (watts)
TC (OC)
Thermal Response Characteristics
0.001 0.01 0.1 1.0 10
1.0
0.8
0.6
0.4
0.2
0
TO-92
PD = 1W
TC = 25OC
tP (seconds)
Thermal Resistance (normalized)
-5V
-7V
-9V
VGS = -10V
-8V
-4V
-6V
-5V
-7V
-9V
0 -2 -4 -6 -8 -10
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives
an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)
©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
5
VP0104
(The package drawing (s) in this data sheet may not reect the most current specications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Doc.# DSFP-VP0104
C082313
3-Lead TO-92 Package Outline (N3)
Symbol A b c D E E1 e e1 L
Dimensions
(inches)
MIN .170 .014.014.175 .125 .080 .095 .045 .500
NOM - - - - - - - - -
MAX .210 .022.022.205 .165 .105 .105 .055 .610*
JEDEC Registration TO-92.
* This dimension is not specied in the JEDEC drawing.
† This dimension differs from the JEDEC drawing.
Drawings not to scale.
Supertex Doc.#: DSPD-3TO92N3, Version E041009.
Seating
Plane
1
2
3
Front View Side View
Bottom View
E1 E
D
e1
L
e
c
1 2 3
b
A