SN74LVC1G32 SINGLE 2-INPUT POSITIVE-OR GATE SCES219D - APRIL 1999 - REVISED MARCH 2001 D D D D DBV OR DCK PACKAGE (TOP VIEW) Supports 5-V VCC Operation Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) A B GND 1 5 VCC 4 Y 2 3 description This single 2-input positive-OR gate is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC1G32 performs the Boolean function Y + A ) B or Y + A * B in positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION -40C 40C to 85C ORDERABLE PART NUMBER PACKAGE TA TOP-SIDE MARKING SOP (SOT-23) - DBV Tape and reel SN74LVC1G32DBVR C32_ SOP (SC-70) - DCK Tape and reel SN74LVC1G32DCKR CG_ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. The actual top-side marking has one additional character that designates the assembly/test site. FUNCTION TABLE INPUTS B OUTPUT Y H X H X H H L L L A logic symbol A B 1 1 2 4 Y This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) A B 1 2 4 Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SN74LVC1G32 SINGLE 2-INPUT POSITIVE-OR GATE SCES219D - APRIL 1999 - REVISED MARCH 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 6.5 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 6.5 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 6.5 V Output voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Package thermal impedance, JA (see Note 3): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206C/W DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The value of VCC is provided in the recommended operating conditions table. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN74LVC1G32 SINGLE 2-INPUT POSITIVE-OR GATE SCES219D - APRIL 1999 - REVISED MARCH 2001 recommended operating conditions (see Note 4) VCC VIH Supply voltage High level input voltage High-level Operating Data retention only VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V MIN MAX 1.65 5.5 1.5 UNIT V 0.65 x VCC 1.7 V 2 0.7 x VCC 0.35 x VCC VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V 0.7 VIL Low level input voltage Low-level VI VO Input voltage 0 5.5 V Output voltage 0 VCC -4 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V VCC = 1.65 V VCC = 2.3 V IOH High-level output current VCC = 3 V VCC = 4.5 V VCC = 1.65 V VCC = 2.3 V IOL t/v Low-level output current Input transition rise or fall rate VCC = 3 V 0.8 V 0.3 x VCC -8 -16 mA -24 -32 4 8 16 mA 24 VCC = 4.5 V VCC = 1.8 V 0.15 V, 2.5 V 0.2 V 32 VCC = 3.3 V 0.3 V VCC = 5 V 0.5 V 10 20 ns/V 5 TA Operating free-air temperature -40 85 C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SN74LVC1G32 SINGLE 2-INPUT POSITIVE-OR GATE SCES219D - APRIL 1999 - REVISED MARCH 2001 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN 1.65 V to 5.5 V 1.65 V VCC-0.1 1.2 IOH = -8 mA IOH = -16 mA 2.3 V 1.9 3V 2.4 IOH = -24 mA 3V 2.3 4.5 V 3.8 IOH = -100 mA IOH = -4 mA VOH IOH = -32 mA IOL = 100 mA 1.65 V 0.45 2.3 V 0.3 3V 0.4 3V 0.55 4.5 V 0.55 IOL = 16 mA A or B inputs IOL = 32 mA VI = 5.5 V or GND ICC ICC 5 mA mA 1.65 V to 5.5 V 10 mA 3 V to 5.5 V 500 mA 0 IO = 0 Other inputs at VCC or GND One input at VCC - 0.6 V, V 10 0 to 5.5 V VI or VO = 5.5 V VI = 5.5 V or GND, UNIT V 0.1 IOL = 24 mA II Ioff MAX 1.65 V to 5.5 V IOL = 4 mA IOL = 8 mA VOL TYP Ci VI = VCC or GND All typical values are at VCC = 3.3 V, TA = 25C. 3.3 V 4 pF switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A or B Y VCC = 1.8 V 0.15 V VCC = 2.5 V 0.2 V VCC = 3.3 V 0.3 V VCC = 5 V 0.5 V UNIT MIN MAX MIN MAX MIN MAX MIN MAX 2.8 8 1.2 5.5 1.1 4.5 1 4 ns operating characteristics, TA = 25C PARAMETER Cpd 4 Power dissipation capacitance TEST CONDITIONS f = 10 MHz POST OFFICE BOX 655303 VCC = 1.8 V TYP VCC = 2.5 V TYP 20 * DALLAS, TEXAS 75265 20 VCC = 3.3 V TYP 21 VCC = 5 V TYP 22 UNIT pF SN74LVC1G32 SINGLE 2-INPUT POSITIVE-OR GATE SCES219D - APRIL 1999 - REVISED MARCH 2001 PARAMETER MEASUREMENT INFORMATION RL From Output Under Test CL (see Note A) VLOAD Open S1 GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V 0.15 V 2.5 V 0.2 V 3.3 V 0.3 V 5 V 0.5 V VI tr/tf VCC VCC 3V VCC 2 ns 2 ns 2.5 ns 2.5 ns VM VLOAD CL RL V VCC/2 VCC/2 1.5 V VCC/2 2 x VCC 2 x VCC 6V 11 V 30 pF 30 pF 50 pF 50 pF 1 k 500 500 500 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH tPHL VOH VM Output VM VOL tPHL Output Waveform 1 S1 at VLOAD (see Note B) tPLH VM VM VM 0V tPZL tPLZ VLOAD/2 VM tPZH VOH Output VI Output Control VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + V VOL tPHZ VM VOH - V VOH 0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 . D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. 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