TLP552
2009-02-17
1
TOSHIBA Photocoupler GaAAs IRED & Photo IC
TLP552
Isolated Line Receiver
Simplex/Multiplex Data Transmission
Computer-Peripheral Interface
Microprocessor System Interface
Digital Isolation for A-D, D-A Conversion
The TOSHIBA TLP552 is a photocoupler which combines a GaAAs
IRED LED as the emitter and an integrated high gain, high speed
photodetector. This unit is 8-lead DIP.
The output of the detector circuit is an open collector, schottky clamped
transistor.
TTL/LSTTL compatible: VCC = 5 V
Isolation voltage: 2500 Vrms (min)
Switching speed: tpHL, tpLH = 60 ns (typ.) (@RL = 350 Ω)
Guaranteed performance over temp.: 0 to 70°C
UL recognized: UL1577, file no. E67349
Truth Table (positive logic)
Input Enable Output
H H L
L H H
H L H
L L H
Note: A 0.1 μF bypass capacitor must be connected between pins 8 and 5 (see "Instruction for use" on page 3).
Pin Configurations (top view) Schematic
Unit: mm
JEDEC
JEITA
TOSHIBA 11-10C4
Weight: 0.54 g (typ.)
1: N.C.
2: Anode
3: Cathode
4: N.C.
5: GND
6: Output
(open collector)
7: Enable
8: VCC
1
3
8
4
2
5
6
7
IF
3
8
2
5
6
VF
ICC
IE
IO
VCC
7 VE
VO
GND
+
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Absolute Maximum Ratings (Ta = 25°C)
Characteristics Symbol Rating Unit
Forward current IF 20 mA
Pulse forward current (Note 1) IFP 40 mA
Peak transient forward current (Note 2) IFPT 0.5 A
Reverse voltage VR 5 V
LED
Diode power dissipation PD 40 mW
Output current IO 50 mA
Output voltage VO 7 V
Supply voltage (Note 3) VCC 7 V
Enable input voltage (Note 4) VE 5.5 V
Detector
Output collector power dissipation PO 85 mW
Operating temperature range Topr 0 to 70 °C
Storage temperature range Tstg 55 to 125 °C
Lead solder temperature (10 s) (Note 5) Tsol 260 °C
Isolation voltage (AC, 1 min., R.H. 60%)
(Note 6)
BVS 2500 Vrms
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if
the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Note 1: 50% duty cycle, 1 ms pulse width.
Note 2: Pulse width 1μs, 300 pps.
Note 3: 1 minute maximum.
Note 4: Not to exceed VCC by more than 500 mV.
Note 5: Soldering portion of lead: up to 2 mm from the body of the device.
Note 6: Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and pins 5, 6, 7 and 8 shorted
together.
Recommended Operating Conditions
Characteristics Symbol Min Typ. Max Unit
Input current, low level IFL 0 250 μA
Input current, high level IFH 7 20 mA
Supply voltage, output VCC 4.5 5.5 V
High level enable voltage VEH 2.0 VCC V
Low level enable voltage VEL 0 0.8 V
Fan out (TTL load) N 8
Operating temperature Topr 0 70 °C
Note: The recommended operating conditions are given as a design guideline to obtain expected performance of the
device. In addition, each item is an independent guideline. In developing designs using this product, please
confirm the specified characteristics shown in this document.
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Electrical Characteristics (unless otherwise specified, for 0°C Ta 70°C)
Characteristics Symbol Test Condition Min Typ. Max Unit
Input forward voltage VF I
F = 10 mA, Ta = 25°C 1.65 1.8 V
Input diode temperature coefficient ΔVF/ΔTa I F = 10 mA 2.0 mV/°C
Input reverse current IR VR = 5 V, Ta = 25°C 10 μA
Input capacitance CT V
F = 0 V, f = 1 MHz, Ta = 25°C 45 pF
High level output current IOH VCC = 5.5 V, VO = 5.5 V
IF = 250 μA, VE = 2.0 V 10 250 μA
Low level output voltage VOL
VCC = 5.5 V, IF = 5 mA
VEH = 2.0 V, IOL = 13 mA
(sinking)
0.4 0.6 V
Input current logic low output level IFH
IOL = 13 mA (sinking),
VO = 0.6 V, VCC = 5.5 V,
VEH = 2.0 V
5 mA
High level enable current IEH V
CC = 5.5 V, VE = 2.0 V 1.0 mA
Low level enable current IEL V
CC = 5.5 V, VE = 0.5 V 1.6 2.0 mA
High level supply current ICCH V
CC = 5.5 V, IF = 0 mA, VE = 0.5 V 7 15 mA
Low level supply current ICCL V
CC = 5.5 V, IF = 10 mA, VE = 0.5 V 12 18 mA
Current transfer ratio CTR IF = 5.0 mA, RL = 100 Ω
VCC = 5.0 V, Ta = 25°C 1000 %
Resistance (input-output) RS V
S = 500 V, R.H. 60%, Ta = 25°C 5 × 1010 1014 Ω
Capacitance (input-output) CS V
S = 0 V, f = 1 MHz, Ta = 25°C 0.6 pF
Switching Characteristics (Ta = 25°C, VCC = 5 V)
Characteristics Symbol
Te s t
Circuit Test Condition Min Typ. Max Unit
Propagation delay time to high output
level (L H) tpLH 1
RL = 350 Ω, CL = 15 pF
IF = 7.5 mA 60 120 ns
Propagation delay time to low output
level (H L) tpHL 1
RL = 350 Ω, CL = 15 pF
IF = 7.5 mA 60 120 ns
Output rise fall time (10 to 90%) tr, tf 1
RL = 350 Ω, CL = 15 pF
IF = 7.5 mA 30 ns
Propagation delay time of enable from
VEH to VEL tELH 2
RL = 350 Ω, CL = 15 pF
IF = 7.5 mA, VEH = 3.0 V 25 ns
Propagation delay time of enable from
VEL to VEH tEHL 2
RL = 350 Ω, CL = 15 pF
IF = 7.5 mA, VEH = 3.0 V 25 ns
Common mode transient immunity at
logic high output level CMH 3
VCM = 200 V, RL = 350 Ω
VO (min) = 2 V, IF = 0 mA 200 V / μs
Common mode transient immunity at
logic low output level CML 3
VCM = 200 V, RL = 350 Ω
VO (max) = 0.8 V, IF = 5 mA 500 V / μs
Instruction for use
1. A ceramic capacitor (0.1 μF) should be connected from pin 8 and pin 5 to stabilize the operation of the high gain
linear amplifier. Failure to provide the bypassing may impair the switching properties. The total lead length
between the capacitor and coupler should not exceed 1 cm.
2. Maximum electrostatic discharge voltage for any pins: 180 V (C = 200 pF, R = 0).
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Test Circuit 1: Switching Time Test Circuit
Test Circuit 2: Switching Time Test Circuit
Test Circuit 3: Common Mode Noise Immunity Test Circuit
CMH: The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high
output state (i.e., VO > 2.0 V). Measured in volts per microsecond (V / μs).
CML: The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low
output state (i.e., VO < 0.8 V). Measured in volts per microsecond (V / μs).
Pulse generator
IF = 7.5 mA
5 V
CL
Output VO
Monitoring
node
ZO = 50 Ω
tr = 5 ns
0.1 μF
350 Ω
CL is approximately 15 pF which includes probe and stray
wiring capacitance.
VO
VE
tEHL
1.5 V 1.5 V
VOL
5 V
tELH
3 V
0 V
1.5 V
Pulse generator
IF
51 Ω
5 V
CL
Output VO
Monitoring
node
ZO = 50 Ω
tr = 5 ns
Monitoring
node
0.1 μF
350 Ω
CL is approximately 15 pF which includes probe and stray
wiring capacitance.
VO
IF
t
p
HL
1.5 V 1.5 V
VOL
5 V
t
p
LH
7.5 mA
0 mA
3.75 mA
0.5 V
4.5 V
t
r
tf
VCM
Pulse generator
ZO = 50 Ω
CMH = s)(t
(V)160
rμ, CML = s)(t
(V)160
fμ
IF
5 V
CL
Output VO
Monitoring
node
0.1 μF
350 Ω
VCM
0 V
trt
f
200 V
90%
10%
5 V
2 V
0.8 V
VO
(IF = 0 mA)
VO
(IF = 5 mA)
VOL
CL is approximately 15 pF which includes probe and stray
wiring capacitance.
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2009-02-17
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TLP552
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RESTRICTIONS ON PRODUCT USE
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