S-5712A/B/C Series
LOW VOLTAGE OPERATION
OMNIPOLAR / UNIPOLAR DETECTION TYPE
H
A
LL EFFECT SWITCH IC
www.ablic.com
© ABLIC Inc., 2010-2019 Rev.5.1_01
1
This IC, developed by CMOS technology, is a high-accuracy Hall effect switch IC that operates at a low voltage and low
current consumption. The output voltage changes when this IC detects the intensity level of magnetic flux density. Using this
IC with a magnet makes it possible to detect the open / close in various devices.
High-density mounting is possible by using the small SOT-23-3 or the super-small SNT-4A package.
Due to its low voltage operation and low current consumption, this IC is suitable for battery-operated portable devices. Also,
due to its high-accuracy magnetic characteristics, this IC can make operation's dispersion in the system combined with
magnet smaller.
ABLIC Inc. offers a "magnetic simulation service" that provides the ideal combination of magnets and our Hall ICs for
customer systems. Our magnetic simulation service will reduce prototype production, development period and development
costs. In addition, it will contribute to optimization of parts to realize high cost performance.
For more information regarding our magnetic simulation service, contact our sales office.
Features
• Pole detection*1: Detection of omnipolar, S pole or N pole
• Output logic*1: Active "L", active "H"
• Output form*1: Nch open-drain output, CMOS output
• Magnetic sensitivity*1: BOP = 1.8 mT typ.
B
OP = 3.0 mT typ.
B
OP = 4.5 mT typ.
B
OP = 7.0 mT typ.
• Operating cycle (current consumption)*1: Product with omnipolar detection
t
CYCLE = 5.70 ms (IDD = 12.0 μA) typ.
t
CYCLE = 50.50 ms (IDD = 2.0 μA) typ.
t
CYCLE = 204.10 ms (IDD = 1.0 μA) typ.
Product with S pole or N pole detection
t
CYCLE = 6.05 ms (IDD = 6.0 μA) typ.
t
CYCLE = 50.85 ms (IDD = 1.4 μA) typ.
t
CYCLE = 204.05 ms (IDD = 1.0 μA) typ.
• Power supply voltage range: VDD = 1.6 V to 3.5 V
• Operation temperature range: Ta = −40°C to +85°C
• Lead-free (Sn 100%), halogen-free
*1. The option can be selected.
Applications
• Mobile phone, smart phone
• Notebook PC, tablet PC
• Digital video camera
• Plaything, portable game
• Home appliance
Packages
• SOT-23-3
• SNT-4A
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
2
Block Diagrams
1. Nch open-drain output product
OUT
VDD
VSS
*1 *1
Sleep / Awake logic
Chopping
stabilized amplifier
*1. Parasitic diode
Figure 1
2. CMOS output product
OUT
VDD
VSS
*1
Sleep / Awake logic
*1
Chopping
stabilized amplifier
*1
*1. Parasitic diode
Figure 2
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
3
Product Name Structure
1. Product name
S-5712 x x x x x - xxxx U
Environmental code
U: Lead-free (Sn 100%), halogen-free
Package abbreviation and packing specifications*1
M3T1: SOT-23-3, Tape
I4T1: SNT-4A, Tape
Magnetic sensitivity
0: BOP = 1.8 mT typ.
1: BOP = 3.0 mT typ.
2: BOP = 4.5 mT typ.
3: BOP = 7.0 mT typ.
Output logic
L: Active "L"
H: Active "H"
Pole detection
D: Detection of omnipolar
S: Detection of S pole
N: Detection of N pole
Output form
N: Nch open-drain output
C: CMOS output
Operating cycle
A: tCYCLE = 50.50 ms typ.
(Product with omnipolar detection)
t
CYCLE = 50.85 ms typ.
(Product with S pole or N pole detection)
B: tCYCLE = 204.10 ms typ.
(Product with omnipolar detection)
t
CYCLE = 204.05 ms typ.
(Product with S pole or N pole detection)
C: tCYCLE = 5.70 ms typ.
(Product with omnipolar detection)
t
CYCLE = 6.05 ms typ.
(Product with S pole or N pole detection)
*1. Refer to the tape drawing.
2. Packages
Table 1 Package Drawing Codes
Package Name Dimension Tape Reel Land
SOT-23-3 MP003-C-P-SD MP003-C-C-SD MP003-Z-R-SD −
SNT-4A PF004-A-P-SD PF004-A-C-SD PF004-A-R-SD PF004-A-L-SD
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
4
3. Product name list
3. 1 SOT-23-3
3. 1. 1 Nch open-drain output product
Table 2
Product Name Operating Cycle
(tCYCLE) Output Form Pole Detection Output Logic Magnetic Sensitivity
(BOP)
S-5712ANDL0-M3T1U 50.50 ms typ. Nch open-drain output Omnipolar Active "L" 1.8 mT typ.
S-5712ANDL1-M3T1U 50.50 ms typ. Nch open-drain output Omnipolar Active "L" 3.0 mT typ.
S-5712ANDL2-M3T1U 50.50 ms typ. Nch open-drain output Omnipolar Active "L" 4.5 mT typ.
S-5712ANSL1-M3T1U 50.85 ms typ. Nch open-drain output S pole Active "L" 3.0 mT typ.
S-5712ANSL2-M3T1U 50.85 ms typ. Nch open-drain output S pole Active "L" 4.5 mT typ.
S-5712ANSH1-M3T1U 50.85 ms typ. Nch open-drain output S pole Active "H" 3.0 mT typ.
S-5712BNDL2-M3T1U 204.10 ms typ. Nch open-drain output Omnipolar Active "L" 4.5 mT typ.
S-5712BNDH2-M3T1U 204.10 ms typ. Nch open-drain output Omnipolar Active "H" 4.5 mT typ.
Remark Please contact our sales office for products other than the above.
3. 1. 2 CMOS output product
Table 3
Product Name Operating Cycle
(tCYCLE) Output Form Pole Detection Output Logic Magnetic Sensitivity
(BOP)
S-5712ACDL1-M3T1U 50.50 ms typ. CMOS output Omnipolar Active "L" 3.0 mT typ.
S-5712ACDL2-M3T1U 50.50 ms typ. CMOS output Omnipolar Active "L" 4.5 mT typ.
S-5712ACDH1-M3T1U 50.50 ms typ. CMOS output Omnipolar Active "H" 3.0 mT typ.
S-5712ACDH2-M3T1U 50.50 ms typ. CMOS output Omnipolar Active "H" 4.5 mT typ.
S-5712ACSL1-M3T1U 50.85 ms typ. CMOS output S pole Active "L" 3.0 mT typ.
S-5712ACSL2-M3T1U 50.85 ms typ. CMOS output S pole Active "L" 4.5 mT typ.
S-5712ACNL1-M3T1U 50.85 ms typ. CMOS output N pole Active "L" 3.0 mT typ.
S-5712ACNL2-M3T1U 50.85 ms typ. CMOS output N pole Active "L" 4.5 mT typ.
S-5712CCDL1-M3T1U 5.70 ms typ. CMOS output Omnipolar Active "L" 3.0 mT typ.
S-5712CCSL1-M3T1U 6.05 ms typ. CMOS output S pole Active "L" 3.0 mT typ.
Remark Please contact our sales office for products other than the above.
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
5
3. 2 SNT-4A
3. 2. 1 Nch open-drain output product
Table 4
Product Name Operating Cycle
(tCYCLE) Output Form Pole Detection Output Logic Magnetic Sensitivity
(BOP)
S-5712ANDL0-I4T1U 50.50 ms typ. Nch open-drain output Omnipolar Active "L" 1.8 mT typ.
S-5712ANDL1-I4T1U 50.50 ms typ. Nch open-drain output Omnipolar Active "L" 3.0 mT typ.
S-5712ANDL2-I4T1U 50.50 ms typ. Nch open-drain output Omnipolar Active "L" 4.5 mT typ.
S-5712ANSL1-I4T1U 50.85 ms typ. Nch open-drain output S pole Active "L" 3.0 mT typ.
S-5712ANSL2-I4T1U 50.85 ms typ. Nch open-drain output S pole Active "L" 4.5 mT typ.
S-5712BNDL2-I4T1U 204.10 ms typ. Nch open-drain output Omnipolar Active "L" 4.5 mT typ.
S-5712BNDH2-I4T1U 204.10 ms typ. Nch open-drain output Omnipolar Active "H" 4.5 mT typ.
Remark Please contact our sales office for products other than the above.
3. 2. 2 CMOS output product
Table 5
Product Name Operating Cycle
(tCYCLE) Output Form Pole Detection Output Logic Magnetic Sensitivity
(BOP)
S-5712ACDL0-I4T1U 50.50 ms typ. CMOS output Omnipolar Active "L" 1.8 mT typ.
S-5712ACDL1-I4T1U 50.50 ms typ. CMOS output Omnipolar Active "L" 3.0 mT typ.
S-5712ACDL2-I4T1U 50.50 ms typ. CMOS output Omnipolar Active "L" 4.5 mT typ.
S-5712ACDL3-I4T1U 50.50 ms typ. CMOS output Omnipolar Active "L" 7.0 mT typ.
S-5712ACDH1-I4T1U 50.50 ms typ. CMOS output Omnipolar Active "H" 3.0 mT typ.
S-5712ACDH2-I4T1U 50.50 ms typ. CMOS output Omnipolar Active "H" 4.5 mT typ.
S-5712ACSL1-I4T1U 50.85 ms typ. CMOS output S pole Active "L" 3.0 mT typ.
S-5712ACSL2-I4T1U 50.85 ms typ. CMOS output S pole Active "L" 4.5 mT typ.
S-5712ACSH1-I4T1U 50.85 ms typ. CMOS output S pole Active "H" 3.0 mT typ.
S-5712ACSH2-I4T1U 50.85 ms typ. CMOS output S pole Active "H" 4.5 mT typ.
S-5712ACNL1-I4T1U 50.85 ms typ. CMOS output N pole Active "L" 3.0 mT typ.
S-5712ACNL2-I4T1U 50.85 ms typ. CMOS output N pole Active "L" 4.5 mT typ.
S-5712ACNL3-I4T1U 50.85 ms typ. CMOS output N pole Active "L" 7.0 mT typ.
S-5712ACNH1-I4T1U 50.85 ms typ. CMOS output N pole Active "H" 3.0 mT typ.
S-5712BCDL1-I4T1U 204.10 ms typ. CMOS output Omnipolar Active "L" 3.0 mT typ.
S-5712BCDL2-I4T1U 204.10 ms typ. CMOS output Omnipolar Active "L" 4.5 mT typ.
S-5712BCDH1-I4T1U 204.10 ms typ. CMOS output Omnipolar Active "H" 3.0 mT typ.
S-5712BCDH2-I4T1U 204.10 ms typ. CMOS output Omnipolar Active "H" 4.5 mT typ.
S-5712BCSL2-I4T1U 204.05 ms typ. CMOS output S pole Active "L" 4.5 mT typ.
S-5712CCDL1-I4T1U 5.70 ms typ. CMOS output Omnipolar Active "L" 3.0 mT typ.
S-5712CCDH1-I4T1U 5.70 ms typ. CMOS output Omnipolar Active "H" 3.0 mT typ.
S-5712CCSL1-I4T1U 6.05 ms typ. CMOS output S pole Active "L" 3.0 mT typ.
S-5712CCNL1-I4T1U 6.05 ms typ. CMOS output N pole Active "L" 3.0 mT typ.
Remark Please contact our sales office for products other than the above.
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
6
Pin Configurations
1. SOT-23-3
23
1
Top view
Figure 3
Table 6
Pin No. Symbol Pin Description
1 VSS GND pin
2 VDD Power supply pin
3 OUT Output pin
2. SNT-4A
4
32
1
Top view
Figure 4
Table 7
Pin No. Symbol Pin Description
1 VDD Power supply pin
2 VSS GND pin
3 NC*1 No connection
4 OUT Output pin
*1. The NC pin is electrically open.
The NC pin can be connected to the VDD pin or the VSS pin.
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
7
Absolute Maximum Ratings
Table 8
(Ta = +25°C unless otherwise specified)
Item Symbol Absolute Maximum Rating Unit
Power supply voltage VDD VSS − 0.3 to VSS + 7.0 V
Output current IOUT ±1.0 mA
Output voltage Nch open-drain output product VOUT VSS − 0.3 to VSS + 7.0 V
CMOS output product VSS − 0.3 to VDD + 0.3 V
Operation ambient temperature Topr −40 to +85 °C
Storage temperature Tstg −40 to +125 °C
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
Thermal Resistance Value
Table 9
Item Symbol Condition Min. Typ. Max. Unit
Junction-to-ambient thermal resistance*1 θJA
SOT-23-3
Board A − 200 − °C/W
Board B − 165 − °C/W
Board C − − − °C/W
Board D − − − °C/W
Board E − − − °C/W
SNT-4A
Board A − 300 − °C/W
Board B − 242 − °C/W
Board C − − − °C/W
Board D − − − °C/W
Board E − − − °C/W
*1. Test environment: compliance with JEDEC STANDARD JESD51-2A
Remark Refer to " Power Dissipation" and "Test Board" for details.
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
8
Electrical Characteristics
1. Product with omnipolar detection
1. 1 S-5712AxDxx
Table 10
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit
Test
Circuit
Power supply voltage VDD − 1.60 1.85 3.50 V −
Current consumption IDD Average value − 2.0 4.0 μA 1
Output voltage VOUT
Nch open-drain
output product
Output transistor Nch,
IOUT = 0.5 mA − − 0.4 V 2
CMOS output
product
Output transistor Nch,
IOUT = 0.5 mA − − 0.4 V 2
Output transistor Pch,
IOUT = −0.5 mA
VDD −
0.4 − − V 3
Leakage current ILEAK Nch open-drain output product
Output transistor Nch, VOUT = 3.5 V − − 1 μA 4
Awake mode time tAW − − 0.10 − ms −
Sleep mode time tSL − − 50.40 − ms −
Operating cycle tCYCLE t
AW + tSL − 50.50 100.00 ms −
1. 2 S-5712BxDxx
Table 11
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit
Test
Circuit
Power supply voltage VDD − 1.60 1.85 3.50 V −
Current consumption IDD Average value − 1.0 2.0 μA 1
Output voltage VOUT
Nch open-drain
output product
Output transistor Nch,
IOUT = 0.5 mA − − 0.4 V 2
CMOS output
product
Output transistor Nch,
IOUT = 0.5 mA − − 0.4 V 2
Output transistor Pch,
IOUT = −0.5 mA
VDD −
0.4 − − V 3
Leakage current ILEAK Nch open-drain output product
Output transistor Nch, VOUT = 3.5 V − − 1 μA 4
Awake mode time tAW − − 0.10 − ms −
Sleep mode time tSL − − 204.00 − ms −
Operating cycle tCYCLE t
AW + tSL − 204.10 400.00 ms −
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
9
1. 3 S-5712CxDxx
Table 12
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit
Test
Circuit
Power supply voltage VDD − 1.60 1.85 3.50 V −
Current consumption IDD Average value − 12.0 22.0 μA 1
Output voltage VOUT
Nch open-drain
output product
Output transistor Nch,
IOUT = 0.5 mA − − 0.4 V 2
CMOS output
product
Output transistor Nch,
IOUT = 0.5 mA − − 0.4 V 2
Output transistor Pch,
IOUT = −0.5 mA
VDD −
0.4 − − V 3
Leakage current ILEAK Nch open-drain output product
Output transistor Nch, VOUT = 3.5 V − − 1 μA 4
Awake mode time tAW − − 0.10 − ms −
Sleep mode time tSL − − 5.60 − ms −
Operating cycle tCYCLE t
AW + tSL − 5.70 12.00 ms −
2. Product with S pole or N pole detection
2. 1 S-5712AxSxx, S-5712AxNxx
Table 13
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit
Test
Circuit
Power supply voltage VDD − 1.60 1.85 3.50 V −
Current consumption IDD Average value − 1.4 3.0 μA 1
Output voltage VOUT
Nch open-drain
output product
Output transistor Nch,
IOUT = 0.5 mA − − 0.4 V 2
CMOS output
product
Output transistor Nch,
IOUT = 0.5 mA − − 0.4 V 2
Output transistor Pch,
IOUT = −0.5 mA
VDD −
0.4 − − V 3
Leakage current ILEAK Nch open-drain output product
Output transistor Nch, VOUT = 3.5 V − − 1 μA 4
Awake mode time tAW − − 0.05 − ms −
Sleep mode time tSL − − 50.80 − ms −
Operating cycle tCYCLE t
AW + tSL − 50.85 100.00 ms −
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
10
2. 2 S-5712BxSxx, S-5712BxNxx
Table 14
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit
Test
Circuit
Power supply voltage VDD − 1.60 1.85 3.50 V −
Current consumption IDD Average value − 1.0 2.0 μA 1
Output voltage VOUT
Nch open-drain
output product
Output transistor Nch,
IOUT = 0.5 mA − − 0.4 V 2
CMOS output
product
Output transistor Nch,
IOUT = 0.5 mA − − 0.4 V 2
Output transistor Pch,
IOUT = −0.5 mA
VDD −
0.4 − − V 3
Leakage current ILEAK Nch open-drain output product
Output transistor Nch, VOUT = 3.5 V − − 1 μA 4
Awake mode time tAW − − 0.05 − ms −
Sleep mode time tSL − − 204.00 − ms −
Operating cycle tCYCLE t
AW + tSL − 204.05 400.00 ms −
2. 3 S-5712CxSxx, S-5712CxNxx
Table 15
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit
Test
Circuit
Power supply voltage VDD − 1.60 1.85 3.50 V −
Current consumption IDD Average value − 6.0 11.0 μA 1
Output voltage VOUT
Nch open-drain
output product
Output transistor Nch,
IOUT = 0.5 mA − − 0.4 V 2
CMOS output
product
Output transistor Nch,
IOUT = 0.5 mA − − 0.4 V 2
Output transistor Pch,
IOUT = −0.5 mA
VDD −
0.4 − − V 3
Leakage current ILEAK Nch open-drain output product
Output transistor Nch, VOUT = 3.5 V − − 1 μA 4
Awake mode time tAW − − 0.05 − ms −
Sleep mode time tSL − − 6.00 − ms −
Operating cycle tCYCLE t
AW + tSL − 6.05 12.00 ms −
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
11
Magnetic Characteristics
1. Product with omnipolar detection
1. 1 Product with BOP = 1.8 mT typ.
Table 16
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test Circuit
Operation point*1 S pole BOPS − 0.6 1.8 3.0 mT 5
N pole BOPN − −3.0 −1.8 −0.6 mT 5
Release point*2 S pole BRPS − 0.1 1.1 2.4 mT 5
N pole BRPN − −2.4 −1.1 −0.1 mT 5
Hysteresis width*3 S pole BHYSS B
HYSS = BOPS − BRPS − 0.7 − mT 5
N pole BHYSN B
HYSN = |BOPN − BRPN| − 0.7 − mT 5
1. 2 Product with BOP = 3.0 mT typ.
Table 17
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test Circuit
Operation point*1 S pole BOPS − 1.4 3.0 4.0 mT 5
N pole BOPN − −4.0 −3.0 −1.4 mT 5
Release point*2 S pole BRPS − 1.1 2.2 3.7 mT 5
N pole BRPN − −3.7 −2.2 −1.1 mT 5
Hysteresis width*3 S pole BHYSS B
HYSS = BOPS − BRPS − 0.8 − mT 5
N pole BHYSN B
HYSN = |BOPN − BRPN|− 0.8 − mT 5
1. 3 Product with BOP = 4.5 mT typ.
Table 18
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test Circuit
Operation point*1 S pole BOPS − 2.5 4.5 6.0 mT 5
N pole BOPN − −6.0 −4.5 −2.5 mT 5
Release point*2 S pole BRPS − 2.0 3.5 5.5 mT 5
N pole BRPN − −5.5 −3.5 −2.0 mT 5
Hysteresis width*3 S pole BHYSS B
HYSS = BOPS − BRPS − 1.0 − mT 5
N pole BHYSN B
HYSN = |BOPN − BRPN|− 1.0 − mT 5
1. 4 Product with BOP = 7.0 mT typ.
Table 19
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test Circuit
Operation point*1 S pole BOPS − 5.0 7.0 8.5 mT 5
N pole BOPN − −8.5 −7.0 −5.0 mT 5
Release point*2 S pole BRPS − 3.7 5.2 7.2 mT 5
N pole BRPN − −7.2 −5.2 −3.7 mT 5
Hysteresis width*3 S pole BHYSS B
HYSS = BOPS − BRPS − 1.8 − mT 5
N pole BHYSN B
HYSN = |BOPN − BRPN| − 1.8 − mT 5
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
12
2. Product with S pole detection
2. 1 Product with BOP = 1.8 mT typ.
Table 20
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test Circuit
Operation point*1 S pole BOPS − 0.6 1.8 3.0 mT 5
Release point*2 S pole BRPS − 0.1 1.1 2.4 mT 5
Hysteresis width*3 S pole BHYSS B
HYSS = BOPS − BRPS − 0.7 − mT 5
2. 2 Product with BOP = 3.0 mT typ.
Table 21
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test Circuit
Operation point*1 S pole BOPS − 1.4 3.0 4.0 mT 5
Release point*2 S pole BRPS − 1.1 2.2 3.7 mT 5
Hysteresis width*3 S pole BHYSS B
HYSS = BOPS − BRPS − 0.8 − mT 5
2. 3 Product with BOP = 4.5 mT typ.
Table 22
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test Circuit
Operation point*1 S pole BOPS − 2.5 4.5 6.0 mT 5
Release point*2 S pole BRPS − 2.0 3.5 5.5 mT 5
Hysteresis width*3 S pole BHYSS B
HYSS = BOPS − BRPS − 1.0 − mT 5
2. 4 Product with BOP = 7.0 mT typ.
Table 23
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test Circuit
Operation point*1 S pole BOPS − 5.0 7.0 8.5 mT 5
Release point*2 S pole BRPS − 3.7 5.2 7.2 mT 5
Hysteresis width*3 S pole BHYSS B
HYSS = BOPS − BRPS − 1.8 − mT 5
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
13
3. Product with N pole detection
3. 1 Product with BOP = 1.8 mT typ.
Table 24
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test Circuit
Operation point*1 N pole BOPN − −3.0 −1.8 −0.6 mT 5
Release point*2 N pole BRPN − −2.4 −1.1 −0.1 mT 5
Hysteresis width*3 N pole BHYSN B
HYSN = |BOPN − BRPN| − 0.7 − mT 5
3. 2 Product with BOP = 3.0 mT typ.
Table 25
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test Circuit
Operation point*1 N pole BOPN − −4.0 −3.0 −1.4 mT 5
Release point*2 N pole BRPN − −3.7 −2.2 −1.1 mT 5
Hysteresis width*3 N pole BHYSN B
HYSN = |BOPN − BRPN|− 0.8 − mT 5
3. 3 Product with BOP = 4.5 mT typ.
Table 26
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test Circuit
Operation point*1 N pole BOPN − −6.0 −4.5 −2.5 mT 5
Release point*2 N pole BRPN − −5.5 −3.5 −2.0 mT 5
Hysteresis width*3 N pole BHYSN B
HYSN = |BOPN − BRPN|− 1.0 − mT 5
3. 4 Product with BOP = 7.0 mT typ.
Table 27
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test Circuit
Operation point*1 N pole BOPN − −8.5 −7.0 −5.0 mT 5
Release point*2 N pole BRPN − −7.2 −5.2 −3.7 mT 5
Hysteresis width*3 N pole BHYSN B
HYSN = |BOPN − BRPN| − 1.8 − mT 5
*1. B
OPN, BOPS: Operation points
BOPN and BOPS are the values of magnetic flux density when the output voltage (VOUT) changes after the magnetic flux
density applied to this IC by the magnet (N pole or S pole) is increased (by moving the magnet closer).
Even when the magnetic flux density exceeds BOPN or BOPS, VOUT retains the status.
*2. B
RPN, BRPS: Release points
BRPN and BRPS are the values of magnetic flux density when the output voltage (VOUT) changes after the magnetic flux
density applied to this IC by the magnet (N pole or S pole) is decreased (the magnet is moved further away).
Even when the magnetic flux density falls below BRPN or BRPS, VOUT retains the status.
*3. B
HYSN, BHYSS: Hysteresis widths
BHYSN and BHYSS are the difference between BOPN and BRPN, and BOPS and BRPS, respectively.
Remark The unit of magnetic density mT can be converted by using the formula 1 mT = 10 Gauss.
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
14
Test Circuits
S-5712A/B/C
Series
VDD
VSS
OUT
A
R
*1
100 kΩ
*1. Resistor (R) is unnecessary for the CMOS output product.
Figure 5 Test Circuit 1
S-5712A/B/C
Series
VDD
VSS
OUT A
V
Figure 6 Test Circuit 2
S-5712A/B/C
Series
VDD
VSS
OUT A
V
Figure 7 Test Circuit 3
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
15
S-5712A/B/C
Series
VDD
VSS
OUT A
V
Figure 8 Test Circuit 4
S-5712A/B/C
Series
VDD
VSS
OUT
V
R*1
100 kΩ
*1. Resistor (R) is unnecessary for the CMOS output product.
Figure 9 Test Circuit 5
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
16
· Standard Circuit
S-5712A/B/C
Series
VDD
VSS
OUT
C
IN
R
*1
100 kΩ
0.1
μ
F
*1. Resistor (R) is unnecessary for the CMOS output product.
Figure 10
Caution The above connection diagram and constants will not guarantee successful operation. Perform
thorough evaluation using the actual application to set the constants.
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
17
Operation
1. Direction of applied magnetic flux
This IC detects the flux density which is vertical to the marking surface.
Figure 11 and Figure 12 show the direction in which magnetic flux is being applied.
1. 1 SOT-23-3 1. 2 SNT-4A
Marking surface
S
N
Marking surface
S
N
Figure 11 Figure 12
2. Position of Hall sensor
Figure 13 and Figure 14 show the position of Hall sensor.
The center of this Hall sensor is located in the area indicated by a circle, which is in the center of a package as
described below.
The following also shows the distance (typ. value) between the marking surface and the chip surface of a package.
2. 1 SOT-23-3
1
Top view
2 3
0.7 mm typ.
The center of Hall sensor;
in this φ 0.3 mm
2. 2 SNT-4A
Top view
14
23
0.16 mm typ.
The center of Hall sensor;
in this φ 0.3 mm
Figure 13 Figure 14
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
18
3. Basic operation
This IC changes the output voltage level (VOUT) according to the level of the magnetic flux density (N pole or S pole)
applied by a magnet.
The following explains the operation when the output logic is active "L".
3. 1 Product with omnipolar detection
When the magnetic flux density vertical to the marking surface exceeds the operation point (BOPN or BOPS) after
the S pole or N pole of a magnet is moved closer to the marking surface of this IC, VOUT changes from "H" to "L".
When the S pole or N pole of a magnet is moved further away from the marking surface of this IC and the
magnetic flux density is lower than the release point (BRPN or BRPS), VOUT changes from "L" to "H".
Figure 15 shows the relationship between the magnetic flux density and VOUT.
V
OUT
0
B
OPN
B
RPN
B
RPS
B
OPS
B
HYSS
B
HYSN
H
L
Magnetic flux density (B)
N pole S pole
Figure 15
3. 2 Product with S pole detection
When the magnetic flux density vertical to the marking surface exceeds BOPS after the S pole of a magnet is
moved closer to the marking surface of this IC, VOUT changes from "H" to "L". When the S pole of a magnet is
moved further away from the marking surface of this IC and the magnetic flux density is lower than BRPS, VOUT
changes from "L" to "H".
Figure 16 shows the relationship between the magnetic flux density and VOUT.
V
OUT
0 B
RPS
B
OPS
B
HYSS
H
L
Magnetic flux density (B)
N pole S pole
Figure 16
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
19
3. 3 Product with N pole detection
When the magnetic flux density vertical to the marking surface exceeds BOPN after the N pole of a magnet is
moved closer to the marking surface of this IC, VOUT changes from "H" to "L". When the N pole of a magnet is
moved further away from the marking surface of this IC and the magnetic flux density is lower than BRPN, VOUT
changes from "L" to "H".
Figure 17 shows the relationship between the magnetic flux density and VOUT.
V
OUT
0
B
OPN
B
RPN
B
HYSN
H
L
Magnetic flux density (B)
N pole S pole
Figure 17
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
20
4. Time dependency in the current consumption
This IC performs the intermittent operation, and operates at low current consumption due to repeating the sleep mode
(tSL) and the awake mode (tAW).
Figure 18 shows the time dependency in the current consumption.
Sleep mode time (tSL)Awake mode time (tAW)
At sleep mode
0.72 μA typ.
At awake mode
640 μA typ.
Operating cycle (tCYCLE)
Current consumption
Time
Figure 18
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
21
5. Timing chart
Figure 19 shows the operation timing of this IC.
Current consumption (IDD)
Output voltage (VOUT)
(Omnipolar detection,
active "L" product)
Output voltage (VOUT)
(S pole detection,
active "L" product)
BOPS
BRPS
BRPN
BOPN
Magnetic flux density
applied to this IC
Output voltage (VOUT)
(Omnipolar detection,
active "H" product)
Output voltage (VOUT)
(N pole detection,
active "L" product)
Figure 19
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
22
Precautions
• If the impedance of the power supply is high, the IC may malfunction due to a supply voltage drop caused by feed-
through current. Take care with the pattern wiring to ensure that the impedance of the power supply is low.
• Note that the IC may malfunction if the power supply voltage rapidly changes.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• Large stress on this IC may affect the magnetic characteristics. Avoid large stress which is caused by the handling
during or after mounting the IC on a board.
• ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
23
Characteristics (Typical Data)
1. S-5712AxDxx
1. 1 Operation point, release point (BOP, BRP) vs. Temperature (Ta)
1. 1. 1 S-5712AxDx0 1. 1. 2 S-5712AxDx1
B
OP
, B
RP
[mT]
6.0
4.0
2.0
0.0
2.0
4.0
6.0
40
V
DD
= 1.85 V
8525 0
25
50
75
Ta [C]
B
OPS
B
RPS
B
RPN
B
OPN
BOP, BRP [mT]
−6.0
−4.0
−2.0
0.0
2.0
4.0
6.0
−40
V
DD
= 1.85 V
+
85−25 0
+
25
+
50
+
75
Ta [°C]
BOPS
BRPS
BRPN
BOPN
1. 1. 3 S-5712AxDx2 1. 1. 4 S-5712AxDx3
B
OP
, B
RP
[mT]
−6.0
−4.0
−2.0
0.0
2.0
4.0
6.0
−40
V
DD
= 1.85 V
+
85−25 0
+
25
+
50
+
75
Ta [°C]
B
OPS
B
RPS
B
RPN
B
OPN
B
OP
, B
RP
[mT]
−10.0
−7.5
−5.0
−2.5
0.0
5.0
2.5
7.5
10.0
−40
V
DD
= 1.85 V
+85
−25 0+25 +50 +75
Ta [°C]
B
OPS
B
RPS
B
RPN
B
OPN
1. 2 Operation point, release point (BOP, BRP) vs. Power supply voltage (VDD)
1. 2. 1 S-5712AxDx0 1. 2. 2 S-5712AxDx1
B
OP
, B
RP
[mT]
6.0
4.0
2.0
0.0
2.0
6.0
4.0
1.5 3.5
2.0 2.5 3.0
V
DD
[V]
Ta =
+
25
°C
B
OPS
B
RPS
B
RPN
B
OPN
B
OP
, B
RP
[mT]
6.0
4.0
2.0
0.0
−2.0
−6.0
−4.0
1.5 3.5
2.0 2.5 3.0
V
DD
[V]
Ta =
+
25
°C
B
OPS
B
RPS
B
RPN
B
OPN
1. 2. 3 S-5712AxDx2 1. 2. 4 S-5712AxDx3
B
OP
, B
RP
[mT]
6.0
4.0
2.0
0.0
−2.0
−6.0
−4.0
1.5 3.5
2.0 2.5 3.0
V
DD
[V]
Ta =
+
25
°C
B
OPS
B
RPS
B
RPN
B
OPN
BOP, BRP [mT]
10.0
7.5
2.5
5.0
0.0
−2.5
−10.0
−7.5
−5.0
1.5 3.5
2.0 2.5 3.0
VDD [V]
Ta = +25°C
BOPS
BRPS
BRPN
BOPN
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
24
1. 3 Current consumption (IDD)
vs. Temperature (Ta)
1. 4 Current consumption (IDD)
vs. Power supply voltage (VDD)
0.0
1.0
2.0
3.0
4.0
5.0
6.0
−40
I
DD
[μA]
+
85−25 0
+
25
+
50
+
75
Ta [°C]
V
DD
= 1.85 V
V
DD
= 3.0 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0.0
1.0
2.0
3.0
4.0
5.0
6.0
I
DD
[μA]
Ta =
+
85
°C
Ta =
+
25
°C
Ta =
−
40
°C
1. 5 Awake mode time (tAW)
vs. Temperature (Ta)
1. 6 Awake mode time (tAW)
vs. Power supply voltage (VDD)
0
200
150
100
50
−40
t
AW
[μs]
+
85−25 0
+
25
+
50
+
75
Ta [°C]
V
DD
= 3.0 V
V
DD
= 1.85 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0
200
150
100
50
t
AW
[μs]
Ta =
+
85
°C
Ta =
+
25
°C
Ta =
−
40
°C
1. 7 Sleep mode time (tSL) vs. Temperature (Ta) 1. 8 Sleep mode time (tSL)
vs. Power supply voltage (VDD)
0
100
80
60
40
20
−40
t
SL
[ms]
+
85−25 0
+
25
+
50
+
75
Ta [°C]
V
DD
= 3.0 V
V
DD
= 1.85 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0
100
80
60
40
20
t
SL
[ms]
Ta =
+
85
°C
Ta =
+
25
°C
Ta =
−
40
°C
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
25
2. S-5712AxSxx, S-5712AxNxx
2. 1 Operation point, release point (BOP, BRP) vs. Temperature (Ta)
2. 1. 1 S-5712AxSx1 2. 1. 2 S-5712AxSx2
B
OP
, B
RP
[mT]
0.0
2.0
4.0
6.0
−40
VDD = 1.85 V
+
85−25 0
+
25
+
50
+
75
Ta [°C]
B
OPS
B
RPS
B
OP
, B
RP
[mT]
0.0
2.0
4.0
6.0
−40
VDD = 1.85 V
+
85−25 0
+
25
+
50
+
75
Ta [°C]
B
OPS
B
RPS
2. 1. 3 S-5712AxNx1 2. 1. 4 S-5712AxNx2
BOP, BRP [mT]
−6.0
−4.0
−2.0
0.0
−40
V
DD
= 1.85 V
+
85−25 0
+
25
+
50
+
75
Ta [°C]
BRPN
BOPN
B
OP
, B
RP
[mT]
−6.0
−4.0
−2.0
0.0
−40
V
DD
= 1.85 V
+
85−25 0
+
25
+
50
+
75
Ta [°C]
B
RPN
B
OPN
2. 1. 5 S-5712AxNx3
B
OP
, B
RP
[mT]
−10.0
−5.0
−7.5
−2.5
0.0
−40
V
DD
= 1.85 V
+85
−25 0+25 +50 +75
Ta [°C]
B
RPN
B
OPN
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
26
2. 2 Operation point, release point (BOP, BRP) vs. Power supply voltage (VDD)
2. 2. 1 S-5712AxSx1 2. 2. 2 S-5712AxSx2
B
OP
, B
RP
[mT]
6.0
4.0
2.0
0.0
1.5 3.5
2.0 2.5 3.0
V
DD
[V]
Ta =
+
25
°C
B
OPS
B
RPS
B
OP
, B
RP
[mT]
6.0
4.0
2.0
0.0
1.5 3.5
2.0 2.5 3.0
V
DD
[V]
Ta =
+
25
°C
B
OPS
B
RPS
2. 2. 3 S-5712AxNx1 2. 2. 4 S-5712AxNx2
B
OP
, B
RP
[mT]
0.0
−2.0
−4.0
−6.0
1.5 3.5
2.0 2.5 3.0
V
DD
[V]
Ta =
+
25
°C
B
RPN
B
OPN
BOP, BRP [mT]
0.0
−2.0
−4.0
−6.0
1.5 3.5
2.0 2.5 3.0
VDD [V]
Ta =
+
25
°C
BRPN
BOPN
2. 2. 5 S-5712AxNx3
B
OP
, B
RP
[mT]
0.0
−2.5
−7.5
−5.0
−10.0
1.5 3.5
2.0 2.5 3.0
V
DD
[V]
Ta = +25°C
B
RPN
B
OPN
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
27
2. 3 Current consumption (IDD)
vs. Temperature (Ta)
2. 4 Current consumption (IDD)
vs. Power supply voltage (VDD)
0.0
1.0
2.0
3.0
4.0
5.0
6.0
−40
I
DD
[μA]
+
85−25 0
+
25
+
50
+
75
Ta [°C]
V
DD
= 1.85 V
V
DD
= 3.0 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0.0
1.0
2.0
3.0
4.0
5.0
6.0
I
DD
[μA]
Ta =
+
85
°C
Ta =
+
25
°C
Ta =
−
40
°C
2. 5 Awake mode time (tAW) vs. Temperature (Ta) 2. 6 Awake mode time (tAW)
vs. Power supply voltage (VDD)
0
200
150
100
50
−40
tAW [μs]
+
85−25 0
+
25
+
50
+
75
Ta [°C]
VDD = 3.0 V
VDD = 1.85 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0
200
150
100
50
t
AW
[μs]
Ta =
+
85
°C
Ta =
+
25
°C
Ta =
−
40
°C
2. 7 Sleep mode time (tSL) vs. Temperature (Ta) 2. 8 Sleep mode time (tSL)
vs. Power supply voltage (VDD)
0
100
80
60
40
20
−40
tSL [ms]
+
85−25 0
+
25
+
50
+
75
Ta [°C]
VDD = 3.0 V
VDD = 1.85 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0
100
80
60
40
20
t
SL
[ms]
Ta =
+
85
°C
Ta =
+
25
°C
Ta =
−
40
°C
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
28
3. S-5712BxDxx
3. 1 Operation point, release point (BOP, BRP) vs. Temperature (Ta)
3. 1. 1 S-5712BxDx1 3. 1. 2 S-5712BxDx2
BOP, BRP [mT]
−6.0
−4.0
−2.0
0.0
2.0
4.0
6.0
−40
V
DD
= 1.85 V
+
85−25 0
+
25
+
50
+
75
Ta [°C]
BOPS
BRPS
BRPN
BOPN
BOP, BRP [mT]
−6.0
−4.0
−2.0
0.0
2.0
4.0
6.0
−40
V
DD
= 1.85 V
+
85−25 0
+
25
+
50
+
75
Ta [°C]
BOPS
BRPS
BRPN
BOPN
3. 2 Operation point, release point (BOP, BRP) vs. Power supply voltage (VDD)
3. 2. 1 S-5712BxDx1 3. 2. 2 S-5712BxDx2
B
OP
, B
RP
[mT]
6.0
4.0
2.0
0.0
−2.0
−6.0
−4.0
1.5 3.5
2.0 2.5 3.0
V
DD
[V]
Ta =
+
25
°C
B
OPS
B
RPS
B
RPN
B
OPN
B
OP
, B
RP
[mT]
6.0
4.0
2.0
0.0
−2.0
−6.0
−4.0
1.5 3.5
2.0 2.5 3.0
V
DD
[V]
Ta =
+
25
°C
B
OPS
B
RPS
B
RPN
B
OPN
3. 3 Current consumption (IDD)
vs. Temperature (Ta)
3. 4 Current consumption (IDD)
vs. Power supply voltage (VDD)
0.0
2.0
4.0
6.0
40
8525 0
25
50
75
Ta [C]
5.0
3.0
1.0
I
DD
[A]
V
DD
= 1.85 V
V
DD
= 3.0 V
1.5 3.52.0 2.5 3.0
VDD [V]
0.0
2.0
4.0
6.0
IDD [A]
1.0
3.0
5.0
Ta =
+
85
C
Ta =
+
25
C
Ta =
40
C
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
29
3. 5 Awake mode time (tAW) vs. Temperature (Ta) 3. 6 Awake mode time (tAW)
vs. Power supply voltage (VDD)
0
200
150
100
50
−40
t
AW
[μs]
+
85−25 0
+
25
+
50
+
75
Ta [°C]
V
DD
= 3.0 V
V
DD
= 1.85 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0
200
150
100
50
t
AW
[μs]
Ta =
+
85
°C
Ta =
+
25
°C
Ta =
−
40
°C
3. 7 Sleep mode time (tSL) vs. Temperature (Ta) 3. 8 Sleep mode time (tSL)
vs. Power supply voltage (VDD)
0
400
250
300
200
150
100
40
tSL [ms]
8525 0
25
50
75
Ta [C]
50
350
VDD = 1.85 V
VDD = 3.0 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0
300
400
250
200
150
50
t
SL
[ms]
100
350
Ta =
85
C
Ta =
25
C
Ta =
40
C
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
30
4. S-5712BxSxx, S-5712BxNxx
4. 1 Operation point, release point (BOP, BRP)
vs. Temperature (Ta)
4. 2 Operation point, release point (BOP, BRP)
vs. Power supply voltage (VDD)
4. 1. 1 S-5712BxSx2 4. 2. 1 S-5712BxSx2
BOP, BRP [mT]
0.0
2.0
4.0
6.0
−40
V
DD
= 1.85 V
+
85−25 0
+
25
+
50
+
75
Ta [°C]
BOPS
BRPS
BOP, BRP [mT]
6.0
4.0
2.0
0.0
1.5 3.5
2.0 2.5 3.0
VDD [V]
Ta =
+
25
°C
BOPS
BRPS
4. 3 Current consumption (IDD)
vs. Temperature (Ta)
4. 4 Current consumption (IDD)
vs. Power supply voltage (VDD)
0.0
2.0
4.0
6.0
40
8525 0
25
50
75
Ta [C]
5.0
3.0
1.0
IDD [A]
VDD = 1.85 V
VDD = 3.0 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0.0
2.0
4.0
6.0
I
DD
[A]
1.0
3.0
5.0
Ta =
+
85
C
Ta =
+
25
C
Ta =
40
C
4. 5 Awake mode time (tAW) vs. Temperature (Ta) 4. 6 Awake mode time (tAW)
vs. Power supply voltage (VDD)
0
200
150
100
50
−40
tAW [μs]
+
85−25 0
+
25
+
50
+
75
Ta [°C]
VDD = 3.0 V
VDD = 1.85 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0
200
150
100
50
t
AW
[μs]
Ta =
+
85
°C
Ta =
+
25
°C
Ta =
−
40
°C
4. 7 Sleep mode time (tSL) vs. Temperature (Ta) 4. 8 Sleep mode time (tSL)
vs. Power supply voltage (VDD)
0
400
250
300
200
150
100
40
tSL [ms]
8525 0
25
50
75
Ta [C]
50
350
VDD = 1.85 V
VDD = 3.0 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0
300
400
250
200
150
50
t
SL
[ms]
100
350
Ta =
85
C
Ta =
25
C
Ta =
40
C
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
31
5. S-5712CxDxx
5. 1 Operation point, release point (BOP, BRP) vs. Temperature (Ta)
5. 1. 1 S-5712CxDx1 5. 1. 2 S-5712CxDx2
BOP, BRP [mT]
−6.0
−4.0
−2.0
0.0
2.0
4.0
6.0
−40
V
DD
= 1.85 V
+
85−25 0
+
25
+
50
+
75
Ta [°C]
BOPS
BRPS
BRPN
BOPN
B
OP
, B
RP
[mT]
−6.0
−4.0
−2.0
0.0
2.0
4.0
6.0
−40
V
DD
= 1.85 V
+
85−25 0
+
25
+
50
+
75
Ta [°C]
B
OPS
B
RPS
B
RPN
B
OPN
5. 2 Operation point, release point (BOP, BRP) vs. Power supply voltage (VDD)
5. 2. 1 S-5712CxDx1 5. 2. 2 S-5712CxDx2
B
OP
, B
RP
[mT]
6.0
4.0
2.0
0.0
−2.0
−6.0
−4.0
1.5 3.5
2.0 2.5 3.0
V
DD
[V]
Ta =
+
25
°C
B
OPS
B
RPS
B
RPN
B
OPN
B
OP
, B
RP
[mT]
6.0
4.0
2.0
0.0
−2.0
−6.0
−4.0
1.5 3.5
2.0 2.5 3.0
V
DD
[V]
Ta =
+
25
°C
B
OPS
B
RPS
B
RPN
B
OPN
5. 3 Current consumption (IDD)
vs. Temperature (Ta)
5. 4 Current consumption (IDD)
vs. Power supply voltage (VDD)
0
5
10
15
20
25
−40
IDD [μA]
+
85−25 0
+
25
+
50
+
75
Ta [°C]
VDD = 1.85 V
VDD = 3.0 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0
5
15
10
20
25
I
DD
[μA]
Ta =
+
85
°C
Ta =
+
25
°C
Ta =
−
40
°C
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
32
5. 5 Awake mode time (tAW) vs. Temperature (Ta) 5. 6 Awake mode time (tAW)
vs. Power supply voltage (VDD)
0
200
150
100
50
−40
t
AW
[μs]
+
85−25 0
+
25
+
50
+
75
Ta [°C]
V
DD
= 3.0 V
V
DD
= 1.85 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0
200
150
100
50
t
AW
[μs]
Ta =
+
85
°C
Ta =
+
25
°C
Ta =
−
40
°C
5. 7 Sleep mode time (tSL) vs. Temperature (Ta) 5. 8 Sleep mode time (tSL)
vs. Power supply voltage (VDD)
0
12
8
10
6
4
2
−40
tSL [ms]
+
85−25 0
+
25
+
50
+
75
Ta [°C]
VDD = 3.0 V
VDD = 1.85 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0
10
12
8
6
4
2
t
SL
[ms]
Ta =
+
85
°C
Ta =
+
25
°C
Ta =
−
40
°C
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
33
6. S-5712CxSxx, S-5712CxNxx
6. 1 Operation point, release point (BOP, BRP) vs. Temperature (Ta)
6. 1. 1 S-5712CxSx1 6. 1. 2 S-5712CxSx2
BOP, BRP [mT]
0.0
2.0
4.0
6.0
−40
V
DD
= 1.85 V
+
85−25 0
+
25
+
50
+
75
Ta [°C]
BOPS
BRPS
B
OP
, B
RP
[mT]
0.0
2.0
4.0
6.0
−40
V
DD
= 1.85 V
+
85−25 0
+
25
+
50
+
75
Ta [°C]
B
OPS
B
RPS
6. 1. 3 S-5712CxNx1 6. 1. 4 S-5712CxNx2
B
OP
, B
RP
[mT]
−6.0
−4.0
−2.0
0.0
−40
V
DD
= 1.85 V
+
85−25 0
+
25
+
50
+
75
Ta [°C]
B
RPN
B
OPN
B
OP
, B
RP
[mT]
−6.0
−4.0
−2.0
0.0
−40
VDD = 1.85 V
+
85−25 0
+
25
+
50
+
75
Ta [°C]
B
RPN
B
OPN
6. 2 Operation point, release point (BOP, BRP) vs. Power supply voltage (VDD)
6. 2. 1 S-5712CxSx1 6. 2. 2 S-5712CxSx2
B
OP
, B
RP
[mT]
6.0
4.0
2.0
0.0
1.5 3.5
2.0 2.5 3.0
V
DD
[V]
Ta =
+
25
°C
B
OPS
B
RPS
BOP, BRP [mT]
6.0
4.0
2.0
0.0
1.5 3.5
2.0 2.5 3.0
VDD [V]
Ta =
+
25
°C
BOPS
BRPS
6. 2. 3 S-5712CxNx1 6. 2. 4 S-5712CxNx2
B
OP
, B
RP
[mT]
0.0
−2.0
−4.0
−6.0
1.5 3.5
2.0 2.5 3.0
V
DD
[V]
Ta =
+
25
°C
B
RPN
B
OPN
B
OP
, B
RP
[mT]
0.0
−2.0
−4.0
−6.0
1.5 3.5
2.0 2.5 3.0
V
DD
[V]
Ta =
+
25
°C
B
RPN
B
OPN
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
S-5712A/B/C Series Rev.5.1_01
34
6. 3 Current consumption (IDD)
vs. Temperature (Ta)
6. 4 Current consumption (IDD)
vs. Power supply voltage (VDD)
0
5
10
15
−40
I
DD
[μA]
+
85−25 0
+
25
+
50
+
75
Ta [°C]
V
DD
= 1.85 V
V
DD
= 3.0 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0
5
10
15
I
DD
[μA]
Ta =
+
85
°C
Ta =
+
25
°C
Ta =
−
40
°C
6. 5 Awake mode time (tAW) vs. Temperature (Ta) 6. 6 Awake mode time (tAW)
vs. Power supply voltage (VDD)
0
200
150
100
50
−40
tAW [μs]
+
85−25 0
+
25
+
50
+
75
Ta [°C]
VDD = 3.0 V
VDD = 1.85 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0
200
150
100
50
t
AW
[μs]
Ta =
+
85
°C
Ta =
+
25
°C
Ta =
−
40
°C
6. 7 Sleep mode time (tSL) vs. Temperature (Ta) 6. 8 Sleep mode time (tSL)
vs. Power supply voltage (VDD)
0
12
8
10
6
4
2
−40
tSL [ms]
+
85−25 0
+
25
+
50
+
75
Ta [°C]
VDD = 3.0 V
VDD = 1.85 V
1.5 3.52.0 2.5 3.0
V
DD
[V]
0
10
12
8
6
4
2
t
SL
[ms]
Ta =
+
85
°C
Ta =
+
25
°C
Ta =
−
40
°C
LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC
Rev.5.1_01 S-5712A/B/C Series
35
Power Dissipation
0 25 50 75 100 125 150 175
0.0
0.2
0.4
0.6
0.8
1.0
Ambient temperature (Ta) [C]
Power dissipation (P
D
) [W]
T
j
= 125C max.
SOT-23-3
B
A
0 25 50 75 100 125 150 175
0.0
0.2
0.4
0.6
0.8
1.0
Ambient temperature (Ta) [C]
Power dissipation (P
D
) [W]
T
j
= 125C max.
SNT-4A
B
A
Board Power Dissipation (PD) Board Power Dissipation (PD)
A 0.50 W A 0.33 W
B 0.61 W B 0.41 W
C − C −
D − D −
E − E −
(1)
1
2
3
4
(2)
1
2
3
4
Thermal via -
Material FR-4
Number of copper foil layer 4
Copper foil layer [mm]
Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.070
Thermal via -
Board B
Item Specification
Size [mm] 114.3 x 76.2 x t1.6
Number of copper foil layer 2
Copper foil layer [mm]
Land pattern and wiring for testing: t0.070
-
-
74.2 x 74.2 x t0.070
Board A
Item Specification
Size [mm] 114.3 x 76.2 x t1.6
Material FR-4
ICMountArea
SOT-23-3/3S/5/6 Test Board
No. SOT23x-A-Board-SD-2.0
ABLIC Inc.
(1)
1
2
3
4
(2)
1
2
3
4
Board B
Item Specification
Thermal via -
Material FR-4
Number of copper foil layer 4
Copper foil layer [mm]
Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.070
Size [mm] 114.3 x 76.2 x t1.6
2
Copper foil layer [mm]
Land pattern and wiring for testing: t0.070
-
-
74.2 x 74.2 x t0.070
Thermal via -
Material FR-4
Board A
Item Specification
Size [mm] 114.3 x 76.2 x t1.6
Number of copper foil layer
ICMountArea
SNT-4A Test Board
No. SNT4A-A-Board-SD-1.0
ABLIC Inc.
No.
TITLE
ANGLE
UNIT
ABLIC Inc.
No. MP003-C-P-SD-1.1
MP003-C-P-SD-1.1
SOT233-C-PKG Dimensions
2.9±0.2
0.95±0.1
1.9±0.2
+0.1
-0.06
0.16
0.4±0.1
1
23
mm
No.
TITLE
ANGLE
UNIT
ABLIC Inc.
No. MP003-C-C-SD-2.0
MP003-C-C-SD-2.0
SOT233-C-Carrier Tape
1.4±0.2
0.23±0.1
4.0±0.1
2.0±0.1
4.0±0.1
ø1.5 +0.1
-0
ø1.0
3.2±0.2
Feed direction
1
23
+0.25
-0
mm
No.
TITLE
ANGLE
UNIT
ABLIC Inc.
QTY. 3,000
No. MP003-Z-R-SD-1.0
MP003-Z-R-SD-1.0
SOT233-C-Reel
ø13±0.2
12.5max.
9.2±0.5
Enlarged drawing in the central part
mm
No.
TITLE
ANGLE
UNIT
ABLIC Inc.
mm
SNT-4A-A-PKG Dimensions
PF004-A-P-SD-6.0
No. PF004-A-P-SD-6.0
1.2±0.04
0.65
0.2±0.05
0.48±0.02
0.08+0.05
-0.02
12
3
4
No.
TITLE
ANGLE
UNIT
ABLIC Inc.
mm
PF004-A-C-SD-2.0
SNT-4A-A-Carrier Tape
Feed direction
4.0±0.1
2.0±0.05
4.0±0.1
ø1.5 +0.1
-0
ø0.5
1.45±0.1 0.65±0.05
0.25±0.05
1
2
34
No. PF004-A-C-SD-2.0
+0.1
-0
No.
TITLE
ANGLE
UNIT
ABLIC Inc.
12.5max.
9.0±0.3
ø13±0.2
(60°) (60°)
QTY. 5,000
No. PF004-A-R-SD-1.0
PF004-A-R-SD-1.0
Enlarged drawing in the central part
mm
SNT-4A-A-Reel
No.
TITLE
ANGLE
UNIT
ABLIC Inc.
mm
SNT-4A-A
-Land Recommendation
PF004-A-L-SD-4.1
No. PF004-A-L-SD-4.1
0.3
0.35
0.52
1.16
0.52
Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package.
2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm
or less from the land pattern surface.
3. Match the mask aperture size and aperture position with the land pattern.
4. Refer to "SNT Package User's Guide" for details.
1. (0.25 mm min. / 0.30 mm typ.)
2. (1.10 mm ~ 1.20 mm)
1
2
0.03 mm
1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.).
2. Do not widen the land pattern to the center of the package (1.10 mm to 1.20 mm).
1.
2. (1.10 mm ~ 1.20 mm)
(0.25 mm min. / 0.30 mm typ.)
Disclaimers (Handling Precautions)
1. All the information described herein
(product data,
specifications,
figures,
tables,
programs,
algorithms and application
circuit examples,
etc.)
is current as of publishing date of this document and is subject to change without notice.
2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not responsible for damages caused by the reasons other than the products described herein
(hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use
of the information described herein.
3. ABLIC Inc. is not responsible for damages caused by the incorrect information described herein.
4. Be careful to use the products within their specified ranges. Pay special attention to the absolute maximum ratings,
operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not responsible for damages caused by failures and / or accidents, etc. that occur due to the use of the
products outside their specified ranges.
5. When using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related
laws, and follow the required procedures.
7. The products must not be used or provided (exported) for the purposes of the development of weapons of mass
destruction or military use. ABLIC Inc. is not responsible for any provision (export) to those whose purpose is to
develop, manufacture, use or store nuclear, biological or chemical weapons, missiles, or other military use.
8. The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses. Do
not apply the products to the above listed devices and equipments without prior written permission by ABLIC Inc.
Especially, the products cannot be used for life support devices, devices implanted in the human body and devices
that directly affect human life, etc.
Prior consultation with our sales office is required when considering the above uses.
ABLIC Inc. is not responsible for damages caused by unauthorized or unspecified use of our products.
9. Semiconductor products may fail or malfunction with some probability.
The user of the products should therefore take responsibility to give thorough consideration to safety design including
redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or
death, fires and social damage, etc. that may ensue from the products' failure or malfunction.
The entire system must be sufficiently evaluated and applied on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc.
The information described herein does not convey any license under any intellectual property rights or any other
rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any
part of this document described herein for the purpose of disclosing it to a third-party without the express permission
of ABLIC Inc. is strictly prohibited.
14. For more details on the information described herein, contact our sales office.
2.2-2018.06
www.ablic.com
