DC1083A-B - Linear Technology

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

Typical applicaTion

FeaTures DescripTion

6A, 28VIN DC/DC µModule

with PLL, Output Tracking

and Margining

The LT M

4603HV is a complete 6A step-down switch mode

DC/DC power supply with onboard switching controller,

MOSFETs, inductor and all support components. The

µModule

is housed in a small surface mount 15mm ×

15mm × 2.82mm LGA package. Operating over an input

voltage range of 4.5 to 28V, the LTM4603HV supports

an output voltage range of 0.6V to 5V as well as output

voltage tracking and margining. The high efficiency design

delivers 6A continuous current (8A peak). Only bulk input

and output capacitors are needed to complete the design.

The low profile (2.82mm) and light weight (1.7g) package

easily mounts on the unused space on the back side of

PC boards for high density point of load regulation. The

µModule can be synchronized with an external clock for

reducing undesirable frequency harmonics and allows

PolyPhase

operation for high load currents.

A high switching frequency and adaptive on-time current

mode architecture deliver a very fast transient response

to line and load changes without sacrificing stability. An

onboard remote sense amplifier can be used to accurately

regulate an output voltage independent of load current.

2.5V/6A with 4.5V to 28V Input µModule Regulator

applicaTions

n Complete Switch Mode Power Supply

n Wide Input Voltage Range: 4.5V to 28V

n 6A DC Typical, 8A Peak Output Current

n 0.6V to 5V Output Voltage

n Output Voltage Tracking and Margining

n Remote Sensing for Precision Regulation

n Typical Operating Frequency: 1MHz

n PLL Frequency Synchronization

n 1.5% Regulation

n Current Foldback Protection (Disabled at Start-Up)

n Pin Compatible with the LTM4601/LTM4601HV/

LTM4603

n Ultrafast Transient Response

n Current Mode Control

n Up to 93% Efficiency at 5VIN, 3.3VOUT

n Programmable Soft-Start

n Output Overvoltage Protection

n RoHS Compliant Package with Gold Finish Pads (e4)

n Small Footprint, Low Profile (15mm × 15mm ×

2.82mm) Surface Mount LGA Package

n Telecom and Networking Equipment

n Servers

n Industrial Equipment

n Point of Load Regulation

Efficiency vs Load Current with 24VIN

VOUT

VFB

MARG0

MARG1

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

PGOOD

RUN

COMP

INTVCC

DRVCC

MPGM

TRACK/SSPLLIN

LTM4603HV

ON/OFF

392k

RSET

19.1k

MARGIN

CONTROL COUT

4603HV TA01a

VOUT

2.5V

CLOCK SYNC

TRACK/SS CONTROL

100pF

CIN

VIN

fSETPGNDSGND

5% MARGIN

VIN

4.5V TO 28V

LOAD CURRENT (A)

EFFICIENCY (%)

100

3 5

4603HV TA01b

1 2 4 6 7

24VIN, 1.8VOUT

24VIN, 2.5VOUT

24VIN, 3.3VOUT

24VIN, 5VOUT

L, LT , LT C , LT M , Linear Technology, the Linear logo, µModule and PolyPhase are registered

trademarks and LTpowerCAD is a trademark of Linear Technology Corporation. All other

trademarks are the property of their respective owners. Protected by U.S. Patents including

5481178, 5847554, 6580258, 6304066, 6476589, 6774611, 6677210.

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

pin conFiguraTionabsoluTe MaxiMuM raTings

INTVCC, DRVCC, VOUT_LCL, VOUT (VOUT ≤ 3.3V

with Remote Sense Amp)............................. –0.3V to 6V

PLLIN, TRACK/SS, MPGM, MARG0, MARG1,

PGOOD, fSET ..............................–0.3V to INTVCC + 0.3V

RUN ............................................................. –0.3V to 5V

VFB, COMP ................................................ –0.3V to 2.7V

VIN ............................................................. –0.3V to 28V

VOSNS+, VOSNS– ..........................–0.3V to INTVCC + 0.3V

Operating Temperature Range (Note 2)....–40°C to 85°C

Junction Temperature ........................................... 125°C

Storage Temperature Range .................. –55°C to 125°C

(Note 1)

MARG1

DRVCC

VFB

PGOOD

SGND

VOSNS+

DIFFVOUT

VOUT_LCL

VOSNS–

VIN

PGND

VOUT

fSET

MARG0

RUN

COMP

MPGM

PLLIN

INTVCC

TRACK/SS

LGA PACKAGE

118-LEAD (15mm × 15mm × 2.82mm)

TOP VIEW

TJMAX = 125°C, θJA = 15°C/W, θJC = 6°C/W θJA DERIVED FROM 95mm × 76mm PCB WITH 4

LAYERS, WEIGHT = 1.7g

elecTrical characTerisTics

The l denotes the specifications which apply over the full operating

temperature range (Note 2), otherwise specifications are at TA = 25°C, VIN = 12V, per typical application (front page) configuration,

RSET = 40.2k.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VIN(DC) Input DC Voltage l4.5 28 V

VOUT(DC) Output Voltage CIN = 10µF ×2, COUT = 2× 100µF X5R Ceramic

VIN = 5V, VOUT = 1.5V, IOUT = 0A

VIN = 12V, VOUT = 1.5V, IOUT = 0A

1.478

1.5

1.522

Input Specifications

VIN(UVLO) Undervoltage Lockout Threshold IOUT = 0A 3.2 4 V

IINRUSH(VIN) Input Inrush Current at Startup IOUT = 0A. VOUT = 1.5V

VIN = 5V

VIN = 12V

0.6

0.7

orDer inForMaTion

PART NUMBER PAD OR BALL FINISH

PART MARKING* PACKAGE

TYPE

MSL

RATING

TEMPERATURE RANGE

(SEE NOTE 2)DEVICE FINISH CODE

LTM4603HVEV#PBF Au (RoHS) LTM4603HVV e4 LGA 3 –40°C to 85°C

LTM4603HVIV#PBF

• Consult Marketing for parts specified with wider operating temperature

ranges. *Pad or ball finish code is per IPC/JEDEC J-STD-609.

• Terminal Finish Part Marking: www.linear.com/leadfree

• Recommended LGA and BGA PCB Assembly and Manufacturing

Procedures: www.linear.com/umodule/pcbassembly

• LGA and BGA Package and Tray Drawings: www.linear.com/packaging

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

elecTrical characTerisTics

The l denotes the specifications which apply over the full operating

temperature range (Note 2), otherwise specifications are at TA = 25°C, VIN = 12V, per typical application (front page) configuration,

RSET = 40.2k.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

IQ(VIN,NOLOAD) Input Supply Bias Current VIN = 12V, No Switching

VIN = 12V, VOUT = 1.5V, Switching Continuous

VIN = 5V, No Switching

VIN = 5V, VOUT = 1.5V, Switching Continuous

Shutdown, RUN = 0, VIN = 12V

3.8

2.5

µA

IS(VIN) Input Supply Current VIN = 12V, VOUT = 1.5V, IOUT = 6A

VIN = 12V, VOUT = 3.3V, IOUT = 6A

VIN = 5V, VOUT = 1.5V, IOUT = 6A

0.92

1.83

2.12

INTVCC VIN = 12V, RUN > 2V No Load 4.7 5 5.3 V

Output Specifications

IOUTDC Output Continuous Current Range VIN = 12V, VOUT = 1.5V (Note 5) 0 6 A

ΔVOUT(LINE)

VOUT

Line Regulation Accuracy VOUT = 1.5V, IOUT = 0A, VIN = 4.5V to 28V l0.3 %

ΔVOUT(LOAD)

VOUT

Load Regulation Accuracy VOUT = 1.5V, IOUT = 0A to 6A, VIN = 12V with

Remote Sense Amp (Note 5)

l0.25 %

VOUT(AC) Output Ripple Voltage IOUT = 0A, COUT = 2× 100µF X5R Ceramic

VIN = 12V, VOUT = 1.5V

VIN = 5V, VOUT = 1.5V

mVP-P

fSOutput Ripple Voltage Frequency IOUT = 3A, VIN = 12V, VOUT = 1.5V 1000 kHz

ΔVOUT(START) Turn-On Overshoot COUT = 200µF

VOUT = 1.5V, IOUT = 0A, TRACK/SS = 10nF

VIN = 12V

VIN = 5V

tSTART Turn-On Time COUT = 200µF, TRACK/SS = Open

VOUT = 1.5V, IOUT = 1A Resistive Load

VIN = 12V

VIN = 5V

0.5

ΔVOUTLS Peak Deviation for Dynamic Load Load: 0% to 50% to 0% of Full Load,

COUT = 2× 22µF Ceramic, 470µF 4V Sanyo

POSCAP

VIN = 12V

VIN = 5V

tSETTLE Settling Time for Dynamic Load Step Load: 0% to 50% to 10% of Full Load

VIN = 12V

µs

IOUTPK Output Current Limit COUT = 2× 100µF X5R Ceramic

VIN = 12V, VOUT = 1.5V

VIN = 5V, VOUT = 1.5V

Remote Sense Amp (Note 3)

VOSNS+, VOSNS–

CM Range

Common Mode Input Voltage Range VIN = 12V, RUN > 2V 0 INTVCC – 1 V

DIFFVOUT Range Output Voltage Range VIN = 12V, DIFFVOUT Load = 100k 0 INTVCC – 1 V

VOS Input Offset Voltage Magnitude 1.25 mV

AV Differential Gain 1 V/V

GBP Gain Bandwidth Product 3 MHz

SR Slew Rate 2 V/µs

RIN Input Resistance VOSNS+ to GND 20 kW

CMRR Common Mode Rejection Ratio 100 dB

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

elecTrical characTerisTics

The l denotes the specifications which apply over the full operating

temperature range (Note 2), otherwise specifications are at TA = 25°C, VIN = 12V, per typical application (front page) configuration,

RSET = 40.2k.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Control Stage

VFB Error Amplifier Input Voltage

Accuracy

IOUT = 0A, VOUT = 1.5V l0.594 0.6 0.606 V

VRUN RUN Pin On/Off Threshold 1 1.5 1.9 V

ITRACK/SS Soft-Start Charging Current VTRACK/SS = 0V –1 –1.5 –2 µA

tON(MIN) Minimum On Time (Note 4) 50 100 ns

tOFF(MIN) Minimum Off Time (Note 4) 250 400 ns

RPLLIN PLLIN Input Resistance 50 kW

IDRVCC Current into DRVCC Pin VOUT = 1.5V, IOUT = 1A, DRVCC = 5V 18 25 mA

RFBHI Resistor Between VOUT_LCL and VFB 60.098 60.4 60.702 kW

VMPGM Margin Reference Voltage 1.18 V

VMARG0, VMARG1 MARG0, MARG1 Voltage Thresholds 1.4 V

PGOOD Output

ΔVFBH PGOOD Upper Threshold VFB Rising 7 10 13 %

ΔVFBL PGOOD Lower Threshold VFB Falling –7 –10 –13 %

ΔVFB(HYS) PGOOD Hysteresis VFB Returning (Note 4) 1.5 3 %

VPGL PGOOD Low Voltage IPGOOD = 5mA 0.15 0.4 V

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTM4603HV is tested under pulsed load conditions such

that TJ ≈ TA. The LTM4603HVEV is guaranteed to meet performance

specifications from 0°C to 85°C. Specifications over the –40°C to 85°C

operating temperature range are assured by design, characterization

and correlation with statistical process controls. The LTM4603HVIV is

guaranteed over the –40°C to 85°C operating temperature range.

Note 3: Remote sense amplifier recommended for ≤3.3V output.

Note 4: 100% tested at die level only.

Note 5: See output current derating curves for different VIN, VOUT and TA.

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

Typical perForMance characTerisTics

(See Figure 20 for all curves)

Efficiency

vs Load Current

with

5VIN

Efficiency

vs Load Current

with 12VIN

Efficiency vs Load Current

with 24VIN

1.2

V Transient Response

1.5

V Transient Response

2.5V Transient Response

3.3V Transient Response

1.8

V Transient Response

LOAD CURRENT (A)

EFFICIENCY (%)

100

245

4603HV G01

1367

5VIN, 0.6VOUT

5VIN, 1.2VOUT

5VIN, 1.5VOUT

5VIN, 1.8VOUT

5VIN, 2.5VOUT

5VIN, 3.3VOUT

LOAD CURRENT (A)

EFFICIENCY (%)

100

245

4603HV G02

1367

12VIN, 1.2VOUT

12VIN, 1.5VOUT

12VIN, 1.8VOUT

12VIN, 2.5VOUT

12VIN, 3.3VOUT

12VIN, 5VOUT

LOAD CURRENT (A)

EFFICIENCY (%)

100

3 5

4603HV G03

1 2 4 6 7

24VIN, 1.8VOUT

24VIN, 2.5VOUT

24VIN, 3.3VOUT

24VIN, 5VOUT

LOAD STEP

1A/DIV

VOUT

50mV/DIV

25µs/DIV 4603HV G04

1.2V AT 3A/µs LOAD STEP

COUT: 1x 22µF, 6.3V CERAMIC

1x 330µF, 4V SANYO POSCAP

LOAD STEP

1A/DIV

VOUT

50mV/DIV

25µs/DIV 4603HV G06

1.8V AT 3A/µs LOAD STEP

COUT: 1x 22µF, 6.3V CERAMIC

1x 330µF, 4V SANYO POSCAP

LOAD STEP

1A/DIV

VOUT

50mV/DIV

25µs/DIV 4603HV G07

2.5V AT 3A/µs LOAD STEP

COUT: 1x 22µF, 6.3V CERAMIC

1x 330µF, 4V SANYO POSCAP

LOAD STEP

1A/DIV

VOUT

50mV/DIV

25µs/DIV 4603HV G08

3.3V AT 3A/µs LOAD STEP

COUT: 1x 22µF, 6.3V CERAMIC

1x 330µF, 4V SANYO POSCAP

LOAD STEP

1A/DIV

VOUT

50mV/DIV

25µs/DIV 4603HV G05

1.5V AT 3A/µs LOAD STEP

COUT: 1x 22µF, 6.3V CERAMIC

1x 330µF, 4V SANYO POSCAP

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

Typical perForMance characTerisTics

(See Figure 20 for all curves)

Start-Up, IOUT = 6A

(Resistive Load)

Start-Up, I

OUT

= 0A

VIN to VOUT Step-Down Ratio

Short-Circuit Protection,

IOUT = 0A

Short-Circuit Protection,

IOUT = 6A

VOUT

0.5V/DIV

IIN

0.5A/DIV

1ms/DIV 4603HV G09

VIN = 12V

VOUT = 1.5V

COUT = 1x 22µF, 6.3V CERAMIC

1x 330µF, 4V SANYO POSCAP

SOFT-START = 3.9nF

VOUT

0.5V/DIV

IIN

0.5A/DIV

1ms/DIV 4603HV G10

VIN = 12V

VOUT = 1.5V

COUT = 1x 22µF, 6.3V CERAMIC

1x 330µF, 4V SANYO POSCAP

SOFT-START = 3.9nF

VOUT

0.5V/DIV

IIN

2A/DIV

100µs/DIV 4603HV G11

VIN = 12V

VOUT = 1.5V

COUT = 1x 22µF, 6.3V CERAMIC

1x 330µF, 4V SANYO POSCAP

SOFT-START = 3.9nF

VOUT

0.5V/DIV

IIN

2A/DIV

100µs/DIV 4603 G12

VIN = 12V

VOUT = 1.5V

COUT = 1x 22µF, 6.3V CERAMIC

1x 330µF, 4V SANYO POSCAP

SOFT-START = 3.9nF INPUT VOLTAGE (V)

OUTPUT VOLTAGE (V)

3.0

4.0

5.5

5.0

4603HV G13

2.0

1.0

2.5

3.5

4.5

1.5

0.5

04812 2820 24

3.3V OUTPUT WITH

82.5k FROM VOUT

TO fSET

5V OUTPUT WITH

150k RESISTOR

ADDED FROM fSET

TO GND

5V OUTPUT WITH

NO RESISTOR ADDED

FROM fSET TO GND

2.5V OUTPUT

1.8V OUTPUT

1.5V OUTPUT

1.2V OUTPUT

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

pin FuncTions

VIN (Bank 1): Power Input Pins. Apply input voltage be-

tween these pins and PGND pins. Recommend placing

input decoupling capacitance directly between VIN pins

and PGND pins.

VOUT (Bank 3): Power Output Pins. Apply output load

between these pins and PGND pins. Recommend placing

output decoupling capacitance directly between these pins

and PGND pins. See Figure 17.

PGND (Bank 2): Power ground pins for both input and

output returns.

VOSNS– (Pin M12): (–) Input to the Remote Sense Ampli-

fier. This pin connects to the ground remote sense point.

The remote sense amplifier is used for VOUT ≤3.3V. Tie

to INTVCC if not used.

VOSNS+ (Pin J12): (+) Input to the Remote Sense Ampli-

fier. This pin connects to the output remote sense point.

The remote sense amplifier is used for VOUT ≤3.3V. Tie

to ground if not used.

DIFFVOUT (Pin K12): Output of the Remote Sense Amplifier.

This pin connects to the VOUT_LCL pin. Leave floating if

remote sense amplifier is not used.

DRVCC (Pin E12): This pin normally connects to INTVCC

for powering the internal MOSFET drivers. This pin can

be biased up to 6V from an external supply with about

50mA capability, or an external circuit shown in Figure

18. This improves efficiency at the higher input voltages

by reducing power dissipation in the module.

(See Package Description for Pin Assignment)

INTVCC (Pin A7): This pin is for additional decoupling of

the 5V internal regulator.

PLLIN (Pin A8): External Clock Synchronization Input

to the Phase Detector. This pin is internally terminated

to SGND with a 50k resistor. Apply a clock with a high

level above 2V and below INTVCC. See the Applications

Information section.

TRACK/SS (Pin A9): Output Voltage Tracking and Soft-

Start Pin. When the module is configured as a master

output, then a soft-start capacitor is placed on this pin

to ground to control the master ramp rate. A soft-start

capacitor can be used for soft-start turn on as a stand

alone regulator. Slave operation is performed by putting

a resistor divider from the master output to ground, and

connecting the center point of the divider to this pin. See

the Applications Information section.

MPGM (Pin A12): Programmable Margining Input. A re-

sistor from this pin to ground sets a current that is equal

to 1.18V/R. This current multiplied by 10kΩ will equal a

value in millivolts that is a percentage of the 0.6V refer-

ence voltage. See the Applications Information section. To

parallel LTM4603HVs, each requires an individual MPGM

resistor. Do not tie MPGM pins together.

fSET (Pin B12): Frequency Set Internally to 1MHz. An

external resistor can be placed from this pin to ground

to increase frequency. See the Applications Information

section for frequency adjustment.

MARG1

DRVCC

VFB

PGOOD

SGND

VOSNS+

DIFFVOUT

VOUT_LCL

VOSNS–

VIN

PGND

VOUT

fSET

MARG0

RUN

COMP

MPGM

PLLIN

INTVCC

TRACK/SS

LGA PACKAGE

118-LEAD (15mm × 15mm × 2.82mm)

TOP VIEW

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

pin FuncTions

(See Package Description for Pin Assignment)

VFB (Pin F12): The Negative Input of the Error Amplifier.

Internally, this pin is connected to VOUT_LCL with a 60.4k

precision resistor. Different output voltages can be pro-

grammed with an additional resistor between VFB and

SGND pins. See the Applications Information section.

MARG0 (Pin C12): This pin is the LSB logic input for the

margining function. Together with the MARG1 pin will

determine if margin high, margin low or no margin state

is applied. The pin has an internal pull-down resistor of

50k. See the Applications Information section.

MARG1 (Pin D12): This pin is the MSB logic input for the

margining function. Together with the MARG0 pin will

determine if margin high, margin low or no margin state

is applied. The pin has an internal pull-down resistor of

50k. See the Applications Information section.

SGND (Pin H12): Signal Ground. This pin connects to

PGND at output capacitor point.

COMP (Pin A11): Current Control Threshold and Error

Amplifier Compensation Point. The current comparator

threshold increases with this control voltage. The voltage

ranges from 0V to 2.4V with 0.7V corresponding to zero

sense voltage (zero current).

PGOOD (Pin G12): Output Voltage Power Good Indicator.

Open-drain logic output that is pulled to ground when the

output voltage is not within ±10% of the regulation point,

after a 25µs power bad mask timer expires.

RUN (Pin A10): Run Control Pin. A voltage above 1.9V

will turn on the module, and when below 1V, will turn

off the module. A programmable UVLO function can be

accomplished by connecting to a resistor divider from

VIN to ground. See Figure 1. This pin has a 5.1V Zener to

ground. Maximum pin voltage is 5V. Limit current into

the RUN pin to less than 1mA.

VOUT_LCL (Pin L12): VOUT connects directly to this pin to

bypass the remote sense amplifier, or DIFFVOUT connects

to this pin when remote sense amplifier is used.

LTM4603HV

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block DiagraM

INTERNAL

COMP

SGND

COMP

PGOOD

UVLO

FUNCTION

RUN

VOUT_LCL

VIN

>1.9V = ON

<1V = OFF

MAX = 5V

MARG1

MARG0

MPGM

PLLIN

CSS

INTVCC

DRVCC

TRACK/SS

VFB

fSET

50k

33.2k

RSET

19.1k

50k

60.4k

VOUT

5.1V

ZENER

POWER CONTROL Q1

VIN

4.5V TO 28V

VOUT

2.5V

10k

50k

10k

2.2Ω

INTVCC

–

22µF

1.5µF CIN

COUT

PGND

VOSNS–

VOSNS+

DIFFVOUT

4603HV F01

4.7µF

Figure 1. Simplified LTM4603HV Block Diagram

Decoupling requireMenTs

TA = 25°C. Use Figure 1 configuration.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

CIN External Input Capacitor Requirement

(VIN = 4.5V to 28V, VOUT = 2.5V)

IOUT = 6A 20 µF

COUT External Output Capacitor Requirement

(VIN = 4.5V to 28V, VOUT = 2.5V)

IOUT = 6A 100 200 µF

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

operaTion

Power Module Description

The LTM4603HV is a standalone nonisolated switching

mode DC/DC power supply. It can deliver up to 6A of DC

output current with few external input and output capaci-

tors. This module provides precisely regulated output volt-

age programmable via one external resistor from 0.6VDC to

5.0VDC over a 4.5V to 28V wide input voltage. The typical

application schematic is shown in Figure 20.

The LTM4603HV has an integrated constant on-time

current mode regulator, ultralow RDS(ON) FETs with fast

switching speed and integrated Schottky diodes. The typi-

cal switching frequency is 1MHz at full load. With current

mode control and internal feedback loop compensation,

the LTM4603HV module has sufficient stability margins

and good transient performance under a wide range of

operating conditions and with a wide range of output

capacitors, even all ceramic output capacitors.

Current mode control provides cycle-by-cycle fast current

limit. Besides, foldback current limiting is provided in an

overcurrent condition while VFB drops. Internal overvolt-

age and undervoltage comparators pull the open-drain

PGOOD output low if the output feedback voltage exits a

±10% window around the regulation point. Furthermore,

in an overvoltage condition, internal top FET Q1 is turned

off and bottom FET Q2 is turned on and held on until the

overvoltage condition clears.

Pulling the RUN pin below 1V forces the controller into its

shutdown state, turning off both Q1 and Q2. At low load

current, the module works in continuous current mode by

default to achieve minimum output voltage ripple.

When DRVCC pin is connected to INTVCC an integrated

5V linear regulator powers the internal gate drivers. If a

5V external bias supply is applied on the DRVCC pin, then

an efficiency improvement will occur due to the reduced

power loss in the internal linear regulator. This is especially

true at the higher input voltage range.

The LTM4603HV has a very accurate differential remote

sense amplifier with very low offset. This provides for

very accurate output voltage sensing at the load. The

MPGM pin, MARG0 pin and MARG1 pin are used to sup-

port voltage margining, where the percentage of margin

is programmed by the MPGM pin, and the MARG0 and

MARG1 select margining.

The PLLIN pin provides frequency synchronization of the

device to an external clock. The TRACK/SS pin is used

for power supply tracking and soft-start programming.

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

applicaTions inForMaTion

The typical LTM4603HV application circuit is shown in

Figure 20. External component selection is primarily

determined by the maximum load current and output

voltage. Refer to Table 2 for specific external capacitor

requirements for a particular application.

VIN to VOUT Step-Down Ratios

There are restrictions in the maximum VIN and VOUT step

down ratio that can be achieved for a given input voltage.

These constraints are shown in the Typical Performance

Characteristics curves labeled VIN to VOUT Step-Down

Ratio. Note that additional thermal derating may apply. See

the Thermal Considerations and Output Current Derating

section of this data sheet.

Output Voltage Programming and Margining

The PWM controller has an internal 0.6V reference voltage.

As shown in the Block Diagram, a 1M and a 60.4k 0.5%

internal feedback resistor connects VOUT and VFB pins

together. The VOUT_LCL pin is connected between the 1M

and the 60.4k resistor. The 1M resistor is used to protect

against an output overvoltage condition if the VOUT_LCL

pin is not connected to the output, or if the remote sense

amplifier output is not connected to VOUT_LCL. The output

voltage will default to 0.6V. Adding a resistor RSET from

the VFB pin to SGND pin programs the output voltage:

VOUT =0.6V

60.4k

SET

Table 1. RSET Standard 1% Resistor Values vs VOUT

RSET

(kW)Open 60.4 40.2 30.1 25.5 19.1 13.3 8.25

VOUT

(V) 0.6 1.2 1.5 1.8 2 2.5 3.3 5

The MPGM pin programs a current that when multiplied

by an internal 10k resistor sets up the 0.6V reference ±

offset for margining. A 1.18V reference divided by the

RPGM resistor on the MPGM pin programs the current.

Calculate VOUT(MARGIN):

VOUT(MARGIN) =

OUT

100

•VOUT

where %VOUT is the percentage of VOUT you want to

margin, and VOUT(MARGIN) is the margin quantity in volts:

RPGM =

OUT

0.6V •

1.18V

VOUT(MARGIN)

•10k

where RPGM is the resistor value to place on the MPGM

pin to ground.

The margining voltage, VOUT(MARGIN), will be added or

subtracted from the nominal output voltage as determined

by the state of the MARG0 and MARG1 pins. See the truth

table below:

MARG1 MARG0 MODE

LOW LOW NO MARGIN

LOW HIGH MARGIN UP

HIGH LOW MARGIN DOWN

HIGH HIGH NO MARGIN

Input Capacitors

LTM4603HV module should be connected to a low AC

impedance DC source. Input capacitors are required to

be placed adjacent to the module. In Figure 20, the 10µF

ceramic input capacitors are selected for their ability to

handle the large RMS current into the converter. An input

bulk capacitor of 100µF is optional. This 100µF capacitor is

only needed if the input source impedance is compromised

by long inductive leads or traces.

For a buck converter, the switching duty-cycle can be

estimated as:

OUT

Without considering the inductor ripple current, the RMS

current of the input capacitor can be estimated as:

ICIN(RMS) =

OUT(MAX)

η%•D•(1−D)

In the above equation, η% is the estimated efficiency of

the power module. CIN can be a switcher-rated electrolytic

aluminum capacitor, OS-CON capacitor or high value ce-

ramic capacitor. Note the capacitor ripple current ratings

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are often based on temperature and hours of life. This

makes it advisable to properly derate the input capacitor,

or choose a capacitor rated at a higher temperature than

required. Always contact the capacitor manufacturer for

derating requirements.

In Figure 20, the 10µF ceramic capacitors are together

used as a high frequency input decoupling capacitor. In

a typical 6A output application, two very low ESR, X5R or

X7R, 10µF ceramic capacitors are recommended. These

decoupling capacitors should be placed directly adjacent

to the module input pins in the PCB layout to minimize

the trace inductance and high frequency AC noise. Each

10µF ceramic is typically good for 2A to 3A of RMS ripple

current. Refer to your ceramics capacitor catalog for the

RMS current ratings.

Multiphase operation with multiple LTM4603HV devices in

parallel will lower the effective input RMS ripple current due

to the interleaving operation of the regulators. Application

Note 77 provides a detailed explanation. Refer to Figure 2

for the input capacitor ripple current requirement as a func-

tion of the number of phases. The figure provides a ratio

of RMS ripple current to DC load current as a function of

duty cycle and the number of paralleled phases. Pick the

corresponding duty cycle and the number of phases to

arrive at the correct ripple current value. For example, the

2-phase parallel LTM4603HV design provides 10A at 2.5V

output from a 12V input. The duty cycle is DC = 2.5V/12V

= 0.21. The 2-phase curve has a ratio of ~0.25 for a duty

cycle of 0.21. This 0.25 ratio of RMS ripple current to a

DC load current of 10A equals ~2.5A of input RMS ripple

current for the external input capacitors.

Output Capacitors

The LTM4603HV is designed for low output ripple voltage.

The bulk output capacitors defined as COUT are chosen

with low enough effective series resistance (ESR) to meet

the output ripple voltage and transient requirements. COUT

can be a low ESR tantalum capacitor, a low ESR polymer

capacitor or a ceramic capacitor. The typical capacitance is

200µF if all ceramic output capacitors are used. Additional

output filtering may be required by the system designer,

if further reduction of output ripple or dynamic transient

spikes is required. Table 2 shows a matrix of different

output voltages and output capacitors to minimize the

voltage droop and overshoot during a 3A/µs transient.

The table optimizes total equivalent ESR and total bulk

capacitance to maximize transient performance.

Multiphase operation with multiple LTM4603HV devices

in parallel will lower the effective output ripple current

due to the interleaving operation of the regulators. For

example, each LTM4603HV’s inductor current in a 12V

to 2.5V multiphase design can be read from the Inductor

Ripple Current vs Duty Cycle graph (Figure 3). The large

ripple current at low duty cycle and high output voltage

can be reduced by adding an external resistor from fSET to

ground which increases the frequency. If we choose the

duty cycle of DC = 2.5V/12V = 0.21, the inductor ripple

current for 2.5V output at 21% duty cycle is ~2A in Figure 3.

Figure 2. Normalized Input RMS Ripple Current

vs Duty Cycle for One to Six Modules (Phases)

Figure 3. Inductor Ripple Current vs Duty Cycle

DUTY CYCLE (VOUT/VIN)

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

0.6

0.5

0.4

0.3

0.2

0.1

4603HV F02

RMS INPUT RIPPLE CURRENT

DC LOAD CURRENT

6-PHASE

4-PHASE

3-PHASE

2-PHASE

1-PHASE

DUTY CYCLE (VOUT/VIN)

IL (A)

0.2 0.4 0.6 0.8

4603HV F03

2.5V OUTPUT

5V OUTPUT

1.8V OUTPUT

1.5V OUTPUT

1.2V OUTPUT

3.3V OUTPUT WITH

82.5k ADDED FROM

VOUT TO fSET

5V OUTPUT WITH

150k ADDED FROM

fSET TO GND

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Figure 4 provides a ratio of peak-to-peak output ripple cur-

rent to the inductor current as a function of duty cycle and

the number of paralleled phases. Pick the corresponding

duty cycle and the number of phases to arrive at the correct

output ripple current ratio value. If a 2-phase operation is

chosen at a duty cycle of 21%, then 0.6 is the ratio. This

0.6 ratio of output ripple current to inductor ripple of 2A

equals 1.2A of effective output ripple current. Refer to

Application Note 77 for a detailed explanation of output

ripple current reduction as a function of paralleled phases.

The output ripple voltage has two components that are

related to the amount of bulk capacitance and effective

series resistance (ESR) of the output bulk capacitance.

Therefore, the output ripple voltage can be calculated with

the known effective output ripple current. The equation:

ΔVOUT(P-P) ≈ (ΔIL/(8•f•m•COUT) + ESR•ΔIL), where f

is frequency and m is the number of parallel phases. This

calculation process can be easily accomplished by using

LTpowerCAD™.

Fault Conditions: Current Limit and Overcurrent

Foldback

The LTM4603HV has a current mode controller, which

inherently limits the cycle-by-cycle inductor current not

only in steady-state operation, but also in response to

transients.

To further limit current in the event of an overload condition,

the LTM4603HV provides foldback current limiting. If the

output voltage falls by more than 50%, then the maximum

output current is progressively lowered to about one sixth

of its full current limit value.

Soft-Start and Tracking

The TRACK/SS pin provides a means to either soft-start

the regulator or track it to a different power supply. A

capacitor on this pin will program the ramp rate of the

output voltage. A 1.5µA current source will charge up the

external soft-start capacitor to 80% of the 0.6V internal

Figure 4. Normalized Output Ripple Current vs Duty Cycle, Dlr = VOT/LI

DUTY CYCLE (VO/VIN)

0.1 0.15 0.2 0.25 0.350.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9

1.00

0.95

0.90

0.85

0.80

0.75

0.70

0.65

0.60

0.55

0.50

0.45

0.40

0.35

0.30

0.25

0.20

0.15

0.10

0.05

4603HV F04

6-PHASE

4-PHASE

3-PHASE

2-PHASE

1-PHASE

PEAK-TO-PEAK OUTPUT RIPPLE CURRENT

DIr

RATIO =

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voltage reference minus any margin delta. This will control

the ramp of the internal reference and the output voltage.

The total soft-start time can be calculated as:

tSOFTSTART =0.8 •0.6V ±VOUT(MARGIN)

( )

•

1.5µA

When the RUN pin falls below 1.5V, then the TRACK/SS

pin is reset to allow for proper soft-start control when the

regulator is enabled again. Current foldback and forced

continuous mode are disabled during the soft-start pro-

cess. The soft-start function can also be used to control

the output ramp up time, so that another regulator can

be easily tracked to it.

Output Voltage Tracking

Output voltage tracking can be programmed externally

using the TRACK/SS pin. The output can be tracked up and

down with another regulator. The master regulator’s output

is divided down with an external resistor divider that is the

same as the slave regulator’s feedback divider. Figure 5

shows an example of coincident tracking. Ratiometric

modes of tracking can be achieved by selecting different

resistor values to change the output tracking ratio. The

master output must be greater than the slave output for

the tracking to work. Figure 6 shows the coincident output

tracking characteristics.

Run Enable

The RUN pin is used to enable the power module. The

pin has an internal 5.1V Zener to ground. The pin can be

driven with a logic input not to exceed 5V.

The RUN pin can also be used as an undervoltage lock out

(UVLO) function by connecting a resistor divider from the

input supply to the RUN pin:

VUVLO =

•1.5V

See the Simplified Block Diagram (Figure 1).

Power Good

The PGOOD pin is an open-drain pin that can be used to

monitor valid output voltage regulation. This pin monitors

a ±10% window around the regulation point and tracks

with margining.

COMP Pin

This pin is the external compensation pin. The module has

already been internally compensated for most output volt-

ages. Table 2 is provided for most application requirements.

LTpowerCAD is available for control loop optimization.

PLLIN

The power module has a phase-locked loop comprised

of an internal voltage controlled oscillator and a phase

detector. This allows the internal top MOSFET turn-on

Figure 5. Coincident Tracking Schematic Figure 6. Coincident Output Tracking Characteristics

VOUT

VFB

MARG0

MARG1

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

PGOOD

MPGM

RUN

COMP

INTVCC

DRVCC

TRACK/SS

TRACK CONTROL

PLLIN

LTM4603HV

RSET

40.2k

100k

40.2k

MASTER

OUTPUT

60.4k

COUT

SLAVE OUTPUT

4603HV F05

60.4k FROM

VOUT TO VFB

CIN

VIN

fSETPGNDSGND

VIN

OUTPUT

VOLTAGE

TIME 4603HV F06

MASTER OUTPUT

SLAVE OUTPUT

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to be locked to the rising edge of the external clock. The

frequency range is ±30% around the operating frequency

of 1MHz. A pulse detection circuit is used to detect a clock

on the PLLIN pin to turn on the phase-locked loop. The

pulse width of the clock has to be at least 400ns and the

amplitude at least 2V. The PLLIN pin must be driven from a

low impedance source such as a logic gate located close to

the pin. During start-up of the regulator, the phase-locked

loop function is disabled.

INTVCC and DRVCC Connection

An internal low dropout regulator produces an internal

5V supply that powers the control circuitry and DRVCC

for driving the internal power MOSFETs. Therefore, if the

system does not have a 5V power rail, the LTM4603HV

can be directly powered by Vin. The gate driver current

through the LDO is about 20mA. The internal LDO power

dissipation can be calculated as:

PLDO_LOSS = 20mA•(VIN – 5V)

The LTM4603HV also provides the external gate driver

voltage pin DRVCC. If there is a 5V rail in the system, it is

recommended to connect DRVCC pin to the external 5V

rail. This is especially true for higher input voltages. Do

not apply more than 6V to the DRVCC pin. A 5V output can

be used to power the DRVCC pin with an external circuit

as shown in Figure 18.

Parallel Operation of the Module

The LTM4603HV device is an inherently current mode

controlled device. Parallel modules will have very good

current sharing. This will balance the thermals on the

design. The voltage feedback equation changes with the

variable n as modules are paralleled:

VOUT =0.6V

60.4k

n+RSET

SET

n is the number of paralleled modules.

Thermal Considerations and Output Current Derating

The power loss curves in Figures 7 and 8 can be used

in coordination with the load current derating curves in

Figures 9 to 12, and Figures 13 to 16 for calculating an

approximate θJA for the module with various heat sinking

methods. Thermal models are derived from several tem-

perature measurements at the bench and thermal modeling

analysis. Thermal Application Note 103 provides a detailed

explanation of the analysis for the thermal models and the

derating curves. Tables 3 and 4 provide a summary of the

equivalent θJA for the noted conditions. These equivalent

θJA parameters are correlated to the measured values,

and are improved with air flow. The case temperature is

maintained at 100°C or below for the derating curves.

Figure 7. 1.5V Power Loss Figure 8. 3.3V Power Loss Figure 9. No Heat Sink

OUTPUT CURRENT (A)

2.0

2.5

3 5

4603HV F07

1.5

1.0

1 2 4 6 7

0.5

POWER LOSS (W)

12V LOSS

5V LOSS

OUTPUT CURRENT (A)

2.0

2.5

3.5

3 5

4603HV F08

1.5

1.0

1 2 4 6 7

0.5

3.0

POWER LOSS (W)

24V LOSS

12V LOSS

AMBIENT TEMPERATURE (C)

MAXIMUM LOAD CURRENT (A)

80 85 90 95

4603HV F09

5VIN, 1.5VOUT, 0LFM

5VIN, 1.5VOUT, 200LFM

5VIN, 1.5VOUT, 400LFM

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Figure 10. BGA Heat Sink Figure 11. No Heat Sink Figure 12. BGA Heat Sink

Figure 13. No Heat Sink Figure 14. BGA Heat Sink

Figure 15. No Heat Sink Figure 16. BGA Heat Sink

AMBIENT TEMPERATURE (C)

MAXIMUM LOAD CURRENT (A)

80 85 90 95

4603HV F10

5VIN, 1.5VOUT, 0LFM

5VIN, 1.5VOUT, 200LFM

5VIN, 1.5VOUT, 400LFM

AMBIENT TEMPERATURE (C)

MAXIMUM LOAD CURRENT (A)

75 80 85 90

4603HV F11

12VIN, 1.5VOUT, 0LFM

12VIN, 1.5VOUT, 200LFM

12VIN, 1.5VOUT, 400LFM

AMBIENT TEMPERATURE (C)

MAXIMUM LOAD CURRENT (A)

75 80 85 90

4603HV F12

12VIN, 1.5VOUT, 0LFM

12VIN, 1.5VOUT, 200LFM

12VIN, 1.5VOUT, 400LFM

AMBIENT TEMPERATURE (C)

MAXIMUM LOAD CURRENT (A)

75 80 85 90

4603HV F13

12VIN, 3.3VOUT, 0LFM

12VIN, 3.3VOUT, 200LFM

12VIN, 3.3VOUT, 400LFM

AMBIENT TEMPERATURE (C)

MAXIMUM LOAD CURRENT (A)

75 80 85 90

4603HV F14

12VIN, 3.3VOUT, 0LFM

12VIN, 3.3VOUT, 200LFM

12VIN, 3.3VOUT, 400LFM

AMBIENT TEMPERATURE (C)

MAXIMUM LOAD CURRENT (A)

65 70 75 80

4603HV F15

24VIN, 3.3VOUT, 0LFM

24VIN, 3.3VOUT, 200LFM

24VIN, 3.3VOUT, 400LFM

AMBIENT TEMPERATURE (C)

MAXIMUM LOAD CURRENT (A)

65 70 75 80

1635 G24

85 90

24VIN, 3.3VOUT, 0LFM

24VIN, 3.3VOUT, 200LFM

24VIN, 3.3VOUT, 400LFM

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Table 2. Output Voltage Response Versus Component Matrix (Refer to Figure 20)

TYPICAL MEASURED VALUES

COUT1 VENDORS PART NUMBER COUT2 VENDORS PART NUMBER

TAIYO YUDEN JMK316BJ226ML-T501 (22µF, 6.3V) SANYO POSCAP 6TPE220MIL (220µF, 6.3V)

TAIYO YUDEN JMK325BJ476MM-T (47µF, 6.3V) SANYO POSCAP 2R5TPE330M9 (330µF, 2.5V)

TDK C3225X5R0J476M (47µF, 6.3V) SANYO POSCAP 4TPE330MCL (330µF, 4V)

VOUT

(V)

CIN

(CERAMIC)

CIN

(BULK)

COUT1

(CERAMIC)

COUT2

(BULK)

VIN

(V)

DROOP

(mV)

PEAK TO

PEAK (mV)

RECOVERY

TIME (µs)

LOAD STEP

(A/µs)

RSET

(kW)

1.2 2 × 10µF 35V 150µF 35V 1 × 22µF 6.3V 330µF 4V 5 34 68 30 3 60.4

1.2 2 × 10µF 35V 150µF 35V 1 × 47µF 6.3V 330µF 2.5V 5 22 40 26 3 60.4

1.2 2 × 10µF 35V 150µF 35V 2 × 47µF 6.3V 220µF 6.3V 5 20 40 24 3 60.4

1.2 2 × 10µF 35V 150µF 35V 4 × 47µF 6.3V NONE 5 32 60 18 3 60.4

1.2 2 × 10µF 35V 150µF 35V 1 × 22µF 6.3V 330µF 4V 12 34 68 30 3 60.4

1.2 2 × 10µF 35V 150µF 35V 1 × 47µF 6.3V 330µF 2.5V 12 22 40 26 3 60.4

1.2 2 × 10µF 35V 150µF 35V 2 × 47µF 6.3V 220µF 6.3V 12 20 39 24 3 60.4

1.2 2 × 10µF 35V 150µF 35V 4 × 47µF 6.3V NONE 12 29.5 55 18 3 60.4

1.5 2 × 10µF 35V 150µF 35V 1 × 22µF 6.3V 330µF 4V 5 35 70 30 3 40.2

1.5 2 × 10µF 35V 150µF 35V 1 × 47µF 6.3V 330µF 2.5V 5 25 48 30 3 40.2

1.5 2 × 10µF 35V 150µF 35V 2 × 47µF 6.3V 220µF 6.3V 5 24 47.5 26 3 40.2

1.5 2 × 10µF 35V 150µF 35V 4 × 47µF 6.3V NONE 5 36 68 26 3 40.2

1.5 2 × 10µF 35V 150µF 35V 1 × 22µF 6.3V 330µF 4V 12 35 70 30 3 40.2

1.5 2 × 10µF 35V 150µF 35V 1 × 47µF 6.3V 330µF 2.5V 12 25 48 30 3 40.2

1.5 2 × 10µF 35V 150µF 35V 2 × 47µF 6.3V 220µF 6.3V 12 24 45 26 3 40.2

1.5 2 × 10µF 35V 150µF 35V 4 × 47µF 6.3V NONE 12 32.6 61.9 26 3 40.2

1.8 2 × 10µF 35V 150µF 35V 1 × 22µF 6.3V 330µF 4V 5 38 76 37 3 30.1

1.8 2 × 10µF 35V 150µF 35V 1 × 47µF 6.3V 330µF 2.5V 5 29.5 57.5 30 3 30.1

1.8 2 × 10µF 35V 150µF 35V 2 × 47µF 6.3V 220µF 6.3V 5 28 55 26 3 30.1

1.8 2 × 10µF 35V 150µF 35V 4 × 47µF 6.3V NONE 5 43 80 26 3 30.1

1.8 2 × 10µF 35V 150µF 35V 1 × 22µF 6.3V 330µF 4V 12 38 76 37 3 30.1

1.8 2 × 10µF 35V 150µF 35V 1 × 47µF 6.3V 330µF 2.5V 12 28 55 30 3 30.1

1.8 2 × 10µF 35V 150µF 35V 2 × 47µF 6.3V 220µF 6.3V 12 27 52 26 3 30.1

1.8 2 × 10µF 35V 150µF 35V 4 × 47µF 6.3V NONE 12 36.4 70 26 3 30.1

2.5 2 × 10µF 35V 150µF 35V 1 × 22µF 6.3V 330µF 4V 5 38 78 40 3 19.1

2.5 2 × 10µF 35V 150µF 35V 1 × 47µF 6.3V 330µF 4V 5 37.6 74 34 3 19.1

2.5 2 × 10µF 35V 150µF 35V 2 × 47µF 6.3V 220µF 6.3V 5 39.5 78.1 28 3 19.1

2.5 2 × 10µF 35V 150µF 35V 4 × 47µF 6.3V NONE 5 66 119 12 3 19.1

2.5 2 × 10µF 35V 150µF 35V 1 × 22µF 6.3V 330µF 4V 12 38 78 40 3 19.1

2.5 2 × 10µF 35V 150µF 35V 1 × 47µF 6.3V 330µF 4V 12 34.5 66.3 34 3 19.1

2.5 2 × 10µF 35V 150µF 35V 2 × 47µF 6.3V 220µF 6.3V 12 35.8 68.8 28 3 19.1

2.5 2 × 10µF 35V 150µF 35V 4 × 47µF 6.3V NONE 12 50 98 18 3 19.1

3.3 2 × 10µF 35V 150µF 35V 1 × 22µF 6.3V 330µF 4V 7 42 86 40 3 13.3

3.3 2 × 10µF 35V 150µF 35V 1 × 47µF 6.3V 330µF 4V 7 47 89 32 3 13.3

3.3 2 × 10µF 35V 150µF 35V 2 × 47µF 6.3V 220µF 6.3V 7 50 94 28 3 13.3

3.3 2 × 10µF 35V 150µF 35V 4 × 47µF 6.3V NONE 7 75 141 14 3 13.3

3.3 2 × 10µF 35V 150µF 35V 1 × 22µF 6.3V 330µF 4V 12 42 86 40 3 13.3

3.3 2 × 10µF 35V 150µF 35V 1 × 47µF 6.3V 330µF 4V 12 47 88 32 3 13.3

3.3 2 × 10µF 35V 150µF 35V 2 × 47µF 6.3V 220µF 6.3V 12 50 94 28 3 13.3

3.3 2 × 10µF 35V 150µF 35V 4 × 47µF 6.3V NONE 12 69 131 22 3 13.3

5 2 × 10µF 35V 150µF 35V 4 × 47µF 6.3V NONE 15 110 215 20 3 8.25

5 2 × 10µF 35V 150µF 35V 4 × 47µF 6.3V NONE 20 110 217 20 3 8.25

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Table 4. 3.3V Output

DERATING CURVE VIN (V) POWER LOSS CURVE AIR FLOW (LFM) HEAT SINK θJA (°C/W)

Figures 13, 15 12, 24 Figure 8 0 None 15.2

Figures 13, 15 12, 24 Figure 8 200 None 14.6

Figures 13, 15 12, 24 Figure 8 400 None 13.4

Figures 14, 16 12, 24 Figure 8 0 BGA Heat Sink 13.9

Figures 14, 16 12, 24 Figure 8 200 BGA Heat Sink 11.1

Figures 14, 16 12, 24 Figure 8 400 BGA Heat Sink 10.5

Table 3. 1.5V Output

DERATING CURVE VIN (V) POWER LOSS CURVE AIR FLOW (LFM) HEAT SINK θJA (°C/W)

Figures 9, 11 5, 12 Figure 7 0 None 15.2

Figures 9, 11 5, 12 Figure 7 200 None 14

Figures 9, 11 5, 12 Figure 7 400 None 12

Figures 10, 12 5, 12, 20 Figure 7 0 BGA Heat Sink 13.9

Figures 10, 12 5, 12, 20 Figure 7 200 BGA Heat Sink 11.3

Figures 10, 12 5, 12, 20 Figure 7 400 BGA Heat Sink 10.25

Heat Sink Manufacturer

Aavid Thermalloy Part No: 375424B00034G Phone: 603-224-9988

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This allows for 4W maximum power dissipation in the

total module with top and bottom heat sinking, and 2W

power dissipation through the top of the module with an

approximate θJC between 6°C/W to 9°C/W. This equates

to a total of 124°C at the junction of the device.

Safety Considerations

The LTM4603HV modules do not provide galvanic isolation

from VIN to VOUT. There is no internal fuse. If required,

a slow blow fuse with a rating twice the maximum input

current needs to be provided to protect each unit from

catastrophic failure.

Layout Checklist/Example

The high integration of LTM4603HV makes the PCB board

layout very simple and easy. However, to optimize its

electrical and thermal performance, some layout consid-

erations are still necessary.

• Use large PCB copper areas for high current path, in-

cluding VIN, PGND and VOUT. It helps to minimize the

PCB conduction loss and thermal stress.

• Place high frequency ceramic input and output capaci-

tors next to the VIN, PGND and VOUT pins to minimize

high frequency noise.

• Place a dedicated power ground layer underneath the

unit.

• To minimize the via conduction loss and reduce module

thermal stress, use multiple vias for interconnection

between top layer and other power layers.

• Do not put vias directly on pads.

• If vias are placed onto the pads, the the vias must be

capped.

• Interstitial via placement can also be used if necessary.

• Use a separated SGND ground copper area for com-

ponents connected to signal pins. Connect the SGND

to PGND underneath the unit.

Figure 17 gives a good example of the recommended layout.

Frequency Adjustment

The LTM4603HV is designed to typically operate at 1MHz

across most input conditions. The fSET pin is typically

left open. The switching frequency has been optimized

for maintaining constant output ripple noise over most

operating ranges. The 1MHz switching frequency and the

400ns minimum off-time can limit operation at higher duty

cycles like 5VIN to 3.3VOUT, and produce excessive induc-

tor ripple currents for lower duty cycle applications like

28VIN to 5VOUT. The 5VOUT and 3.3VOUT drop out curves

are modified by adding an external resistor on the fSET pin

to allow for wider input voltage operation.

Figure 17. Recommended Layout

SIGNAL

GND

VOUT

VIN

GND

COUT

CIN CIN

COUT

4603HV F17

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

applicaTions inForMaTion

Example for 5V Output

LTM4603HV minimum on-time = 100ns

tON = ((VOUT•10pf)/IfSET), for VOUT > 4.8V use 4.8V

LTM4603HV minimum off-time = 400ns

tOFF = t– tON, where t = 1/Frequency

Duty Cycle = tON/t or VOUT/VIN

Equations for setting frequency:

IfSET = (VIN/(3•RfSET)), for 28V input operation, IfSET =

281µA, tON = ((4.8V•10pF)/IfSET), tON = 171ns, where

the internal RfSET is 33.2k. Frequency = (VOUT/(VIN•tON))

= (5V/(28V•171ns)) ~ 1MHz. The inductor ripple cur-

rent begins to get high at the higher input voltages due

to a larger voltage across the inductor. This is shown in

the Inductor Ripple Current vs Duty Cycle graph as over

4A at 18% duty cycle. The inductor ripple current can be

lowered at the higher input voltages by adding an external

resistor from fSET to ground to increase the switching

frequency. A 3A ripple current is chosen, and the total

peak current is equal to 1/2 of the 3A ripple current plus

the output current. The 5V output current is limited to 5A,

so total peak current is less than 6.5A. This is below the

8A peak specified value. A 150k resistor is placed from

fSET to ground, and the parallel combination of 150k and

33.2k equates to 27.2k. The IfSET calculation with 27.2k

and 28V input voltage equals 343µA. This equates to a tON

of 140ns. This will increase the switching frequency from

1MHz to ~1.28MHz for the 28V to 5V conversion. The

minimum on time is above 100ns at 28V input. Since the

switching frequency is approximately constant over input

and output conditions, then the lower input voltage range

is limited to 10V for the 1.28MHz operation due to the

400ns minimum off-time. Equation: tON = (VOUT/VIN)•(1/

Frequency) equates to a 382ns on time, and a 400ns off-

time. The VIN to VOUT Step-Down Ratio curve reflects an

operating range of 10V to 28V for 1.28MHz operation with a

150k resistor to ground (shown in Figure 18), and an 8V to

16V operating range for fSET floating. These modifications

are made to provide wider input voltage ranges for the 5V

output designs while limiting the inductor ripple current,

and maintaining the 400ns minimum off-time.

Example for 3.3V Output

LTM4603HV minimum on-time = 100ns

tON = ((3.3V•10pF)/IfSET)

LTM4603HV minimum off-time = 400ns

tOFF = t – tON, where t = 1/Frequency

Duty Cycle (DC) = tON/t or VOUT/VIN

Equations for setting frequency:

IfSET = (VIN/(3•RfSET)), for 28V input operation, IfSET =

281µA, tON = ((3.3V•10pf)/IfSET), tON = 117ns, where the

internal RfSET is 33.2k. Frequency = (VOUT/(VIN•tON)) =

(3.3V/(28V•117ns)) ~ 1MHz. The minimum on-time and

minimum off-time are within specification at 117ns and

883ns. But the 4.5V minimum input for converting 3.3V

output will not meet the minimum off-time specification

of 400ns. tON = 733ns, Frequency = 1MHz, tOFF = 267ns.

Solution

Lower the switching frequency at lower input voltages to

allow for higher duty cycles, and meet the 400ns minimum

off-time at 4.5V input voltage. The off-time should be about

500ns with 100ns guard band included. The duty cycle

for (3.3V/4.5V) = ~73%. Frequency = (1 – DC)/tOFF or

(1 – 0.73)/500ns = 540kHz. The switching frequency

needs to be lowered to 540kHz at 4.5V input. tON = DC/

frequency, or 1.35µs. The fSET pin voltage compliance

is 1/3 of VIN, and the IfSET current equates to 45µA with

the internal 33.2k. The IfSET current needs to be 24µA for

540kHz operation. A resistor can be placed from VOUT to

fSET to lower the effective IfSET current out of the fSET pin

to 24µA. The fSET pin is 4.5V/3 =1.5V and VOUT = 3.3V,

therefore an 82.5k resistor will source 21µA into the fSET

node and lower the IfSET current to 24µA. This enables the

540kHz operation and the 4.5V to 28V input operation for

down converting to 3.3V output as shown in Figure 19.

The frequency will scale from 540kHz to 1.27MHz over this

input range. This provides for an effective output current

of 5A over the input range.

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

Figure 19. 3.3V at 5A Design

Figure 18. 5V at 5A Design

VOUT

VFB

MARG0

MARG1

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

PGOOD

MPGM

RUN

COMP

INTVCC

DRVCC

TRACK/SSPLLIN

LTM4603HV

392k

RfSET

150k

RSET

8.25k

100µF

6.3V

SANYO POSCAP

4603HV F18

VOUT

TRACK/SS CONTROL

REVIEW TEMPERATURE

DERATING CURVE

C6 100pF

REFER TO

TABLE 2

10μF

35V

IMPROVE

EFFICIENCY

FOR 12V INPUT

10µF

35V

100k

100k VIN

fSETPGND

MARGIN CONTROL

SGND

5% MARGIN

VIN

10V TO 28V

VOUT

DUAL

CMSSH-3C3

SOT-323

INTVCC

VOUT

VFB

MARG0

MARG1

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

PGOOD

MPGM

RUN

COMP

INTVCC

DRVCC

TRACK/SSPLLIN

LTM4603HV

392k

100k

RSET

13.3k

RfSET

82.5k

MARGIN CONTROL

100µF

6.3V

SANYO POSCAP

4603HV F19

VOUT

3.3V

TRACK/SS CONTROL

C6 100pF

10µF

35V C1

10µF

35V

VIN

fSETPGNDSGND

5% MARGIN

VIN

4.5V TO 28V REVIEW TEMPERATURE

DERATING CURVE

PGOOD

VOUT

Typical applicaTions

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

Figure 21. 2-Phase, Parallel 2.5V at 12A Design

Figure 20. Typical 4.5V-28VIN, 1.5V at 6A Design

VOUT

VFB

MARG0

MARG1

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

PGOOD

MPGM

RUN

COMP

INTVCC

DRVCC

TRACK/SSPLLIN

LTM4603HV

392k

100k

RSET

40.2k

VIN

*100k NEEDED ONLY FOR

20V INPUT

COUT1

22µF

6.3V

0.01µF

COUT2

470µF

6.3V

MARGIN

CONTROL

4603 F18

VOUT

1.5V

CLOCK SYNC

C3 100pF

REFER TO

TABLE 2

CIN

BULK

OPT.

TABLE 2 CIN

10µF

35V

×2 CER

VIN

fSETPGND 100k*

SGND

5% MARGIN

VIN

4.5V TO 28V REVIEW TEMPERATURE

DERATING CURVE

PGOOD

VOUT

ON/OFF

PGOOD

RUN

COMP

INTVCC

DRVCC

MPGM

fSET

TRACK/SS

VOUT

VFB

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

MARG0

MARG1

VIN

VOUT

100k

0.33µF

100pF

100µF

6.3V

100µF

6.3V

4603HV F21

220µF

6.3V

220µF

6.3V

VOUT

2.5V

12A

0.1µF

10µF

35V

×2

10µF

35V

×2

VIN

4.5V TO 28V

LTC6908-1

2-PHASE

OSCILLATOR

PLLIN

0 PHASE

180 PHASE

LTM4603HV

SGND PGND

PGOOD

RUN

COMP

INTVCC

DRVCC

MPGM

fSET

TRACK/SS

VOUT

VFB

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

MARG0

MARG1

VIN PLLIN

LTM4603HV

SGND

5% MARGIN

PGND

RSET

9.53k

MARGIN

CONTROL

100k

392k

100k

118k

V+

GND

SET

OUT1

OUT2

MOD

Typical applicaTions

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

Typical applicaTions

Figure 22. 2-Phase, 3.3V and 2.5V at 6A with Tracking

Figure 23. 2-Phase, 1.8V and 1.5V at 6A with Tracking

PGOOD

RUN

COMP

INTVCC

DRVCC

MPGM

fSET

TRACK/SS

VOUT

VFB

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

MARG0

MARG1

VIN

3.3V

100k

0.15µF

22pF

100µF

6.3V

220µF

6.3V

VOUT1

3.3V

0.1µF

10µF

35V

×2

VIN

5V TO 28V

LTC6908-1

2-PHASE

OSCILLATOR

PLLIN

180 PHASE

0 PHASE

LTM4603HV

SGND PGND

RSET1

13.3k

MARGIN

CONTROL

100k

392k

118k

PGOOD

RUN

COMP

INTVCC

DRVCC

MPGM

fSET

TRACK/SS

VOUT

VFB

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

MARG0

MARG1

VIN

3.3V

TRACK

100k

22pF

100µF

6.3V

220µF

6.3V

VOUT2

2.5V

10µF

35V

×2

PLLIN

LTM4603HV

SGND PGND

RSET2

19.1k

4603HV F22

MARGIN

CONTROL

100k

392k

R16

60.4k

R15

19.1k

V+

GND

SET

OUT1

OUT2

MOD

PGOOD

RUN

COMP

INTVCC

DRVCC

MPGM

fSET

TRACK/SS

VOUT

VFB

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

MARG0

MARG1

VIN

1.8V

100k

0.15µF

100pF

100µF

6.3V

220µF

6.3V

VOUT1

1.8V

0.1µF

10µF

35V

×2

VIN

4.5V TO 28V

LTC6908-1

2-PHASE

OSCILLATOR

PLLIN

180 PHASE

0 PHASE

LTM4603HV

SGND PGND

RSET1

30.1k

MARGIN

CONTROL

100k

392k

182k

PGOOD

RUN

COMP

INTVCC

DRVCC

MPGM

fSET

TRACK/SS

VOUT

VFB

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

MARG0

MARG1

VIN

1.8V

TRACK

100k

100pF

100µF

6.3V

220µF

6.3V

VOUT2

1.5V

10µF

35V

×2

PLLIN

LTM4603HV

SGND PGND

RSET2

40.2k

4603HV F23

MARGIN

CONTROL

100k

392k

R16

60.4k

R15

40.2k

V+

GND

SET

OUT1

OUT2

MOD

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

package DescripTion

LGA Package

118-Lead (15mm × 15mm × 2.82mm)

(Reference LTC DWG # 05-08-1801 Rev B)

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

5. PRIMARY DATUM -Z- IS SEATING PLANE

6. THE TOTAL NUMBER OF PADS: 118

7 PACKAGE ROW AND COLUMN LABELING MAY VARY

AMONG µModule PRODUCTS. REVIEW EACH PACKAGE

LAYOUT CAREFULLY

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994

2. ALL DIMENSIONS ARE IN MILLIMETERS

LAND DESIGNATION PER JESD MO-222, SPP-010

DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,

BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.

THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR

MARKED FEATURE

PACKAGE TOP VIEW

PIN “A1”

CORNER

aaa Z

PACKAGE BOTTOM VIEW

C(0.30)

PAD 1

SEE NOTES

SUGGESTED PCB LAYOUT

TOP VIEW

LGA 118 1212 REV B

LTMXXXXXX

µModule

TRAY PIN 1

BEVEL

PACKAGE IN TRAY LOADING ORIENTATION

COMPONENT

PIN “A1”

DETAIL A

0.0000

0.630 ±0.025 Ø 118x

0.6350

1.9050

3.1750

4.4450

5.7150

6.9850

5.7150

4.4450

3.1750

1.9050

0.6350

6.9850

FGHM L JK E ABCD

DETAIL A

0.630 ±0.025 SQ. 118x

DETAIL B

PACKAGE SIDE VIEW

bbb Z

SYXeee

SYMBOL

aaa

bbb

eee

MIN

2.72

0.60

0.27

2.45

NOM

2.82

0.63

15.00

1.27

13.97

0.32

2.50

MAX

2.92

0.66

0.37

2.55

0.15

0.10

0.05

NOTES

DIMENSIONS

TOTAL NUMBER OF LGA PADS: 118

DETAIL B

SUBSTRATE

MOLD

CAP

SEE NOTES

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

revision hisTory

REV DATE DESCRIPTION PAGE NUMBER

A 6/14 Updated Absolute Maximum Ratings.

Updated the Order Information table.

Updated the Electrical Characteristics table.

Updated the Pin Functions information.

Updated the Output Voltage Programming and Margining section.

Updated the PLLIN section.

Updated the Applications Information section.

Updated Figure 18.

2-4

7-8

LTM4603HV

4603hvfa

For more information www.linear.com/LTM4603HV

 LINEAR TECHNOLOGY CORPORATION 2007

LT 0614 REV A • PRINTED IN USA

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 l FAX: (408) 434-0507 l www.linear.com/LTM4603HV

relaTeD parTs

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