ANALOG DEVICES 12-Bit Ultrahigh Speed Monolithic D/A Converter AD568 REV. D 1.1 Scope. This specification covers the detail requirements for a precision, ultrahigh speed, current/voltage output 12-bit resolution D/A converter with internal high stability buried Zener reference. 1.2 Part Number. The complete part number per Table | of this specification is as follows: Device Part Number ~l ADS568SQ/883B 2 AD568SE/883B 1.2.3 Case Outline. See Appendix 1 of General Specification ADI-M-1000: package outline: Device Package -1 Q-24 -2 E-28A 1.3 Absolute Maximum Ratings. (T, = + 25C unless otherwise noted) Voc toRefCOM..........2.0.00- Ver toRef(COM................- RefCOM to LCOM .............. ACOM toLCOM.............24. THCOM to LCOM ............... SPANs to LCOM ............24- Ispo toLCOM ... 1... ee eee eee Tour to LCOM .. 1... ee es Digital Inputs to THCOM .... 1... Voltage Across Span Resistors 1.5 Thermal Characteristics. Thermal Resistance @j, = 25C/W for Q-24 84 = 75C/W for Q-24 Oy = 42C/W for E-28A Oya = 125C/W for E-28A Vr toTHCOM ..........2.02005 Logic Threshold Control Input Current Power Dissipation ................ Storage Temperature Range Q (Cerdip) Package Junction Temperature. ............. Lead Temperature (Soldering, 10secs) Pe ee OV to + 18V ve ee ee OV to 18V Le ee eee +5V we we ee he we ee 5V to Vern Le ee ee ee S500mV to +7V Ce ee 12V Se ee ee ee 0.7V to +1.4V Se 5SmA Se es 1000mW Se ee 175C DIGITAL-TO-ANALOG CONVERTERS 8-35 DIGITAL-TO-ANALOG CONVERTERS aAD568 SPECIFICATIONS Table 1. Design Sub Sub Limit Group | Group Test Symbol | Device | @+25C | 1 2,3 Test Condition Units Relative Accuracy RA -1 V2 V/2 3/4 All Bits with Positive + LSB max Errors On, All Bits with ~2 1/2 V2 1 Negative Errors On Differential Nonlinearity DNL ~1,2 1 i l Major Carry Errors + LSB max Gain Error? Ag -1,2 | 1.0 1.0 All Bits On +% FSR max Gain Temperature TCAg -1 50 50 All Bits On, Vout Mode + ppm/C max Coefficient -2 60 60 -1,2 150 150 All Bits On, lout Mode Unipolar Offset Error Vos -1,2 | 0.20 0.20 All Bits Off +% FSR max Unipolar Offset TC? TCVos | -1,2 | 5 5 All Bits Off + ppm/C max Bipolar Offset Error? Broz -1,2 1.0 1.0 All Bits Off, Bipolar +% FSR max Bipolar Offset TC? TCBpor | ! 30 30 All Bits Off, BIP + ppm/C max -2 40 40 Bipolar Zero Error Brze -1,2 | 0.20 0.20 MSB On, All Other + % FSR max Bits Off, Bipolar Bipolar Zero TC? TCBpze | 1,2 15 15 MSB On, All Other + ppm/C max Bits Off, Bipolar Output Resistance Rout ~1,2 160 Amin 240 max Voltage Settling Time tsv -1,2 50 ns typ to 0.025% Current Settling Time ts1 -1,2 35 ns typ to 0.025% Full-Scale Transition tps ~1,2 iM 10% to 90% Reset Time astyp 90% to 10% Fall Time Glitch Impulse GI -1,2 350 pV-sec typ Compliance Voltage CV -1,2 | 2 Vmin 1.2 +V max Output Current lout -1,2 . 10.137 Unipolar +mAmin 10.343 All Bits On +mA max 5.017 Bipolar +mA min 5.223 All Bits On + mA max Power Supply Rejection Ratio | PSRR -1,2 0.05 0.05 Voc= + 13.5V to +16.5V | +%FS/V max Veg = 13.5V to - 16.5V Power Supply Current**5 lec ~1,2 | 32 32 All Bits High +mA max Ige -1,2 | 8 8 mA max Power Consumption Pc -1,2 625 mW max Digital Input High Voltage Vin -1,2 | 2.0 2.0 2.0 +Vmin Digital Input Low Voltage Vit -1,2 0.8 0.8 0.8 +Vmax Digital Input High Current lw -1,2 10 10 10 Vin=2V + pA max Digital Input Low Current li -1,2 0.5 0.5 0.5 Vi. =0.0V pA min 100 100 | 200 pA max NOTES Woo = + 15V, Veg = 15V, Vi = 2.0V, Viz =0.8V,T, = + 25C unless otherwise specified. Vin = +2.0V and Vy, = 0.8V guaranteed design limits at 35C and + 125C. Guaranteed for +13.55Voc5 + 16.5V. SGuaranteed for - 13.55 Vggs 16.5V. 8-36 DIGITAL-TO-ANALOG CONVERTERS REV.AD568 3.2.1 Functional Block Diagram and Terminal Assignments. THRESHOLD C CONTROL THRESHOLD COMMON LADDER COMMON THIN. FILMA-2R LADDER DIFFUSED A-2A LADDER (10-2082) Vee 24-Lead Skinny Cerdip Package oot BIT 3[3] BIT4 CE] BITS El are [s | BIT? Cy BIT s[a| BIT s[2| BIT 10] 10 BIT 11] 11 BIT 12 (LSB) | 12 ADS68 TOP VIEW (Not to Scale) 2] + 15V (Vcc) 23 | REFERENCE COMMON (REFCOM} (zz) -15V (Vel 21] GIPOLAR OFFSET [20] tous 19] LOAD RESISTOR (R,) COMMON [78] ANALOG COMMON (ACOM) 77] LADDER COMMON [LCOM)} 76] 10V SPAN RESISTOR lis] 10V SPAN RESISTOR [14] THRESHOLD COMMON (THCOM) [+3] THRESHOLD CONTROL (Vu) 3.2.4 Microcircuit Technology Group. This microcircuit is covered by technology group (56). REV. D 28-Lead LCC Package os 693 g 2: ao Nn or > 7} BEE? * 4 3 2 1 2 SY REFERENCE COMMON (REFCOM) -15V (Veg) AD568 TOP VIEW (Not to Scale) = a THRESHOLD CONTROL (V4) 3 THRESHOLD COMMON (THCOM) = BIT 10 & BIT11G BIT 12(LSB) > NC = NO CONNECT 10V SPAN RESISTOR & 25 BIPOLAR OFFSET 24 Nour 23 LOAD RESISTOR (R, ) COMMON 22 NC 21 ANALOG COMMON (ACOM) 20 LADDER COMMON (LCOM) 19 10V SPAN RESISTOR DIGITAL-TO-ANALOG CONVERTERS 8-37 DIGITAL-TO-ANALOG CONVERTERS aAD568 4.2.1 Life Test/Burn-In Circuit. Steady state life test is per MIL-STD-883 Method 1005. Burn-in is per MIL-STD-883 Method 1015 test condition (B). +15V @ 40mA +5V @ 6mA > VY + A ae [a | +18V 7 ist [2 | REF COM 23} SEE NOTE 1 + sk ine a, fap | LY Ls | lour [20] NC -15V @ 10mA Le] g & [is 7] 71 acom | 18 Le | Lcom 7} o Ls SPAN [16 +- 3K (WF Sov SEE NOTE 1 Li0 | SPAN [15} +10V @ 6mA [ri | THcom [14 }-_4 GND + a Vom ah 4 V tpF s0V V2 WATT + 1k sf- 1p SEE NOTE? ] 50V NOTES 1. CAPACITORS EVERY 10 DEVICES. 2. ALL CURRENT RATINGS ARE MAX/PART. +15V @ 10mA ur SOV SEE NOTE 1 > > q 4 TOP VIEW WATT 1k }__ +15. @ 40ma Wr = WF Sov 4 SOCKET TAB > SOV @ 6mA +10V SER NOTE 1 @ oma mA + -15V jm. T + L uF ov 50V + SEE NOTE 1 SEE NOTE 1 V NOTE: 1 CAPACITORS EVERY 10 DEVICES. 2 ALL CURRENT RATINGS ARE MAX/PART. 8-38 DIGITAL-TO-ANALOG CONVERTERS REV. D