Rev. 1.41 5/15 Copyright © 2015 by Silicon Labo ra tories Si1141/42/43
Si1141/42/43
PROXIMITY/AMBIENT LIGHT SENSOR IC WITH I2C INTERFACE
Features
Applications
Description
The Si1141/42/43 is a low-power, reflectance-based, infrared proximity and ambient
light sensor with I2C digital interface and programmable-event interrupt output. This
touchless sensor IC includes an analog-to-digital converter, integrated high-
sensitivity visible and infrared photodiodes, digital signal processor, and one, two, or
three integrated infrared LED drivers with fifteen selectable drive levels. The Si1141/
42/43 offers e xcellent pe rformance u nder a wide dynamic range and a varie ty of light
sources incl uding direct sunlight. Th e Si1141/42/43 can a lso work under dark glass
covers. The photodiode response and associated digital conversion circuitry provide
excellent immunity to artificial light flicker noise and natural light flutter noise. With
two or more LEDs, the Si1142/43 is capable of supporting multiple-axis proximity
motion det ection. T he Si1141/42/43 dev ices are provid ed in a 10- lead 2 x2 mm QFN
package and are capable of operation from 1.71 to 3.6 V over the –40 to +85 °C
temperature range.
Integrated infrared proximi ty de tector
Proximity de te ction ad ju stable from
under 1 cm up to 200 cm
Three independent LED drivers
15 current settings from 5.6 mA to
360 mA for each LED driver
25.6 µs LED driver pulse width
50 cm proximity range with single
pulse (<3 klx)
15 cm proximity range with single
pulse (>3 klx)
Operates at up to 128 klx (direct
sunlight)
High reflectance sensitivity
< 1 µW/cm2
High EMI immunity without shielded
packaging
Integrated ambient light sensor
100 mlx resolution possible,
allowing operation under dark gl ass
1 to 128 klx dynamic range p ossible
across two ADC range setting s
Accurate lux measurement s with IR
correction algorithm
Industry's lowest power consumption
1.71 to 3.6 V supply voltage
9 µA average current (LED pulsed
25.6 µs every 800 ms at 180 mA
plus 3 µA Si114x supply)
< 500 nA standby current
25.6 µs LED “on” time keeps total
power consumption duty cycle low
without compromising performance
or noise immunity
Internal and external wake support
Built-in voltage supply monitor and
power-on reset control ler
Serial communications
Up to 3.4 Mbps data rate
Slave mode ha rdware address
decoding (0x5A)
Small-outlin e 10-l ea d 2x2 mm QFN
Temperature Range
–40 to +85 °C
Handsets
Heart rate monitoring
Pulse oximet ry
Wearables
Audio prod ucts
Security panels
Tamper detection circuits
Dispensers
Valve controls
Smoke detectors
Touchless switches
Touchless sliders
Occupancy sensors
Consumer el ec tro nics
Industrial automation
Display backlightin g control
Photo-interrupters
Pin Assignments
LED1
VDD
SCL GND
INT
2
3
4
9
8
7
6
QFN-10 LED3/CVDD
LED2/CVDD
SDA 1
DNC
10
5
DNC
Si1141/42/43
2 Rev. 1.41
Functional Block Diagram
Figure 1. Si1141 Basic Application
Figure 2. Si1143 Application with Three LEDs and Separate LED Power Supply
Note: For more application examples, refer to “AN498: Si114x Designer’s Guide”.
Visible
VDD
SDA
SCL
Regulator
I2C
LED
Drivers
LED1
LED32
LED21
GND
INT Infrared
Registers
A
M
U
X
ADC
Temp Filter
Oscillator
Digital S equencer & Control Logic
1. Si1142 and Si1143 only. Must be tied to VDD with Si1141.
2. Si1143 only. Must be tied to VDD w ith Si1141 and Si1142.
SDA
SCL
VDD
INT
LED1
GND
CVDD
CVDD
Si1141
15 µF, 20%, >6 V
30 ohm
5%, 1/16 W
3.3 V
0.1 uF
Host
SDA
SCL
INT
SDA
SCL
VDD
INT
LED1
GND
LED3
LED2
Si1143
22 uF, 20%, >6V
30 ohm
5%, 1/16 W
3.3 V
0.1 uF
Host
4.3 V
No
Pop
Si1141/42/43
Rev. 1.41 3
TABLE OF CONTENTS
Section Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.1. Performance Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.2. Typical Performance Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
2.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
2.2. Proximity Sensing (PS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
2.3. Ambient Light . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
2.4. Host Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
3. Operational Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
3.1. Off Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
3.2. Initialization Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
3.3. Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
3.4. Forced Conversion Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
3.5. Autonomous Operation Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
4. Programming Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
4.1. Command and Response Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
4.2. Command Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
4.3. Resource Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
4.4. Signal Path Software Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
4.5. I2C Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
4.6. Parameter RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52
5. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67
6. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68
7. Package Outline: 10-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69
8. Suggested PCB Land Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75
Si1141/42/43
4 Rev. 1.41
1. Electrical Specifications
1.1. Performance Tables
Table 1. Recommended Operating Conditions
Parameter Symbol Test Condition Min Typ Max Unit
VDD Supply Voltage VDD 1.71 — 3.6 V
VDD OFF Supply Voltage VDD_OFF OFF mode –0.3 1.0 V
VDD Supply Ripple Voltage VDD =3.3V
1kHz–10MHz ——50mVpp
Operating Temperature T –40 25 85 °C
SCL, SDA, Input High Logic
Voltage I2CVIH VDDx0.7 — VDD V
SCL, SDA Input Low Logic
Voltage I2CVIL 0—V
DDx0.3 V
PS Operation under
Direct Sunlight Edc — — 128 klx
IrLED Emission Wavelength l 750 850 950 nm
IrLED Supply Voltage VLED IrLED VF= 1.0 V nominal VDD —4.3 V
IrLED Supply Ripple Voltage Applies if IrLEDs use
separate supply rail
0–30 kHz
30 kHz–100 MHz —
——
—250
100 mVpp
mVpp
Start-Up Time VDD above 1.71 V 25 — — ms
LED3 Voltage Start-up VDDx0.77 — — V
Table 2. Performance Characteristics1
Parameter Symbol Test Condition Min Typ Max Unit
IDD OFF Mode Ioff VDD < VDD_OFF (leakage from SCL,
SDA, and INT not included ) — 240 1000 nA
IDD Standby Mode Isb No ALS / PS Conversions
No I2C Activity
VDD =1.8V
— 150 500 nA
Notes:
1. Unless specifically stated in "Conditions", electrical data assumes ambient light levels < 1 klx.
2. Proximity-detection performance may be degraded, especially when there is high optical crosstalk, if the LED supply
and voltage drop allow the driver to saturate and current regulation is lost.
3. Guaranteed by design and chara c terization.
4. Represents the time during which the device is drawing a current equal to Iactive for power estimation purposes.
Assumes default settings.
Si1141/42/43
Rev. 1.41 5
IDD Standby Mode Isb No ALS / PS Conversions
No I2C Activity
VDD =3.3 V
—1.4 — µA
IDD Actively Measuring Iactive Without LED influence, VDD = 3.3 V — 4.3 5.5 mA
Peak IDD while LED1,
LED2, or LED3 is
Actively Driven
VDD =3.3V — 8 — mA
LED Driver Saturation
Voltage2,3 Vdd = 1.71 to 3.6 V
PS_LEDn = 0001
PS_LEDn = 0010
PS_LEDn = 0011
PS_LEDn = 0100
PS_LEDn = 0101
PS_LEDn = 0110
PS_LEDn = 0111
PS_LEDn = 1000
PS_LEDn = 1010
PS_LEDn = 1010
PS_LEDn = 1011
PS_LEDn = 1100
PS_LEDn = 1101
PS_LEDn = 1110
PS_LEDn = 1111
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
50
60
70
80
115
150
185
220
255
290
315
340
360
385
410
70
105
105
105
450
450
450
450
450
450
600
600
600
600
600
mV
LED1, LED2, LED3
Pulse Width tPS —25.6 30 µs
LED1, LED2, LED3,
INT, SCL, SDA
Leakage Current
VDD =3.3V –1 — 1 µA
Table 2. Performance Characteristics1 (Continued)
Parameter Symbol Test Condition Min Typ Max Unit
Notes:
1. Unless specifically stated in "Conditions", electrical data assumes ambient light levels < 1 klx.
2. Proximity-detection performance may be degraded, especially when there is high optical crosstalk, if the LED supply
and voltage drop allow the driver to saturate and current regulation is lost.
3. Guaranteed by design and chara c terization.
4. Represents the time during which the device is drawing a current equal to Iactive for power estimation purposes.
Assumes default settings.
Si1141/42/43
6 Rev. 1.41
LED1, LED2, LED3
Active Current ILEDx VDD = 3.3 V, single drive
VLEDn =1V, PS_LEDn=0001
VLEDn =1V, PS_LEDn=0010
VLEDn = 1 V, PS_LEDn = 0011
VLEDn =1 V, PS_LEDn=0100
VLEDn =1V, PS_LEDn=0101
VLEDn = 1 V, PS_LEDn = 0110
VLEDn = 1 V, PS_LEDn = 0111
VLEDn =1V, PS_LEDn=1000
VLEDn =1V, PS_LEDn=1001
VLEDn =1V, PS_LEDn=1010
VLEDn = 1 V, PS_LEDn = 1011
VLEDn = 1 V, PS_LEDn = 1100
VLEDn = 1 V, PS_LEDn = 1101
VLEDn = 1 V, PS_LEDn = 1110
VLEDn = 1 V, PS_LEDn = 1111
3.5
—
13
—
—
—
—
—
—
—
—
—
—
—
—
5.6
11.2
22.4
45
67
90
112
135
157
180
202
224
269
314
359
7
—
29
—
—
—
—
—
—
—
—
—
—
—
—
mA
Actively Measuring
Time4Single PS
ALS VIS + ALS IR
Two ALS plus three PS
—
—
—
155
285
660
—
—
—
µs
µs
µs
Visible Pho todiode
Response Sunlight
ALS_VIS_ADC_GAIN = 0
VIS_RANGE = 0
— 0.282 — ADC
counts/lux
2500K incandescent bulb
ALS_VIS_ADC_GAIN = 0
VIS_RANGE = 0
— 0.319 — ADC
counts/lux
“Cool white” fluorescent
ALS_VIS_ADC_GAIN = 0
VIS_RANGE = 0
— 0.146 — ADC
counts/lux
Infrared LED (875 nm)
ALS_VIS_ADC_GAIN = 0
VIS_RANGE = 0
— 8.277 — ADC
counts.m2/
W
Table 2. Performance Characteristics1 (Continued)
Parameter Symbol Test Condition Min Typ Max Unit
Notes:
1. Unless specifically stated in "Conditions", electrical data assumes ambient light levels < 1 klx.
2. Proximity-detection performance may be degraded, especially when there is high optical crosstalk, if the LED supply
and voltage drop allow the driver to saturate and current regulation is lost.
3. Guaranteed by design and chara c terization.
4. Represents the time during which the device is drawing a current equal to Iactive for power estimation purposes.
Assumes default settings.
Si1141/42/43
Rev. 1.41 7
Small Infrar ed Pho tod i-
ode Response Sunlight
ALS_IR_ADC_GAIN = 0
IR_RANGE = 0
—2.44 — ADC
counts/lux
2500K incandescent bulb
ALS_IR_ADC_GAIN = 0
IR_RANGE = 0
—8.46 — ADC
counts/lux
“Cool white” fluorescent
ALS_IR_ADC_GAIN = 0
IR_RANGE = 0
—0.71 — ADC
counts/lux
Infrared LED (875 nm)
ALS_IR_ADC_GAIN = 0
IR_RANGE = 0
—452.38 — ADC
counts.m2/
W
Large Infrared Photodi-
ode Response Sunlight
PS_ADC_GAIN = 0
PS_RANGE = 0
PS_ADC_MODE = 0
— 14.07 — ADC
counts/lux
2500K incandescent bulb
PS_ADC_GAIN = 0
PS_RANGE = 0
PS_ADC_MODE = 0
— 50.47 — ADC
counts/lux
“Cool white” fluorescent
PS_ADC_GAIN = 0
PS_RANGE = 0
PS_ADC_MODE = 0
—3.97 — ADC
counts/lux
Infrared LED (875 nm)
PS_ADC_GAIN = 0
PS_RANGE = 0
PS_ADC_MODE = 0
—2734 — ADC
counts.m2/
W
Visible Pho todiode
Noise All gain settings — 7 — ADC
counts
RMS
Small Infrar ed Pho tod i-
ode Noise All gain settings — 1 — ADC
counts
RMS
Table 2. Performance Characteristics1 (Continued)
Parameter Symbol Test Condition Min Typ Max Unit
Notes:
1. Unless specifically stated in "Conditions", electrical data assumes ambient light levels < 1 klx.
2. Proximity-detection performance may be degraded, especially when there is high optical crosstalk, if the LED supply
and voltage drop allow the driver to saturate and current regulation is lost.
3. Guaranteed by design and chara c terization.
4. Represents the time during which the device is drawing a current equal to Iactive for power estimation purposes.
Assumes default settings.
Si1141/42/43
8 Rev. 1.41
Large Infrared Photodi-
ode Noise All gain settings — 10 — ADC
counts
RMS
Visible Photodiode Off-
set Drift VIS_RANGE = 0
ALS_VIS_ADC_GAIN = 0
ALS_VIS_ADC_GAIN = 1
ALS_VIS_ADC_GAIN = 2
ALS_VIS_ADC_GAIN = 3
ALS_VIS_ADC_GAIN = 4
ALS_VIS_ADC_GAIN = 5
ALS_VIS_ADC_GAIN = 6
ALS_VIS_ADC_GAIN = 7
—–0.3
–0.11
–0.06
–0.03
–0.01
–0.008
–0.007
–0.008
—ADC
counts/°C
Small Infrar ed Pho tod i-
ode Offset Drift IR_RANGE = 0
IR_GAIN = 0
IR_GAIN = 1
IR_GAIN = 2
IR_GAIN = 3
—–0.3
–0.06
–0.03
–0.01
—ADC
counts/°C
SCL, SDA, INT Output
Low Voltage VOL I=4mA, V
DD > 2.0 V
I=4mA, V
DD < 2.0 V —
——
—VDD x 0.2
0.4 V
V
Temperature Sensor
Offset 25 °C — 11136 — ADC
counts
Temperature Sensor
Gain —35 — ADC
counts/°C
Table 2. Performance Characteristics1 (Continued)
Parameter Symbol Test Condition Min Typ Max Unit
Notes:
1. Unless specifically stated in "Conditions", electrical data assumes ambient light levels < 1 klx.
2. Proximity-detection performance may be degraded, especially when there is high optical crosstalk, if the LED supply
and voltage drop allow the driver to saturate and current regulation is lost.
3. Guaranteed by design and chara c terization.
4. Represents the time during which the device is drawing a current equal to Iactive for power estimation purposes.
Assumes default settings.
Si1141/42/43
Rev. 1.41 9
Table 3. I2C Timing Specifications
Parameter Symbol Min Typ Max Unit
Clock Frequency fSCL 0.09 — 3.4 MHz
Clock Pulse Width Low tLOW 160 — — ns
Clock Pulse Width High tHIGH 60 — — ns
Rise Time tR10 — 40 ns
Fall Time tF10 — 40 ns
Start Condition Hold Time tHD.STA 160 — — ns
Start Condition Setup Time tSU.STA 160 — — ns
Input Data Setup Time tSU.DAT 10 — — ns
Input Data Hold Time tHD.DAT 0——ns
Stop Condition Setup Time tSU.STO 160 — — ns
Table 4. Absolute Maximum Limits
Parameter Test Condition Min Typ Max Unit
VDD Supply Voltage –0.3 — 4 V
Operating Temperature –40 — 85 °C
Storage Temperature –65 — 85 °C
LED1, LED2, LED3 Voltage at VDD =0V, T
A < 85 °C –0.5 — 3.6 V
INT, SCL, SDA Voltage at VDD =0V, T
A < 85 °C –0.5 — 3.6 V
Maximum total current through
LED1, LED2 and LED3 ——500mA
Maximum total current through
GND ——600mA
ESD Rating Human Body Model
Machine Model
Charged-Device Model
—
—
—
—
—
—
2
225
2
kV
V
kV
Si1141/42/43
10 Rev. 1.41
1.2. Typical Performance Graphs
Figure 3. Proximity response using Kodak gray cards, PS_RANGE = 0, PS_ADC_GAIN = 0 (single
25.6s LED pulse), ± 22°LED view angle, 850 nm, 22.5 mW/sr, no overlay, 5 mm LED center to
Si114x center
Figure 4. ALS variability with different light sources
Si1141/42/43
Rev. 1.41 11
Figure 5. View angle, large photodiode rotated around the pin-5/pin-10 (“vertical”) axis
Figure 6. View angle, large photodiode rotated around “horizontal”axis and small photodiode
rotated around either axis
Si1141/42/43
12 Rev. 1.41
2. Functional Description
2.1. Introduction
The Si1141/42/43 is an active optical reflectance proximity detector and ambient light sensor whose operational
state is controlled through registers accessible through the I2C interface. The host can command the Si1141/42/43
to initiate on -deman d prox imity de tection or ambie nt light sensing. The host can also place the Si1141/42/43 in an
autonomous operational state where it performs measurements at set intervals and interrupts the host either after
each measurement is completed or whenever a set th reshold has been crossed. This results in an overall system
power saving allowing the host controller to operate longer in its sleep state instead of polling the Si1141/42/43. For
more deta ils, refer to “AN498: Si114x Designer's Guide”.
2.2. Proximity Sensing (PS)
The Si1141/42/43 has been optimized for use as either a dual-port or single-port active reflection proximity
detector. Over distances of less than 50 cm, the dual-port active reflection proximity detector has significant
advantages over single-port, motion-based infrared systems, which are only good for triggered events. Motion-
based infrared detectors identify objects within proximity, but only if they are moving. Single-port motion-based
infrared systems are ambiguous about stationary objects even if they are within the proximity field. The Si1141/42/
43 can reliably detect an object entering or exiting a specified proximity field, even if the object is n ot moving o r is
moving very slowly. However, beyond about 30–50 cm, even with good optical isolation, single-port signal
processing may be required due to static reflections from nearby objects, such as table tops, walls, etc. If motion
detection is acceptable, the Si1141/42/43 can achieve ranges of up to 50 cm, through a single product window.
For small objects, the dr op in reflectance is as much as the fourth po wer of the distance. This m eans that there is
less range ambiguity than with passive motion-based devices. For example, a sixteenfold change in an object's
reflectance means on ly a fifty-per c en t dr op in detection range.
The Si1143 can drive three separate infrared LEDs. When the three infrared LEDs are placed in an L-shaped
configuration, it is possible to triangulate an object within the three-dimensional proximity field. Thus, a touchless
user interface can be implemented with the aid of host software.
The Si1141/42/43 can initiate proximity sense measurements when explicitly commanded by the host or
periodically through an autonomous process. Refer to "3. Operational Modes" on page 17 for additional details of
the Si1141/42/43 's Op er at ion al M od es .
Whenever it is time to make a PS measurement , the Si1141/42/43 makes up to three measurements, depending
on what is enabled in the CHLIST parameter. Other ADC parameters for these measurements can also be
modified to allow proper operation under different ambient light conditions.
The LED choice is programmable for each of these thre e measurement s. By default, each measureme nt turns on a
single LED driver. However, the order of measurements can be easily reversed or even have all LEDs turn ed on at
the same time. Optiona lly, each proximity measurement can be co mpared against a host- prog ra mmabl e thresho ld.
With threshold settings for each PS channel, it is also possible for the Si1141/42/43 to notify the host whenever the
threshold has been crossed. This reduces the number of interrupts to the host, aiding in efficient software
algorithms.
The Si1141/42/43 can also generate an interrupt after a complete set of proximity measurements, ignoring any
threshold settings.
To support different power usage cases dynamically, the infrared LED current of each output is independently
programmable. The current can be programmed anywhere from a few to several hundred milliamps. Therefore, the
host can optim ize for proximit y detection pe rformance or fo r power saving dy namically. This fe ature can be us eful
since it allows the host to red uce the LED current on ce an object has entere d a proximity sphere, and the ob ject
can still be tracked at a lower current setting. Finally, the flexible current settings make it possible to control the
infrared LED currents with a controlled current sink, resulting in higher precision.
The ADC properties are programmable. For indoor operation, the ADC should be configured for low signal range
for best reflectance sensitivity. When under high ambient conditions, the ADC should be configured for high signal
level range operation.
Si1141/42/43
Rev. 1.41 13
When operating in the lower signal range, it is possible to saturate the ADC when the ambient light level is high.
Any overflow condition is reported in the RESPONSE register, and the corresponding data registers report a value
of 0xFFFF. The host can then adjust the ADC sensitivity. Note however that the overflow condition is not sticky. If
the light levels return to a range within the capabilities of the ADC, the corresponding data registers begin to
operate normally. However, the RESPONSE register will continue to hold the overflow condition until a NOP
command is received. Even if the RESPONSE register has an overflow condition, commands are still accepted
and processed.
Proximity detection ranges beyond 50 cm and up to several meters can be achieved without lensing by selecting a
longer integration time. The detection range may be increased further, even with high ambient light, by averaging
multiple measurements. Refer to “AN498: Si114x Designer's Guide” for more details.
2.3. Ambient Light
The Si1141/42/43 has photodiodes capable of measuring both visible and infrared light. However, the visible
photodiode is also influenced by infrared light. The measurement of illuminance requires the same spectral
response as the human eye. If an accurate lux measurement is desired, the extra IR response of the visible-light
photodiode must be compensated. Therefore, to allow the host to make c or rec t i on s t o the in fr ar ed light’s influence,
the Si1141/42/43 reports the infrared light measurement on a separate channel. The separate visible and IR
photodiodes lend themselves to a va riety of algo rithmic solutions. The host can then t ake these two me asurement s
and run an algorithm to derive an equivalent lux level as perceived by a human eye. Having the IR correction
algorithm running in the host allows for the most flexibility in adjusting for system-dependent variables. For
example, if the glass used in the system blocks visible light more than infrar ed light, the IR correction needs to be
adjusted.
If the host is not making any infrared corrections, the infrared measurement can be turned off in the CHLIST
parameter.
By default, the measurement parameters are optimized for indoor ambient ligh t levels where it is possible to detect
light levels as low as 6 lx. For operation under direct sunlight, the ADC can be programmed to operate in a high
signal operation so that it is possible to measure direct sunlight without overflowing the 16-bit result.
For low-light applications, it is possible to increase the ADC integration time. Normally, the integration time is
25.6 µs. By increasing this integration time to 410 µs, the ADC can detect light levels as low as 1 lx. The ADC can
be programmed with an integration time as high as 3.28 ms, allowing measurement to 100 mlx light levels. The
ADC integration time for the Visible Light Ambient measurement can be programmed independently of the ADC
integration time of the Infrared Light Ambient measurement. The independent ADC parameters allow operation
under glass covers having a higher transmittance to Infrared Light than Visible Light.
When operating in the lower signal range, or when the integration time is increased, it is possible to saturate the
ADC when the ambient light suddenly increases. Any overflow condition is reported in the RESPONSE register,
and the corresponding data registers report a valu e of 0xFFFF. Based on either of these two overflow indicators,
the host can adjust the ADC sensitivity. However, the overflow condition is not sticky. If the light levels return to a
range within the capabilities of the ADC, the corresponding data registers begin to operate normally. The
RESPONSE register will continue to hold the overflow condition until a NOP command is received. Even if the
RESPONSE register has an overflow condition, commands are still accepted and processed.
The Si1141/42/43 can initiate ALS measurements either when explicitly commanded by the host or periodically
through an autonomous process. Refer to "3. Operational Modes" on page 17 for additional details of the Si1141/
42/43's Operational Modes. The conversion frequency setting is programmable and independent of the Proximity
Sensor. This allows the Proximity Sensor and Ambient Light sensor to operate at different conversion rates,
increasing host co ntrol over the Si1141/42/43.
When operating autonomously, the ALS has a slightly different interrupt structure compared to the Proximity
Sensor. An interrupt can be generated to the host on every sample, or when the ambient light has ch anged.
The “Ambient Light Changed” interrupt is accomplished through two thresholds working together to implement a
window. As long as the ambient light stays within the window defined by the two thresholds, the host is not
interrupted. When the ambient light changes and either threshold is crossed, an interrupt is sent to the host,
thereby allowin g the h ost notifica tion th at the am bient lig ht has changed. This can be used by the host to trigger a
recalculation of the lux values.
Si1141/42/43
14 Rev. 1.41
The window can be applied to either the Visible Ambient Measurement, or the Infrared Ambient Measurement, but
not both. However, monitoring the ambient change in either channel should allow notification that the ambient light
level has changed.
Figure 7. Photodiode Spectral Response to Visible and Infrared Light (Indicative)
2.4. Host Interface
The host interface to the Si1141/42/43 consists of three pins:
SCL
SDA
INT
SCL and SDA are standard open-drain pins as r equired for I2C operation.
The Si1141/42/43 asserts the INT pin to inte rrupt the host processor. The INT pin is an open-drain output. A pull-up
resistor is needed for proper operation. As an open-drain output, it can be shared with other open-drain interrupt
sources in the system.
For proper operation, the Si1141/42/43 is expected to fully complete its Initialization Mode prior to any activity on
the I2C.
The INT, SCL, and SDA pins are designed so that it is possible for the Si1141/42/43 to enter the Off Mode by
software command without interfering with normal operation of other I2C devices on the bus.
The Si1141/42/43 I2C slave address is 0x5A. The Si1141/42/43 also responds to the global address (0x00) and the
global reset command (0x06). Only 7-bit I2C addressing is supported; 10-bit I2C addressing is not supported.
Conceptually, the I2C interface allows access to the Si1141/42/43 internal registers. Table 15 on page 29 is a
summary of these registers.
An I2C write access always begins with a start (or restart) condition. The first byte after the st art co ndition is the I 2C
address and a read-write bit. The second byte specifies the starting address of the Si1141/42/43 internal register.
Subsequent bytes are written to the Si1141/42/43 internal register sequentially until a stop condition is
encountered. An I2C write access with only two bytes is typically used to set up the Si1141/42/43 internal address
in preparation for an I2C read.
The I2C read access, like the I2C write access, begins with a start or restart condition. In an I2C read, the I2C
master then continues to clock SCK to allow the Si1141/42/43 to drive the I2C with the internal register contents.
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
250 350 450 550 650 750 850 950 1050
Wavelength(nm)
NormalizedPhotodiodeResponse
VIS
IR
Si1141/42/43
Rev. 1.41 15
The Si1141/42/43 also supports burst reads and burst writes. The burst read is useful in collecting contiguous,
sequential registers. The Si1141/42/43 register map was designed to optimize for burst reads for interrupt
handlers, and the burst writes are designed to facilitate rapid programming of commonly used fields, such as
thresholds re gis ter s.
The internal register addre ss is a six-bit (bit 5 to bit 0) plus an Autoin crem ent Disab le (on bit 6). T he Autoincr eme nt
Disable is turned off by default. Disabling the autoincrementing feature allows the host to poll any single internal
register repeatedly without having to keep updating the Si1141/42/43 internal address every time the register is
read.
It is recommended tha t th e h ost sh ou ld rea d PS or AL S mea su remen ts (in the I2C Register Map) wh en th e Si1141/
42/43 asserts INT. Although the host can read any of the Si1141/42/43's I2C registers at any time, care must be
taken when reading 2-byte measurements outside the context of an interrupt handler. The host could be reading
part of the 2-byte measurement when the internal sequencer is updating that same measurement coincidentally.
When this happens, the host could be reading a hybrid 2-byte quantity whose high byte and low byte are parts of
different samples. If the host must read these 2-byte registers outside the context of an interrupt handler, the host
should “double-check” a measurement if the measurement deviates significantly from a previous reading.
I2C Broadcast Reset: The I2C Broadcast Reset should be sent prior to any I2C register access to the Si114x. If
any I2C register or parameter has already been written to the Si114x when the I2C Broadcast Reset is issued, the
host must send a reset command and reinitialize the Si114x completely.
Figure 8. I2C Bit Timing Diagram
Figure 9. Host Interface Single Write
Figure 10. Host Interface Single Read
Figure 11. Host Interface Burst Write
Figure 12. Host Interface Burst Read
SLA6
SDA SLA5-0 R/W D7 D6-0
SCL
Slave Address + R/W Data ByteSTART ACK NACK STOP
Si1141/42/43
16 Rev. 1.41
Figure 13. Si1141/42/43 REG ADDRESS Format
Notes:
Gray boxes are driven by the h ost to the Si1141/42/43
White boxes are drive n by th e Si1141 /4 2/ 43 to the hos t
A = ACK or “acknowle dg e ”
N = NACK or “no acknowledge”
S = START condition
Sr = repeat START condition
P = STOP condition
AI = Disable Auto Increment when set
Si1141/42/43
Rev. 1.41 17
3. Operational Modes
The Si1141/42/43 can be in one of many operational modes at any one time. It is important to consider the
operational mode since the mode has an impact on the overall power consumption of the Si1141/42/43. The
various modes are:
Off Mode
Initialization Mode
Standby Mode
Forced Conversion Mode
Autonomous Mode
3.1. Off Mode
The Si1141/42/43 is in the Off Mode when VDD is either not connected to a power supply or if the VDD voltage is
below the stated VDD_OFF voltage described in the electrical specific ations. As long as the parameters stated in
Table 4, “Absolute Maximum Limits,” on page 9 are not violated, no current will flow through the Si1141/42/43. In
the Of f Mode, the Si1141/42/43 SCL and SDA pins d o not interfere with othe r I2C devices on the bus. The LED pins
will not draw current through the infrared diodes. Keeping VDD less than VDD_OFF is not intended as a method of
achieving lowest system current draw. The reason is that the ESD protection devices on the SCL, SDA and INT
pins also from a current p ath throu gh VDD. If VDD is grounded for example, the n, curren t flow from system power to
system groun d thro ug h th e SCL , SDA and INT pull- up resis to rs an d the ESD pr ot ect ion de vice s.
Allowing VDD to be less than VDD_OFF is intended to serve as a hardware method of resetting the Si1141/42/43
without a dedicated reset pin.
The Si1141/42/43 can also reenter the Off Mode upon receipt of either a general I2C reset or if a software reset
sequence is initiated. When one of these software methods is used to enter the Off Mode, the Si1141/42/43
typically proceeds directly from the Off Mode to the Initialization Mode.
3.2. Initialization Mode
When power is applied to VDD and is greater than the minimum VDD Supply Voltage stated in Table 1,
“Recommended Operating Conditions,” on page 4, the Si1141/42/43 enters its Initialization Mode. In the
Initialization Mode, the Si1141/42/43 performs its initial startup sequence. Since the I2C may not yet be active, it is
recommended that n o I 2C activity occur during this brief Initialization Mode period. The “St art-up time” specification
in Table 1 is the minimum recommended time the host needs to wait before sending any I2C accesses following a
power-up sequence. After Initialization Mode has completed, the Si1141/42/43 enters Standby Mode. The host
must write 0x17 to the HW_KEY register for proper operation.
3.3. Standby Mode
The Si1141/42/43 spends most of its time in Standby Mode. After the Si1141/42/43 completes the Initialization
Mode sequence, it enters Standby mode. While in Standby Mode, the Si1141/42/43 does not perform any Ambient
Light measurements or Proximity Detection functions. However, the I2C interface is active and ready to accept
reads and writes to the Si1141/42/43 registers. The internal Digital Sequence Controller is in its sleep state and
does not draw much power. In addition, the INT output retains its state until it is cleared by the host.
I2C accesses do not necessarily cause the Si1141/42/43 to exit the Standby Mode. For example, reading Si1141/
42/43 registers is accomplished without needing the Digital Sequence Controller to wake from its sleep state.
3.4. Forced Conversion Mode
The Si1141/42/43 can operate in Forced Conversion Mode under the specific command of the host processor. The
Forced Conversion Mode is entered if either the ALS_FORCE or the PS_FORCE command is sent. Upon
completion of the conversion, the Si1141/42/43 can generate an interrupt to the host if the corresponding interrupt
is enabled. It is possible to initiate both an ALS and multiple PS measurements with one command register write
access by using the PSALS_FORCE command.
Si1141/42/43
18 Rev. 1.41
3.5. Autonomous Operation Mode
The Si1141/42/43 can be placed in the Autonomous Operation Mode where measurements are performed
automatically without requiring an explicit host comma nd for ever y measureme nt. The PS_AUTO, ALS_AUTO and
PSALS_AUTO commands are used to place the Si1141/42/43 in the Autonomous Operation Mode.
The Si1141/42/43 updates the I2C registers for PS and ALS automatically. Each measurement is allocated a 16-bit
register in th e I2C map. It is possible to operate the Si1141/42/43 without interrupts. When doing so, the host poll
rate must be at least twice the frequency of the conversion rates for the host to always receive a new
measurement. The host can also choose to be notified when these new measurements are available by enabling
interrupts.
The conversion frequencies for the PS and ALS measurements are set up by the host prior to the PS_AUTO,
ALS_AUTO, or PSALS_AUTO commands. The host can set a PS conversion frequency different from the ALS
conversion frequency. However, they both need to be a multiple of the base conversion frequency in the
MEAS_RATE register in the I2C map.
The Si1141/42/43 can interrupt the host when the PS or ALS me asureme nts reach a pre-set thr eshol d. To assist in
the handling of interrupts the registers are arranged so that the interrupt handler can perform an I2C burst read
operation to read the necessary registers, beginning with the interrupt status register, and cycle through the ALS
data registers followed by the individual Proximity readings.
Si1141/42/43
Rev. 1.41 19
4. Programming Guide
4.1. Command and Response Structure
All Si1141/42/43 I2C regis ters (excep t writes to th e COMMAND r egister) ar e read or writ ten without waking up th e
internal sequen ce r. A complete list of the I2C registers can be found in "4.5. I2 C Registers" on page 29. In addition
to the I2C Registers, RAM parameters are memory locations maintained by the internal sequencer. These RAM
Parameters are accessible through a Command Protocol (see "4.6. Parameter RAM" on page 52). A complete list
of the RAM Parameters can be found in "4.6. Parameter RAM" on page 52.
The Si1141/42/43 can operate either in Forced Measurement or Autonomous Mode. When in Forced
Measurement mode, the Si1141/42/43 does not make any measurements unless the host specifically requests the
Si1141/42/43 to do so via specific commands (refer to the Section 3.2). The CHLIST p aramete r needs to be written
so that the Si1141/42/43 would know which measurements to make. The parameter MEAS_RATE, when zero,
places the internal sequencer in Forced Measurement mode. When in Forced Measurement mode, the internal
sequencer wakes up only when the host writes to the COMMAND register. The power consumption is lowest in
Forced Measurement mod e (MEAS_RATE = 0).
The Si1141/42/43 operates in Autonomous Operation mode when MEAS_RATE is non-zero. The MEAS_RATE
represents the time interval at which the Si1141/42/43 wakes up periodically. Once the internal sequencer has
awoken, the sequencer manages an internal PS Counter and ALS Counter based on the PS_RATE and
ALS_RATE registers.
When the internal PS counter has expired, up to three proximity measurements are made (PS1, PS2 and PS3)
depending on which measurements are enabled via the upper bits of the CHLIST Parameter. All three PS
measurement s are per formed, in seque nce, beginning with the PS1 measur ement channel. In the same way, when
the ALS counter has expired, up to three measurements are made (ALS_VIS, ALS_IR and AUX) depending on
which measurements are enabled via the upper bits of the CHLIST Parameter. All three measurements are made
in the following sequence: ALS_VIS, ALS_IR and AUX.
PS_RATE and ALS_R ATE are norma lly non-zero. A valu e of zero in PS_RATE or ALS_RATE causes the internal
sequencer to never perform that measurement group. Typically, PS_RATE or ALS_RATE represents a value of
one. A value of one essentially states that the specific measurement group is made every time the device wakes
up.
It is possible for both the PS Counter and ALS Counter to both expire at the same time. When that occurs, the PS
measurements are performed before the ALS measurements. When all measurements have been made, the
internal sequencer goes back to sleep until next time, as dictated by the MEAS_RATE parameter.
The operation of the Si1141/42/43 can be described as two me asurement groups bound by some common fa ctors.
The PS Measurem ent group consists of the three PS me asurements while the ALS Measurement group consists
of the Visible Light Ambient Measurement (ALS_VIS), the Infrared Light Ambient Measurement (ALS_IR) and the
Auxiliary measurement (AUX). Each measurement group has three measurements each. The Channel List
(CHLIST) parameter enables the specific measurements for that measurement grouping.
Each measurement (PS1, PS2, PS3, ALS_VIS, ALS_IR, AUX) are controlled through a combination of I2C
Register or Parameter RAM. Tables 7 to 9 below summarize the properties and resources used for each
measurement.
Si1141/42/43
20 Rev. 1.41
4.2. Command Protocol
The I2C map implements a bidirectional message box between the host and the Si1141/42/43 Sequencer. Host-
writable I2C registers facilitate host-to-Si1141/42/43 communication, while read-only I2C registers are used for
Si1141/42/43-to-host communication.
Unlike the other ho st-writ able I2C registe rs, the COMMAND register causes the internal sequ encer to wake up from
Standby mode to process the host request.
When a command is executed, the RESPONSE register is updated. Typically, when there is no error, the upper
four bits are zeroes. To allow command tracking, the lower four bit s impleme nt a 4-bit circular counter. In general, if
the upper nibble of the RESPONSE register is non-zero, this indicates an error or the need for special processing.
The PARAM_WR and PARAM_RD registers are additional mailbox registers.
In addition to the registers in the I2C map, there are environmental parameters accessible through the Command/
Response interface. These parameters are stored in the internal ram space. These parameters generally take
more I2C accesses to read and write. The Parameter RAM is described in "4.6. Parameter RAM" on page 52.
For every write to the Command register, the following sequence is required:
1. Write 0x00 to Command register to clear the Response register.
2. Read Response register and verify contents are 0x00.
3. Write Command value from Table 5 into Command register.
4. Read the Response register and verify contents are now non-zero. If contents are still 0x00, repeat this step.
Note: S tep 4 is not applicable to the Reset Command because the device will reset itself and does not increment the Response
register after reset. No Commands should be issued to the device for at least 1 ms after a Reset is issued.
The Response register will be incremented upon the successful completion of a Command. If the Response
register remains 0x00 for over 25 ms after the Command write, the entire Command process should be repeated
from Step 1.
Table 5. Command Register Summary
COMMAND Register PARAM_W
R Register PARAM_RD
Register Error Code in
RESPONSE Register Description
Name Encoding
PARAM_QUERY 100 aaaaa — nnnn nnnn Reads the parameter pointed to
by bitfield [4:0] and writes value
to PARAM_RD.
See Table 10 for paramete rs.
PARAM_SET 101 aaaaa dddd
dddd nnnn nnnn Sets parameter pointed by bit-
field [4:0] with value in
PARAM_WR, and writes value
out to PARAM_RD. See
Table 10 for parameters.
PARAM_AND 110 aaaaa dddd
dddd nnnn nnnn Perform s a bit -wise AND
between PARAM_WR and
Parameter poin te d by bitfield
[4:0], writes updated value to
PARAM_RD.
See Table 10 for paramete rs.
Si1141/42/43
Rev. 1.41 21
PARAM_OR 111 aaaaa dddd
dddd nnnn nnnn Performs a bit-wise OR of
PARAM_WR and parameter
pointed by bitfield [4:0], writes
updated value to PARAM_RD.
See Table 10 for parameters.
NOP 000 00000 — — Forces a zero into the
RESPONSE
register
RESET 000 00001 — — Performs a software reset of the
firmware
BUSADDR 000 00010 — — — Modifies I2C address
Reserved 000 00011 — — — —
Reserved 000 00100 — — — —
PS_FORCE 000 00101 — — Forces a single PS measure-
ment
ALS_FORCE 000 00110 — — Forces a single ALS measure-
ment
PSALS_FORCE 000 00111 — — Forces a single PS and ALS
measurement
Reserved 000 01000 — — — —
PS_PAUSE 000 01001 — — Pauses autonomous PS
ALS_PAUSE 000 01010 — — Pauses autonomous ALS
PSALS_PAUSE 000 01011 — — Pauses PS and ALS
Reserved 000 01100 — — —
PS_AUTO 000 01101 — — Starts/Restarts an autonomous
PS Loop
ALS_AUTO 000 01110 — — Starts/Restarts an autonomous
ALS Loop
PSALS_AUTO 000 01111 — — S tarts /Rest art s auton omous ALS
and PS loop
Reserved 000 1xxxx — — — —
Table 5. Command Register Summary (Continued)
COMMAND Register PARAM_W
R Register PARAM_RD
Register Error Code in
RESPONSE Register Description
Name Encoding
Si1141/42/43
22 Rev. 1.41
Table 6. Response Register Error Codes
RESPONSE Register Description
0000 cccc NO_ERROR. The lower bit is a circul ar counter and is incremented every time a
command has completed. This allows the host to keep track of commands sent to
the Si1141/42/43. The circular counter ma y be cleared using the NOP command.
1000 0000 INVALID_SETTING. An invalid setting was encountered.
Clear using the NOP command.
1000 1000 PS1_ADC_OVERFLOW. Indicates proximity channel one conversion overflow.
1000 1001 PS2_ADC_OVERFLOW. Indicates proximity channel two conversion overflow.
1000 1010 PS3_ADC_OVERFLOW. Indicates proximity channel three conversion overflow.
1000 1100 ALS_VIS_ADC_OVERFLOW. Indicates visible ambient light channel conversion
overflow.
1000 1101 ALS_IR_ADC_OVERFLOW. Indicates infrared ambient light channel conversion
overflow.
1000 1110 AUX_ADC_OVERFLOW. Indicates auxiliary channel conversion overflow.
Si1141/42/43
Rev. 1.41 23
4.3. Resource Summary
Table 7. Resource Summary for Interrupts and Threshold Checking
Measurement
Channel Channel
Enable Interrupt Status
Output Interrupt Enable Interrupt Mode Threshold
Registers Threshold
Hysteresis History
Checking Autonomous Measurement
Time Base
Proximity
Sense 1 EN_PS
1 in
CHLIST
[0]
PS1_INT in
IRQ_STA-
TUS[2]
PS1_IE in
IRQ_EN-
ABLE[2]
PS1_IM[1:0] in
IRQ_-
MODE1[5:4]
PS1_TH[7:0] PS_HYST[7:
0] PS_HIS-
TORY[7:0] MEAS_RATE[
7:0] PS_RATE[7:
0]
Proximity
Sense 2 EN_PS
2 in
CHLIST
[1]
PS2_INT in
IRQ_STA-
TUS[3]
PS2_IE in
IRQ_EN-
ABLE[3]
PS2_IM[1:0] in
IRQ_-
MODE1[7:6]
PS2_TH[7:0]
Proximity
Sense 3 EN_PS
3 in
CHLIST
[2]
PS3_INT in
IRQ_STA-
TUS[4]
PS3_EN in
IRQ_EN-
ABLE[4]
PS3_IM[1:0] in
IRQ_-
MODE2[1:0]
PS3_TH[7:0]
ALS Visible EN_AL
S_VIS
in
CHLIST
[4]
ALS_INT[1:0]
in IRQ_STA-
TUS[1:0]
ALS_IE[1:0] in
IRQ_EN-
ABLE[1:0]
ALS_IM[2:0] in
IRQ_-
MODE1[2:0]
ALS_LOW_TH[7
:0] /
ALS_HI_TH[7:0]
ALS_HYST[
7:0] ALS_HIS-
TORY[7:0] ALS_RATE[
7:0]
ALS IR EN_AL
S_IR in
CHLIST
[5]
Auxiliary
Measure-
ment
EN_AU
X in
CHLIST
[6]
——— ———
24 Rev. 1.41
Si1141/42/43
Table 8. Resource Summary for LED Choice and ADC Parameters
Measure
ment
Channel
LED
Selection ADC Mode ADC Output ADC Input
Source ADC Recovery
Count ADC High
Signal Mode ADC Clock
Divider ADC
Alignment ADC
Offset
Proximity
Sense 1 PS1_LED[2:
0] in
PSLED12_S
ELECT[2:0]
PS_ADC_-
MODE
in
PS_ADC_-
MISC[2]
PS1_DA-
TA1[7:0] /
PS1_DA-
TA0[7:0]
PS1_ADC-
MUX[7:0] PS_ADC_REC in
PS_AD-
C_COUNTER
[6:4]
PS_RANGE in
PS_ADC_-
MISC[5]
PS_AD-
C_GAIN[3:0] PS1_ALIGN
in PS_EN-
CODING[4]
ADC_
OFFSET
[7:0]
Proximity
Sense 2 PS2_LED[2:
0] in
PSLED12_S
ELECT[6:4]
PS2_DA-
TA1[7:0] /
PS2_DA-
TA0[7:0]
PS2_ADC-
MUX[7:0] PS2_ALIGN
in PS_EN-
CODING[5]
Proximity
Sense 3 PS3_LED[2:
0] in
PSLED3_SE
LECT[2:0]
PS3_DA-
TA1[7:0] /
PS3_DA-
TA0[7:0]
PS3_ADC-
MUX[7:0] PS3_ALIGN
in PS_EN-
CODING[6]
ALS Visi-
ble — — ALS_VIS_-
DATA1 /
ALS_VIS_-
DATA0
VIS_ADC_REC
in ALS_VIS_AD-
C_COUNTER
[6:4]
VIS_RANGE in
ALS_VIS_AD-
C_MISC[5]
ALS_VIS_AD-
C_GAIN [3:0] ALS_VIS_AL
IGN in
ALS_EN-
CODING[4]
ALS IR ALS_IR_DA-
TA1[7:0] /
ALS_IR_DA-
TA0[7:0]
IR_ADC_REC in
ALS_IR_AD-
C_COUNTER
[6:4]
IR_RANGE in
ALS_IR_ADC_-
MISC[5]
ALS_IR_AD-
C_GAIN [3:0] ALS_IR_ALI
GN in
ALS_EN-
CODING[5]
Auxiliary
Measure-
ment
AUX_DA-
TA1[7:0] /
AUX_DA-
TA0[7:0]
AUX_ADC-
MUX[7:0] ————
Si1141/42/43
Rev. 1.41 25
The interrupts of the Si1141/42/43 are controlled through the INT_CFG, IRQ_ENABLE, IRQ_MODE1,
IRQ_MODE2 and IRQ_STATUS registers.
The INT hardware pin is enabled through the INT_OE bit in the INT_CFG register. The hardware essentially
performs an AND function between the IRQ_ENABLE register and IRQ_STATUS register. After this AND function,
if any bits are set, the INT pin is asserted. The INT_MODE bit in the INT_CFG register is conceptually a meth od of
determining how the INT pin is deasserted. When INT_MODE = 0, the host is responsible for clearing the interrupt
by writing to the IRQ_STATUS register. When the specific bits of the IRQ _STATUS re gister is written with '1 ', that
specific IRQ_STATUS bit is cleared.
Typically, the host software is expected to read the IRQ_STATUS register, stores a local copy, and then writes the
same value back to the IRQ_STATUS to clear the interrupt source. Unless specifically stated, INT_MODE should
be zero for normal interrupt handling operation. In summary, the INT_CFG register is normally written with '1'.
The IRQ_MODE1, IRQ_MODE2 and IRQ_ENABLE registers work together to define how the internal sequencer
sets bits in the IRQ_STATUS register (and as a consequence, asserting the INT pin).
The PS1 interrupt s ar e d escribed in Table 10. The PS2 interrupts are described in Table 11. The PS3 interrupts are
described in Table 12. The ALS interrupts are described in Table 13, and the Command Interface interrupts are
described in Table 14.
Table 9. Resource Summary for Hardware Pins
Pin Name LED Current Drive Output Drive Disable Analog Voltage Input
Enable
LED1 LED1_I in PSLED12[3:0] ANA_IN_KEY[31:0]
LED2 LED2_I in PSLED12[7:4] HW_KEY[7:0] ANA_IN_KEY[31:0]
LED3 LED3_I in PSLED3[3:0] HW_KEY[7:0]
INT INT_OE in INT_CFG[0] ANA_IN_KEY[31:0]
Si1141/42/43
26 Rev. 1.41
Table 10. PS1 Channel Interrupt Resources
IRQ_ENABLE[2] IRQ_MODE1[5:4] Description
PS1_IE PS1_IM[1:0]
0 0 0 No PS1 Interrupts
1 0 0 PS1_INT set after every PS1 sample
1 0 1 PS1_INT set whenever PS1 threshold (PS1_TH) is crossed
1 1 1 PS1_INT set whenever PS1 sample is above PS1 threshold (PS1_TH)
Note: There is hysteresis applied (PS_HYST) and history checking (PS_HISTORY). PS_HYST is encoded in 8-bit
compressed format. In the Si114x, PS1_TH is also encoded in compressed format.
Table 11. PS2 Channel Interrupt Resources
IRQ_ENABLE[3] IRQ_MODE1[7:6] Description
PS2_IE PS2_IM[1:0]
0 0 0 No PS2 Interrupts
1 0 0 PS2_INT set after every PS2 sample
1 0 1 PS2_INT set whenever PS2 threshold (PS2_TH) is crossed
1 1 1 PS2_INT set when PS2 sample is above PS2 threshold (PS2_TH)
Note: There is hysteresis applied (PS_HYST) and history checking (PS_HISTORY). PS_HYST is encoded in 8-bit
compressed format. In the Si114x, PS2_TH is also encoded in compressed format.
Table 12. PS3 Channel Interrupt Resources
IRQ_ENABLE[4] IRQ_MODE2[1:0] Description
PS3_IE PS3_IM[1:0]
0 0 0 No PS3 Interrupts
1 0 0 PS3_INT set after every PS3 sample
1 0 1 PS3_INT set whenever PS3 threshold (PS3_TH) is crossed
1 1 1 PS3_INT set whenever PS3 sample is above PS3 threshold (PS3_TH)
Note: There is hysteresis applied (PS_HYST) and history checking (PS_HISTORY). PS_HYST is encoded in 8-bit
compressed format. In the Si114x, PS3_TH is also encoded in compressed format.
Si1141/42/43
Rev. 1.41 27
Table 13. Ambient Light Sensing Interrupt Resources
IRQ_ENABLE[1:0] IRQ_MODE1[2:0] Description
ALS_IE[1:0] ALS_IM[2:0]
00000No ALS Interrupts
0 1 0 0 0 ALS_INT [0] set after every ALS_VIS sample1
x 1 x 0 1 Monitors ALS_VIS, ALS_INT [0] upon exiting region
between low and high thresholds (ALS_LOW_TH and
ALS_HI_TH)
1 x 1 0 x Monitors ALS_VIS, ALS_INT [1] set upon entering region
between low and high thresholds (ALS_LOW_TH and
ALS_HI_TH)
x 1 x 1 1 Monitors ALS_IR, ALS_INT [0] set upon exiting region
between low and high thresholds (ALS_LOW_TH and
ALS_HI_TH)
1 x 1 1 x Monitors ALS_IR, ALS_INT [1] set upon entering region
between low and high thresholds (ALS_LOW_TH and
ALS_HI_TH)
Notes:
1. For ALS_IR channel, interrupts per sample is not possible without also enabling ALS_VIS
2. All other combinations are invalid and may result in unintended operation
3. There is hysteresis applied (ALS_TH) and history checki ng (ALS_HISTORY). ALS_HYST is encoded in 8-bit
compressed format.
4. In the Si114x, ALS_LOW_TH and ALS_HI_TH are also encoded in compressed format.
Table 14. Command Interrupt Resources
IRQ_ENABLE[5] IRQ_MODE2[3:2] Description
CMD_IE CMD_IM[1:0]
0 x 0 No CMD Interrupts
1 x 0 CMD_INT set when there is a new RESPONSE
1 x 1 CMD_INT set when there is a new error code in
RESPONSE
Si1141/42/43
28 Rev. 1.41
4.4. Signal Path Software Model
The following diagram gives an overview of the signal paths, along with the I2C register and RAM Parameter bit
fields that control them. Sections with detailed descriptions of the I2C registers and Parameter RAM follow.
Figure 14. Signal Path Programming Model
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PS1_ALIGN
16
ALS_IR_ALIGN
PS1_ADCMUX
16
16
16
16
16
AUX_ADCMUX
PS_RANGE
PS_ADC_GAIN
PS_ADC_REC
PS_RATE
PS_RANGE
PS_ADC_GAIN
PS_ADC_REC
PS_RATE
PS_RANGE
PS_ADC_GAIN
PS_ADC_REC
PS_RATE
VIS_RANGE
ALS_VIS_ADC_GAIN
ALS_VIS_ADC_REC
ALS_RATE
IR_RANGE
ALS_IR_ADC_GAIN
ALS_IR_ADC_REC
ALS_RATE
ALS_VIS_ALIGN
PS2_ALIGN
PS3_ALIGN
PS2_ADCMUX
PS3_ADCMUX
Ref.
Ref.
Ref.
ADC_OFFSET
ADC_OFFSET
ADC_OFFSET
ADC_OFFSET
ADC_OFFSET
16
ADC_OFFSET
EN_AUX
EN_ALS_IR
EN_ALS_VIS
EN_PS3
EN_PS2
EN_PS1
ALS_IR_ADCMUX
PS1_DATA
PS2_DATA
PS3_DATA
ALS_VIS_DATA
ALS_IR_DATA
AUX_DATA
Vdd
Vdd
Vdd
Vdd
GND
GND
GND
GND
GND
GND
Range
Analog Digital
Gain
Recov. time
Rate
Align
Small visibleSmall visible
Select
0
2
3
6
0x25
Out
0x65
0x75
In
Sum
Offset
Enable
Select
Out
0x65
0x75
Select
0
2
3
6
0x25
Out
0x65
0x75
In
Sum
Offset
Enable
Range
Analog Digital
Gain
Recov. time
Rate
Align
Range
Analog Digital
Gain
Recov. time
Rate
Align
In
Sum
Offset
Enable
Range
Analog Digital
Gain
Recov. time
Rate
Align
Select
0
2
3
6
0x25
Out
0x65
0x75
Analog Digital
Temperature
sensor
Temperature
sensor
Range
Analog Digital
Gain
Recov. time
Rate
Align
In
Sum
Offset
Enable
In
Sum
Offset
Enable
Large IRLarge IR
Select
Out
0
3
Small IRSmall IR
In
Sum
Offset
Enable
Si1141/42/43
Rev. 1.41 29
4.5. I2C Registers
Table 15. I2C Register Summary
I2C Register
Name Address 7 6 5 4 3 2 1 0
PART_ID 0x00 PART_ID
REV_ID 0x01 REV_ID
SEQ_ID 0x02 SEQ_ID
INT_CFG 0x03 INT_-
MODE INT_O
E
IRQ_ENABLE 0x04 CMD_IE PS3_IE PS2_IE PS1_IE ALS_IE
IRQ_MODE1 0x05 PS2_IM PS1_IM ALS_IM
IRQ_MODE2 0x06 CMD_IM PS3_IM
HW_KEY 0x07 HW_KEY
MEAS_RATE 0x08 MEAS_RATE
ALS_RATE 0x09 ALS_RATE
PS_RATE 0x0A PS_RATE
ALS_LOW_TH0 0x0B ALS_LOW_TH0
ALS_LOW_TH1 0x0C ALS_LOW_TH1
ALS_HI_TH0 0x0D ALS_HI_TH0
ALS_HI_TH1 0x0E ALS_HI_TH1
PS_LED21 0x0F LED2_I LED1_I
PS_LED3 0x10 LED3_I
PS1_TH0 0x11 PS1_TH0
PS1_TH1 0x12 PS1_TH1
PS2_TH0 0x13 PS2_TH0
PS2_TH1 0x14 PS2_TH1
PS3_TH0 0x15 PS3_TH0
PS3_TH1 0x16 PS3_TH1
PARAM_WR 0x17 PARAM_WR
COMMAND 0x18 COMMAND
RESPONSE 0x20 RESPONSE
Si1141/42/43
30 Rev. 1.41
IRQ_STATUS 0x21 CMD_IN
TPS3_IN
TPS2_IN
TPS1_IN
TALS_INT
ALS_VIS_DATA0 0x22 ALS_VIS_DATA0
ALS_VIS_DATA1 0x23 ALS_VIS_DATA1
ALS_IR_DATA0 0x24 ALS_IR_DATA0
ALS_IR_DATA1 0x25 ALS_IR_DATA1
PS1_DATA0 0x26 PS1_DATA0
PS1_DATA1 0x27 PS1_DATA1
PS2_DATA0 0x28 PS2_DATA0
PS2_DATA1 0x29 PS2_DATA1
PS3_DATA0 0x2A PS3_DATA0
PS3_DATA1 0x2B PS3_DATA1
AUX_DATA0 0x2C AUX_DATA0
AUX_DATA1 0x2D AUX_DATA1
PARAM_RD 0x2E PARAM_RD
CHIP_STAT 0x30 RUN-
NING SUS-
PEND SLEEP
ANA_IN_KEY 0x3B–
0x3E ANA_IN_KEY
Table 15. I2C Register Summary (Continued)
I2C Register
Name Address 7 6 5 4 3 2 1 0
Si1141/42/43
Rev. 1.41 31
Reset value = 0100 0001 (Si1141)
Reset value = 0100 0010 (Si1142)
Reset value = 0100 0011 (Si1143)
Reset value = 0000 0000
Reset value = 0000 1000
PART_ID @ 0x00
Bit 76543210
Name PART_ID
Type R
REV_ID @ 0x1
Bit 76543210
Name REV_ID
Type R
SEQ_ID @ 0x02
Bit 76543210
Name SEQ_ID
Type R
Bit Name Function
7:0 SEQ_ID Sequencer Revision.
0x01 Si114x-A01 (MAJOR_SEQ = 0, MINOR_SEQ = 1)
0x02 Si114x-A02 (MAJOR_SEQ = 0, MINOR_SEQ = 2)
0x03 Si114x-A03 (MAJOR_SEQ = 0, MINOR_SEQ = 3)
0x08 Si114x-A10 (MAJOR_SEQ = 1, MINOR_SEQ = 0)
0x09 Si114x-A11 (MAJOR_SEQ = 1, MINOR_SEQ = 1)
Si1141/42/43
32 Rev. 1.41
Reset value = 0000 0000
INT_CFG @ 0x03
Bit 765432 1 0
Name INT_MODE INT_OE
Type RW RW
Bit Name Function
7:2 Reserved Reserved.
1INT_MODEInterrupt Mode.
The INT_MODE describes ho w the bits in the IRQ_STATUS Registers are cleared.
0: The IRQ_STATUS Register bits are set by the internal sequencer and are sticky. It
is the host's responsibility to clear the interrupt status bit s in the IRQ_STATUS register
to clear the interrupt.
1: If the Parameter Field PSx_IM = 11, the internal sequencer clears the INT pin auto-
matically.
0INT_OEINT Output Enable.
INT_OE controls the INT pin drive
0: INT pin is never drive n
1: INT pin driven low whenever an IRQ_STATUS and its corresponding IRQ_ENABLE
bits match
Si1141/42/43
Rev. 1.41 33
Reset value = 0000 0000
IRQ_ENABLE @ 0x04
Bit76543210
Name CMD_IE PS3_IE PS2_IE PS1_IE ALS_IE
Type RW RW RW RW RW
Bit Name Function
7:6 Reserved Reserved.
5CMD_IECommand Interrupt Enable.
Enables interr upts based on COMMAND/RESPONSE activity.
0: INT never asserts due to COMMAND/RESPONSE interface activity.
1: Assert INT pin whenever CMD_INT is set by the intern al sequencer.
4 PS3_IE PS3 Interrupt Enable.
Enables interrupts based on PS3 Channel Activity.
0: INT never asserts due to PS3 Channel activity.
1: Assert INT pin whenever PS3_INT is set by the internal sequencer.
3 PS2_IE PS2 Interrupt Enable.
Enables interrupts based on PS2 Channel Activity.
0: INT never asserts due to PS2 Channel activity.
1: Assert INT pin whenever PS2_INT is set by the internal sequencer.
2 PS1_IE PS1 Interrupt Enable.
Enables interrupts based on PS1 Channel Activity.
0: INT never asserts due to PS1 Channel activity.
1: Assert INT pin whenever PS1_INT is set by the internal sequencer.
1:0 ALS_IE ALS Interrupt Enable.
Enables interrupts based on ALS Activity.
00: INT never asserts due to ALS activity.
1x: Assert INT pin whenever ALS_INT[1] bit is set by the internal sequencer.
x1: Assert INT pin whenever ALS_INT[0] is set by the internal sequencer.
Si1141/42/43
34 Rev. 1.41
Reset value = 0000 0000
IRQ_MODE1 @ 0x05
Bit 76543210
Name PS2_IM PS1_IM ALS_IM
Type RW RW RW
Bit Name Function
7:6 PS2_IM PS2 Interr upt M od e ap pl ie s only whe n PS2_I E is also set .
00: PS2_INT is set whenever a PS2 measurement has completed.
01: PS2_INT is set whenever the current PS2 measurement crosses the PS2_TH
threshold.
11: PS2_INT is set whenever the current PS2 measurement is greater than the
PS2_TH threshold .
5:4 PS1_IM PS1 Interr upt M od e ap pl ie s only whe n PS1_I E is also set .
00: PS1_INT is set whenever a PS1 measurement has completed.
01: PS1_INT is set whenever the current PS1 measurement crosses the PS1_TH
threshold.
11: PS1_INT is set whenever the current PS1 measurement is greater than the
PS1_TH threshold .
3 Reserved Reserved.
2:0 ALS_IM ALS Interrupt Mode function is defined in conjunction with ALS_IE[1:0].
ALS_IE[1:0] / ALS_ IM[2:0]:
00 / 000: Neither ALS_INT[1] nor ALS_INT[0] is ever set.
01 / 000: ALS_INT[0] sets after every ALS_VIS sample.
x1 / x01: Monitors ALS_VIS channel, ALS_INT[0] asserts if measurem ent exits windo w
between ALS_LOW_TH and ALS_HIGH_TH.
x1 / x11: Monitors ALS_IR channel, ALS_INT[0] asserts if measurement exits window
between ALS_LOW_TH and ALS_HIGH_TH.
1x /10x: Monitors ALS_VIS channel, ALS_INT[1] asserts if measurement enters win-
dow between ALS _L OW _T H an d ALS_H IGH _T H.
1x /11x: Monitors ALS_IR channel, ALS_INT[1] asserts if measurement enters window
between ALS_LOW_TH and ALS_HIGH_TH.
Note: The ALS_IM descri ption apples only to sequencer revisions A03 or later.
Si1141/42/43
Rev. 1.41 35
Reset value = 0000 0000
Reset value = 0000 0000
IRQ_MODE2 @ 0x06
Bit76543210
Name CMD_IM PS3_IM
Type RW RW
Bit Name Function
7:4 Reserved Reserved.
3:2 CMD_IM Command Interrupt Mode applies only when CMD_IE is also set.
00: CMD_INT is set whenever the RESPONSE register is written.
01: CMD_INT is set whenever the RESPONSE register is written with an error code (MSB
set).
1x: Reserved.
1:0 PS3_IM PS3 Interrupt Mode applies only when PS3_IE is also set.
00: PS3_INT is set whenever a PS3 measurement has completed.
01: PS3_INT is set whenever th e current PS3 measurement crosses the PS3_TH threshold.
11: PS3_INT is set whenever the current PS3 measurement is greater than the PS3_TH
threshold.
HW_KEY @ 0x07
Bit76543210
Name HW_KEY
Type RW
Bit Name Function
7:0 HW_KEY The system must write the value 0x17 to this register for proper Si114x operation.
Si1141/42/43
36 Rev. 1.41
Reset value = 0000 0000
MEAS_RATE @ 0x08
Bit 76543210
Name MEAS_RATE
Type RW
Bit Name Function
7:0 MEAS_RATE MEAS_RATE is an 8-bit compressed value representing a 16-bit integer. The
uncompressed 16-bit value, when multiplied by 31.25 us, represents the time dura-
tion between wake-up periods where measurements are made.
Example Values:
0x00: Turns off any internal oscillator and disables autonomous measurement. Use
this setting to achieve lowest VDD current draw for systems making use of only
forced measurements.
0x01-0x17: These values are not allowed.
0x84: The device wakes up every 10 ms (0x140 x 31.25 µs)
0x94: The device wakes up every 20 ms (0x280 x 31.25 µs)
0xB9: The device wakes up every 100 ms (0x0C80 x 31.25 µs)
0xDF: The device wakes up every 496 ms (0x3E00 x 31.25 µs)
0xFF: The device wakes up every 1.984 seconds (0xF800 x 31.25 µs)
Please refer to “AN498: Si114x Designer’s Guide”, Section 5.4 “Compression
Concept.”
Si1141/42/43
Rev. 1.41 37
Reset value = 0000 0000
ALS_RATE @ 0x09
Bit 76543210
Name ALS_RATE
Type RW
Bit Name Function
7:0 ALS_RATE ALS_RATE is an 8-bit compressed value representing a 16-bit multiplier. This multi-
plier, in conjunction with the MEAS_RATE time, represents how often ALS Measure-
ments are made. For a given ALS measurement period, MEAS_RATE should be as
high as possible and ALS_RATE as low as possible in order to optimize power con-
sumption.
Example Values:
0x00: Autonomo us AL S Measu re m ents are not ma de .
0x08: ALS Measurements made every time the device wakes up.
(0x0001 x timeValueOf(MEAS_RATE))
0x32: ALS Measurements made every 10 times the device wakes up.
(0x000A x timeValueOf(MEAS_RATE)
0x69: ALS Measurements made every 100 times the device wakes up.
(0x0064 x timeValueOf(MEAS_RATE)
Please refer to “AN498: Si114x Designer's Guide”, Section 5.4 “Compression
Concept.”
Si1141/42/43
38 Rev. 1.41
Reset value = 0000 0000
Reset value = 0000 0000
PS_RATE @ 0x0A
Bit76543210
Name PS_RATE
Type RW
Bit Name Function
7:0 PS_RATE PS_RATE is an 8-bit compressed value representing a 16-bit multiplier. This multiplier,
in conjunction with the MEAS_RATE time, represents how often PS Measurements are
made. For a given proximity measurement period, MEAS_RATE should be as high as
possible and PS_RATE as low as possible in order to optimize power consumption.
Example Values:
0x00: Autonomous PS Measurements are not made
0x08: PS Measurements made every time the device wakes up
(0x0001 x timeValueOf(MEAS_RATE))
0x32: PS Measurements made every 10 times the device wakes up
(0x000A x timeValueOf(MEAS_RATE)
0x69: PS Measur em ents made ev er y 10 0 time s th e device w akes up
(0x0064 x timeValueOf(MEAS_RATE)
Please refer to “AN498: Si114x Designer’s Guide”, Section 5.4 “Compression Concept.”
ALS_LOW_TH0: ALS_LOW_TH Data Word Low Byte @ 0x0B
Bit7 6543210
Name ALS_LOW_TH[7:0]
Type RW
Bit Name Function
7:0 ALS_LOW_TH[7:0] ALS_LOW_TH is a 16-bit threshold value. When used in conjunction with
ALS_HI_TH, it forms a window region applied to either ALS_VIS or ALS_IR
measurements for interrupting the host. Once autonomous measurements have
started, modification to ALS_LOW_TH should be preceded by an ALS_PAUSE or
PSALS_PAUSE command. For revisions A10 and below, ALS_LOW_TH uses an 8-
bit compressed format. Refer to “AN498: Si114x Designer’s Guide”, Section 5.4
“Compression Concept.”
Si1141/42/43
Rev. 1.41 39
Reset value = 0000 0000
Reset value = 0000 0000
ALS_LOW_TH1:ALS_LOW_TH Data Word High Byte @ 0x0C
Bit7 6543210
Name ALS_LOW_TH[15:8]
Type RW
Bit Name Function
7:0 ALS_LOW _T H[ 15 :8 ] ALS_LOW_TH is a 16-b it thr e shold value. When used in conjunction with
ALS_HI_TH, it forms a window region applied to either ALS_VIS or ALS_IR mea-
surements for inter rupting th e host. Once a utono mous measurem ents have sta rted,
modification to ALS_LOW_TH should be preceded by an ALS_PAUSE or
PSALS_PAUSE command. For revisions A10 and below, ALS_LOW_TH uses an 8-
bit compressed format. Refer to “AN498: Si114x Designer's Guide”, Section 5.4
"Compressio n Concept."
ALS_HI_TH0: ALS_HI_TH Data Word Low Byte @ 0x0D
Bit7 6543210
Name ALS_HI_TH[7:0]
Type RW
Bit Name Function
7:0 ALS_HI_TH[7:0] ALS_HI_TH is a 16-bit threshold value. When used in conjunction with
ALS_LOW_TH, it forms a win do w region applied to either ALS_VIS or ALS_IR mea-
surements fo r in te rr upting th e h ost. Once auton omo us measu remen ts have star ted,
modification to ALS_HI_TH should be preceded by an ALS_PAUSE or
PSALS_PAUSE command. For revisions A10 and below, ALS_HI_TH uses an 8-bit
compressed format. Refer to “AN498: Si114x Designer's Guide”, Section 5.4 “Com-
pression Concept.”
Note: This register available for sequencer revisions A03 or later.
Si1141/42/43
40 Rev. 1.41
Reset value = 0000 0000
Reset value = 0000 0000
ALS_HI_TH1: ALS_HI_TH Data Word High Byte @ 0x0E
Bit76543210
Name ALS_HI_TH[15:8]
Type RW
Bit Name Function
7:0 ALS_HI_TH[15:8] ALS_HI_TH is a 16-bit threshold value. When used in co njunctio n with AL S_LOW_ TH,
it forms a window region applied to either ALS_VIS or ALS_IR measurements for inter-
rupting the host. Once autonomous measurements have started, modification to
ALS_HI_TH should be preceded by an ALS_P AUSE or PSALS_PAUSE command. For
revisions A10 and below, ALS_HI_TH uses an 8-bit compressed format. Refer to
“AN498: Si11 4x Designer's Guide” Section 5.4 "Compression Concept."
Note: ‘
PS_LED21 @ 0x0F
Bit76543210
Name LED2_I LED1_I
Type RW RW
Bit Name Function
7:4 LED2_I LED2_I Represents the irLED current sunk by the LED2 pin during a PS measurement.
On the Si1141, these bits must be set to zero.
3:0 LED1_1 LED1_I Represents the irLED current sunk by the LED1 pin during a PS measurement.
LED3_I, LED2_I, and LED1_I current encoded as follows:
0000: No current
0001: Minimum current
1111: Maximum current
Refer to Ta ble 2, “Performance Characteristics1,” on page 4 for LED current values.
PS_LED3 @ 0x10
Bit 76543210
Name LED3_I
Type RW
Si1141/42/43
Rev. 1.41 41
Reset value = 0000 0000
Reset value = 0000 0000
Reset value = 0000 0000
Bit Name Function
7:4 Reserved Reserved.
3:0 LED3_I LED3_I Represents the irLED current sunk by the LED3 pin during a PS measure-
ment. See PS_LED21 Register for additional details.
On the Si1141 and Si1142, these bits must be set to zero.
PS1_TH0: PS1_TH Data Word Low Byte @ 0x11
Bit76543210
Name PS1_TH[7:0]
Type RW
Bit Name Function
7:0 PS1_TH[7:0] PS1_TH is a 16-bit threshold value. It is compared to PS1 measurements during
autonomous operation for interrupting the host. If the threshold register is updated
while a measurement is in progress, it is possible that an invalid threshold will be
applied if the first n ew threshold byte has b een written a nd not the second. Remedies
include ensurin g no me asurement dur ing thr esh o ld up da te s an d dis c a rd ing me asu r e-
ments results immediately after threshold updates.Once autonomous measurements
have started, modification to PS1_TH should be preceded by a PS_PAUSE or
PSALS_PAUSE command. For Si114x revision A10 and below, PS1_TH uses an 8-
bit compressed forma t at add re ss 0x 11. Refer to “AN498: Si114x Designer's Guide”
Section 5.4 "Compression Concept."
PS1_TH1: PS1_TH Data Word High Byte @ 0x12
Bit76543210
Name PS1_TH[15:8]
Type RW
Si1141/42/43
42 Rev. 1.41
Reset value = 0000 0000
Reset value = 0000 0000
Bit Name Function
7:0 PS1_TH[15:8] PS1_TH is a 16-bit threshold value. It is compar ed to PS1 measurements duri ng autono-
mous operation for interrupting the host. If the threshold register is updated while a mea-
surement is in progress, it is possible that an invalid threshold will be applied if the first
new threshold byte has been written and not the second. Remedies inc lud e en su rin g no
measurement during threshold updates and discarding measurements results immedi-
ately after threshold updates. Once autonomous measurements have started, modifica-
tion to PS1_TH should be preceded by a PS_PAUSE or PSALS_PAUSE command. For
Si114x revision A10 and below, PS1_TH uses an 8-bit compressed format at address
0x11. Refer to “AN498: Si114x Designer's Guide” Section 5.4 "Compression Concept."
PS2_TH0: PS2_TH Data Word Low Byte @ 0x13
Bit76543210
Name PS2_TH[7:0]
Type RW
Bit Name Function
7:0 PS2_TH[7:0] PS2_TH is a 16-bit threshold value. It is compared to PS2 measurements during
autonomous operation for interrupting the host. If the threshold register is updated
while a measurement is in progress, it is possible that an invalid threshold will be
applied if the first n ew threshold byte has b een written a nd not the second. Remedies
include ensurin g no me asurement dur ing thr esh o ld up da te s an d dis c a rd ing me asu r e-
ments r esults immedia tely after threshold up dates. Once autonom ous measurement s
have started, modification to PS2_TH should be preceded by a PS_PAUSE or
PSALS_PAUSE command. For Si114x revision A10 and below, PS2_TH uses an 8-
bit compressed format at address 0x13. Refer to “AN498: Si114x Designer's Guide”
Section 5.4 "Compression Concept."
PS2_TH1: PS2_TH Data Word High Byte @ 0x14
Bit76543210
Name PS2_TH[15:8]
Type RW
Si1141/42/43
Rev. 1.41 43
Reset value = 0000 0000
Reset value = 0000 0000
Bit Name Function
7:0 PS2_TH[1 5:8] PS2_ TH is a 16 -bit th re sh old value. It is co mpared to PS2 mea sure ments during au to n-
omous operation for interrupting the host. If the threshold register is updated while a
measurement is in progress, it is possible that an invalid threshold will be applied if the
first new threshold byte has been written and not the second. Remedies include ensur-
ing no measurement during threshold updates and discarding measurements results
immediately after threshold updates.Once autonomous measurements have started,
modification to PS2_TH should be preceded by a PS_PAUSE or PSALS_PAUSE com-
mand. For Si114x revision A10 and below, PS2_TH uses an 8-bit compressed for mat at
address 0x13. Refer to “AN498: Si114x Designer’s Guide” Section 5.4 "Compression
Concept."
PS3_TH0: PS3_TH Data Word Low Byte @ 0x15
Bit76543210
Name PS3_TH[7:0]
Type RW
Bit Name Function
7:0 PS3_TH[7:0] PS3_TH is a 16-bit threshold value. It is compared to PS3 measurem ents during auton-
omous operation for interrupting the host. If the threshold register is updated while a
measurement is in progress, it is possible that an invalid threshold will be applied if the
first new threshold byte has been written and not the second. Remedies include ensur-
ing no measurement during threshold updates and discar ding measurement s results
immediately after threshold updates.Once autonomous measurements have started,
modification to PS3_TH should be preceded by a PS_PAUSE or PSALS_PAUSE com-
mand. For Si114x revision A10 and below , PS3_TH uses an 8-bit compressed format at
address 0x15. Refer to “AN4 98: Si114x Designer’s Guide” Section 5.4 "Compression
Concept."
PS3_TH1: PS3_TH Data Word High Byte @ 0x16
Bit76543210
Name PS3_TH[15:8]
Type RW
Si1141/42/43
44 Rev. 1.41
Reset value = 0000 0000
Reset value = 0000 0000
Bit Name Function
7:0 PS3_TH[15:8] PS3_TH is a 16-bit threshold value. It is compared to PS3 measureme nts during
autonomous operation for interrupting the host. If the threshold register is updated
while a measurement is in progress, it is possible that an invalid threshold will be
applied if the first new threshold byte has been written and not the second. Reme-
dies include ensuring no measurement during threshold updates and discarding
measurements results immedia tely after threshold updates.Once autonomous mea-
surements have started, modification to PS3_TH should be preceded by a
PS_PAUSE or PSALS_PAUSE command. For Si114x revision A10 and below,
PS3_TH uses an 8-bit compressed format at address 0x15. Refer to “AN498: Si114x
Designer’s Guide” Section 5.4 "Compression Concept."
PARAM_WR @ 0x17
Bit76543210
Name PARAM_WR
Type RW
Bit Name Function
7:0 PARAM_WR Mailbox register for passing parameters from the host to the sequencer.
COMMAND @ 0x18
Bit 7 6543210
Name COMMAND
Type RW
Bit Name Function
7:0 COMMAND COMMAND Register.
The COMMAND Register is the primary mailbox register into the internal sequencer.
Writing to the COMMAND register is the only I2C operation that wakes the device from
standby mode.
RESPONSE @ 0x20
Bit76543210
Si1141/42/43
Rev. 1.41 45
Reset value = 0000 0000
Name RESPONSE
Type RW
Bit Name Function
7:0 RESPONSE The Response register is used in conjunction with command processing. When an error
is encountered, the response register will be loaded with an error code. All error codes
will have the MSB is set.
The error code is retained until a RESET or NOP command is received by the
sequencer. Other commands other than RESET or NOP will be ignored. However, any
autonomous operation in progress continues normal operation despite any error.
0x00–0x0F: No Error. Bits 3:0 form an incrementing roll-over counter. The roll over
counter in bit 3:0 increment s when a comman d has been executed by th e Si114x. Once
autonomous measurements have started, the execution timing of any command
becomes non-deterministic since a measurement could be in progress when the
COMMAND register is written. The host software must make use of the rollover counter
to ensure that comm a nd s are processed .
0x80: Invalid Command Encountered during command processing
0x88: ADC Overflow encountered during PS1 measurement
0x89: ADC Overflow encountered during PS2 measurement
0x8A: ADC Overflow encountered during PS3 measurement
0x8C: ADC Overflow encountered during ALS-VIS measurement
0x8D: ADC Overflow encountered during ALS-IR measurement
0x8E: ADC Overflow encountered during AUX measurement
IRQ_STATUS @ 0x21
Bit76543210
Name CMD_INT PS3_INT PS2_INT PS1_INT ALS_INT
Type RW RW RW RW RW
RESPONSE @ 0x20
Si1141/42/43
46 Rev. 1.41
Reset value = 0000 0000
Reset value = 0000 0000
Reset value = 0000 0000
Bit Name Function
7:6 Reserved Reserved.
5CMD_INTCommand Interrupt Status.
4 PS3_INT PS3 Interrupt Status.
3 PS2_INT PS3 Interrupt Status.
2 PS1_INT PS1 Interrupt Status.
1:0 ALS_INT ALS Interrupt Status. (Refer to Table 13 for encoding.)
Notes:
1. If the corresponding IRQ_ENABLE bit is also set when the IRQ_STATUS bit is set, the INT pin is asserted.
2. When INT_MODE = 0, the host must write '1' to the corresponding XXX_INT bit to clear the interrupt.
3. When INT_MODE = 1, the internal sequencer clears all the XXX_INT bits (and INT pin) automatically unless used with
PS (Parameter Fiel d PSx_ IM = 11). Use of INT_MODE = 0 is recommended.
ALS_VIS_DATA0: ALS_VIS_DATA Data Word Low Byte @ 0x22
Bit76543210
Name ALS_VIS_DATA[7:0]
Type RW
Bit Name Function
7:0 ALS_VIS_DATA[7:0] ALS VIS Data LSB. Once autonomous measurements have started, this register
must be read after INT has asserted but before the next measurement is made.
Refer to “AN498: Si114x Designer’s Guide” Section 5.6.2 "Host Interrupt Latency."
ALS_VIS_DATA1: ALS_VIS_DATA Data Word High Byte @ 0x23
Bit 76543210
Name ALS_VIS_DATA[15:8]
Type RW
Bit Name Function
7:0 ALS_VIS_DATA[15:8] ALS VIS Data MSB. Once autonomous measurements have started, this register
must be read af ter INT has asserted but before the next measurement is made.
Refer to “AN498: Si114x Designer’s Guide” Section 5.6.2 "Host Interrupt Latency."
Si1141/42/43
Rev. 1.41 47
Reset value = 0000 0000
Reset value = 0000 0000
Reset value = 0000 0000
ALS_IR_DATA0: ALS_IR_DATA Data Word Low Byte@ 0x24
Bit76543210
Name ALS_IR_DATA[7:0]
Type RW
Bit Name Function
7:0 ALS_IR_DATA[7:0] ALS IR Data LSB. Once autonomous measurements have started, this register
must be read after INT has asserted but before the next measurement is made.
Refer to “AN498: Si114x Designer’s Guide” Section 5.6.2 "Host Interrupt
Latency."
ALS_IR_DATA1: ALS_IR_DATA Data Word High Byte @ 0x25
Bit76543210
Name ALS_IR_DATA[15:8]
Type RW
Bit Name Function
7:0 ALS_IR_DATA[15:8] ALS IR Data MSB. Once autonomous measurements have started, this register
must be read after INT has asserted but before the next measurement is made.
Refer to “AN498: Si114x Designer’s Guide” Section 5.6.2 "Host Interrupt Latency."
PS1_DATA0: PS1_DATA Data Word Low Byte @ 0x26
Bit76543210
Name PS1_DATA[7:0]
Type RW
Bit Name Function
7:0 PS1_DATA[7:0] PS1 Data LSB. Once autonomous mea surement s have star ted, this register must be
read after INT has asserted but before the next measurement is made. Refer to
“AN498: Si114x Designer’s Guide” Section 5.6.2 "Host Interrupt Latency."
Si1141/42/43
48 Rev. 1.41
Reset value = 0000 0000
Reset value = 0000 0000
Reset value = 0000 0000
PS1_DATA1: PS1_DATA Data Word High Byte @ 0x27
Bit76543210
Name PS1_DATA[15:8]
Type RW
Bit Name Function
7:0 PS1_DATA[15:8] PS1 Data MSB. Once auto nomous measure ment s have st arted, this registe r must be
read after INT has asser te d bu t be fo re the next measurement is made. Refer to
“AN498: Si114x Designer's Guide” Section 5.6.2 "Host Interrupt Latency."
PS2_DATA0: PS2_DATA Data Word Low Byte @ 0x28
Bit 7 6543210
Name PS2_DATA[7:0]
Type RW
Bit Name Function
7:0 PS2_DATA[7:0] PS2 Data LSB. Once autonomous measureme nts have started, this register must be
read af ter INT has asserted but before the next measureme nt is made. Refer to “AN498:
Si114x Designer's Guide” Section 5.6.2 "Host Interrupt Latency."
PS2_DATA1: PS2_DATA Data Word High Byte @ 0x29
Bit76543210
Name PS2_DATA[15:8]
Type RW
Bit Name Function
7:0 PS2_DATA[15:8] PS2 Data MSB. Once au to nomous mea sure men ts have st arte d, this r eg ister must be
read after INT has asserted but before the next measurement is made. Refer to
“AN498: Si114x Designer's Guide” Section 5.6.2 "Host Interrupt Latency."
Si1141/42/43
Rev. 1.41 49
Reset value = 0000 0000
Reset value = 0000 0000
Reset value = 0000 0000
PS3_DATA0: PS3_DATA Data Word Low Byte @ 0x2A
Bit76543210
Name PS3_DATA[7:0]
Type RW
Bit Name Function
7:0 PS3_DATA[7:0] PS3 Data LSB. Once autonomous measurements have starte d, this register must be
read after INT has asserted but before the next measurement is made. Refer to
“AN498: Si114x Designer's Guide” Section 5.6.2 "Host Interrupt Latency."
PS3_DATA1: PS3_DATA Data Word High Byte @ 0x2B
Bit 76543210
Name PS3_DATA[15:8]
Type RW
Bit Name Function
7:0 PS3_DATA[15:8] PS3 Data MSB. Once autonomous measurements have started, this register must
be read after INT has asser te d bu t befo re the nex t me asu r em e nt is ma de . Ref er to
“AN498: Si114x Designer's Guide” Section 5.6.2 "Host Interrupt Latency."
AUX_DATA0: AUX_DATA Data Word Low Byte @ 0x2C
Bit76543210
Name AUX_DATA[7:0]
Type RW
Bit Name Function
7:0 AUX_DATA[7:0] AUX Data LSB. Once autonomous measurements have started, this register must be
read after INT has asserted but before the next measurement is made. Refer to
“AN498: Si114x Designer's Guide” Section 5.6.2 "Host Interrupt Latency."
Si1141/42/43
50 Rev. 1.41
Reset value = 0000 0000
Reset value = 0000 0000
Reset value = 0000 0000
AUX_DATA1: AUX_DATA Data Word High Byte @ 0x2D
Bit76543210
Name AUX_DATA[15:8]
Type RW
Bit Name Function
7:0 AUX_DATA[15:8] AUX Data MSB. Once autonomous measurements have started, this register must
be read af te r INT has asser ted b ut before the next measu remen t is made. Refer to
“AN498: Si114x Designer's Guide” Section 5.6.2 "Host Interrupt Latency."
PARAM_RD @ 0x2E
Bit76543210
Name PARAM_RD
Type RW
Bit Name Function
7:0 PARAM_RD Mailbox register for passing parameters from the sequencer to the host.
CHIP_STAT @ 0x30
Bit 76543 2 1 0
Name RUNNING SUSPEND SLEEP
Type RRR
Bit Name Function
7:3 Reserved Reserved
2 RUNNING Device is awake.
1 SUSPEND Device is in a low-power state, waiting for a measurement to complete.
0 SLEEP Device is in its lowest power state.
Si1141/42/43
Rev. 1.41 51
Reset value = 0000 0000
ANA_IN_KEY @ 0x3B to 0x3E
Bit 765432 1 0
0x3B ANA_IN_KEY[31:24]
0x3C ANA_IN_KEY[23:16]
0x3D ANA_IN_KEY[15:8]
0x3E ANA_IN_KEY[7:0]
Type RW
Bit Name Function
31:0 ANA_IN_KEY[31:0] Reserved.
Si1141/42/43
52 Rev. 1.41
4.6. Parameter RAM
Parameters are located in internal memory and are not directly addressable over I2C. They must be indirectly
accessed using the PARAM_QUERY and PARAM_SET Commands that are described in "4.2. Command
Protocol" on page 20.
Table 16. Parameter RAM Summary Table
Parameter Name Offset Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
I2C_ADDR 0x00 I2C Address
CHLIST 0x01 — EN_AUX EN_ALS_IR EN_ALS_
VIS —EN_PS3EN_PS
2EN_P
S1
PSLED12_SELECT 0x02 — PS2_LED — PS1_LED
PSLED3_SELECT 0x03 — PS3_LED
Reserved 0x04 Reserved (always set to 0)
PS_ENCODING 0x05 — PS3_ALI
GN PS2_ALIGN PS1_ALIG
NReserved (always set to 0)
ALS_ENCODING 0x06 — ALS_IR_ALI
GN ALS_VIS_
ALIGN Reserved (always set to 0)
PS1_ADCMUX 0x07 PS1 ADC Input Selection
PS2_ADCMUX 0x08 PS2 ADC Input Selection
PS3_ADCMUX 0x09 PS3 ADC Input Selection
PS_ADC_COU NT ER 0x0A — PS_ADC_REC Reserved (always set to 0)
PS_ADC_GAIN 0x0B — PS_ADC_GAIN
PS_ADC_MISC 0x0C — PS_RANGE — PS_ADC_-
MODE —
Reserved 0x0D Reserved (do not modify from default setting of 0x02)
ALS_IR_ADCMUX 0x0E ALS_IR_ADCMUX
AUX_ADCMUX 0x0F AUX ADC Input Selection
ALS_VIS_AD-
C_COUNTER 0x10 — VIS_ADC_REC Reserved (always set to 0)
ALS_VIS_ADC_GAIN 0x11 — ALS_VIS_ADC_GAIN
ALS_VIS_ADC_MISC 0x12 Reserved
(always set to 0) VIS_RANG
EReserved (always set to 0)
Reserved 0x13 Reserved (do not modify from default setting of 0x40)
Reserved 0x14–
0x15 Reserved (do not modify from default setting of 0x00)
ALS_HYST 0x16 ALS Hysteresis
PS_HYST 0x17 PS Hysteresis
PS_HISTORY 0x18 PS History Setting
Si1141/42/43
Rev. 1.41 53
Reset value = 0000 0000
Reset value = 0000 0000
ALS_HISTORY 0x19 ALS History Setting
ADC_OFFSET 0x1A ADC Offset
Reserved 0x1B Reserved (do not modify from default setting of 0x00)
LED_REC 0x1C LED recovery time
ALS_IR_AD-
C_COUNTER 0x1D — IR_ADC_REC Reserved (alwa ys set to 0)
ALS_IR_ADC_GAIN 0x1E — ALS_IR_ADC_GAIN
ALS_IR_ADC_MISC 0x1F Reserved
(always set to 0) IR_RANGE Reserved (always set to 0)
I2C @ 0x00
Bit 76543210
Name I2C Address[7:0]
Type RW
Bit Name Function
7:0 I2C Address[7:0] Specifies a new I2C Address for the device to respond to. The new address takes
effect when a BUSADDR command is receive d.
CHLIST @ 0x01
Bit76 5 43210
Name EN_AUX EN_ALS_IR EN_ALS_VIS EN_PS3 EN_PS2 EN_PS1
Type RW RW
Bit Name Function
7 Reserved
6 EN_AUX Enables Auxiliary Channel, data stored in AUX_DATA1[7:0] and AUX_DATA0[7:0].
5 EN_ALS_IR Enables ALS IR Channel, dat a stored in ALS_IR_DATA1[7:0] and ALS_IR_DATA0[7:0].
4 EN_ALS_VIS Enables ALS Visible Channel, data stored in ALS_VIS_DATA1[7:0] and ALS_VIS_DA-
TA0[7:0].
3 Reserved
Table 16. Parameter RAM Summary Table (Continued)
Parameter Name Offset Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Si1141/42/43
54 Rev. 1.41
Reset value = 0010 0001
Reset value = 0000 0100
2 EN_PS3 Enables PS Channel 3, data store d in PS3_DATA1[7:0] and PS3_DATA0[7:0].
1 EN_PS2 Enables PS Channel 2, data store d in PS2_DATA1[7:0] and PS2_DATA0[7:0].
0 EN_PS1 Enables PS Channel 1, data store d in PS1_DATA1[7:0] and PS1_DATA0[7:0].
Note: For proper operati on, CHLIST must be written with a non-zero value before forced measurements or autonomous
operation is requested.
PSLED12_SELECT @ 0x02
Bit 76543210
Name PS2_LED[2:0] PS1_LED[2:0]
Type RW RW
Bit Name Function
7 Reserved
6:4 PS2_LED[2:0] Specifies the LED pin driven during the PS2 Measurement. Note that any combina-
tion of irLEDs is possible.
000: NO LED DRIVE
xx1: LED1 Drive Enabled
x1x: LED2 Drive Enabled (Si1142 and Si1143 only. Clear for Si1141)
1xx: LED3 Drive Enabled (Si1143 only. Clear for Si1141 and Si1142)
3 Reserved
2:0 PS1_LED[2:0] Specifies the LED pin driven during the PS1 Measurement. Note that any combina-
tion of irLEDs is possible.
000: NO LED DRIVE
xx1: LED1 Drive Enabled
x1x: LED2 Drive Enabled (Si1142 and Si1143 only. Clear for Si1141)
1xx: LED3 Drive Enabled (Si1143 only. Clear for Si1141 and Si1142)
PSLED3_SELECT @ 0x03
Bit76543210
Name PS3_LED[2:0]
Type RW
Bit Name Function
Si1141/42/43
Rev. 1.41 55
Reset value = 0000 0000
Reset value = 0000 0000
Bit Name Function
7:3 Reserved
2:0 PS3_LED[2:0] Specifies the LED pin driven during the PS3 Measurement. Note that any combination
of irLEDs is possible.
000: No LED drive.
xx1: LED1 drive enabled.
x1x: LED2 drive enabled (Si1142 and Si1143 only. Clear for Si1141).
1xx: LED3 drive enabled (Si1143 only. Clear for Si1141 and Si1142).
PS_ENCODING @ 0x05
Bit7 6 5 4 3210
Name PS3_ALIGN PS2_ALIGN PS1_ALIGN
Type RW R/W R/W
Bit Name Function
7 Reserved
6 PS3_ALIGN When set, the ADC report s the least significa nt 16 bit s of the 17 -bit ADC when performin g
PS3 Measurement. Reports the 16 MSBs when cleared.
5 PS2_ALIGN When set, the ADC report s the least significa nt 16 bit s of the 17 -bit ADC when performin g
PS2 Measurement. Reports the 16 MSBs when cleared.
4 PS1_ALIGN When set, the ADC report s the least significa nt 16 bit s of the 17 -bit ADC when performin g
PS1 Measurement. Reports the 16 MSBs when cleared.
3:0 Reserved Always set to 0.
ALS_ENCODING @ 0x06
Bit 7 6 5 4 3 2 1 0
Name ALS_IR_ALIGN ALS_VIS_ALIGN
Type RW RW
Bit Name Function
7:6 Reserved
5 ALS_IR_ALIGN When set, the ADC reports the least significant 16 bits of the 17-bit ADC when
performing ALS VIS Measurement. Reports the 16 MSBs when cleared.
Si1141/42/43
56 Rev. 1.41
Reset value = 0000 0011
4 ALS_VIS_ALIGN When set, the ADC reports the least significant 16 bits of the 17-bit ADC when
performing ALS IR Measurement. Reports th e 16 MSBs when cleared.
3:0 Reserved Always set to 0.
PS1_ADCMUX @ 0x07
Bit76543210
Name PS1_ADCMUX[7:0]
Type RW
Bit Name Function
7:0 PS1_ADCMUX[7:0] Selects ADC Input for PS1 Measurement.
The following selections are valid when PS_ADC_MODE = 1 (default). This set-
ting is for normal Proximity Detection function.
0x03: Large IR Photodiode
0x00: Small IR Photodiode
In addition, the following selections are valid for PS_ADC_MODE = 0. With this
setting, irLED drives are disabled and the PS channel s are no longe r operatin g in
normal Proximity De te ctio n fu nc tion . Th e resu lts have no refe rence and the refer-
ences needs to be measured in a separate measurement.
0x02: Visible Photodiode
A separate 'No Ph otodiode' measurement should be sub tracted from this reading.
Note that the result is a neg ative value. The result sho uld therefore be negated to
arrive at the Ambient Vi sible Light reading.
0x03: Large IR Photodiode
A separate “No Photodiode” measurement should be subtra cted to arrive at
Ambient IR reading.
0x00: Small IR Photodiode
A separate “No Photodiode” measurement should be subtra cted to arrive at
Ambient IR reading.
0x06: No Photodiode
This is typically used as reference for reading ambient IR or visible light.
0x25: GND voltage
This is typically used as the reference for electrical measurements.
0x65: Temperature
(Should be used only for relative temperature measurement. Absolute Tempera-
ture not guaranteed) A separate GND measurement should be subtracted from
this reading.
0x75: VDD voltage
A separate GND measurement is needed to make the measurement meaningful.
Bit Name Function
Si1141/42/43
Rev. 1.41 57
Reset value = 0000 0011
Reset value = 0000 0011
Reset value = 0111 0000
PS2_ADCMUX @ 0x08
Bit76543210
Name PS2_ADCMUX[7:0]
Type R/W
Bit Name Function
7:0 PS2_ADCMUX[7:0] Selects input for PS2 measurement. See PS1_ADCMUX register descr iption for
details.
PS3_ADCMUX @ 0x09
Bit76543210
Name PS3_ADCMUX[7:0]
Type R/W
Bit Name Function
7:0 PS3_ADCMUX[7:0] Selects input for PS3 me asureme nt. See PS1_ADCMUX register description for
details.
PS_ADC_COUNTER @ 0x0A
Bit76543210
Name PS_ADC_REC[2:0]
Type RW R/W R/W
Si1141/42/43
58 Rev. 1.41
Reset value = 0000 0000
Bit Name Function
7 Reserved
6:4 PS_ADC_REC[2:0] Recovery period the ADC takes before making a PS measurement.
000: 1 ADC Clock (50 ns times 2PS_ADC_GAIN)
001: 7 ADC Clock (350 ns times 2PS_ADC_GAIN)
010: 15 ADC Clock (750 ns times 2PS_ADC_GAIN)
011: 31 ADC Clock (1.55 µs times 2PS_ADC_GAIN)
100: 63 ADC Clock (3.15 µs times 2PS_ADC_GAIN)
101: 127 ADC Clock (6.35 µs times 2PS_ADC_GAIN)
110: 255 ADC Clock (12.75 µs times 2PS_ADC_GAIN)
111: 511 ADC Clock (2 5. 55 µs times 2PS_ADC_GAIN)
The recommended PS_ADC_REC value is the one’s complement of PS_AD-
C_GAIN.
3:0 Reserved Always set to 0.
PS_ADC_GAIN @ 0x0B
Bit76543210
Name PS_ADC_GAIN[2:0]
Type R/W R/W R/W
Bit Name Function
7:3 Reserved
2:0 PS_ADC_GAIN[2:0] Increases the irLED pulse width and ADC integration time by a factor of
(2 ^ PS_ADC_GAIN) for all PS measurements.
Care must be taken when using this feature. At an extreme case, each of the
three PS measurements can be configured to drive three separate irLEDs,
each of which, are co nf igu re d fo r 35 9 mA. The internal sequ encer does not
protect the device from such an error. To prevent permanent damage to the
device, do not enter any value greater than 5 without consulting with Silicon
Labs.
For Example:
0x0: ADC Clock is divided by 1
0x4: ADC Clock is divided by 16
0x5: ADC Clock is divided by 32
Si1141/42/43
Rev. 1.41 59
Reset value = 0000 0100
Reset value = 0000 0000
PS_ADC_MISC @ 0x0C
Bit 7 6 5 4 3 2 1 0
Name PS_RANGE PS_ADC_MODE
Type RW RW
Bit Name Function
7:6 Reserved
5 PS_RANGE When performing PS measurements, the ADC can be programmed to operate in
high sensitivity operation or high signal range. The high signal range is useful in
operation under direct sunlight.
0: Normal Signal Range
1: High Signal Range (Gain divided by 14.5)
4:3 Reserved
2 PS_ADC_MODE PS Channels can either operate normally as PS channels, or it can be used to per-
form raw ADC measurements:
0: Raw ADC Measurement Mode
1: Normal Proximity Measurement Mode
1:0 Reserved
ALS_IR_ADCMUX @ 0x0E
Bit76543210
Name ALS_IR_ADCMUX
Type RW
Bit Name Function
7:0 ALS_IR_ADCMUX Selects ADC Input for ALS_IR Measurement.
0x00: Small IR photod io de
0x03: Large IR photod iode
Si1141/42/43
60 Rev. 1.41
Reset value = 0110 0101
Reset value = 0111 0000
AUX_ADCMUX @ 0x0F
Bit76543210
Name AUX_ADCMUX[7:0]
Type RW
Bit Name Function
7:0 AUX_ADCMUX[7:0] Selects input for AUX Measurement. These measurements are referenced to
GND.
0x65: Temperature (Should be used only for relative temperature measurement.
Absolute Temperature not guaranteed)
0x75: VDD voltage
ALS_VIS_ADC_COUNTER @ 0x10
Bit76543210
Name VIS_ADC_REC[2:0]
Type RW R/W R/W
Bit Name Function
7 Reserved
6:4 VIS_ADC_REC[2:0] Recovery period the ADC takes before making a ALS-VIS measurement.
000: 1 ADC Clock (50 ns times 2ALS_VIS_ADC_GAIN)
001: 7 ADC Clock (350 ns times 2ALS_VIS_ADC_GAIN)
010: 15 ADC Clock (750 ns times 2ALS_VIS_ADC_GAIN)
011: 31 ADC Clock (1.55 µs times 2ALS_VIS_ADC_GAIN)
100: 63 ADC Clock (3.15 µs times 2ALS_VIS_ADC_GAIN)
101: 127 ADC Clock (6.35 µs times 2ALS_VIS_ADC_GAIN)
110: 255 ADC Clock (12.75 µs times 2ALS_VIS_ADC_GAIN)
111: 511 ADC Cloc k (25.5 5 µs times 2ALS_VIS_ADC_GAIN)
The recommended VIS_ADC_REC value is the one’s complement of
ALS_VIS_ADC_GAIN.
3:0 Reserved Always set to 0.
Note: For A02 and earlier, this parameter also controls ALS-IR measurements.
Si1141/42/43
Rev. 1.41 61
Reset value = 0000 0000
Reset value = 0000 0000
ALS_VIS_ADC_GAIN @ 0x11
Bit76543210
Name ALS_VIS_ADC_GAIN[2:0]
Type RW R/W RW
Bit Name Function
7:3 Reserved
2:0 ALS_VIS_ADC_GAIN[2:0] Increases the ADC integration time for ALS Visible measurements by a
factor of (2 ^ ALS_VIS_ADC_GAIN). This allows visible light measure-
ment under dark glass. The maximum gain is 128 (0x7).
For Example:
0x0: ADC Clock is divided by 1
0x4: ADC Clock is divided by 16
0x6: ADC Clock is divided by 64
Note: For A02 and earlier, this parameter also controls ALS-IR measurements.
ALS_VIS_ADC_MISC @ 0x12
Bit76 5 43210
Name VIS_RANGE
Type RW
Bit Name Function
7:6 Reserved
5 VIS_RANGE When performing ALS-VIS measurements, the ADC can be programmed to operate in
high sensitivity operation or high signal range.
The high signal range is useful in operation under direct sunlight.
0: Normal Signal Range
1: High Signal Range (Ga in divid e d by 14 .5 )
4:0 Reserved
Note: For A02 and earlier, this parameter also controls ALS-IR measurements.
Si1141/42/43
62 Rev. 1.41
Reset value = 0100 1000
Reset value = 0100 1000
ALS_HYST @ 0x16
Bit76543210
Name ALS_HYST[7:0]
Type RW
Bit Name Function
7:0 ALS_HYST[7:0] ALS_HYST represents a h ysteresis applied to the ALS_LOW_TH and AL S_HIGH_TH
thresholds. This is in an 8-bit compressed format, representing a 16-bit value. For
example:
0x48: 24 ADC Codes
Please refer to “AN498: Si114x Designer's Guide”, Section 5.4 “Compression Con-
cept.”
PS_HYST @ 0x17
Bit76543210
Name PS_HYST[7:0]
Type RW
Bit Name Function
7:0 PS_HYST[7:0] PS_HYST represen ts a hysteresis applied to the PS1_TH, PS2_TH and PS3_TH
thresholds. This is in an 8-bit compressed forma t, representing a 16-bit value. For
example: 0x 48 : 24 AD C Cod es .
Please refer to “AN498: Si114x Designer's Guide”, Section 5.4 “Compression Con-
cept.”
Si1141/42/43
Rev. 1.41 63
Reset value = 0000 0011
Reset value = 0000 0011
Reset value = 1000 0000
PS_HISTORY @ 0x18
Bit76543210
Name PS_HISTORY[7:0]
Type RW
Bit Name Function
7:0 PS_HISTORY[7:0] PS_HISTORY is a bit-field representing the number of consecutive samples
exceeding the threshold and hysteresis to change status.
For example :
0x03: 2 consecutive samples
0x07: 3 consecutive samples
0xFF: 8 consecutive samples
ALS_HISTORY @ 0x19
Bit76543210
Name ALS_HISTORY[7:0]
Type RW
Bit Name Function
7:0 ALS_HIS TORY[7:0] ALS_HISTORY is a bit-field represen tin g th e nu m be r of cons ec ut ive sa mp le s
exceeding the threshold and hysteresis to change status.
For example:
0x03: Two consecutive samples
0x07: Three consecutive samples
0xFF: Eight cons ecu tiv e sam p les
ADC_OFFSET @ 0x1A
Bit76543210
Name ADC_OFFSET[7:0]
Type RW
Si1141/42/43
64 Rev. 1.41
Reset value = 0000 0000
Reset value = 0111 0000
Bit Name Function
7:0 ADC_OFFSET[7:0] ADC_OFFSET is an 8-bit comp ressed value repr esenting a 16-bit value ad ded to all
measurements. Since most measurements are relative measurements involving a
arithmetic subtraction and can result in a neg ative value. Since 0xFFFF is treated as
an overrange indicator, the ADC_OFFSET is added so that the values reported in
the I2C register map are never confused with the 0xFFFF overrange indicator.
For example :
0x60: Measurements have a 64-code offset
0x70: Measurements have a 128-code offset
0x80: Measurements have a 256-code offset
Please refer to “AN498: Si114x Designer's Guide”, Section 5.4 “Compression
Concept.”
LED_REC @ 0x1C
Bit 7 6543210
Name LED_REC[7:0]
Type RW
Bit Name Function
7:0 LED_REC[7:0] Reserved.
ALS_IR_ADC_COUNTER @ 0x1D
Bit76543210
Name IR_ADC_REC[2:0]
Type RW
Si1141/42/43
Rev. 1.41 65
Reset value = 0000 0000
Reset value = 0000 0000
Bit Name Function
7 Reserved
6:4 IR_ADC_REC[2:0] Recovery period the ADC takes before making a ALS-IR measurement.
000: 1 ADC Clock (50 ns times 2ALS_IR_ADC_GAIN)
001: 7 ADC Clock (350 ns times 2ALS_IR_ADC_GAIN)
010: 15 ADC Clock (750 ns times 2ALS_IR_ADC_GAIN)
011: 31 ADC Clock (1.55 µs times 2ALS_IR_ADC_GAIN)
100: 63 ADC Clock (3.15 µs times 2ALS_IR_ADC_GAIN)
101: 127 ADC Clock (6.35 µs times 2ALS_IR_ADC_GAIN)
110: 255 ADC Clock (12.75 µs times 2ALS_IR_ADC_GAIN)
111: 511 ADC Clock (2 5. 55 µs times 2ALS_IR_ADC_GAIN)
The recommended IR_ADC_REC value is the one’s complement of
ALS_IR_ADC_GAIN.
3:0 Reserved Always set to 0.
Note: This parameter available for sequencer revisions A03 or later.
ALS_IR_ADC_GAIN @ 0x1E
Bit76543210
Name ALS_IR_ADC_GAIN[2:0]
Type R/W R/W R/W
Bit Name Function
7:3 Reserved
2:0 ALS_IR_ADC_GAIN[2:0] Increases the ADC integrat ion time for IR Ambient measurements by a fac-
tor of (2 ^ ALS_IR_ADC_GAIN). The maximum gain is 128 (0x7).
For Example:
0x0: ADC Clock is divided by 1
0x4: ADC Clock is divided by 16
0x6: ADC Clock is divided by 64
Note: This parameter available for sequencer revisions A03 or later.
ALS_IR_ADC_MISC @ 0x1F
Bit76543210
Name IR_RANGE
Type RW
Si1141/42/43
66 Rev. 1.41
Bit Name Function
7:6 Reserved
5 IR_RANGE When perfo rming ALS-IR measurements , the ADC can be programmed to operate in
high sensitivity operation or high signal range.
The high signal range is useful in operation under direct sunlight.
0: Normal Signal Range
1: High Signal Range (Ga in divid e d by 14 .5 )
4:0 Reserved Write operations to this RAM parameter must preserve this bit-field value using
read-modify-write.
Note: This parameter is available for sequencer revisions A03 or later.
Si1141/42/43
Rev. 1.41 67
5. Pin Descriptions
Table 17. Pin Descriptions
Pin Name Type Description
1 SDA Bidirectional I2C Data.
2SCL InputI
2C Clock.
3V
DD Power Power Supply.
Voltage source.
4 INT Bidirectional Interrupt Output.
Open-drain interrupt output pin. Must be at logic level high during power-
up sequence to enable low power operation.
5 DNC Do Not Connect.
This pin is electrically connected to an internal Si1141/42/43 node. It
should remain unconnected.
6LED2/CV
DD1Output LED2 Ou tput/Connect to VDD.1
Programmable constant current sink normally connected to an infrared
LED cathode. Connect directly to VDD when not in use.
7LED3/CV
DD2Output LED3 Output./Connect to VDD.2
Programmable constant current sink normally connected to an infrared
LED cathode. If VLED < (V DD + 0.5 V), a 47 k pull-up resistor from LED3
to VDD is neede d for proper operation. Connect dir ectly to VDD when not in
use.
8 GND Power Ground.
Reference voltage.
9 LED1 Output LED1 Output.
Programmable constant current sink normally connected to an infrared
LED cathode.
10 DNC Do Not Connect.
This pin is electrically connected to an internal Si1141/42/43 node. It
should remain unconnected.
Notes:
1. Si1142 and Si1143 only. Must connect to VDD in Si1141.
2. Si1143 only. Must conn ect to VDD in Si1141 and Si1142.
LED1
VDD
SCL GND
INT
2
3
4
9
8
7
6
QFN-10 LED3/CVDD
LED2/CVDD
SDA 1
DNC
10
5
DNC
Si1141/42/43
68 Rev. 1.41
6. Ordering Guide
Part Number Package LED Drivers AEC-Q100
Si1141-A11-GMR QFN-10 1 N
Si1142-A11-GMR QFN-10 2 N
Si1143-A11-GMR QFN-10 3 N
Si1141-A11-YM0R QFN-10 1 Y
Si1142-A11-YM0R QFN-10 2 Y
Si1143-A11-YM0R QFN-10 3 Y
Si1141-A10-GMR* QFN-10 1 N
Si1142-A10-GMR* QFN-10 2 N
Si1143-A10-GMR* QFN-10 3 N
*Note: Not recommended for new designs.
Si1141/42/43
Rev. 1.41 69
7. Package Outline: 10-Pin QFN
Figure 15 illustrates the package details for the Si1141/42/43 QFN package. Table 18 lists the values for the
dimensions shown in the illustration.
Figure 15. QFN Package Diagram Dimensions
Table 18. Package Diagram Dimensions
Dimension Min Nom Max
A 0.55 0.65 0.75
b 0.20 0.25 0.30
D 2.00 BSC.
e 0.50 BSC.
E 2.00 BSC.
L 0.30 0.35 0.40
aaa 0.10
bbb 0.10
ccc 0.08
ddd 0.10
Notes:
1. All dimensions shown are in millimeters (mm).
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
Pin 1 Indication
Top View
Si1141/42/43
70 Rev. 1.41
Figure 16. Photodiode Centers
0.66
0.14
0.415
0.16
0.12
0.65
Large IR photodiode
Small IR photodiode
and visible photodiode
(stacked)
Pin 1
0.115 die
offset to
package
Si1141/42/43
Rev. 1.41 71
8. Suggested PCB Land Pattern
Si1141/42/43
72 Rev. 1.41
Dimension mm
C1 1.90
C2 1.90
E0.50
X0.30
Y0.80
Notes:
General
1. All dimensions shown are in millimeters (mm).
2. This Land Pattern Design is based on the IPC-7351 guidelines.
3. All dimensions shown are at Maximum Material Condition (MMC). Least
Material Condition (LMC) is calculated based on a Fabrication Allowance of
0.05 mm.
Solder Mask Design
4. All metal pads are to be non-solder mask defined (NSMD). Clearance between
the solder mask and the metal pad is to be 60 mm minimum, all the way around
the pad.
Stencil Design
5. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls
should be used to assure good solder paste release.
6. The stencil thickness shoul d be 0.125 mm (5 mils).
7. The ratio of sten ci l ape rture to land pa d si ze sh ou l d be 1:1 for all pad s.
Card Assembly
8. A No-Clean, Type-3 solder paste is recommended.
9. The recommended card reflow profile is per the JEDEC/IPC J-STD-020D
specification for Small Body Components.
Si1141/42/43
Rev. 1.41 73
DOCUMENT CHANGE LIST
Revision 0.2 to Revision 0.3
Updated document title from Si1140 to Si114x.
Updated "7. Package Outline: 10-Pin QFN" on page
69.
Updated Tables 4, 1, and 2.
Added Figures 1, 2, and 4.
Added registe r map an d desc rip tio ns.
Revision 0.3 to Revision 0.4
Updated document title from Si114x to Si1143.
Updated Applications Section
Updated Tables 2 and 3.
Updated Figure 1, Figure 4.
Updated Table 8, Table 9.
Updated Pin Assignme nts.
Updated Regis ter ma ps and descrip tio n.
Revision 0.4 to Revision 0.41
Added Si1141 and Si1142 in addition to Si1143.
Added the ODFN-8 package optio n.
Some sections were rearranged.
Added the signal-path software-model schematic.
Renamed PARAM_IN to PARAM_WR for clarity.
Renamed PARAM_OUT to PARAM_RD for clarity.
Renamed PS_ADC_CLKDIV to PS_ADC_GAIN for
clarity.
Renamed ALS_VIS_ADC_CLKDIV to
ALS_VIS_ADC_GAIN for clarity.
Renamed ALS_IR_ADC_CLKDIV to
ALS_IR_ADC_GAIN for clarity.
Minor changes in register and parameter
terminology.
Revision 0.41 to Revision 0.5
Updated Tables 1, 4, 2, and 15.
Updated Figu re 1.
Added Figures 2 and 16.
Updated regis te r table rese t valu es .
Added “ HW_KEY @ 0x07” register.
Updated “ALS_VIS_ADC_MISC @ 0x12” register.
Updated “ALS_IR_ADC_MISC @ 0x1F” register.
Updated “6. O r de ring Guide” .
Updated “ Features” .
Updated “ Description” .
Updated “5. P i n Des crip tio n s” .
Updated “6. O r de ring Guide” .
Updated “7. Package Outline: 10-Pin QFN” .
Deleted Section 7.1.
Deleted Section 7.2.
Revision 0.5 to Revision 1.0
Lux range and other minor changes on front page.
Added sensitivity data for all three photodiodes.
Added of fset-drift data for all three photodiodes.
Updated startup time to 25 ms.
Minor bit-field definition corrections.
Clarified ripple-voltage recommendation.
Added MM and CDM ESD rating.
Clarified standby-mode ldd.
Clarified LED output leakage curr ent.
Added limits to LED active currents.
Ordering code update.
Revision 1.0 to Revision 1.1
Corrected re se t state of PS_ADC_COUNTER.
Minor correction in signal-path programming model
schematic.
Corrected access mode of ALS_IR_ADCMUX from
register space to parameter space.
Revision 1.1 to Revision 1.2
Corrected re se t state of PS_ADC_COUNTER.
Added leakage specifications for p ins INT, SCL, and
SDA.
Changed format of proximity-threshold registers
from compressed to uncompressed.
Changed firmware revision from A10 to A11.
Added reference to AN498 for details on the
compression scheme.
Clarified recovery times specified in PS_ADC_REC,
VIS_ADC_REC, and IR_ADC_REC.
Suggested PCB Land Patt er n.
Changed photodiode coordinate origin to package
center.
Added temperature sensor information.
Added remarks on the use of MEAS_RATE,
ALS_RATE, and PS_RATE.
Added remarks on I2C Broadcast Reset.
Added performance graphs.
Changed format of PS1TH, PS2TH, PS3TH,
ALS_LO_TH, ALS_HIGH_TH from 8-bit compressed
to 16-bit linear to allow finer threshold control.
Si1141/42/43
74 Rev. 1.41
Revision 1.2 to Revision 1.3
Updated bit names for ALS_LOW_TH0 @ 0x0B,
ALS_LOW_TH1@0x0C, ALS_HI_TH0@0x0D, and
ALS_HI-TH1@0x0E.
Changed IRQ_MODE1 to IRQ_MODE2 in Table 14.
Changed pin name for pin 5 in pin diagrams on first
page and start of section 5 from NC to DNC.
Changed pin na m e an d de sc rip tio n for pin 5 in
Table 17.
Min VDD changed from 1.8 V to 1.71 V.
Revision 1.3 to Revision 1.4
Added minimum I 2C clock frequency.
Updated photodiode spectral response.
Clarified usage of Command Register and
Parameter RAM.
Clarified LED2 and LED3 connection when using
Si1141 and Si1142.
Revision 1.4 to Revision 1.41
Revised document title from Si114x to Si1141-42-43.
Updated “6. O r de ring Guide” .
Added orderable part numbers with AEC-Q100
qualification.
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