R5105N SERIES
Microprocessor Supervisory Circuit
NO.EA-159-080808
1
OUTLINE
The R5105N Series are CMOS-based microprocessor supervisory circuit, or high accuracy and ultra low
supply current voltage detector with built-in delay circuit and watchdog timer. When the supply voltage is down
across the threshold, or the watchdog timer does not detect the system clock from the microprocessor, the reset
output is generated.
The voltage detector circuit is used for the system reset, etc. The detector threshold is fixed internally, and the
accuracy is ±1.0%. The released delay time (Power-on Reset Delay) circuit is built-in, and output delay time is
adjustable with an external capacitor, and the accuracy is ±16%*. When the supply voltage becomes higher
than the released voltage, the reset state will be maintained during the delay time. The output type of the reset
is selectable, Nch open-drain, or CMOS.
The time out period of the watchdog timer can be also set with an external capacitor, and the accuracy is
±33%*.
There are another 4 products by the difference of packages and the function of voltage detector and
watchdog timer. The package of R5105N is SOT-23-6.
FEATURES
Supply Current...................................................................... Typ. 11µA
Operating Voltage Range ..................................................... 0.9V to 6.0V
< Voltage Detector Part >
Detector Threshold Range.................................................... Stepwise setting with a step of 0.1V in the
range of 1.5V to 5.5V
Detector Threshold Accuracy................................................ ±1.0%
Power-on Reset Delay Time accuracy ................................. ±16%* (-40°C
<
=
Topt
<
=
105°C)
Power-on reset delay time of the voltage detector ............... Typ. 370ms with an external capacitor : 0.1µF
< Watchdog Timer Part >
Built-in a watchdog timer's time out period accuracy ........... ±33%* (-40°C
<
=
Topt
<
=
105°C)
Timeout period for watchdog timer ....................................... Typ. 310ms with an external capacitor : 0.1µF
Reset timer for watchdog timer............................................. Typ. 34ms with an external capacitor : 0.1µF
Package................................................................................ SOT-23-6
*) Accuracy to center value of (Min.+Max.)/2
APPLICATIONS
Supervisory circuit for equipment with using microprocessors.
R5105N
2
BLOCK DIAGRAMS
Nch Open Drain Output (R5105 Nxx1A) CMOS Output (R5105Nxx1C)
VDD
GND
SCK
RESETB
CD
CTW
WATCHDOG
TIMER
CLOCK
DETECTOR
3
6
2
4
5
1
Vref2 Vref1
VDD
GND
SCK
RESETB
CD
CTW
3
6
2
4
5
1
WATCHDOG
TIMER
CLOCK
DETECTOR
Vref2 Vref1
SELECTION GUIDE
The detector threshold, the output type and the taping type for the ICs can be selected at the users’ request.
The selection can be made with designating the part number as shown below;
R5105Nxx1x-xx-x Part Number
a b c d e
Code Contents
a Designation of Package Type;
N: SOT-23-6
b Setting Detector Threshold (-VDET);
Stepwise setting with a step of 0.1V in the range of 1.5V to 5.5V is possible.
c
Designation of Output Type;
A: Nch Open Drain
C: CMOS
d Designation of Taping Type ;
TR (Refer to Taping Specifications; TR type is the standard direction.)
e Designation of Composition of pin plating
-F: Lead free solder plating (SOT-23-6)
R5105N
3
SERIES SELECTION
R5105N R5106N R5107G R5108G R5109G
Package SOT-23-6 SSOP-8G
With INH pin (Inhibit) No Yes
2 clock input No Yes
With MR pin (Manual Reset) No Yes No
With SENSE pin No Yes No
Remarks
CD pin and
CTW pin are
combined uses.
Operating
Voltage Range
1.5V to 6.0V
Supply Current
11.5µA
PIN CONFIGURATION
SOT-23-6
654
123
(mark side)
PIN DESCRIPTIONS
SOT-23-6
Pin No. Symbol Description
1 SCK Clock Input Pin from Microprocessor
2 CTW External Capacitor Pin for setting Reset and Watchdog Timer
Timeout Period
3 VDD Power supply Pin
4 RESETB
Output Pin for Reset signal of Watchdog timer and Voltage Detector.
(Output "L" at detecting Detector Threshold and Watchdog Timer
Reset.)
5 GND Ground Pin
6 CD External Capacitor Pin for Setting delay time of Voltage Detector
R5105N
4
ABSOLUTE MAXIMUM RATINGS Topt=25°C
Symbol Item Rating Unit
VDD Supply Voltage -0.3 to 7.0 V
VCD Voltage of CD Pin -0.3 to VDD + 0.3 V
VCTW Voltage of CTW Pin -0.3 to VDD + 0.3 V
VRESETB
Output Voltage
Voltage of RESETB Pin -0.3 to 7.0 V
VSCK Input Voltage Voltage of SCK Pin -0.3 to 7.0 V
IRESETB Output Current Current of RESETB Pin 20 mA
PD Power Dissipation (SOT-23-6)* 420 mW
Topt Operating Temperature Range -40 to 105 °C
Tstg Storage Temperature Range -55 to 125 °C
* ) For Power Dissipation, please refer to PACKAGE INFORMATION to be described.
ABSOLUTE MAXIMUM RATINGS
Electronic and mechanical stress momentarily exceeded absolute maximum ratings may cause the
permanent damages and may degrade the life time and safety for both device and system using the device
in the field.
The functional operation at or over these absolute maximum ratings is not assured.
R5105N
5
ELECTRICAL CHARACTERISTICS
VDD=6.0V, CTW=0.1µF, CD=0.1µF, In case of Nch Open Drain Output type, the output pin is pulled up with a
resistance of 100k (R5105Nxx1A), unless otherwise noted.
The specification in is checked and guaranteed by design engineering at 40°C
<
=
Topt
<
=
105°C.
R5105Nxx1A/C Topt=25°C
Symbol Item Conditions Min. Typ. Max. Unit
VDD Operating Voltage 0.9 6.0 V
ISS Supply Current VDD= -VDET+0.5V,
Clock pulse input 11
15 µA
VD Part
Symbol Item Conditions Min. Typ. Max. Unit
Topt=25°C ×0.990 ×1.010
-VDET Detector Threshold
40°C
<
=
Topt
<
=
105°C ×0.972 ×1.015
V
VHYS Detector Threshold Hysteresis -VDET
×0.03
-VDET
×0.05
-VDET
×0.07 V
-VDET/
Topt
Detector Threshold
Temperature Coefficient 40°C
<
=
Topt
<
=
105°C ±100 ppm/°C
tPLH Output Delay Time CD=0.1µF *1 340 370 467 ms
Nch VDD=1.2V
VDS=0.1V 0.38 0.8 mA
IRESETB Output Current
(RESETB Output pin) Pch *2 VDD=6.0V
VDS=0.5V 0.65 0.9 mA
WDT Part
Symbol Item Conditions Min. Typ. Max. Unit
tWD Watchdog Timeout period CTW=0.1µF *1 230 310 450 ms
tWR Reset Hold Time of WDT CTW=0.1µF *1 29 34 48 ms
VSCKH SCK Input "H" VDD×0.8 6.0 V
VSCKL SCK Input "L" 0 VDD×0.2 V
tSCKW SCK Input Pulse Width VSCKL=VDD×0.2
VSCKH=VDD×0.8 500 ns
All of unit are tested and specified under load conditions such that Topt=25°C except for Detector Threshold
Temperature Coefficient.
*1) The specification does not contain the temperature characteristics of the external capacitor.
*2) In case of CMOS type (R5105Nxx1C)
RECOMMENDED OPERATING CONDITIONS (ELECTRICAL CHARACTERISTICS)
All of electronic equipment should be designed that the mounted semiconductor devices operate within the
recommended operating conditions.
The semiconductor devices cannot operate normally over the recommended operating conditions, even if
when they are used over such conditions by momentary electronic noise or surge.
And the semiconductor devices may receive serious damage when they continue to operate over the
recommended operating conditions.
R5105N
6
TIMING CHART
-VDET
+VDET
VRESETB
tWR
VCTW
VSCK
VDD
Vref2H
Vref2L
tPLH
tPHL tPHL
tPLH
tWDI
(1) (2) (4) (1)(3)
tWD
-VTCD
+VTCD
VCD
OPERATION
(1) When the power supply, VDD pin voltage becomes more than the released voltage (+VDET), after the released
delay time (or the power on reset time tPLH), the output of RESETB becomes "H" level.
(2) When the SCK pulse is input, the watchdog timer (WDT) is cleared, and CTW pin mode changes from the
discharge mode to the charge mode. When the CTW pin voltage becomes higher than VrefH, the mode will
change into the discharge mode, and next watchdog time count starts.
(3) Unless the SCK pulse is input, WDT will not be cleared, and during the charging period of CTW pin,
RESETB="L".
(4) When the VDD pin becomes lower than the detector threshold voltage(-VDET), RESETB outputs "L".
∗) VTCD : Threshold voltage of CD pin when a power-on reset pulse inverting.
∗) Vref2H : CTW pin voltage at the end of WDT timeout period.
∗) Vref2L : CTW pin voltage at the begin of WDT timeout period.
R5105N
7
Watchdog Timeout period/Reset hold time
The watchdog timeout period and reset hold time can be set with an external capacitor to CTW pin.
The next equations describe the relation between the watchdog timeout period and the external capacitor
value, or the reset hold time and the external capacitor value.
t
WD (s) = 3.1×106×C (F)
t
WR (s) = tWD/9
The watchdog timer (WDT) timeout period is determined with the discharge time of the external capacitor.
During the watchdog timeout period, if the clock pulse from the system is detected, WDT is cleared and the
capacitor is charged. When the charge of the capacitor completes, another watchdog timeout period starts
again. During the watchdog timeout period, if the clock pulse from the system is not detected, during the next
reset hold time RESETB pin outputs "L".
After starting the watchdog timeout period, (just after from the discharge of the external capacitor) even if the
clock pulse is input during the time period "tWDI", the clock pulse is ignored.
tWDI (s) = tWD/10
Released Delay Time (Power-on Reset delay time)
The released delay time can be set with an external capacitor connected to the CD pin. The next equation
describes the relation between the capacitance value and the released delay time (tPLH).
tPLH (s) =3.7×106× C (F)
When the VDD voltage becomes equal or less than (-VDET), discharge of the capacitor connected to the CD pin
starts. Therefore, if the discharge is not enough and VDD voltage returns to (+VDET) or more, thereafter the delay
time will be shorter than tPLH which is expected.
Power on Reset Operation against the input glitch (tPLH1<tPLH)
VDD
VCD
VRESETB
Complete
Discharge
+VDET
-VDET
+VTCD
-VTCD
tPLH1
0V
0V
0V
tPLH
Incomplete
Discharge
Minimum Operating Voltage
We specified the minimum operating voltage as the minimum input voltage in which the condition of RESETB
pin being 0.1V or lower than 0.1V. (Herein, pull-up resistance is set as 100kin the case of the Nch open-drain
output type.)
R5105N
8
RESETB Output
RESETB pin's output type is selectable either the Nch open-drain output or CMOS output. If the Nch
open-drain type output is selected, the RESETB pin is pulled up with an external resistor to an appropriate
voltage source.
Clock Pulse Input
Built-in watchdog timer is cleared with the SCK clock pulse within the watchdog timeout period.
R5105N
9
TYPICAL APPLICATIONS
CD
VDD
RESET
I/O
R
CTW
GND
VDD
CD
RESETB
SCK
CTW
3
6
5
2
4
1
Microprocessor
R5105Nxx1A
Series
Power Supply
CD
VDD
RESET
I/O
CTW
GND
VDD
CD
RESETB
SCK
CTW
3
6
5
2
4
1
Microprocessor
R5105Nxx1C
Series
Power Supply
TEST CIRCUITS
CD
Clock Input
R (R5105Nxx1A)
A
GND
VDD
CD
RESETB
SCK
CTW
3
6
5
2
4
1
R5105Nxx1A/C
Series
CTW
Supply Current Test Circuit
R5105N
10
TYPICAL CHARACTERISTICS
1) Supply Current vs. Input Voltage
R510xx151x R510xx301x
0542316
Input Voltage VDD (V)
Supply Current ISS (µA)
0
20
12
8
6
16
14
10
18
4
2
105°C
25°C
-40°C
0542316
Input Voltage VDD (V)
Supply Current ISS (µA)
0
20
12
8
6
16
14
10
18
4
2
105°C
25°C
-40°C
2) Detector Threshold vs. Temperature
R510xx151x R510xx271x
1.47
1.53
1.48
1.49
1.51
1.50
1.52
-40 7550025-25 105
Temperature Topt (°C)
Detector Threshold -V
DET
(V)
-40 7550025-25 105
2.66
2.74
2.67
2.68
2.70
2.72
2.73
2.69
2.71
Temperature Topt (°C)
Detector Threshold -VDET (V)
R510xx421x
4.12
4.28
4.14
4.16
4.20
4.24
4.26
4.18
4.22
-40 7550025-25 105
Temperature Topt (°C)
Detector Threshold -V
DET
(V)
R5105N
11
3) Detector Threshold Hysteresis vs. Temperature
R510xx151x R510xx271x
3
7
4
5
6
-40 7550025-25 105
Temperature Topt (°C)
Detector Threshold Hysteresys HYS (%)
3
7
4
5
6
-40 7550025-25 105
Temperature Topt (°C)
Detector Threshold Hysteresys HYS (%)
R510xx421x
3
7
4
5
6
-40 7550025-25 105
Temperature Topt (°C)
Detector Threshold Hysteresys HYS (%)
4) Nch Driver Output Current vs. VDS
R510xx
0 0.6 1.00.8 1.20.40.2 1.4
V
DS
(V)
Nch Driver Output Current I
RESETB
(mA)
0
20
16
18
12
8
4
14
10
6
2
V
DD
=5.0V
V
DD
=4.0V
V
DD
=6.0V
V
DD
=3.0V
V
DD
=2.0V
V
DD
=1.5V
V
DD
=1.0V
R5105N
12
5) Nch Driver Output Current vs. Input Voltage
R510xx R510xx
0354216
Input Voltage V
DD
(V)
Nch Driver Output Current I
RESETB
(mA)
0
20
16
18
12
8
4
14
10
6
2
Topt=25°C
Topt=105°C
Topt=-
40°C
V
DS
=0.3V
0354216
Input Voltage V
DD
(V)
Nch Driver Output Current I
RESETB
(mA)
0
20
16
18
12
8
4
14
10
6
2
Topt=25°C
Topt=105°C
Topt=-
40°C
V
DS
=0.5V
6) Pch Driver Output Current vs. Input Voltage
R510xx R510xx
0354216
Input Voltage V
DD
(V)
Pch Driver Output Current I
RESETB
(mA)
0
2.0
1.6
1.8
1.2
0.8
0.4
1.4
1.0
0.6
0.2
Topt=25°C
Topt=105°C
Topt=-
40°C
V
DS
=0.3V
0354216
Input Voltage V
DD
(V)
Pch Driver Output Current I
RESETB
(mA)
0
2.0
1.6
1.8
1.2
0.8
0.4
1.4
1.0
0.6
0.2
Topt=25°C
Topt=105°C
Topt=-
40°C
V
DS
=0.5V
R510xx
0354216
Input Voltage V
DD
(V)
Pch Driver Output Current I
RESETB
(mA)
0
2.0
1.6
1.8
1.2
0.8
0.4
1.4
1.0
0.6
0.2
Topt=25°C
Topt=105°C
Topt=-
40°C
V
DS
=1.0V
R5105N
13
7) Released Delay Time vs. Input Voltage 8) Released Dela y Time vs. Temperature
R510xx R510xx
03564217
Input Voltage V
DD
(V)
Output Delay Time t
PLH
(ms)
300
500
460
480
420
380
340
440
400
360
320
Topt=25°C
-40 7550025-25 105
Temperature Topt (°C)
Output Delay Time tPLH (ms)
300
500
460
480
420
380
340
440
400
360
320
VDD=6V
9) Detector Output Delay Time vs. Temperature 10) WDT Reset Timer vs. Temperature
R510xx R510xx
-40 7550025-25 105
Temperature Topt
(°C)
Detect Delay Time t
PHL
(µs)
0
100
80
90
60
40
20
70
50
30
10
1µs
-V
DET
+1V
Input Voltage -V
DET
-
1V
-40 7550025-25 105
Temperature Topt
(°C)
WDT Reset Time t
WR
(ms)
30
50
46
48
42
38
34
44
40
36
32
11) WDT Timeout Period vs. Temperature 12) WDT Reset Timer vs. Input Voltage
R510xx R510xx
-40 7550025-25 105
Temperature Topt
(°C)
WDT Timeout Period t
WD
(ms)
200
400
360
380
320
280
240
340
300
260
220
153426
Input Voltage V
DD
(V)
WDT Reset Time t
WR
(ms)
30
50
46
48
42
38
34
44
40
36
32
R5105N
14
13) WDT Timeout Period vs. Input Voltage 14) Output Delay Time vs. External Capacitance
R510xx R510xx
153426
Input Voltage V
DD
(V)
WDT Timeout Period t
WD
(ms)
200
400
360
380
320
280
240
340
300
260
220
0.1 101 100
External Capacitance C
D
(nF)
Delay Time t
PLH
/t
PHL
(ms)
0.001
100
10
1
1000
0.01
0.1
t
PHL
t
PLH
1µs1µs
-V
DET
+1V
Input
Voltage -V
DET
-
1V
TECHNICAL NOTES
When R510xxxx1A (Nch Open Drain Output Type) is used in Figure A or Figure B, if impedance of Voltage
Supply pin, VDD and VDD of this IC is large, detector threshold level would shift by voltage dropdown caused by
the consumption current of the IC itself. Released voltage may also shift and delay time for start-up might be
generated by this usage.
When R510xxxx1C (CMOS Output Type) is used in Figure A or Figure B, Output level could be unstable by
cross conduction current which is generated at detector threshold level or at released voltage level, therefore,
do not use this IC with the connection in Figure A or Figure B.
The connection in Figure C may cause the oscillation in both R510xxxx1A (Nch Open Drain Output) and
R510xxxx1C (CMOS Output), therefore do not use R510xx Series with the connection in Figure C.
R510xx Series
RESETB
GND
R2
R1
VDD
R510xx Series
RESETB
GND
R1
VDD
R510xx Series
RESETB
GND
R1
VDD
VDD VDD VDD
R2
Figure A Figure B Figure C
PACKAGE INFORMATION PE-SOT-23-6-0611
SOT-23-6 (SC-74) Unit: mm
PACKAGE DIMENSIONS
45
2
6
1
1.9±0.2
0.8±0.1
0 to 0.1
0.4+0.1
0.2
1.1+0.2
0.1
2.9±0.2
2.8±0.3
1.6+0.2
0.1
(0.95) (0.95)
+0.1
0.05
0.15
0.2 Min.
TAPING SPECIFICATION
564
213
2.0
±
0.05
4.0
±
0.1
0.3
±
0.1 φ1.5+0.1
0
3.3
4.0
±
0.1
2.0Max.
TR
User Direction of Feed
3.5
±
0.05
8.0
±
0.3
1.75
±
0.1
3.2
1.1±0.1
TAPING REEL DIMENSIONS REUSE REEL (EIAJ-RRM-08Bc)
(1reel=3000pcs)
11.4
±
1.0
9.0
±
0.3
2
±
0.5
13
±
0.2
180
60
0
1.5
+1
0
21
±
0.8
PACKAGE INFORMATION PE-SOT-23-6-0611
POWER DISSIPATION (SOT-23-6)
This specification is at mounted on board. Power Dissipation (PD) depends on conditions of mounting on board.
This specification is based on the measurement at the condition below:
Measurement Conditions
Standard Land Pattern
Environment Mounting on Board (Wind velocity=0m/s)
Board Material Glass cloth epoxy plactic (Double sided)
Board Dimensions 40mm × 40mm × 1.6mm
Copper Ratio Top side : Approx. 50% , Back side : Approx. 50%
Through-hole φ0.5mm × 44pcs
Measurement Result
(Topt=25°C,Tjmax=125°C)
Standard Land Pattern Free Air
Power Dissipation 420mW 250mW
Thermal Resistance θja=(12525°C)/0.42W=263°C/W 400°C/W
0 50 10025 75 85 125 150
Ambient Temperature (°C)
0
200
100
300
400 420
500
600
Power Dissipation P
D
(mW)
On Board
40
40
Power Dissipation Measurement Board Pattern
IC Mount Area Unit : mm
RECOMMENDED LAND PATTERN
0.7 MAX.
0.95
0.951.9
2.4
1.0
(Unit: mm)
MARK INFORMATION ME-R5105N-080605
R5105N SERIES MARK SPECIFICATION
SOT-23-6 (SC-74)
1 2 3 4
1
,
2
: Product Code (refer to Part Number vs. Product Code)
3
,
4
: Lot Number
Part Number vs. Product Code
R5105Nxx1A Series R5105Nxx1C Series
Product Code Product Code Product Code
Product Code
Part Number
1
2
Part Number
1
2
Part Number
1
2
Part Number
1
2
R5105N151A 1 A R5105N391A 2 A R5105N151C 3 A R5105N391C 4 A
R5105N161A 1 B R5105N401A 2 B R5105N161C 3 B R5105N401C 4 B
R5105N171A 1 C R5105N411A 2 C R5105N171C 3 C R5105N411C 4 C
R5105N181A 1 D R5105N421A 2 D R5105N181C 3 D R5105N421C 4 D
R5105N191A 1 E R5105N431A 2 E R5105N191C 3 E R5105N431C 4 E
R5105N201A 1 F R5105N441A 2 F R5105N201C 3 F R5105N441C 4 F
R5105N211A 1 G R5105N451A 2 G R5105N211C 3 G R5105N451C 4 G
R5105N221A 1 H R5105N461A 2 H R5105N221C 3 H R5105N461C 4 H
R5105N231A 1 J R5105N471A 2 J R5105N231C 3 J R5105N471C 4 J
R5105N241A 1 K R5105N481A 2 K R5105N241C 3 K R5105N481C 4 K
R5105N251A 1 L R5105N491A 2 L R5105N251C 3 L R5105N491C 4 L
R5105N261A 1 M R5105N501A 2 M R5105N261C 3 M R5105N501C 4 M
R5105N271A 1 N R5105N511A 2 N R5105N271C 3 N R5105N511C 4 N
R5105N281A 1 P R5105N521A 2 P R5105N281C 3 P R5105N521C 4 P
R5105N291A 1 Q R5105N531A 2 Q R5105N291C 3 Q R5105N531C 4 Q
R5105N301A 1 R R5105N541A 2 R R5105N301C 3 R R5105N541C 4 R
R5105N311A 1 S R5105N551A 2 S R5105N311C 3 S R5105N551C 4 S
R5105N321A 1 T R5105N321C 3 T
R5105N331A 1 U R5105N331C 3 U
R5105N341A 1 V R5105N341C 3 V
R5105N351A 1 W R5105N351C 3 W
R5105N361A 1 X R5105N361C 3 X
R5105N371A 1 Y R5105N371C 3 Y
R5105N381A 1 Z R5105N381C 3 Z