NVMFS6H800N Power MOSFET 80 V, 2.1 mW, 203 A, Single N-Channel Features * * * * * * Small Footprint (5x6 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low QG and Capacitance to Minimize Driver Losses NVMFS6H800NWF - Wettable Flank Option for Enhanced Optical Inspection AEC-Q101 Qualified and PPAP Capable These Devices are Pb-Free and are RoHS Compliant www.onsemi.com V(BR)DSS RDS(ON) MAX ID MAX 80 V 2.1 mW @ 10 V 203 A MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RqJC (Notes 1, 3) TC = 25C Power Dissipation RqJC (Note 1) Continuous Drain Current RqJA (Notes 1, 2, 3) Steady State Pulsed Drain Current Value Unit VDSS 80 V VGS 20 V ID 203 A TC = 100C TC = 25C Steady State PD ID A 28 MARKING DIAGRAM PD W 3.8 900 A TJ, Tstg -55 to + 175 C IS 166 A Single Pulse Drain-to-Source Avalanche Energy (IL(pk) = 16.1 A) EAS 1271 mJ Lead Temperature for Soldering Purposes (1/8 from case for 10 s) TL 260 C Source Current (Body Diode) D 1 1.9 IDM Operating Junction and Storage Temperature S (1,2,3) N-CHANNEL MOSFET 20 TA = 100C TA = 25C, tp = 10 ms G (4) W 200 100 TA = 100C TA = 25C D (5,6) 143 TC = 100C TA = 25C Power Dissipation RqJA (Notes 1 & 2) Symbol Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. DFN5 (SO-8FL) CASE 488AA STYLE 1 S S S G D XXXXXX AYWZZ D D XXXXXX = 6H800N XXXXXX = (NVMFS6H800N) or XXXXXX = 800NWF XXXXXX = (NVMFS6H800NWF) A = Assembly Location Y = Year W = Work Week ZZ = Lot Traceability THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Unit Junction-to-Case - Steady State RqJC 0.75 C/W Junction-to-Ambient - Steady State (Note 2) RqJA 39 ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet. 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface-mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. (c) Semiconductor Components Industries, LLC, 2017 August, 2017 - Rev. 1 1 Publication Order Number: NVMFS6H800N/D NVMFS6H800N ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified) Parameter Symbol Test Condition Min Drain-to-Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 80 Drain-to-Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS Gate-to-Source Leakage Current V 39 VGS = 0 V, VDS = 80 V mV/C TJ = 25 C 10 TJ = 125C 250 IGSS VDS = 0 V, VGS = 20 V VGS(TH) VGS = VDS, ID = 330 mA 100 mA nA ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Threshold Temperature Coefficient VGS(TH)/TJ Drain-to-Source On Resistance Forward Transconductance RDS(on) 2.0 4.0 8.0 VGS = 10 V gFS ID = 50 A VDS =15 V, ID = 50 A 1.8 V mV/C 2.1 138 mW S CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS 5530 VGS = 0 V, f = 1 MHz, VDS = 40 V 760 pF 27 Total Gate Charge QG(TOT) VGS = 10 V, VDS = 40 V; ID = 50 A Threshold Gate Charge QG(TH) 15 Gate-to-Source Charge QGS 26 Gate-to-Drain Charge QGD Plateau Voltage VGP 4.8 td(ON) 25 VGS = 10 V, VDS = 40 V; ID = 50 A 85 nC 16 V SWITCHING CHARACTERISTICS (Note 5) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time tr td(OFF) VGS = 10 V, VDS = 64 V, ID = 50 A, RG = 2.5 W tf 89 ns 97 85 DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25C 0.8 TJ = 125C 0.7 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 50 A 1.2 V 76 VGS = 0 V, dIS/dt = 100 A/ms, IS = 50 A QRR 36 ns 40 82 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 5. Switching characteristics are independent of operating junction temperatures. www.onsemi.com 2 NVMFS6H800N TYPICAL CHARACTERISTICS 350 5.5 V to 10 V 5.0 V ID, DRAIN CURRENT (A) 300 250 200 150 VDS = 10 V 300 ID, DRAIN CURRENT (A) 350 4.5 V 100 250 200 150 TJ = 25C 100 50 50 VGS = 4.0 V TJ = 125C 0 0 1 2 3 5 4 6 7 8 2 30 25 20 15 10 5 0 4 5 6 7 8 9 10 VGS, GATE-TO-SOURCE VOLTAGE (V) 3.0 TJ = 25C 2.8 2.6 2.4 2.2 2.0 VGS = 10 V 1.8 1.6 1.4 1.2 1.0 0 100 50 150 200 250 300 ID, DRAIN CURRENT (A) Figure 3. On-Resistance vs. Gate-to-Source Voltage Figure 4. On-Resistance vs. Drain Current and Gate Voltage 1M 2.4 VGS = 10 V ID = 50 A TJ = 175C TJ = 150C 100K IDSS, LEAKAGE (nA) RDS(on), NORMALIZED DRAIN-TO- SOURCE RESISTANCE 6 Figure 2. Transfer Characteristics TJ = 25C ID = 50 A 2.2 5 Figure 1. On-Region Characteristics 35 2.0 4 VGS, GATE-TO-SOURCE VOLTAGE (V) 40 3 3 TJ = -55C VDS, DRAIN-TO-SOURCE VOLTAGE (V) RDS(on), DRAIN-TO-SOURCE RESISTANCE (mW) RDS(on), DRAIN-TO-SOURCE RESISTANCE (mW) 0 1.8 1.6 1.4 1.2 1.0 0.8 10K TJ = 125C 1K TJ = 85C 100 TJ = 25C 10 0.6 0.4 -50 -25 1 0 25 50 75 100 125 150 175 5 15 25 35 45 55 65 75 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current vs. Voltage www.onsemi.com 3 NVMFS6H800N TYPICAL CHARACTERISTICS CISS 1K COSS 100 VGS = 0 V TJ = 25C f = 1 MHz CRSS 10 0 10 20 30 40 50 60 70 10 VGS, GATE-TO-SOURCE VOLTAGE (V) C, CAPACITANCE (pF) 10K 9 8 7 6 QGD QGS 5 4 3 VDS = 40 V TJ = 25C ID = 50 A 2 1 0 80 10 0 30 20 50 40 60 QG, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate-to-Source vs. Total Charge 1K 80 70 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 1K IS, SOURCE CURRENT (A) VGS = 0 V t, TIME (ns) 100 tr td(off) 100 tf VGS = 10 V VDS = 64 V ID = 50 A td(on) 10 TJ = 125C 1 1 10 100 TJ = -55C TJ = 25C 0.1 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 RG, GATE RESISTANCE (W) VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 1000 1K TC = 25C VGS 10 V Single Pulse TJ (initial) = 25C 100 100 10 ms IPEAK, (A) ID, DRAIN CURRENT (A) 10 10 1 RDS(on) Limit Thermal Limit Package Limit 10 0.5 ms 1 ms 10 ms 1 0.1 0.1 1 10 TJ (initial) = 100C 0.00001 1K 100 0.0001 0.001 VDS, DRAIN-TO-SOURCE VOLTAGE (V) TIME IN AVALANCHE (s) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. IPEAK vs. Time in Avalanche www.onsemi.com 4 0.01 NVMFS6H800N TYPICAL CHARACTERISTICS 100 50% Duty Cycle RqJA(t) (C/W) 10 1 20% 10% 5% 2% 1% 0.1 0.01 Single Pulse 0.001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 t, PULSE TIME (sec) Figure 13. Thermal Response DEVICE ORDERING INFORMATION Device Marking Package Shipping NVMFS6H800NT1G 6H800N DFN5 (Pb-Free) 1500 / Tape & Reel NVMFS6H800NWFT1G 800NWF DFN5 (Pb-Free, Wettable Flanks) 1500 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 5 NVMFS6H800N PACKAGE DIMENSIONS DFN5 5x6, 1.27P (SO-8FL) CASE 488AA ISSUE M 2X 0.20 C D A 2 B D1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 2X 0.20 C 4X E1 2 q E c 1 2 3 DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q A1 4 TOP VIEW C SEATING PLANE DETAIL A 0.10 C A 0.10 C SIDE VIEW 0.10 8X b C A B 0.05 c DETAIL A RECOMMENDED SOLDERING FOOTPRINT* e/2 1 STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 2X 0.495 e L MILLIMETERS MIN NOM MAX 1.10 0.90 1.00 0.00 --- 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.00 5.30 5.15 4.70 4.90 5.10 3.80 4.00 4.20 6.00 6.30 6.15 5.70 5.90 6.10 3.45 3.65 3.85 1.27 BSC 0.51 0.575 0.71 1.20 1.35 1.50 0.51 0.575 0.71 0.125 REF 3.00 3.40 3.80 0_ --- 12 _ 4.560 2X 1.530 4 K 3.200 E2 PIN 5 (EXPOSED PAD) G L1 4.530 M D2 1.330 2X 0.905 1 BOTTOM VIEW 0.965 4X 1.000 4X 0.750 1.270 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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