TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 D D D D D D D, P, OR PW PACKAGE (TOP VIEW) A-Suffix Versions Offer 5-mV VIO B-Suffix Versions Offer 2-mV VIO Wide Range of Supply Voltages 1.4 V to 16 V True Single-Supply Operation Common-Mode Input Voltage Includes the Negative Rail Low Noise . . . 30 nV/Hz Typ at f = 1 kHz (High-Bias Versions) 1OUT 1IN - 1IN + VDD - /GND 1 8 2 7 3 6 4 5 VDD 2OUT 2IN - 2IN + symbol (each amplifier) description + IN + The TLC252, TLC25L2, and TLC25M2 are OUT IN - - low-cost, low-power dual operational amplifiers designed to operate with single or dual supplies. These devices utilize the Texas Instruments silicon gate LinCMOS process, giving them stable input offset voltages that are available in selected grades of 2, 5, or 10 mV maximum, very high input impedances, and extremely low input offset and bias currents. Because the input common-mode range extends to the negative rail and the power consumption is extremely low, this series is ideally suited for battery-powered or energy-conserving applications. The series offers operation down to a 1.4-V supply, is stable at unity gain, and has excellent noise characteristics. These devices have internal electrostatic-discharge (ESD) protection circuits that prevent catastrophic failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.1. However, care should be exercised in handling these devices as exposure to ESD may result in a degradation of the device parametric performance. AVAILABLE OPTIONS TA 0C to 70C VIOmax AT 25C PACKAGED DEVICES SMALL OUTLINE (D) PLASTIC DIP (P) TSSOP (PW) CHIP FORM (Y) 10 mV 5 mV 2 mV TLC252CD TLC252ACD TLC252BCD TLC252CP TLC252ACP TLC252BCP TLC252CPW TLC252ACPW TLC252BCPW TLC252Y -- -- 10 mV 5 mV 2 mV TLC25L2CD TLC25L2ACD TLC25L2BCD TLC25L2CP TLC25L2ACP TLC25L2BCP TLC25L2CPW TLC25L2ACPW TLC25L2BCPW TLC25L2Y -- -- 10 mV 5 mV 2 mV TLC25M2CD TLC25M2ACD TLC25M2BCD TLC25M2CP TLC25M2ACP TLC25M2BCP -- -- -- TLC25M2Y -- -- The D package is available taped and reeled. Add the suffix R to the device type (e.g., TLC252CDR). Chips are tested at 25C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LinCMOS is a trademark of Texas Instruments. Copyright 2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 description (continued) Because of the extremely high input impedance and low input bias and offset currents, applications for the TLC252/ 25_2 series include many areas that have previously been limited to BIFET and NFET product types. Any circuit using high-impedance elements and requiring small offset errors is a good candidate for cost-effective use of these devices. Many features associated with bipolar technology are available with LinCMOS operational amplifiers without the power penalties of traditional bipolar devices. General applications such as transducer interfacing, analog calculations, amplifier blocks, active filters, and signal buffering are all easily designed with the TLC252 / 25_2 series devices. Remote and inaccessible equipment applications are possible using their low-voltage and low-power capabilities. The TLC252 / 25_2 series is well suited to solve the difficult problems associated with single-battery and solar-cell-powered applications. This series includes devices that are characterized for the commercial temperature range and are available in 8-pin plastic dip and the small-outline package. The device is also available in chip form. The TLC252 / 25_2 series is characterized for operation from 0C to 70C. equivalent schematic (each amplifier) VDD IN + IN - 8 3, 5 ESDProtective Network 2, 6 ESDProtective Network 1, 7 VDD - /GND 2 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 OUT TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 TLC252Y, TLC25L2Y, and TLC25M2Y chip information These chips, properly assembled, display characteristics similar to the TLC252 / 25_2. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS (5) (4) (3) VDD (8) (3) + 1IN + (6) (2) - 1IN - 2OUT 60 (1) 1OUT (2) + (7) - (5) (6) 2IN + 2IN - (4) VDD - /GND CHIP THICKNESS: 15 TYPICAL (1) (7) BONDING PADS: 4 x 4 MINIMUM TJMAX = 150C (8) TOLERANCES ARE 10%. 73 ALL DIMENSIONS ARE IN MILS. PIN (4) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Input voltage range, VI (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.3 V to 18 V Duration of short circuit at (or below) 25C free-air temperature (see Note 3) . . . . . . . . . . . . . . . . . . unlimited Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to VDD - /GND. 2. Differential voltages are at IN+, with respect to IN -. 3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure the maximum dissipation rating is not exceeded. DISSIPATION RATING TABLE TA 25C POWER RATING DERATING FACTOR ABOVE TA = 25C TA = 70C POWER RATING D 725 mW 5.8 mW/C 464 mW P 1000 mW 8.0 mW/C 640 mW PW 525 mW 4.2 mW/C 336 mW PACKAGE recommended operating conditions MIN Supply voltage, VDD Common mode input voltage, Common-mode voltage VIC VDD = 1.4 V VDD = 5 V VDD = 10 V VDD = 16 V Operating free-air temperature, TA 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MAX 1.4 16 0 0.2 - 0.2 4 - 0.2 9 - 0.2 14 0 70 UNIT V V C TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 1.4 V (unless otherwise noted) PARAMETER TLC25_2C VIO Input offset voltage TLC25_2AC TLC252_C TEST CONDITIONS 2V VO = 0 0.2 V, RS = 50 TLC25_2BC MIN TLC25L2_C MAX MIN TYP TLC25M2_C MAX MIN TYP MAX 25C 10 10 10 0C to 70C 12 12 12 25C 5 5 5 0C to 70C 6.5 6.5 6.5 25C 2 2 2 0C to 70C 3 3 3 VIO Average temperature coefficient of input offset voltage IIO Input offset current VO = 0.2 V 0C to 70C IIB Input bias current VO = 0.2 V 0C to 70C 25C to 70C 1 25C 1 VICR Common-mode input voltage range VOM Peak output voltage swing AVD Large-signal differential voltage amplification CMRR Common-mode rejection ratio IDD Supply current 1 60 1 0 to 0.2 VID = 100 mV 25C 450 VO = 100 to 300 mV, RS = 50 25C 60 1 25C 700 1 700 600 450 20 77 60 77 375 25 60 34 pA 60 0 to 0.2 450 mV 60 300 60 0 to 0.2 300 1 600 10 60 60 UNIT V/C 1 300 600 25C 25C 1 300 25C VO = 0.2 V, VIC = VICRmin VO = 0.2 V, No load TYP pA V 700 mV 20 V/mV 77 dB 200 250 A All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified. Unless otherwise noted, an output load resistor is connected from the output to ground and has the following value: for low bias RL = 1 M, for medium bias RL = 100 k, and for high bias RL = 10 k. The output swings to the potential of VDD - /GND. operating characteristics, VDD = 1.4 V, TA = 25C PARAMETER TEST CONDITIONS B1 Unity-gain bandwidth AV = 40 dB, CL = 10 pF, RS = 50 SR Slew rate at unity gain Overshoot factor TLC252_C MIN TYP TLC25L2_C MAX MIN TYP 12 12 See Figure 1 0.1 See Figure 1 30% POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MAX TLC25M2_C MIN TYP MAX UNIT 12 kHz 0.001 0.01 V/s 35% 35% 5 TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA TLC252C, TLC252AC, TLC252BC MIN TLC252C VIO Input offset voltage VO = 1.4 V,, RS = 50 , VIC = 0,, RL = 10 k VIC = 0,, RL = 10 k Full range TLC252BC VO = 1.4 V,, RS = 50 , VIC = 0,, RL = 10 k Full range IIO Input offset current (see Note 4) VO = 2 2.5 5V V, VIC = 2 2.5 5V IIB Input bias current (see Note 4) VO = 2 2.5 5V V, VIC = 2 2.5 5V VOH VOL Low-level output voltage VID = 100 mV, RL = 10 k VID = - 100 mV, IOL = 0 CMRR kSVR IDD Large-signal L i l differential diff ti l voltage lt am lification amplification Common-mode rejection ratio VO = 0.25 V to 2 V, RL = 10 k VIC = VICRmin Supply-voltage S l lt rejection j ti ratio ti (VDD /VDD) VDD = 5 V to 10 V, Supply current (two amplifiers) VO = 2 2.5 5V V, No load VO = 1.4 V VIC = 2 2.5 5V V, 0.23 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 mV 2 3 V/C 25C to 70C 1.8 25C 0.1 60 70C 7 300 25C 0.6 60 70C 40 600 25C - 0.2 to 4 Full range - 0.2 to 3.5 - 0.3 to 4.2 pA pA V V 25C 3.2 3.8 0C 3 3.8 70C 3 3.8 V 25C 0 50 0C 0 50 0 50 25C 5 23 0C 4 27 70C 4 20 25C 65 80 0C 60 84 70C 60 85 25C 65 95 0C 60 94 70C 60 96 mV V/mV dB dB 25C 1.4 3.2 0C 1.6 3.6 70C 1.2 2.6 Full range is 0C to 70C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. 6 5 6.5 70C AVD 10 0.9 25C Common-mode input voltage g range (see Note 5) High-level output voltage 1.1 UNIT 12 25C VO = 1.4 V,, RS = 50 , Average temperature coefficient of input offset voltage MAX Full range TLC252AC VIO VICR 25C TYP mA TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted) PARAMETER TA TEST CONDITIONS TLC252C, TLC252AC, TLC252BC MIN TLC252C VIO Input offset voltage VO = 1.4 V,, RS = 50 , VIC = 0,, RL = 10 k Full range TLC252BC VO = 1.4 V,, RS = 50 , VIC = 0,, RL = 10 k Full range IIO Input offset current (see Note 4) VO = 2 2.5 5V V, VIC = 2 2.5 5V IIB Input bias current (see Note 4) VO = 2 2.5 5V V, VIC = 2 2.5 5V VOH VOL Low-level output voltage RL = 10 k VID = - 100 mV, IOL = 0 0.29 CMRR kSVR IDD Large-signal L i l differential diff ti l voltage lt am lification amplification Common-mode rejection ratio VO = 1 V to 6 V, RL = 10 k VIC = VICRmin Supply-voltage S l lt rejection j ti ratio ti (VDD /VDD) VDD = 5 V to 10 V, Supply current (two amplifiers) VO = 5 V V, No load VO = 1.4 V VIC = 5 V, V mV 2 3 V/C 2 25C 0.1 60 70C 7 300 25C 0.6 60 70C 50 600 25C - 0.2 to 9 Full range - 0.2 to 8.5 - 0.3 to 9.2 pA pA V V 25C 8 8.5 0C 8 8.5 70C 7.8 8.4 V 25C 0 50 0C 0 50 0 50 70C AVD 5 6.5 25C to 70C VID = 100 mV, 10 0.9 25C Common-mode input voltage g range (see Note 5) High-level output voltage 1.1 UNIT 12 25C VO = 1.4 V,, RS = 50 , Average temperature coefficient of input offset voltage MAX Full range TLC252AC VIO VICR 25C VIC = 0,, RL = 10 k TYP 25C 10 36 0C 7.5 42 70C 7.5 32 25C 65 85 0C 60 88 70C 60 88 25C 65 95 0C 60 94 70C 60 96 mV V/mV dB dB 25C 1.9 4 0C 2.3 4.4 70C 1.6 3.4 mA Full range is 0C to 70C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 7 TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 operating characteristics, VDD = 5 V PARAMETER TEST CONDITIONS TA TLC252C, TLC252AC, TLC252BC MIN VI(PP) ( )=1V SR Slew rate at unity gain RL = 10 k,, See Figure 1 CL = 20 pF,, VI(PP) ( ) = 2.5 V Vn BOM B1 m Equivalent input noise voltage Maximum output-swing bandwidth Unity-gain bandwidth Phase margin f = 1 kHz, VO = VOH, See Figure VI = 10 mV, VI = 10 mV, mV See Figure 3 RS = 20 , F CL = 20 pF, CL = 20 pF, f = B1, See Figure 2 RL = 100 k, k See Figure 3 CL = 20 pF, pF TYP 25C 3.6 0C 4 70C 3 25C 2.9 0C 3.1 70C 2.5 25C 25 25C 320 0C 340 70C 260 25C 1.7 0C 2 70C 1.3 25C 46 0C 47 70C 43 UNIT MAX V/s nV/Hz kHz MHz operating characteristics, VDD = 10 V PARAMETER TEST CONDITIONS TA TLC252C, TLC252AC, TLC252BC MIN VI(PP) ( )=1V SR Slew rate at unity gain RL = 10 k,, See Figure 1 CL = 20 pF,, VI(PP) ( ) = 5.5 V Vn Equivalent input noise voltage f = 1 kHz, RS = 20 , See Figure 2 BOM Maximum output-swing bandwidth VO = VOH, See Figure 1 CL = 20 pF, F RL = 100 k, k B1 m 8 Unity-gain bandwidth Phase margin VI = 10 mV, mV VI = 10 mV, See Figure 3 CL = 20 pF, f = B1, POST OFFICE BOX 655303 See Figure 3 pF CL = 20 pF, * DALLAS, TEXAS 75265 TYP 25C 5.3 0C 5.9 70C 4.3 25C 4.6 0C 5.1 70C 3.8 25C 25 25C 200 0C 220 70C 140 25C 2.2 0C 2.5 70C 1.8 25C 49 0C 50 70C 46 UNIT MAX V/s nV/Hz kHz MHz TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TA TEST CONDITIONS TLC25L2C TLC25L2AC TLC25L2BC MIN VIO Input offset voltage VO = 1.4 V,, RS = 50 , VIC = 0,, RL = 1 M Full range TLC252AC VO = 1.4 V,, RS = 50 , VIC = 0,, RL = 1 M Full range TLC252BC VO = 1.4 V,, RS = 50 , VIC = 0,, RL = 1 M VIO Average temperature coefficient of input offset voltage IIO Input offset current (see Note 4) VO = 2 2.5 5V V, VIC = 2 2.5 5V IIB Input bias current (see Note 4) VO = 2 2.5 5V V, VIC = 2 2.5 5V VICR VOH VOL AVD CMRR kSVR IDD 25C TLC252C Low-level output voltage Large-signal L i l differential diff ti l voltage lt amplification am lification Common-mode rejection ratio VID = 100 mV, VDD = 5 V to 10 V, Supply current (two amplifiers) VO = 2 2.5 5V V, No load 10 5 6.5 0.204 3 V/C 1.1 25C 0.1 60 70C 7 300 25C 0.6 60 70C 50 600 RL = 1 M VO = 1.4 V VIC = 2 2.5 5V V, mV 2 25C to 70C VIC = VICRmin S l lt j ti ratio ti Supply-voltage rejection (VDD /VDD) 1.1 Full range IOL = 0 VO = 0.25 V to 2 V, MAX 0.9 25C RL = 1 M VID = - 100 mV, TYP 12 25C 25C - 0.2 to 4 Full range - 0.2 to 3.5 Common-mode input voltage g range (see Note 5) High-level output voltage UNIT - 0.3 to 4.2 pA pA V V 25C 3.2 4.1 0C 3 4.1 70C 3 4.2 V 25C 0 50 0C 0 50 70C 0 50 25C 50 700 0C 50 700 70C 50 380 25C 65 94 0C 60 95 70C 60 95 25C 70 97 0C 60 97 70C 60 98 mV V/mV dB dB 25C 20 34 0C 24 42 70C 16 28 A Full range is 0C to 70C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 9 TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA TLC25L2C TLC25L2AC TLC25L2BC MIN VIO Input offset voltage VO = 1.4 V,, RS = 50 , VIC = 0,, RL = 1 M Full range TLC252AC VO = 1.4 V,, RS = 50 , VIC = 0,, RL = 1 M Full range TLC252BC VO = 1.4 V,, RS = 50 , VIC = 0,, RL = 1 M VIO Average temperature coefficient of input offset voltage IIO Input offset current (see Note 4) VO = 5 V V, VIC = 5 V IIB Input bias current (see Note 4) VO = 5 V V, VIC = 5 V VICR VOH VOL AVD CMRR kSVR IDD 25C TLC252C Low-level output voltage Large-signal L i l differential diff ti l voltage lt amplification am lification Common-mode rejection ratio RL = 1 M VID = - 100 mV, IOL = 0 VO = 1 V to 6 V, RL = 1 M VIC = VICRmin S l lt j ti ratio ti Supply-voltage rejection (VDD /VDD) VDD = 5 V to 10 V, Supply current (two amplifiers) VO = 5 V V, No load VO = 1.4 V VIC = 5 V, V MAX 1.1 10 0.9 25C 0.235 Full range POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 mV 2 3 V/C 1 25C 0.1 60 70C 8 300 25C 0.7 60 70C 50 600 25C - 0.2 to 9 Full range - 0.2 to 8.5 - 0.3 to 9.2 pA pA V V 25C 8 8.9 0C 7.8 8.9 70C 7.8 8.9 V 25C 0 50 0C 0 50 70C 0 50 25C 50 860 0C 50 1025 70C 50 660 25C 65 97 0C 60 97 70C 60 97 25C 70 97 0C 60 97 70C 60 98 mV V/mV dB dB 25C 29 46 0C 36 66 70C 22 40 Full range is 0C to 70C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. 10 5 6.5 25C to 70C VID = 100 mV, TYP 12 25C Common-mode input voltage g range (see Note 5) High-level output voltage UNIT A TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 operating characteristics, VDD = 5 V PARAMETER TEST CONDITIONS TA TLC25L2C TLC25L2AC TLC25L2BC MIN VI(PP) ( )=1V SR Slew rate at unity gain RL = 1 M,, See Figure 1 CL = 20 pF,, VI(PP) ( ) = 2.5 V Vn BOM B1 m Equivalent input noise voltage Maximum M i output-swing t t i bandwidth Unity-gain bandwidth Phase margin f = 1 kHz, VO = VOH, See Figure VI = 10 mV, VI = 10 mV, mV See Figure 3 RS = 20 , CL = 20 pF, F CL = 20 pF, f = B1, See Figure 2 RL = 1 M, M See Figure 3 CL = 20 pF, pF TYP 25C 0.03 0C 0.04 70C 0.03 25C 0.03 0C 0.03 70C 0.02 25C 68 25C 5 0C 6 70C 4.5 25C 85 0C 100 70C 65 25C 34 0C 36 70C 30 UNIT MAX V/s nV/Hz kHz MHz operating characteristics, VDD = 10 V PARAMETER TEST CONDITIONS TA TLC25L2C TLC25L2AC TLC25L2BC MIN VI(PP) ( )=1V SR Slew rate at unity gain RL = 1 M,, See Figure 1 CL = 20 pF,, VI(PP) ( ) = 5.5 V Vn Equivalent input noise voltage f = 1 kHz, RS = 20 , See Figure 2 BOM Maximum M i output-swing t t i bandwidth VO = VOH, See Figure 1 CL = 20 pF, F RL = 1 M, M B1 m Unity-gain bandwidth Phase margin VI = 10 mV, mV VI = 10 mV, See Figure 3 CL = 20 pF, f = B1, POST OFFICE BOX 655303 See Figure 3 pF CL = 20 pF, * DALLAS, TEXAS 75265 TYP 25C 0.05 0C 0.05 70C 0.04 25C 0.04 0C 0.05 70C 0.04 25C 68 25C 1 0C 1.3 70C 0.9 25C 110 0C 125 70C 90 25C 38 0C 40 70C 34 UNIT MAX V/s nV/Hz kHz MHz 11 TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA TLC25M2C TLC25M2AC TLC25M2BC MIN VIO Input offset voltage VO = 1.4 V,, RS = 50 , VIC = 0,, RL = 100 k Full range TLC252AC VO = 1.4 V,, RS = 50 , VIC = 0,, RL = 100 k Full range TLC252BC VO = 1.4 V,, RS = 50 , VIC = 0,, RL = 100 k VIO Average temperature coefficient of input offset voltage IIO Input offset current (see Note 4) VO = 2 2.5 5V V, VIC = 2 2.5 5V IIB Input bias current (see Note 4) VO = 2 2.5 5V V, VIC = 2 2.5 5V VICR VOH VOL AVD CMRR kSVR IDD 25C TLC252C Low-level output voltage Large-signal L i l differential diff ti l voltage lt amplification am lification Common-mode rejection ratio VID = 100 mV, RL = 100 k VID = - 100 mV, IOL = 0 VO = 0.25 V to 2 V, RL = 100 k VIC = VICRmin S l lt j ti ratio ti Supply-voltage rejection (VDD /VDD) VDD = 5 V to 10 V, Supply current (two amplifiers) VO = 2 2.5 5V V, No load VO = 1.4 V VIC = 2 2.5 5V V, TYP MAX 1.1 10 12 25C 0.9 0.22 Full range POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 mV 2 3 V/C 25C to 70C 1.7 25C 0.1 60 70C 7 300 25C 0.6 60 70C 40 600 25C - 0.2 to 4 Full range - 0.2 to 3.5 - 0.3 to 4.2 pA pA V V 25C 3.2 3.9 0C 3 3.9 70C 3 4 V 25C 0 50 0C 0 50 70C 0 50 25C 25 170 0C 15 200 70C 15 140 25C 65 91 0C 60 91 70C 60 92 25C 70 93 0C 60 92 70C 60 94 mV V/mV dB dB 25C 210 560 0C 250 640 70C 170 440 Full range is 0C to 70C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. 12 5 6.5 25C Common-mode input voltage g range (see Note 5) High-level output voltage UNIT A TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted) PARAMETER TA TEST CONDITIONS TLC25M2C TLC25M2AC TLC25M2BC MIN VIO Input offset voltage VO = 1.4 V,, RS = 50 , VIC = 0,, RL = 100 k Full range TLC252AC VO = 1.4 V,, RS = 50 , VIC = 0,, RL = 100 k Full range TLC252BC VO = 1.4 V,, RS = 50 , VIC = 0,, RL = 100 k VIO Average temperature coefficient of input offset voltage IIO Input offset current (see Note 4) VO = 5 V V, VIC = 5 V IIB Input bias current (see Note 4) VO = 5 V V, VIC = 5 V VICR VOH VOL AVD CMRR kSVR IDD 25C TLC252C Low-level output voltage Large-signal L i l differential diff ti l voltage lt amplification am lification Common-mode rejection ratio VID = 100 mV, VID = - 100 mV, VO = 1 V to 6 V, VDD = 5 V to 10 V, Supply current (two amplifiers) VO = 5 V V, No load MAX 1.1 10 0.9 5 6.5 25C 0.224 Full range 3 V/C 2.1 25C 0.1 60 70C 7 300 25C 0.7 60 70C 50 600 RL = 100 k IOL = 0 RL = 100 k VO = 1.4 V VIC = 5 V, V mV 2 25C to 70C VIC = VICRmin S l lt j ti ratio ti Supply-voltage rejection (VDD /VDD) TYP 12 25C 25C - 0.2 to 9 Full range - 0.2 to 8.5 Common-mode input voltage g range (see Note 5) High-level output voltage UNIT - 0.3 to 9.2 pA pA V V 25C 8 8.7 0C 7.8 8.7 70C 7.8 8.7 V 25C 0 50 0C 0 50 70C 0 50 25C 25 275 0C 15 320 70C 15 230 25C 65 94 0C 60 94 70C 60 94 25C 70 93 0C 60 92 70C 60 94 mV V/mV dB dB 25C 285 600 0C 345 800 70C 220 560 A Full range is 0C to 70C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 13 TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 operating characteristics, VDD = 5 V PARAMETER TEST CONDITIONS TA TLC25M2C TLC25M2AC TLC25M2BC MIN VI(PP) ( )=1V SR Slew rate at unity gain RL = 100 k,, See Figure 1 CL = 20 pF,, VI(PP) ( ) = 2.5 V Vn BOM B1 m Equivalent input noise voltage Maximum output-swing bandwidth Unity-gain bandwidth Phase margin f = 1 kHz, VO = VOH, See Figure VI = 10 mV, VI = 10 mV, mV See Figure 3 RS = 20 , CL = 20 pF, F CL = 20 pF, f = B1, See Figure 2 RL = 100 k, k See Figure 3 CL = 20 pF, pF TYP 25C 0.43 0C 0.46 70C 0.36 25C 0.40 0C 0.43 70C 0.34 25C 32 25C 55 0C 60 70C 50 25C 525 0C 600 70C 400 25C 40 0C 41 70C 39 UNIT MAX V/s nV/Hz kHz MHz operating characteristics, VDD = 10 V PARAMETER TEST CONDITIONS TA TLC25M2C TLC25M2AC TLC25M2BC MIN VI(PP) ( )=1V SR Slew rate at unity gain RL = 100 k,, See Figure 1 CL = 20 pF,, VI(PP) ( ) = 5.5 V Vn Equivalent input noise voltage f = 1 kHz, RS = 20 , See Figure 2 BOM Maximum output-swing bandwidth VO = VOH, See Figure 1 CL = 20 pF, F RL = 100 k, k B1 m 14 Unity-gain bandwidth Phase margin VI = 10 mV, mV VI = 10 mV, See Figure 3 CL = 20 pF, f = B1, POST OFFICE BOX 655303 See Figure 3 pF CL = 20 pF, * DALLAS, TEXAS 75265 TYP 25C 0.62 0C 0.67 70C 0.51 25C 0.56 0C 0.61 70C 0.46 25C 32 25C 35 0C 40 70C 30 25C 635 0C 710 70C 510 25C 43 0C 44 70C 42 UNIT MAX V/s nV/Hz kHz MHz TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 electrical characteristics, VDD = 5 V, TA = 25C PARAMETER TEST CONDITIONS VO = 1.4 V, RS = 50 , TLC252Y MIN VIC = 0 V, See Note 6 TLC25L2Y TYP MAX 1.1 10 MIN TLC25M2Y TYP MAX 1.1 10 MIN TYP MAX 1.1 10 UNIT VIO Input offset voltage VIO Average temperature coefficient of input offset voltage IIO Input offset current (see Note 4) VO = VDD/2, VIC = VDD/2 0.1 60 0.1 60 0.1 60 pA IIB Input bias current (see Note 4) VO = VDD/2, VIC = VDD/2 0.6 60 0.6 60 0.6 60 pA VICR Common-mode input voltage range (see Note 5) VOH High-level output voltage VID = 100 mV, See Note 6 VOL Low-level output voltage VID = - 100 mV, IOL = 0 AVD Large-signal differential voltage amplification VO = 0.25 V, See Note 6 CMRR Common-mode rejection ratio kSVR IDD 1.8 1.1 mV V/C 1.7 - 0.2 to 4 - 0.3 to 4.2 - 0.2 to 4 - 0.3 to 4.2 - 0.2 to 4 - 0.3 to 4.2 V 3.2 3.8 3.2 4.1 3.2 3.9 V 0 50 0 50 0 50 mV 5 23 50 700 25 170 V/mV VIC = VICRmin 65 80 65 94 65 91 dB Supply-voltage rejection ratio (VDD /VIO) VDD = 5 V to 10 V, VO = 1.4 V 65 95 70 97 70 93 dB Supply current VO = VDD/2, VIC = VDD/2, No load 1.4 3.2 0.02 0.034 0.21 0.56 mA operating characteristics, VDD = 5 V, TA = 25C PARAMETER TEST CONDITIONS TLC252Y MIN TYP TLC25L2Y MAX MIN TYP TLC25M2Y MAX MIN TYP MAX UNIT Slew rate at unity gain CL = 20 pF,, See Note 6 VI(PP) = 1 V VI(PP) = 2.5 V 3.6 0.03 0.43 2.9 0.03 0.40 Vn Equivalent input noise voltage f = 1 kHz, RS = 20 2.5 68 32 nV/Hz BOM Maximum outputswing bandwidth VO = VOH, RL = 10 k CL = 20 pF, 320 5 55 kHz B1 Unity-gain bandwidth VI = 10 mV, CL = 20 pF 1.7 0.085 0.525 MHz m Phase margin f = B1, CL = 20 pF VI = 10 mV, 46 34 40 V/s NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. 6. For low-bias mode, RL = 1 M; for medium-bias mode, RL = 100 k, and for high-bias mode, RL = 10 k. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 15 TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 PARAMETER MEASUREMENT INFORMATION single-supply versus split-supply test circuits Because the TLC252, TLC25L2, and TLC25M2 are optimized for single-supply operation, circuit configurations used for the various tests often present some inconvenience since the input signal, in many cases, must be offset from ground. This inconvenience can be avoided by testing the device with split supplies and the output load tied to the negative rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either circuit gives the same result. VDD + VDD - - VO VI + CL VO VI + CL RL RL VDD - (a) SINGLE SUPPLY (b) SPLIT SUPPLY Figure 1. Unity-Gain Amplifier 2 k 2 k VDD VDD 20 - - VO 1/2 VDD VO + + 20 20 20 VDD- (a) SPLIT SUPPLY (a) SINGLE SUPPLY Figure 2. Noise-Test Circuit 10 k 10 k VDD+ VDD 100 VI VI 100 VO + VO 1/2 VDD - - CL + CL VDD- (a) SINGLE SUPPLY (a) SPLIT SUPPLY Figure 3. Gain-of-100 Inverting Amplifier 16 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 TYPICAL CHARACTERISTICS Table of Graphs FIGURE IDD Supply current AVD Large-signal differential voltage amplification Phase shift vs Supplyy voltage g vs Free-air temperature 4 5 Low bias vs Frequency 6 Medium bias vs Frequency 7 High bias vs Frequency 8 Low bias vs Frequency 6 Medium bias vs Frequency 7 High bias vs Frequency 8 SUPPLY CURRENT vs FREE-AIR TEMPERATURE SUPPLY CURRENT vs SUPPLY VOLTAGE 10000 10000 High-Bias Versions 1000 Medium-Bias Versions 100 Low-Bias Versions 10 1000 Medium-Bias Versions 100 Low-Bias Versions 10 0 0 0 2 4 6 8 VDD = 10 V VIC = 0 V VO = 2 V No Load High-Bias Versions I DD - Supply Current - A I DD - Supply Current - A VO = VIC = 0.2 VDD No Load TA = 25C 10 12 14 16 18 20 0 10 20 30 40 50 60 70 80 TA - Free-Air Temperature - C VDD - Supply Voltage - V Figure 4 Figure 5 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 17 TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 TYPICAL CHARACTERISTICS LOW-BIAS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY VDD = 10 V RL = 1 M TA = 25C 106 105 30 AVD (left scale) 104 60 103 90 Phase Shift (right scale) 102 AA AA AA 0 120 101 150 1 180 Phase Shift AVD AVD - Low-Bias Large-Signal Differential Voltage Amplification 107 0.1 0.1 1 10 100 1k 10 k 100 k Frequency - Hz Figure 6 MEDIUM-BIAS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY AA AA VDD = 10 V RL = 100 k TA = 25C 106 105 30 AVD (left scale) 104 60 103 90 Phase Shift (right scale) 102 120 101 150 1 180 0.1 1 10 100 1k 10 k 100 k Frequency - Hz Figure 7 18 0 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1M Phase Shift AVD A VD - Medium-Bias Large-Signal Differential Voltage Amplification 107 TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 TYPICAL CHARACTERISTICS HIGH-BIAS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY AA AA VDD = 10 V RL = 10 k TA = 25C 106 105 0 30 104 60 Phase Shift (right scale) 103 90 102 120 Phase Shift AVD AVD - High-Bias Large-Signal Differential Voltage Amplification 107 AVD (left scale) 101 150 1 180 0.1 10 100 1k 10 k 100 k 1M 10 M Frequency - Hz Figure 8 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 19 TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y LinCMOS DUAL OPERATIONAL AMPLIFIERS SLOS002I - JUNE 1983 - REVISED MARCH 2001 APPLICATION INFORMATION latch-up avoidance Junction-isolated CMOS circuits have an inherent parasitic PNPN structure that can function as an SCR. Under certain conditions, this SCR may be triggered into a low-impedance state, resulting in excessive supply current. To avoid such conditions, no voltage greater than 0.3 V beyond the supply rails should be applied to any pin. In general, the operational amplifier supplies should be applied simultaneously with, or before, application of any input signals. output stage considerations The amplifier's output stage consists of a source-follower-connected pullup transistor and an open-drain pulldown transistor. The high-level output voltage (VOH) is virtually independent of the IDD selection and increases with higher values of VDD and reduced output loading. The low-level output voltage (VOL) decreases with reduced output current and higher input common-mode voltage. With no load, VOL is essentially equal to the potential of VDD - /GND. supply configurations Even though the TLC252 / 25_2C series is characterized for single-supply operation, it can be used effectively in a split-supply configuration if the input common-mode voltage (VICR), output swing (VOL and VOH), and supply voltage limits are not exceeded. circuit layout precautions The user is cautioned that whenever extremely high circuit impedances are used, care must be exercised in layout, construction, board cleanliness, and supply filtering to avoid hum and noise pickup, as well as excessive dc leakages. 20 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 17-Aug-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC252ACDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Call TI TLC252ACP OBSOLETE SOIC D 8 TLC252BCD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC252BCDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Call TI TLC252BCP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC252BCPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC252CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC252CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC252CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC252CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC252CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC252CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC252CPWR ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC252CPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC25L2ACD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC25L2ACDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC25L2BCD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC25L2BCDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Samples (Requires Login) TLC252ACD TBD (3) PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 17-Aug-2012 Status (1) Package Type Package Drawing Pins TLC25L2BCDR PREVIEW SOIC D 8 Package Qty Eco Plan (2) TBD Lead/ Ball Finish Call TI MSL Peak Temp Samples (Requires Login) Call TI TLC25L2BCP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC25L2BCPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC25L2CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC25L2CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC25L2CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC25L2CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC25L2CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC25L2CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC25L2CPSR ACTIVE SO PS 8 TBD Call TI Call TI TLC25L2CPSRG4 ACTIVE SO PS 8 TBD Call TI Call TI TLC25L2CPWR ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC25L2CPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC25M2ACD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC25M2ACDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC25M2ACP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC25M2ACPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC25M2BCD OBSOLETE SOIC D 8 TBD Call TI Call TI TLC25M2BCP OBSOLETE PDIP P 8 TBD Call TI Call TI TLC25M2CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC25M2CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC25M2CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 2 (3) PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 17-Aug-2012 Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) TLC25M2CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC25M2CPE4 ACTIVE PDIP P 8 OBSOLETE TSSOP PW 8 TBD Samples (Requires Login) TLC25M2CDRG4 TLC25M2CPWLE (3) CU NIPDAU Level-1-260C-UNLIM Call TI Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 17-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TLC252CDR Package Package Pins Type Drawing SOIC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC252CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC252CPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 TLC25L2CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC25L2CPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 TLC25M2CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 17-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLC252CDR SOIC D 8 2500 340.5 338.1 20.6 TLC252CDR SOIC D 8 2500 367.0 367.0 35.0 TLC252CPWR TSSOP PW 8 2000 367.0 367.0 35.0 TLC25L2CDR SOIC D 8 2500 340.5 338.1 20.6 TLC25L2CPWR TSSOP PW 8 2000 367.0 367.0 35.0 TLC25M2CDR SOIC D 8 2500 340.5 338.1 20.6 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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