FDN360PD87Z - Fairchild Semiconductor Corporation

FDN360P

FDN360P Rev . D

FDN360P

Single P-Channel PowerT renchTM MOSFET

General Description

This P-Channel Logic Level MOSFET is produced using

Fairchild Semiconductor's advanced PowerTrench process

that has been especially tailored to minimize on-state

resistance and yet maintain superior switching

performance.

These devices are well suited for low voltage and battery

powered applications where low in-line power loss and

fast switching are required.

Applications

•DC/DC converter

•Load switch

•Motor drives

February 1999

Features

•-2 A, -30 V. RDS(on) = 0.080 Ω @ VGS = -10 V

RDS(on) = 0.125 Ω @ VGS = -4.5 V.

•Low gate charge (5nC typical).

•Fast switching speed.

• High performance trench technology for extremely

low RDS(ON).

•High power and current handling capability .

1999 Fairchild Semiconductor Corporation

Absolute Maximum Ratings TA = 25°C unless otherwise noted

Symbol Parameter Ratings Units

VDSS Drain-Source Voltage -30 V

VGSS Gate-Source V ol tage ±20 V

IDDrain Current - Continuous (Note 1a) -2 A

- Pulsed -20

PDPower Diss i pation for Si ngl e Operat i on (Note 1a) 0.5 W

(Note 1b) 0.46

TJ, Tstg Operating and St orage Junction Tem perature Range -55 to +150 °C

Thermal Characteristics

RθJA Thermal Resis t ance, Junc t i on-to-Ambient (Note 1a) 250 °C/W

RθJC Thermal Resistance, J unction-to-Case (Note 1) 75 °C/W

Package Outlines and Ordering Information

Device Marking Device Reel Size Tape Width Quantity

360 FDN360P 7’’ 8mm 3000 units

SuperSOT -3

FDN360P

FDN360P Rev . D

Electrical Characteristics TA = 25°C unless otherwise noted

mbol Parameter Test Conditions Min T

Max Units

Off Characteristics

BVDSS Drain-Source Breakdown Volt age VGS = 0 V, ID = -250 µA-30 V

∆

BVDSS

∆TJ

Breakdown Vol tage Temperature

Coefficient ID = -250 µA, Referenced to

25°C20 mV/°C

IDSS Zero Gate Voltage Drain Current VDS = -24 V, VGS = 0 V -1 µA

IGSSF Gate-Body Leakage Current,

Forward VGS = 20 V, VDS = 0 V 100 nA

IGSSR Gate-Body Leakage Current,

Reverse VGS = -20 V, VDS = 0 V -100 nA

On Characteristics (Note 2)

VGS(th) Gate Threshol d V ol tage VDS = VGS, ID = -250 µA-1-1.8-3V

∆

GS(th)

∆TJ

Gate Threshold V ol tage

Temperature Coeff i cient ID = -250 µA, Referenced to

25°C-4 mV/°C

RDS(on) Static Drain-Source

On-Resistance VGS = -10 V, ID = -2 A

VGS = -10 V, ID = -2 A, TJ=125°C

VGS = -4.5 V, ID = -1.5 A

0.060

0.080

0.095

0.080

0.136

0.125

Ω

ID(on) On-Stat e Drai n Current VGS = -10 V, VDS = -5 V -20 A

gFS Forward Transconduc tance VDS = -5 V, ID = -2 A 5.5 S

Dynamic Characteristics

Ciss Input Capac i t ance 420 pF

Coss Output Capac i tance 140 pF

Crss Reverse Trans f er Capacitance

VDS = -15 V, VGS = 0 V,

f = 1.0 MHz

60 pF

Switching Characteristics (Note 2)

td(on) Turn-On Delay T i m e 9 18 ns

trTurn-On Rise T i m e 8 16 ns

td(off) Turn-Of f Del ay Time 18 29 ns

tfTurn-Off Fall Time

VDD = -15 V, ID = -1 A,

VGS = -10 V, RGEN = 6 Ω

612ns

gTotal Gate Charge 5 7 nC

Qgs Gate-Sourc e Charge 1.7 nC

Qgd Gate-Drain Charge

VDS = -15 V, ID = -2 A,

VGS = -10 V,

1.8 nC

Drain-Source Diode Characteristics and Maximum Ratings

ISMaximum Continuous Drain-Source Diode Forward Current -0.42 A

VSD Drain-Source Di ode Forward V ol ta

GS = 0 V, I S = -0.42 A (Note 2) -0.75 -1.2 V

Notes:

1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting

surface of the drain pins. RθJC is guaranteed by design while RθJA is determined by the user's board design.

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%

a) 250°C/W when

mounted on a 0.02 in2

Pad of 2 oz. Cu.

b) 270°C/W when

mounted on a 0.001 in2

pad of 2 oz. Cu.

FDN360P

FDN360P Rev . D

Typical Characteristics

Figure 1. On-Region Characteristics. Figure 2. On-Resistance V ariation

with Drain Current and Gate Voltage.

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward V oltage

V ariation with Source Current

and Temperature.

Figure 3. On-Resistance V ariation

with Temperature. Figure 4. On-Resistance V ariation

with Gate-to-Source V oltage.

0.8

0.9

1.1

1.2

1.3

-50 -25 0 25 50 75 100 125 150

TJ, JUNCTION TEMPERATURE (oC)

RDS(ON), NORMALIZED

DRAIN-SOURCE ON-RESISTANCE

ID= -2.0A

VGS= -10V

012345

-VDS, DRAIN TO SOURCE VOLTAGE (V)

-ID, DRAIN CURRENT (A)

VGS= -10V

-6.0V

-4.5V

-4.0V

-3.5V

-3.0V

-5.0V

0.5

1.5

2.5

048121620

-ID, DRAIN CURRENT (A)

RDS(ON), NORMALIZED

DRAIN-SOURCE ON-RESISTANCE

VGS= -4.0V

-4.5V

-5.0V -6.0V -7.0V -10V

0.05

0.1

0.15

0.2

0.25

2345678910

-VGS, GATE TO SOURCE VOLTAGE (V)

RDS(ON), ON RESISTANCE (OHM)

ID= -1.0A

TJ=125oC

25oC

12345

-VGS, GATE TO SOURCE VOLTAGE (V)

-ID, DRAIN CURRENT (A)

VDS= -5V TJ=-55oC

25oC125oC

0.001

0.01

0.1

100

0.2 0.4 0.6 0.8 1 1.2 1.4

-VSD, BODY DIODE VOLTAGE (V)

-IS, REVERSE DRAIN CURRENT (A)

VGS= 0V

TJ=125oC

25oC

-55oC

FDN360P

FDN360P Rev . D

Typical Characteristics (continued)

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum

Power Dissipation.

Figure 11. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1b.

Transient themal response will change depending on the circuit board design.

0.0001 0.001 0.01 0.1 1 10 100 1000

SINGLE PULSE TIME (SEC)

POWER (W)

SINGLE PULSE

RθJA=270oC/W

0246810

, GATE CHARGE (nC)

VGS, GATE-SOURCE VOLTAGE (V)

ID= -2.0A

VDS= -5.0V-1

V-15V

120

240

360

480

600

0 6 12 18 24 30

-VDS, DRAIN TO SOURCE VOLTAGE (V)

CAPACITANCE (pF)

Ciss

Coss

Crss

f=1MHz

VGS= 0V

0.0001 0.001 0.01 0.1 1 10 100 300

0.001

0.002

0.005

0.01

0.02

0.05

0.1

0.2

0.5

t , TIME (s ec)

TRANSIENT THERMAL RESISTANCE

R (t) = r(t) * R

R = 270 °C/W

Dut y Cycle, D = t /t

1 2

θJA

T - T = P * R (t)

θJA

P(pk)

1 t

r(t), NORMALIZED EFFECTIVE

Single Pu ls e

D = 0.5

0.1

0.05

0.02

0.01

0.2

0.01

0.1

100

0.1 1 10 100

-VDS, DRAIN-SOURCE VO LTA GE (V)

-ID, DRAIN CURRENT (A)

RDS(ON) Limit

DC10s1s 100ms

10ms

1ms

100

VGS= -10V

SINGLE PULSE

RθJC=270oC/W

TA=25oC

SSOT-3 Std Unit Orientation

Conductive Embossed

Carrier Tape

Customize Label

Antistatic Cover Tape

SSOT-3 Packaging

Configuration: Figure 1.0

Components Leader Tape

390mm minimum

Trailer Tape

160mm minimum

SSOT-23 Tape Leader and Trailer

Configuration: Figure 2.0

Cover Tape

Carrier

Pin 1

Tape

Note/Comments

Packaging Option

SSOT-3 Std Packaging Information

Standard

(no flow code) D87Z

Packaging type

Reel Size

TNR

7” Dia

TNR

13”

Qty per Reel/Tube/Bag 3,000 10,000

Box Dimension (mm) 187x107x183 343x343x64

Max qty per Box 9,000 20,000

Weight per unit (gm) 0.0097 0.0097

Weight per Reel (kg) 0.1230 0.4150

Human Readable Label

Human Readable Label sample

343mm x 342mm x 64mm

Intermediate box for D87Z Option

Human Readable

Label 187mm x 107mm x 183mm

Intermediate Box for Standard Option

3P 3P 3P 3P

Human Readable

Label

SuperSOTTM-3 Tape and Reel Data and Package Dimensions

December 1998, Rev. B

Dimensions are in millimeter

Pkg type

A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc

SSOT-3

(8mm)

3.15

+/-0.10 2.77

+/-0.10 8.0

+/-0.3 1.55

+/-0.05 1.00

+/-0.125 1.75

+/-0.10 6.25

min 3.50

+/-0.05 4.0

+/-0.1 4.0

+/-0.1 1.30

+/-0.10 0.228

+/-0.013 5.2

+/-0.3 0.06

+/-02

A0 D1

Dimensions are in inches and millimeters

Tape Size Reel

Option Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)

8mm 7” Dia 7.00

177.8 0.059

1.5 512 +0.020/-0.008

13 +0.5/-0.2 0.795

20.2 2.165

55 0.331 +0.059/-0.000

8.4 +1.5/0 0.567

14.4 0.311 – 0.429

7.9 – 10.9

8mm 13” Dia 13.00

330 0.059

1.5 512 +0.020/-0.008

13 +0.5/-0.2 0.795

20.2 4.00

100 0.331 +0.059/-0.000

8.4 +1.5/0 0.567

14.4 0.311 – 0.429

7.9 – 10.9

See detail AA

Dim A

max

13” Diameter Option

7” Diameter Option

Dim A

Max

See detail AA

W2 max Measured at Hub

W1 Measured at Hub

Dim N

Dim D

min

Dim C

B Min

DETAIL AA

Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481

rotational and lateral movement requirements (see sketches A, B, and C).

20 deg maximum component rotation

0.5mm

maximum

0.5mm

maximum

Sketch C (Top View)

Component lateral movement

Typical

component

cavity

center line

20 deg maximum

Typical

component

center line

Sketch B (Top View)

Component Rotation

Sketch A (Side or Front Sectional View)

Component Rotation

User Direction of Feed

SSOT-3 Embossed Carrier Tape

Configuration: Figure 3.0

SSOT-3 Reel Configuration: Figure 4.0

SuperSOTTM-3 Tape and Reel Data and Package Dimensions, continued

December 1998, Rev. B

SuperSOT-3 (FS PKG Code 32)

1 : 1

Scale 1: 1 on letter size pap er

D im ensions s how n below are in:

inches [ millim eters ]

Part Weight per unit (gram): 0.0097

SuperSOTTM-3 Tape and Reel Data and Package Dimensions, continued

September 1998, Rev. A

TRADEMARKS

ACEx™

CoolFET™

CROSSVOLT™

E2CMOSTM

FACT™

FACT Quiet Series™

FAST®

FASTr™

GTO™

HiSeC™

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is

not intended to be an exhaustive list of all such trademarks.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

ISOPLANAR™

MICROWIRE™

POP™

PowerTrench™

QS™

Quiet Series™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

TinyLogic™

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, or (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be

reasonably expected to result in significant injury to the

user.

2. A critical component is any component of a life

support device or system whose failure to perform can

be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or

effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Formative or

In Design

First Production

Full Production

Not In Production

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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD

DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT

OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT

RIGHTS, NOR THE RIGHTS OF OTHERS.