LMH0344
LMH0344 3 Gbps HD/SD SDI Adaptive Cable Equalizer
Literature Number: SNLS233K
LMH0344
June 27, 2011
3 Gbps HD/SD SDI Adaptive Cable Equalizer
General Description
The LMH0344 3 Gbps HD/SD SDI Adaptive Cable Equalizer
is designed to equalize data transmitted over cable (or any
media with similar dispersive loss characteristics). The equal-
izer operates over a wide range of data rates from 125 Mbps
to 2.97 Gbps and supports SMPTE 424M, SMPTE 292M,
SMPTE 344M, and SMPTE 259M.
The LMH0344 implements DC restoration to correctly handle
pathological data conditions. The equalizer may be driven in
either a single ended or differential configuration.
Additional features include separate carrier detect and output
mute pins which may be tied together to mute the output when
no signal is present. A programmable mute reference is pro-
vided to mute the output at a selectable level of signal degra-
dation.
For applications which use the RGBα data patterns, the
LMH0394 cable equalizer will provide better performance.
The device is available in two space–saving packages: a 4 X
4 mm 16-pin LLP and even more space–efficient 3 x 3 mm
25-ball MICRO-ARRAY package.
Features
■SMPTE 424M, SMPTE 292M, SMPTE 344M, and SMPTE
259M compliant
■Supports DVB-ASI at 270 Mbps
■Wide range of data rates: 125 Mbps to 2.97 Gbps
■Equalizes up to 120 meters of Belden 1694A at 2.97 Gbps,
up to 140 meters of Belden 1694A at 1.485 Gbps, or up to
400 meters of Belden 1694A at 270 Mbps
■Equalizes 0-120m of Belden 1694A at 2.97 Gbps with
0.3 UI maximum output jitter
■Manual bypass and output mute with a programmable
threshold
■Single-ended or differential input
■50Ω differential outputs (internal 50Ω pullups)
■Single 3.3V supply operation
■280 mW typical power consumption
■16-pin LLP or 25-ball MICRO-ARRAY package
■Industrial temperature range: −40°C to +85°C
■HBM ESD Rating: 8 kV
■LLP version footprint compatible with the LMH0044 and
LMH0074
■Replaces the Gennum GS2974A or GS2974B
Applications
■SMPTE 424M, SMPTE 292M, SMPTE 344M, and SMPTE
259M serial digital interfaces
■Serial digital data equalization and reception
■Data recovery equalization
Typical Application
20199001
© 2011 National Semiconductor Corporation 201990 www.national.com
LMH0344 3 Gbps HD/SD SDI Adaptive Cable Equalizer
Absolute Maximum Ratings (Note 1)
Supply Voltage 4.0V
Input Voltage (all inputs) −0.3V to VCC+0.3V
Storage Temperature Range −65°C to +150°C
Junction Temperature +125°C
Lead Temperature
(Soldering 4 Sec) +260°C
Package Thermal Resistance
θJA 16-pin LLP
θJC 16-pin LLP
θJA 25-ball MICRO-ARRAY
+40°C/W
+4.5°C/W
+58.1°C/W
ESD Rating (HBM) 8 kV
ESD Rating (MM) 400V
ESD Rating (CDM) 2 kV
Recommended Operating
Conditions
Supply Voltage (VCC – VEE) 3.3V ±5%
Input Coupling Capacitance 1.0 µF
AEC Capacitor (Connected between
AEC+ and AEC-) 1.0 µF
Operating Free Air Temperature (TA) −40°C to +85°C
DC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Note 2, Note 3).
Symbol Parameter Conditions Reference Min Typ Max Units
VCMIN Input Common Mode Voltage SDI, SDI 1.9 V
VSDI Input Voltage Swing At LMH0344 input, (Note 4,
Note 5)720 800 950 mVP−P
VCMOUT Output Common Mode Voltage SDO, SDO VCC –
VSDO/2 V
VSDO Output Voltage Swing 100Ω load, differential 750 mVP-P
MUTEREF DC Voltage (floating) MUTEREF 1.3 V
MUTEREF Range 0.6 V
CD Output Voltage Carrier not present CD 2.4 V
Carrier present 0.4 V
MUTE Input Voltage Min to mute outputs MUTE 2.0 V
Max to force outputs active 0.8 V
ICC Supply Current 85 100 mA
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LMH0344
AC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Note 3).
Symbol Parameter Conditions Reference Min Typ Max Units
BRMIN Minimum Input Data Rate SDI, SDI 125 Mbps
BRMax Maximum Input Data Rate 2970 Mbps
Jitter for Various Cable Lengths 270 Mbps, Belden 1694A,
0-400 meters (Note 6)
0.2 UI
270 Mbps, Belden 1694A,
0-400 meters (Note 7) 0.07 UI
1.485 Gbps, Belden 1694A,
0-140 meters (Note 6) 0.25 UI
1.485 Gbps, Belden 1694A,
0-140 meters (Note 7) 0.08 UI
2.97 Gbps, Belden 1694A,
0-120 meters (Note 6) 0.3 UI
2.97 Gbps, Belden 1694A,
0-120 meters (Note 7) 0.18 UI
tr,tfOutput Rise Time, Fall Time 20% – 80%, (Note 4) SDO, SDO 60 130 ps
Mismatch in Rise/Fall Time (Note 4) 2 15 ps
tOS Output Overshoot (Note 4) 1 5 %
ROUT Output Resistance single-ended 50 Ω
RLIN Input Return Loss 5 MHz - 1.5 GHz, (Note 8) SDI, SDI 15 dB
1.5 GHz - 3.0 GHz, (Note 8) 10 dB
RIN Input Resistance single-ended 1.3 kΩ
CIN Input Capacitance single-ended 1 pF
Note 1: "Absolute Maximum Ratings" are those parameter values beyond which the life and operation of the device cannot be guaranteed. The stating herein of
these maximums shall not be construed to imply that the device can or should be operated at or beyond these values. The table of "Electrical Characteristics"
specifies acceptable device operating conditions.
Note 2: Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are stated referenced to
VEE = 0 Volts.
Note 3: Typical values are stated for VCC = +3.3V and TA = +25°C.
Note 4: Specification is guaranteed by characterization.
Note 5: This specification is for 0m cable only.
Note 6: Based on characterization data over the full range of recommended operating conditions of the device. Jitter is measured in accordance with SMPTE
RP 184, SMPTE RP 192, and the applicable serial data transmission standard: SMPTE 424M, SMPTE 292M, or SMPTE 259M.
Note 7: Measured with Pseudo Matrix Pathological test signal.
Note 8: Input return loss is dependent on board design. The LMH0344 exceeds this specification on the SD344 evaluation board with a return loss network
consisting of an 8.2 nH inductor in parallel with a 0.5 pF capacitor in parallel with the 75Ω series resistor on the input.
Typical Performance Characteristics
After Equalization: 120m of Belden 1694A with
2.97 Gbps PRBS
20199004
After Equalization: 120m of Belden 1694A with
2.97 Gbps Pseudo Matrix Pathological
20199005
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LMH0344
Connection Diagrams
20199003
The exposed die attach pad is a negative electrical terminal for this device. It should be connected to the negative power supply voltage.
16-Pin LLP
Order Number LMH0344SQ
See NS Package Number SQB16A
20199006
25-Ball MICRO-ARRAY
Order Number LMH0344GR
See NS Package Number GRA25A
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LMH0344
Pin Descriptions
LLP Pin MICRO-
ARRAY Ball
Name Description
2 C1 SDI Serial data true input.
3 D1 SDI Serial data complement input.
5 E2 AEC+ AEC loop filter external capacitor (1µF) positive connection.
6 E3 AEC- AEC loop filter external capacitor (1µF) negative connection.
7 D3 BYPASS Bypasses equalization and DC restoration when high. No equalization occurs
in this mode.
8 E4 MUTEREF Mute reference. Sets the threshold for CD and (with CD tied to MUTE)
determines the maximum cable to be equalized before muting. MUTEREF may
be either unconnected or connected to ground for maximum equalization.
10 D5 SDO Serial data complement output.
11 C5 SDO Serial data true output.
14 B3 MUTE Output mute. To disable the mute function and enable the output, MUTE must
be tied to GND or a low level signal. To force the outputs to a muted state, tie
to VCC. CD may be tied to this pin to inhibit the output when no input signal is
present. MUTE has no function in BYPASS mode.
15 A2 CD Carrier detect. CD is high when no signal is present. CD has no function in
BYPASS mode.
13, 16 A1, A3, A4, B2 VCC Positive power supply (+3.3V).
DAP, 1, 4, 9,
12
B1, B4, D2, E5 VEE Negative power supply (ground).
—A5, B5, C2,
C3, C4, D4, E1
NC No connect.
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LMH0344
Block Diagram
20199002
Device Operation
BLOCK DESCRIPTION
The Equalizer Filter block is a multi-stage adaptive filter. If
Bypass is high, the equalizer filter is disabled.
The DC Restoration / Level Control block receives the dif-
ferential signals from the equalizer filter block. This block
incorporates a self-biasing DC restoration circuit to fully DC
restore the signals. If Bypass is high, this function is disabled.
The signals before and after the DC Restoration / Level Con-
trol block are used to generate the Automatic Equalization
Control (AEC) signal. This control signal sets the gain and
bandwidth of the equalizer filter. The loop response in the
AEC block is controlled by an external 1µF capacitor placed
across the AEC+ and AEC- pins.
The Carrier Detect / Mute block generates the carrier detect
signal and controls the mute function of the output. This block
utilizes the CD and MUTE signals along with Mute Reference
(MUTEREF).
The Output Driver produces SDO and SDO.
MUTE REFERENCE (MUTEREF)
The mute reference sets the threshold for CD and (with CD
tied to MUTE) determines the amount of cable to equalize
before automatically muting the outputs. This is set by apply-
ing a voltage inversely proportional to the length of cable to
equalize. The applied voltage must be greater than the
MUTEREF floating voltage (typically 1.3V) in order to change
the CD threshold. As the applied MUTEREF voltage is in-
creased, the amount of cable that can be equalized before
carrier detect is de-asserted and the outputs are muted is de-
creased. MUTEREF may be left unconnected or connected to
ground for maximum equalization before muting.
CARRIER DETECT (CD) AND MUTE
Carrier detect CD indicates if a valid signal is present at the
LMH0344 input. If MUTEREF is used, the carrier detect thresh-
old will be altered accordingly. CD provides a high voltage
when no signal is present at the LMH0344 input. CD is low
when a valid input signal is detected.
MUTE can be used to manually mute or enable SDO and
SDO. Applying a high input to MUTE will mute the LMH0344
outputs by forcing the output to a logic zero. Applying a low
input will force the outputs to be active.
CD and MUTE may be tied together to automatically mute the
output when no input signal is present.
INPUT INTERFACING
The LMH0344 accepts either differential or single-ended in-
put. The input must be AC coupled. Transformer coupling is
not supported.
The LMH0344 correctly handles equalizer pathological sig-
nals for standard definition and high definition serial digital
video, as described in SMPTE RP 178 and RP 198, respec-
tively.
OUTPUT INTERFACING
The SDO and SDO outputs are internally loaded with 50Ω.
They produce a 750 mVP-P differential output, or a
375 mVP-P single-ended output.
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LMH0344
Physical Dimensions inches (millimeters) unless otherwise noted
16-Pin LLP
Order Number LMH0344SQ
NS Package Number SQB16A
25-Ball MICRO-ARRAY
Order Number LMH0344GR
NS Package Number GRA25A
7 www.national.com
LMH0344
Notes
LMH0344 3 Gbps HD/SD SDI Adaptive Cable Equalizer
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