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REV. 0
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a
Tri-Mode: +3.3 V, +5 V, Adjustable
Micropower Linear Voltage Regulators
ADM663A/ADM666A*
FEATURES
Tri-Mode Operation
3.3 V, 5 V Fixed or +1.3 V to +16 V Adjustable
Low Power CMOS: 9 µA max Quiescent Current
High Current 100 mA Output
Low Dropout Voltage
Upgrade for ADM663/ADM666
“Small” 0.1 µF Output Capacitor (0805 Style)
+2 V to +16.5 V Operating Range
Low Battery Detector ADM666A
No Overshoot on Power-Up
Thermal Shutdown
APPLICATIONS
Handheld Instruments
LCD Display Systems
Pagers
Battery Operated Equipment
GENERAL DESCRIPTION
The ADM663A/ADM666A are precision linear voltage regula-
tors featuring a maximum quiescent current of 9 µA. They can
be used to give a fixed +3.3 V or +5 V output with no additional
external components or can be adjusted from 1.3 V to 16 V
using two external resistors. Fixed or adjustable operation is au-
tomatically selected via the V
SET
input. The low quiescent cur-
rent makes these devices especially suitable for battery powered
systems. The input voltage range is 2 V to 16.5 V, and an out-
put current up to 100 mA is provided. Current limiting may be
set using a single external resistor. For additional safety, an
internal thermal shutdown circuit monitors the internal die
temperature.
The ADM666A features additional low battery monitoring cir-
cuitry to detect for low battery voltages.
The ADM663A/ADM666A are pin compatible enhancements
for the ADM663/ADM666. Improvements include an addi-
tional 3.3 V output range, higher output current, and operation
with a small output capacitor.
The ADM663A/ADM666A are available in an 8-pin DIP and
narrow surface mount (SOIC) packages.
*Patent pending.
FUNCTIONAL BLOCK DIAGRAMS
50mV
V
IN
ADM663A
SHDN
GND
V
TC
V
SET
V
OUT1
V
OUT2
SENSE
C2
1.3V 0.5V
C1
A2
A1
C3
D
E
C
O
D
E
R
V
IN
–50mV
0.9V
R2
R1
R3
50mV
V
IN
ADM666A
SHDN
GND
LBO
V
SET
V
OUT
SENSE
C2
1.3V
0.5V
C1
C4
A1
C3
D
E
C
O
D
E
R
V
IN
–50mV
1.3 V
LBI
R2
R1
R3
REV. 0
–2–
(VIN = +9 V, TA = TMIN to TMAX, unless otherwise noted)
ABSOLUTE MAXIMUM RATINGS*
(T
A
= +25°C unless otherwise noted)
Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . +18 V
Terminal Voltage
(ADM663A) Pins 1, 3, 5, 6, 7
. . . . . . . . . . . . . . . . . . . . . . (GND
– 0.3 V) to (V
IN
+ 0.3 V)
(ADM666A) Pins 1, 2, 3, 5, 6
. . . . . . . . . . . . . . . . . . . . . . . (GND
– 0.3 V) to (V
IN
+ 0.3 V)
(ADM663A) Pin 2 . . . . . . . .(GND – 0.3 V) to (V
OUT1
+ 0.3 V)
(ADM666A) Pin 7 . . . . . . . . . . . . . . (GND
– 0.3 V) to +16.5 V
Output Source Current
(ADM663A, ADM666A) Pin 2 . . . . . . . . . . . . . . . . . . 100 mA
(ADM663A) Pin 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Output Sink Current, Pin 7 . . . . . . . . . . . . . . . . . . . . . .–20 mA
Power Dissipation, N-8 . . . . . . . . . . . . . . . . . . . . . . . . 800 mW
(Derate 8.3 mW/°C above +30°C)
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 120°C/W
ADM663A/ADM666A–SPECIFICATIONS
Power Dissipation, R-8 . . . . . . . . . . . . . . . . . . . . . . . . 570 mW
(Derate 6 mW/°C above +30°C)
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 170°C/W
Operating Temperature Range
Industrial (A Version) . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>5000 V
*This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operation sections of this specifica-
tion is not implied. Exposure to absolute maximum rating conditions for extended
periods of time may affect reliability.
Parameter Min Typ Max Units Test Conditions/Comments
Input Voltage, V
IN
2.0 16.5 V
Quiescent Current, I
Q
69 µA No Load, V
IN
= +16.5 V
Output Voltage, V
OUT(2)
(+5 V Mode) 4.75 5.0 5.25 V V
SET
= GND
Output Voltage, V
OUT(2)
(+3.3 V Mode) 3.135 3.3 3.465 V V
SET
= V
IN
Dropout Voltage, V
DO
0.75 0.9 V I
OUT
= 40 mA, V
OUT
= +14.5 V
Dropout Voltage, V
DO
1.0 1.2 V I
OUT
= 100 mA, V
OUT
= +14.5 V
Line Regulation (V
OUT(2)
/V
IN
) 0.03 0.35 %/V +2 V V
IN
+15 V, V
OUT
= V
REF
Load Regulation V
IN
= (V
OUT
+3 V), 1 mA I
OUT(2)
100 mA
V
OUT(2)
;(V
OUT(2)
/I
OUT(2)
) 0.3 1.0 V
SET
= GND (Fixed +5 V Output)
0.15 0.35 V
SET
= V
IN
(Fixed +3.3 V Output)
0.15 0.30 V
SET
= Resistive Divider (Adjustable Output)
V
OUT1
;(V
OUT1
/I
OUT1
) 0.25 1.2 ADM663A, 50 µA I
OUT1
10 mA
Reference Voltage, V
SET
1.27 1.33 V T
A
= +25°C, V
OUT
= V
SET
Reference Tempco (V
SET
/T) ±100 ppm/°C
V
SET
Internal Threshold
V
F/A
Low 50 mV V
SET
< V
F/A
Low for +5 V Output
V
F/A
High V
IN
– 50 mV V
SET
> V
F/A
High for +3.3 V Output
V
SET
Input Current, I
SET
±0.01 ±10 nA
Shutdown Input Voltage, V
SHDN
1.4 V V
SHDN
High = Output Off
0.3 V V
SHDN
Low = Output On
Shutdown Input Current, I
SHDN
±0.01 ±10 nA
SENSE Input Threshold, V
OUT
– V
SENSE
0.5 V Current Limit Threshold
SENSE Input Resistance, R
SENSE
3M
Input-Output Saturation Resistance, R
SAT
ADM663A, V
OUT1
200 400 V
IN
= +2 V, I
OUT
= 1 mA
20 40 V
IN
= +9 V, I
OUT
= 10 mA
20 30 V
IN
= +15 V, I
OUT
= 10 mA
Output Current, I
OUT(2)
100 mA +3 V V
IN
+16.5 V, V
IN
– V
OUT
= +1.5 V
Minimum Load Current, I
L (MIN)
1.0 µA
LBI Input Threshold
Low Going 1.1 1.26 V ADM666A
High Going 1.29 1.42 V ADM666A
Hysteresis 30 mV ADM666A
LBI Input Current, I
LBI
±0.01 ±10 nA ADM666A
LBO Output Saturation Resistance, R
SAT
20 30 ADM666A, I
SAT
= 2 mA
LBO Output Leakage Current 0.2 nA ADM666A, LBI = 1.4 V
V
TC
Open Circuit Voltage, V
TC
0.9 V ADM663A
V
TC
Sink Current, I
TC
8.0 2.0 mA ADM663A
V
TC
Temperature Coefficient +2.5 mV/°C ADM663A
Specifications subject to change without notice.
ADM663A/ADM666A
REV. 0 –3–
PIN FUNCTION DESCRIPTION
Mnemonic Function
V
OUT(1) (2)
Voltage Regulator Output(s).
V
IN
Voltage Regulator Input.
SENSE Current Limit Sense Input. (Referenced to
V
OUT(2).
) If not used, it should be connected to
V
OUT(2).
GND Ground Pin. Must be connected to 0 V.
LBI Low Battery Detect Input. Compared with 1.3 V.
LBO Low Battery Detect Output. Open Drain Output.
SHDN Digital Input. May be used to disable the device
so that the power consumption is minimized.
V
SET
Voltage Setting Input. Connect to GND for
+5 V output, to V
IN
for +3.3 V output or
connect to external resistive divider for
adjustable output.
V
TC
Temperature-Proportional Voltage for negative
TC Output.
PIN CONFIGURATIONS
DIP & SOIC
SENSE
VOUT2
VOUT1
GND
VIN
VTC
VSET
SHDN
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
ADM663A
DIP & SOIC
SENSE
VOUT
LBI
GND
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
ADM666A
VIN
LBO
VSET
SHDN
ORDERING GUIDE
Temperature Package
Model Range Option
ADM663AAN –40°C to +85°C N-8
ADM663AAR –40°C to +85°C R-8
ADM666AAN –40°C to +85°C N-8
ADM666AAR –40°C to +85°C R-8
TERMINOLOGY
Dropout Voltage: The input/output voltage differential at
which the regulator no longer maintains regulation against fur-
ther reductions in input voltage. It is measured when the output
decreases 100 mV from its nominal value. The nominal value is
the measured value with V
IN
= V
OUT
+2 V.
Line Regulation: The change in output voltage as a result of
a change in the input voltage. It is specified as a percentage
change in output voltage for an input voltage change.
Line Reg =
V
OUT
V
OUT
(100)
V
IN
Load Regulation: The change in output voltage for a change
in output current.
Load Reg ()=V
OUT
I
OUT
Quiescent Current: The input bias current which flows when
the regulator output is unloaded or when the regulator is in
shutdown.
Sense Input Threshold: Current limit sense voltage. This
is the voltage (referenced to V
OUT(2)
) at which current limiting
occurs.
Input-Output Saturation Resistance (ADM663A): This is a
measure of the internal MOS transistor effective resistance in se-
ries with V
OUT1
. The minimum input-output voltage differential
at low currents may be calculated by multiplying the load cur-
rent by the saturation resistance.
Thermal Limiting: This feature monitors the internal die tem-
perature and disables the output when an internal temperature
of 125°C is reached.
Maximum Power Dissipation: The maximum total device
dissipation for which the regulator will continue to operate
within specifications.
REV. 0
–4–
ADM663A/ADM666A
GENERAL INFORMATION
The ADM663A/ADM666A contains a micropower bandgap
reference voltage source; an error amplifier, A1; three compara-
tors, C1, C2, C3, and a series pass output transistor. A P-chan-
nel FET and an NPN transistor are used on the ADM663A
while the ADM666A uses an NPN output transistor.
CIRCUIT DESCRIPTION
The internal bandgap reference is trimmed to 1.3 V ± 30 mV.
This is used as a reference input to the error amplifier A1. The
feedback signal from the regulator output is supplied to the
other input by an on-chip voltage divider or by two external re-
sistors. When V
SET
is at ground, the internal divider tap between
R1 and R2, provides the error amplifier’s feedback signal giving
a +5 V output. When V
SET
is at V
IN
,
the internal divider tap be-
tween R2 and R3 provides the error amplifier’s feedback signal
giving a +3.3 V output. When V
SET
is at more than 50 mV
above ground and less than 50 mV below V
IN
, the error ampli-
fier’s input is switched directly to the V
SET
pin, and external
resistors are used to set the output voltage. The external resis-
tors are selected so that the desired output voltage gives 1.3 V
at V
SET
.
Comparator C1 monitors the output current via the SENSE in-
put. This input, referenced to V
OUT(2)
, monitors the voltage
drop across a load sense resistor. If the voltage drop exceeds
0.5 V, then the error amplifier A1 is disabled and the output
current is limited.
The ADM663A has an additional amplifier, A2, which provides
a temperature proportional output, V
TC
. If this is summed into
the inverting input of the error amplifier, a negative temperature
coefficient results at the output. This is useful when powering
liquid crystal displays over wide temperature ranges.
The ADM666A has an additional comparator, C4, that com-
pares the voltage on the low battery input, LBI, pin to the inter-
nal +1.3 V reference. The output from the comparator drives an
open drain FET connected to the low battery output pin, LBO.
The low battery threshold may be set using a suitable voltage
divider connected to LBI. When the voltage on LBI falls below
1.3 V, the open drain output LBO is pulled low.
50mV
V
IN
ADM663A
SHDN
GND
V
TC
V
SET
V
OUT1
V
OUT2
SENSE
C2
1.3V 0.5V
C1
A2
A1
C3
D
E
C
O
D
E
R
V
IN
–50mV
0.9V
R2
R1
R3
Figure 1. ADM663A Functional Block Diagram
Both the ADM663A and the ADM666A contain a shutdown
(SHDN) input that can be used to disable the error amplifier
and hence the voltage output. The power consumption in shut-
down reduces to less than 9 µA.
50mV
V
IN
ADM666A
SHDN
GND
LBO
V
SET
V
OUT
SENSE
C2
1.3V
0.5V
C1
C4
A1
C3
D
E
C
O
D
E
R
V
IN
–50mV
1.3 V
LBI
R2
R1
R3
Figure 2. ADM666A Functional Block Diagram
Circuit Configurations
For a fixed +5 V output the V
SET
input is grounded and no ex-
ternal resistors are necessary. This basic configuration is shown
in Figure 3. For a fixed +3.3 V output, the V
SET
input is con-
nected to V
IN
as shown in Figure 4. Current limiting is not be-
ing utilized so the SENSE input is connected to V
OUT(2)
.
GND
ADM663A
ADM666A
SENSE
V
OUT(2)
V
IN
V
SET
SHDN
+5V
OUTPUT
+6V TO +16V
INPUT
Figure 3. A Fixed +5 V Output
GND
ADM663A
ADM666A
SENSE
V
OUT(2)
V
IN
V
SET
SHDN
+3.3V
OUTPUT
+4.5V TO +16V
INPUT
Figure 4. A Fixed +3.3 V Output
Output Voltage Setting
If V
SET
is not connected to GND or to V
IN
, the output voltage is
set according to the following equation:
V
OUT
=V
SET
×(R1+R2)
R1
where V
SET
= 1.30 V.
ADM663A/ADM666A
REV. 0 –5–
the current drain to a low quiescent (9 µA maximum) current.
This is very useful for low power applications. The SHDN input
should be driven with a CMOS logic level signal since the input
threshold is 0.3 V. In TTL systems, an open collector driver
with a pull-up resistor may be used.
If the shutdown function is not being used, then it should be
connected to GND.
Low Supply or Low Battery Detection
The ADM666A contains on-chip circuitry for low power supply
or battery detection. If the voltage on the LBI pin falls below the
internal 1.3 V reference, then the open drain output LBO will
go low. The low threshold voltage may be set to any voltage
above 1.3 V by appropriate resistor divider selection.
R3=R4V
BATT
1. 3 V1
where R3 and R4 are the resistive divider resistors and V
BATT
is
the desired low voltage threshold.
Since the LBI input leakage current is less than 10 nA, large val-
ues may be selected for R3 and R4 in order to minimize loading.
For example, a 6 V low threshold may be set using 10 M for
R3 and 2.7 M for R4.
ADM666A
SENSE
VOUT
GND
VIN
VSET
LBI
+1.3V TO +15V
OUTPUT
+2V TO +16V
INPUT
RCL
R2
R1
LBO
SHDN
R3
R4
LOW
BATTERY
OUTPUT
Figure 6. ADM666A Adjustable Output with Low Battery
Detection
High Current Operation
The ADM663A contains an additional output, V
OUT1
, suitable
for directly driving the base of an external NPN transistor. Fig-
ure 7 shows a configuration which can be used to provide +5 V
with boosted current drive. A 1 current sensing resistor limits
the current at 0.5 A.
ADM663A
V
OUT1
V
OUT2
GND
V
IN
SHDN
2N4237
V
IN
100
1.0
SENSE
V
SET
+
10µF
+
10µF
SHUTDOWN
+5V, 0.5A
OUTPUT
Figure 7. ADM663A Boosted Output Current (0.5 A)
The resistor values may be selected by first choosing a value for
R1 and then selecting R2 according to the following equation:
R2=R1×VOUT
1. 30 1
The input leakage current on V
SET
is 10 nA maximum. This al-
lows large resistor values to be chosen for R1 and R2 with little
degradation in accuracy. For example, a 1 M resistor may be
selected for R1, and then R2 may be calculated accordingly.
The tolerance on V
SET
is guaranteed at less than ±30 mV so in
most applications, fixed resistors will be suitable.
ADM663A
ADM666A
SENSE
VOUT(2)
GND
VIN
VSET
SHDN
+1.3V TO +15V
OUTPUT
+2V TO +16V
INPUT RCL
R2
R1
Figure 5. Adjustable Output
Current Limiting
Current limiting may be achieved by using an external current
sense resistor in series with V
OUT(2)
. When the voltage across
the sense resistor exceeds the internal 0.5 V threshold, current
limiting is activated. The sense resistor is therefore chosen such
that the voltage across it will be 0.5 V when the desired current
limit is reached.
R
CL
=0.5
I
CL
where R
CL
is the current sense resistor, I
CL
is the maximum
current limit.
The value chosen for R
CL
should also ensure that the current is
limited to less than the 100 mA absolute maximum rating and
also that the power dissipation will also be within the package
maximum ratings.
If current limiting is employed, there will be an additional volt-
age drop across the sense resistor that must be considered when
determining the regulators dropout voltage.
If current limiting is not used, the SENSE input should be con-
nected to V
OUT(2)
.
Shutdown Input (SHDN)
The SHDN input allows the regulator to be turned off with a
logic level signal. This will disable the output and reduce
Table I. Output Voltage Selection
V
SET
V
OUT
GND +5 V
V
IN
+3 V
R1/R2 ADJ
REV. 0
–6–
ADM663A/ADM666A
Temperature Proportional Output
The ADM663A contains a V
TC
output with a positive tempera-
ture coefficient of +2.5 mV/°C. This may be connected to the
summing junction of the error amplifier (V
SET
) through a resis-
tor resulting in a negative temperature coefficient at the output
of the regulator. This is especially useful in multiplexed LCD
displays to compensate for the inherent negative temperature
coefficient of the LCD threshold. At +25°C the voltage at the
VTC output is typically 0.9 V. The equations for setting both
the output voltage and the tempco are given below. If this func-
tion is not being used, then V
TC
should be left unconnected.
V
OUT
=V
SET
1+R2
R1
+R2
R3V
SET
V
TC
()
TCV
OUT
=R2
R3TCV
TC
()
where V
SET
= +1.3 V, V
TC
= +0.9 V, TCV
TC
= +2.5 mV/°C
R3 R1
R2
ADM663A
V
TC
V
SET
SENSE
V
OUT2
V
OUT
Figure 8. ADM663A Temperature Proportional Output
APPLICATION HINTS
Input-Output (Dropout Voltage)
A regulator’s minimum input-output differential or dropout
voltage determines the lowest input voltage for a particular out-
put voltage. The ADM663A/ADM666A dropout voltage is 1 V
at its rated output current. For example when used as a fixed
+5 V regulator, the minimum input voltage is +6 V. At lower
output currents (I
OUT
< 10 mA) on the ADM663A, V
OUT1
may
be used as the output driver in order to achieve lower dropout
voltages. In this case the dropout voltage depends on the voltage
drop across the internal FET transistor. This may be calculated
by multiplying the FET’s saturation resistance by the output
current, for example with V
IN
= 9 V, R
SAT
= 20 . Therefore,
the dropout voltage for 5 mA is 100 mV. As the current limit
circuitry is referenced to V
OUT2
, V
OUT2
should be connected to
V
OUT1
. For high current operation V
OUT2
should be used alone
and V
OUT1
left unconnected.
GND
ADM663A
SENSE
V
OUT2
V
IN
V
SET
SHDN
+5V
OUTPUT
+6V TO +16V
INPUT
V
OUT1
Figure 9. Low Current, Low Dropout Configuration
Thermal Considerations
The ADM663A/ADM666A can supply up to 100 mA load cur-
rent and can operate with input voltages up to 16.5 V, but the
package power dissipation and hence the die temperature must
be kept within the maximum limits. The package power dissi-
pation is calculated from the product of the voltage differential
across the regulator times the current being supplied to the load.
The power dissipation must be kept within the maximum limits
given in the Absolute Maximum Ratings section.
P
D
= (V
IN
V
OUT
)(I
L
)
The die temperature is dependent on both the ambient tempera-
ture and on the power being dissipated by the device. The
ADM663A/ADM666A contains an internal thermal limiting cir-
cuit which will shut down the regulator if the internal die tem-
perature exceeds 125°C. Therefore, care must be taken to
ensure that, under normal operating conditions, the die tem-
perature is kept below the thermal limit.
T
J
= T
A
+ P
D
(
θ
JA
)
This may be expressed in terms of power dissipation as follows:
P
D
= (T
J
T
A
)/(
θ
JA
)
where:
T
J
= Die Junction Temperature (°C)
T
A
= Ambient Temperature (°C)
P
D
= Power Dissipation (W)
θ
JA
= Junction to Ambient Thermal Resistance (°C/W)
If the device is being operated at the maximum permitted ambi-
ent temperature of 85°C the maximum power dissipation per-
mitted is:
P
D
(max) = (T
J
(max) – T
A
)/(
θ
JA
)
P
D
(max) = (125 – 85)/(θ
JA
)
= 40/
θ
JA
θ
JA
= 120°C/W for the 8-pin DIP (N-8) package
θ
JA
= 170°C/W for the 8-pin SOIC (R-8) package
Therefore, for a maximum ambient temperature of 85°C
P
D
(max) = 333 mW for N-8
P
D
(max) = 235 mW for R-8
At lower ambient temperatures the maximum permitted power
dissipation increases accordingly up to the maximum limits
specified in the absolute maximum specifications.
The thermal impedance (θ
JA
) figures given are measured in still
air conditions and are reduced considerably where fan assisted
cooling is employed. Other techniques for reducing the thermal
impedance include large contact pads on the printed circuit
board and wide traces. The copper will act as a heat exchanger
thereby reducing the effective thermal impedance.
High Power Dissipation Recommendations
Where excessive power dissipation due to high input-output dif-
ferential voltages and or high current conditions exists, the sim-
plest method of reducing the power requirements on the
regulator is to use a series dropper resistor. In this way the ex-
cess power can be dissipated in the external resistor. As an ex-
ample, consider an input voltage of +12 V and an output
voltage requirement of +5 V @ 100 mA with an ambient tem-
perature of +85°C. The package power dissipation under these
conditions is 700 mW which exceeds the maximum ratings. By
using a dropper resistor to drop 4 V, the power dissipation re-
quirement for the regulator is reduced to 300 mW which is
within the maximum specifications for the N-8 package at
ADM663A/ADM666A
REV. 0 –7–
+85°C. The resistor value is calculated as R = 4/0.1 = 40 . A
resistor power rating of 400 mW or greater may be used.
Bypass Capacitors
The high frequency performance of the ADM663A/ADM666A
may be improved by decoupling the ouput using a filter capaci-
tor. A capacitor of 0.1 µF is suitable.
Typical Performance Characteristics
0.01 0.1 100001000100101
80
40
0
20
60
FREQUENCY – Hz
PSRR – dB
V
IN
DC = +9V
V
IN
p-p = +2V
V
OUT
DC = +5V
T
A
= +25°C
Figure 10. Power Supply Rejection Ratio vs. Frequency
2.0
020
0.6
0.2
2
0.4
0
1.2
0.8
1.0
1.4
1.6
1.8
1816141210864
IOUT1 – mA
(VIN – VOUT) – Vol ts
VIN = +2V TA = +25°C
VIN = + 9V
VIN = +15V
Figure 11. V
OUT1
Input-Output Differential vs.
Output Current
12
016
6
2
4
4
2
10
8
14108612
V
IN – Volts
IINµA
TA = +25°C
VOUT = +5V
VOUT = +3.3V
Figure 12. Quiescent Current vs. Input Voltage
5010
0
1.0
0
0.3
0.1
0.2
0.6
0.4
0.5
0.7
0.8
0.9
403020
I
OUT2
– mA
|V
IN
V
OUT
| – Volts
V
IN
= +2V
T
A
= +25°C
V
IN
= +9V
V
IN
= +15V
Figure 13. V
OUT2
Input-Output Differential vs.
Output Current
An input capacitor helps reduce noise, improves dynamic per-
formance and reduces the input dV/dt at the regulator input. A
suitable input capacitor is 0.1 µF or greater.
REV. 0
–8–
ADM663A/ADM666A
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Pin Plastic DIP
(N-8)
PIN 1 0.280 (7.11)
0.240 (6.10)
4
58
1
SEATING
PLANE
0.060 (1.52)
0.015 (0.38)
0.150
(3.81)
MIN
0.210
(5.33)
MAX
0.160 (4.06)
0.115 (2.93)
0.430 (10.92)
0.348 (8.84)
0.022 (0.558)
0.014 (0.356) 0.070 (1.77)
0.045 (1.15)
0.100
(2.54)
BSC
0.325 (8.25)
0.300 (7.62)
0.015 (0.381)
0.008 (0.204)
0.195 (4.95)
0.115 (2.93)
8-Terminal SO
(R-8)
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
8
°
0
°
0.0196 (0.50)
0.0099 (0.25) x 45
°
PIN 1
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
4
5
1
8
0.0192 (0.49)
0.0138 (0.35)
0.0500
(1.27)
BSC
0.0098 (0.25)
0.0040 (0.10)
0.1968 (5.00)
0.1890 (4.80)
0.102 (2.59)
0.094 (2.39)
PRINTED IN U.S.A. C1939–18–7/94
ADM663A/ADM666A
REV. 0 –9–
ORDERING GUIDE
Temperature Package
Model Range Option*
ADM663AAN –40°C to +85°C N-8
ADM663AAR –40°C to +85°C R-8
ADM666AAN –40°C to +85°C N-8
ADM666AAR –40°C to +85°C R-8
*For outline information see Package Information section.