LT1219CN8 - Linear Technology

LT1218/LT1219

■

Rail-to-Rail Input and Output

■

V V

OS(MAX)

for V

= V

–

to V

■

High Common Mode Rejection Ratio: 97dB Min

■

C-Load

Stable Version (LT1219)

■

High A

VOL

: 500V/mV Minimum Driving 10kΩ Load

■

Wide Supply Range:

2V to ±15V (LT1218/LT1219)

2V to ±5V (LT1218L/LT1219L)

■

Shutdown Mode: I

< 30µA

■

Low Supply Current: 420µA Max

■

Low Input Bias Current: 18nA Typical

■

300kHz Gain-Bandwidth Product (LT1218)

■

Slew Rate: 0.10V/µs (LT1218)

FEATURES

DESCRIPTION

The LT

1218/LT1219 are bipolar op amps which combine

rail-to-rail input and output operation with precision speci-

fications. Unlike other rail-to-rail amplifiers, the LT1218/

LT1219’s input offset voltage is a low 90µV across the

entire rail-to-rail input range, not just a portion of it. Using

a patented technique, both input stages of the LT1218/

LT1219 are trimmed: one at the negative supply and the

other at the positive supply. The resulting common mode

rejection of 97dB minimum is much better than other rail-

to-rail input op amps. A minimum open-loop gain of

500V/mV into a 10k load virtually eliminates all gain error.

The LT1218 has conventional compensation which

assures stability for capacitive loads of 1000pF or less.

The LT1219 has compensation that requires the use of a

0.1µF output capacitor, which improves the amplifier’s

supply rejection and reduces output impedance at high

frequencies. The output capacitor’s filtering action also

reduces high frequency noise, which is beneficial when

driving A/D converters.

High and low voltage versions of the devices are offered.

Operation is specified for 3V, 5V and ±5V supplies for the

LT1218L/LT1219L and 3V, 5V and ±15V for the LT1218/

LT1219.

APPLICATIONS

■

Driving A/D Converters

■

Test Equipment Amplifiers

■

MUX Amplifiers

Precision Rail-to-Rail Input

and Output Op Amps

C-Load is a trademark of Linear Technology Corporation.

, LTC and LT are registered trademarks of Linear Technology Corporation.

Voltage Follower Input to Output ErrorMUX Amplifier

TYPICAL APPLICATION

–

LT1218L

OUT

IN1

IN2

INPUT

SELECT

74HCO4 1218/19 • TA01

SHDN

MAXIMUM IN 

TO OUT ERROR

= 110µV FOR 

0.05V ≤ V

≤ 4.8V

= 10k

SHDN

INPUT VOLTAGE (V)

ERROR (mV)

1234

LT1218/19 • TA02

VS = 5V

AV = 1

NO LOAD

10

1.0

0.1

0.01

0.05 4.95

MAX ERROR = 110µV

0.05V ≤ VIN ≤ 4.8V

LT1218/LT1219

ABSOLUTE MAXIMUM RATINGS

PACKAGE/ORDER INFORMATION

Supply Voltage

LT1218/LT1219 ................................................. ±18V

LT1218L/LT1219L ............................................... ±8V

Input Current ......................................................±15mA

Output Short-Circuit Duration (Note 1).........Continuous

Operating Temperature Range ................ –40°C to 85°C

Specified Temperature Range (Note 3)... –40°C to 85°C

Storage Temperature Range ................. –65°C to 150°C

Junction Temperature...........................................150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

ORDER PART

NUMBER

LT1218CN8

LT1218CS8

LT1218LCN8

LT1218LCS8

LT1219CN8

LT1219CS8

LT1219LCN8

LT1219LCS8

S8 PART MARKING

1

2

3

8

7

6

5



TOP VIEW

TRIM

–IN

+IN

–

TRIM



OUT

SHDN

N8 PACKAGE

8-LEAD PDIP S8 PACKAGE

8-LEAD PLASTIC SO

JMAX

= 150°C, θ

= 130°C/ W (N8)

JMAX

= 150°C, θ

= 190°C/ W (S8)

1218 1219

1218L 1219L

Consult factory for Industrial and Military grades.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Offset Voltage V

= V

25 90 µV

= V

–

25 90 µV

∆V

Input Offset Voltage Shift V

= V

–

to V

15 70 µV

Input Bias Current V

= V

30 70 nA

= V

–

–70 –18 nA

∆I

Input Bias Current Shift V

= V

–

to V

50 140 nA

Input Offset Current V

= V

518nA

= V

–

218nA

∆I

Input Offset Current Shift V

= V

–

to V

518nA

Input Noise Voltage Density f = 1kHz 33 nV/√Hz

Input Noise Current Density f = 1kHz 0.09 pA/√Hz

VOL

Large-Signal Voltage Gain V

= 5V, V

= 50mV to 4.8V, R

= 10k 250 1000 V/mV

= 3V, V

= 50mV to 2.8V, R

= 10k 200 750 V/mV

CMRR Common Mode Rejection Ratio V

= 5V, V

= V

–

to V

97 110 dB

= 3V, V

= V

–

to V

92 106 dB

PSRR Power Supply Rejection Ratio V

= 2.3V to 12V, V

= 0V, V

= 0.5V 90 100 dB

Output Voltage Swing LOW No Load 4 12 mV

SINK

= 0.5mA 45 90 mV

SINK

= 2.5mA 120 240 mV

Output Voltage Swing HIGH No Load V

– 0.012 V

– 0.003 V

SOURCE

= 0.5mA V

– 0.130 V

– 0.065 V

SOURCE

= 2.5mA V

– 0.400 V

– 0.210 V

Short-Circuit Current V

= 5V 5 10 mA

= 3V 4 7 mA

Supply Current V

= 5V 370 420 µA

= 3V 370 410 µA

Positive Supply Current, SHDN V

= 5V, V

SHDN

= 0V 9 30 µA

= 3V, V

SHDN

= 0V 6 20 µA

TA = 25°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VO = half supply, VSHDN = V+, unless otherwise noted.

ELECTRICAL CHARACTERISTICS

LT1218/LT1219

ELECTRICAL CHARACTERISTICS

TA = 25°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VO = half supply, VSHDN = V+, unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

SR Slew Rate (LT1218/LT1218L) A

= –1 0.10 V/µs

(LT1219/LT1219L) A

= –1 0.05 V/µs

GBW Gain Bandwidth Product

(LT1218/LT1218L) A

= 1000 0.30 MHz

(LT1219/LT1219L) A

= 1000 0.15 MHz

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Offset Voltage V

= V

●75 200 µV

= V

–

●75 200 µV

TC Input Offset Drift (Note 2) ●13µV/°C

∆V

Input Offset Voltage Shift V

= V

–

to V

●25 80 µV

Input Bias Current V

= V

●30 75 nA

= V

–

●–75 –18 nA

∆I

Input Bias Current Shift V

= V

–

to V

●50 150 nA

Input Offset Current V

= V

●525nA

= V

–

●325nA

∆I

Input Offset Current Shift V

= V

–

to V

●525nA

VOL

Large-Signal Voltage Gain V

= 5V, V

= 50mV to 4.8V, R

= 10k ●250 1000 V/mV

= 3V, V

= 50mV to 2.8V, R

= 10k ●150 750 V/mV

CMRR Common Mode Rejection Ratio V

= 5V, V

= V

–

to V

●96 104 dB

= 3V, V

= V

–

to V

●91 106 dB

PSRR Power Supply Rejection Ratio V

= 2.3V to 12V, V

= 0V, V

= 0.5V ●88 100 dB

Output Voltage Swing LOW No Load ●414mV

SINK

= 0.5mA ●45 100 mV

SINK

= 2.5mA ●130 290 mV

Output Voltage Swing HIGH No Load ●V

– 0.014 V

– 0.004 V

SOURCE

= 0.5mA ●V

– 0.150 V

– 0.075 V

SOURCE

= 2.5mA ●V

– 0.480 V

– 0.240 V

Short-Circuit Current V

= 5V ●47 mA

= 3V ●36 mA

Supply Current V

= 5V ●370 485 µA

= 3V ●370 475 µA

Positive Supply Current, SHDN V

= 5V, V

SHDN

= 0V ●936µA

= 3V, V

SHDN

= 0V ●626µA

0°C ≤ TA ≤ 70°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VO = half supply, VSHDN = V+, unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Offset Voltage V

= V

– 0.15 ●400 µV

= V

–

+ 0.15 ●400 µV

TC Input Offset Drift (Note 2) ●14µV/°C

∆V

Input Offset Voltage Shift V

= V

– 0.15 to V

–

+ 0.15 ●30 105 µV

Input Bias Current V

= V

– 0.15 ●80 nA

= V

–

+ 0.15 ●–80 nA

∆I

Input Bias Current Shift V

= V

– 0.15 to V

–

+ 0.15 ●160 nA

Input Offset Current V

= V

– 0.15 ●40 nA

= V

–

+ 0.15 ●40 nA

∆I

Input Offset Current Shift V

= V

– 0.15 to V

–

+ 0.15 ●40 nA

–40°C ≤ TA ≤ 85°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VO = half supply, VSHDN = V+, unless otherwise noted. (Note 3)

LT1218/LT1219

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VOL

Large-Signal Voltage Gain V

= 5V, V

= 50mV to 4.8V, R

= 10k ●150 500 V/mV

= 3V, V

= 50mV to 2.8V, R

= 10k ●100 500 V/mV

CMRR Common Mode Rejection Ratio V

= 5V, V

= V

– 0.15 to V

–

+ 0.15 ●93 102 dB

= 3V, V

= V

– 0.15 to V

–

+ 0.15 ●88 100 dB

PSRR Power Supply Rejection Ratio V

= 2.3V to 12V, V

= 0V, V

= 0.5V ●86 100 dB

Output Voltage Swing LOW No Load ●515mV

SINK

= 0.5mA ●50 105 mV

SINK

= 2.5mA ●130 300 mV

Output Voltage Swing HIGH No Load ●V

– 0.015 V

– 0.004 mV

SOURCE

= 0.5mA ●V

– 0.160 V

– 0.070 mV

SOURCE

= 2.5mA ●V

– 0.500 V

– 0.250 mV

Short-Circuit Current V

= 5V ●47 mA

= 3V ●37 mA

Supply Current V

= 5V ●410 505 µA

= 3V ●400 495 µA

Positive Supply Current, SHDN V

= 5V, V

SHDN

= 0V ●15 50 µA

= 3V, V

SHDN

= 0V ●13 40 µA

–40°C ≤ TA ≤ 85°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VO = half supply, VSHDN = V+, unless otherwise noted. (Note 3)

LT1218L/LT1219L only; TA = 25°C, VS = ±5V, VCM = 0V, VO = 0V, VSHDN = 5V, unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Offset Voltage V

= V

35 140 µV

= V

–

35 140 µV

∆V

Input Offset Voltage Shift V

= V

–

to V

20 70 µV

Input Bias Current V

= V

30 70 nA

= V

–

–70 –18 nA

∆I

Input Bias Current Shift V

= V

–

to V

50 140 nA

Input Offset Current V

= V

518nA

= V

–

218nA

∆I

Input Offset Current Shift V

= V

–

to V

518nA

VOL

Large-Signal Voltage Gain V

= –4.7V to 4.7V, R

= 10k 500 2800 V/mV

= –4.5V to 4.5V, R

= 2k 300 1300 V/mV

CMRR Common Mode Rejection Ratio V

= V

–

to V

103 114 dB

Output Voltage Swing LOW No Load V

–

+ 0.004 V

–

+ 0.012 V

SINK

= 0.5mA V

–

+ 0.045 V

–

+ 0.090 V

SINK

= 5mA V

–

+ 0.180 V

–

+ 0.525 V

Output Voltage Swing HIGH No Load V

– 0.012 V

– 0.003 V

SOURCE

= 0.5mA V

– 0.130 V

– 0.065 V

SOURCE

= 5mA V

– 0.800 V

– 0.350 V

Short-Circuit Current 6 12 mA

Supply Current 400 430 µA

Positive Supply Current, SHDN V

SHDN

= 0V 10 40 µA

SR Slew Rate (LT1218/LT1218L) A

= –1, R

= Open, V

= ±3.5V 0.06 0.10 V/µs

(LT1219/LT1219L) A

= –1, R

= Open, V

= ±3.5V 0.03 0.05 V/µs

GBW Gain-Bandwidth Product

(LT1218/LT1218L) A

= 1000 0.2 0.30 MHz

(LT1219/LT1219L) A

= 1000 0.1 0.15 MHz

LT1218/LT1219

ELECTRICAL CHARACTERISTICS

LT1218L/LT1219L only; 0°C ≤ TA ≤ 70°C, VS = ±5V, VCM = 0V, VO = 0V, VSHDN = 5V, unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Offset Voltage V

= V

●100 250 µV

= V

–

●100 250 µV

∆V

Input Offset Voltage Shift V

= V

–

to V

●30 90 µV

Input Bias Current V

= V

●30 75 nA

= V

–

●–75 –18 nA

∆I

Input Bias Current V

= V

–

to V

●50 150 nA

Input Offset Current V

= V

●525nA

= V

–

●325nA

∆I

Input Offset Current Shift V

= V

–

to V

●520nA

VOL

Large-Signal Voltage Gain V

= –4.7V to 4.7V, R

= 10k ●375 2800 V/mV

= –4.5V to 4.5V, R

= 2k ●275 1300 V/mV

CMRR Common Mode Rejection Ratio V

= V

–

to V

●100 110 dB

Output Voltage Swing LOW No Load ●V

–

+ 0.004 V

–

+ 0.014 V

SINK

= 0.5mA ●V

–

+ 0.045 V

–

+ 0.100 V

SINK

= 5mA ●V

–

+ 0.200 V

–

+ 0.580 V

Output Voltage Swing HIGH No Load ●V

– 0.014 V

– 0.004 V

SOURCE

= 0.5mA ●V

– 0.150 V

– 0.075 V

SOURCE

= 5mA ●V

– 0.920 V

– 0.450 V

Short-Circuit Current ●510 mA

Supply Current ●400 495 µA

Positive Supply Current, SHDN V

SHDN

= 0V ●11 54 µA

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Offset Voltage V

= V

– 0.15 ●125 500 µV

= V

–

+ 0.15 ●125 500 µV

∆V

Input Offset Voltage Shift V

= V

– 0.15 to V

–

+ 0.15 ●35 120 µV

Input Bias Current V

= V

– 0.15 ●80 nA

= V

–

+ 0.15 ●–80 nA

∆I

Input Bias Current V

= V

– 0.15 to V

–

+ 0.15 ●160 nA

Input Offset Current Shift V

= V

– 0.15 ●40 nA

= V

–

+ 0.15 ●40 nA

∆I

Input Offset Current Shift V

= V

– 0.15 to V

–

+ 0.15 ●40 nA

VOL

Large-Signal Voltage Gain V

= –4.7V to 4.7V, R

= 10k ●300 2000 V/mV

= –4.5V to 4.5V, R

= 2k ●200 600 V/mV

CMRR Common Mode Rejection Ratio V

= V

– 0.15 to V

–

+ 0.15 ●98 109 dB

Output Voltage Swing LOW No Load ●V

–

+ 0.005 V

–

+ 0.015 V

SINK

= 0.5mA ●V

–

+ 0.050 V

–

+ 0.105 V

SINK

= 2.5mA ●V

–

+ 0.200 V

–

+ 0.620 V

Output Voltage Swing HIGH No Load ●V

– 0.015 V

– 0.004 V

SOURCE

= 0.5mA ●V

– 0.160 V

– 0.070 V

SOURCE

= 2.5mA ●V

– 1.000 V

– 0.400 V

Short-Circuit Current ●510 mA

Supply Current ●420 525 µA

Positive Supply Current, SHDN V

SHDN

= 0V ●18 60 µA

LT1218L, LT1219L only; – 40°C ≤ TA ≤ 85°C, VS = ±5V; VCM = 0V, VO = 0V, VSHDN = 5V, unless otherwise noted. (Note 3)

LT1218/LT1219

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Offset Voltage V

= V

85 200 µV

= V

–

85 200 µV

∆V

Input Offset Voltage Shift V

= V

–

to V

30 70 µV

Input Bias Current V

= V

30 70 nA

= V

–

–70 –18 nA

∆I

Input Bias Current V

= V

–

to V

50 140 nA

Input Offset Current V

= V

518nA

= V

–

218nA

∆I

Input Offset Current Shift V

= V

–

to V

518nA

VOL

Large-Signal Voltage Gain V

= –14.7V to 14.7V, R

= 10k 1000 4000 V/mV

= –10V to 10V, R

= 2k 500 2000 V/mV

CMRR Common Mode Rejection Ratio V

= V

–

to V

113 120 dB

PSRR Power Supply Rejection Ratio V

= ±5V to ±15V 100 110 dB

Output Voltage Swing LOW No Load V

–

+ 0.004 V

–

+ 0.012 V

SINK

= 0.5mA V

–

+ 0.045 V

–

+ 0.090 V

SINK

= 5mA V

–

+ 0.270 V

–

+ 0.525 V

Output Voltage Swing HIGH No Load V

– 0.012 V

– 0.003 V

SOURCE

= 0.5mA V

– 0.130 V

– 0.065 V

SOURCE

= 5mA V

– 0.800 V

– 0.580 V

Short-Circuit Current 10 20 mA

Supply Current 425 550 µA

Positive Supply Current, SHDN V

SHDN

= 0V 15 40 µA

SR Slew Rate (LT1218/LT1218L) A

= –1 0.10 V/µs

(LT1219/LT1219L A

= –1 0.05 V/µs

GBW Gain Bandwidth Product

(LT1218/LT1218L) A

= 1000 0.28 MHz

(LT1219/LT1219L) A

= 1000 0.15 MHz

LT1218/LT1219 only; TA = 25°C, VS = ±15V, VCM = 0V, VO = 0V, VSHDN = 15V, unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Offset Voltage V

= V

●120 300 µV

= V

–

●120 300 µV

∆V

Input Offset Voltage Shift V

= V

–

to V

●50 105 µV

Input Bias Current V

= V

●30 75 nA

= V

–

●–75 –18 nA

∆I

Input Bias Current V

= V

–

to V

●50 150 nA

Input Offset Current V

= V

●525nA

= V

–

●325nA

∆I

Input Offset Current Shift V

= V

–

to V

●520nA

VOL

Large-Signal Voltage Gain V

= –14.7V to 14.7V, R

= 10k ●750 3000 V/mV

= –10V to 10V, R

= 2k ●500 1500 V/mV

CMRR Common Mode Rejection Ratio V

= V

–

to V

●109 114 dB

PSRR Power Supply Rejection Ratio V

= ±5V to ±15V ●97 110 dB

Output Voltage Swing LOW No Load ●V

–

+ 0.004 V

–

+ 0.014 V

SINK

= 0.5mA ●V

–

+ 0.045 V

–

+ 0.100 V

SINK

= 5mA ●V

–

+ 0.310 V

–

+ 0.580 V

Output Voltage Swing HIGH No Load ●V

– 0.014 V

– 0.003 V

SOURCE

= 0.5mA ●V

– 0.150 V

– 0.075 V

SOURCE

= 5mA ●V

– 0.920 V

– 0.700 V

LT1218/LT1219 only; 0°C ≤ TA ≤ 70°C, VS = ±15V, VCM = 0V, VO = 0V, VSHDN = 15V, unless otherwise noted.

LT1218/LT1219

ELECTRICAL CHARACTERISTICS

LT1218/LT1219 only; 0°C ≤ TA ≤ 70°C, VS = ±15V, VCM = 0V, VO = 0V, VSHDN = 15V, unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Short-Circuit Current ●817 mA

Supply Current ●450 600 µA

Positive Supply Current, SHDN V

SHDN

= 0V ●20 54 µA

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Offset Voltage V

= V

– 0.15 ●150 600 µV

= V

–

+ 0.15 ●150 600 µV

∆V

Input Offset Voltage Shift V

= V

– 0.15 to V

–

+ 0.15 ●50 165 µV

Input Bias Current V

= V

– 0.15 ●80 nA

= V

–

+ 0.15 ●–80 nA

∆I

Input Bias Current V

= V

– 0.15 to V

–

+ 0.15 ●160 nA

Input Offset Current V

= V

– 0.15 ●40 nA

= V

–

+ 0.15 ●40 nA

∆I

Input Offset Current Shift V

= V

– 0.15 to V

–

+ 0.15 ●40 nA

VOL

Large-Signal Voltage Gain V

= –14.7V to 14.7V, R

= 10k ●500 3000 V/mV

= –10V to 10V, R

= 2k ●400 1000 V/mV

CMRR Common Mode Rejection Ratio V

= V

– 0.15 to V

–

+ 0.15 ●105 114 dB

PSRR Power Supply Rejection Ratio V

= ±5V to ±15V ●96 110 dB

Output Voltage Swing LOW No Load ●V

–

+ 0.005 V

–

+ 0.015 V

SINK

= 0.5mA ●V

–

+ 0.050 V

–

+ 0.105 V

SINK

= 2.5mA ●V

–

+ 0.200 V

–

+ 0.620 V

Output Voltage Swing HIGH No Load ●V

– 0.015 V

– 0.004 V

SOURCE

= 0.5mA ●V

– 0.160 V

– 0.070 V

SOURCE

= 2.5mA ●V

– 1.000 V

– 0.400 V

Short-Circuit Current ●514 mA

Supply Current ●650 µA

Positive Supply Current, SHDN V

SHDN

= 0V ●60 µA

LT1218, LT1219 only; –40°C ≤ TA ≤ 85°C, VS = ±15V; VCM = 0V = VO = 0V, VSHDN = 15V, unless otherwise noted. (Note 3)

Note 2: This parameter is not 100% tested.

Note 3: The LT1218/LT1219 are designed, characterized and expected to

meet these extended temperature limits, but are not tested at –40°C and

85°C. Guaranteed I grade part are available: consult factory.

The ● denotes specifications which apply over the full operating

temperature range.

Note 1: A heat sink may be required to keep the junction temperature

below the Absolute Maximum Rating when the output is shorted

indefinitely.

LT1218/LT1219

TYPICAL PERFORMANCE CHARACTERISTICS

VOS Distribution, VCM = 0V

INPUT OFFSET VOLTAGE (µV)

PERCENT OF UNITS (%)

30

25

20

15

10

5

0–60 –20 20 60

LT1218/19 • TPC01

100–100    

= 5V, 0V

= 0V

INPUT OFFSET VOLTAGE (µV)

PERCENT OF UNITS (%)

30

25

20

15

10

5

0–60 –20 20 60

LT1218/19 • TPC03

100–100    

= 5V, 0V

= 5V

VOS Distribution, VCM = 5V

INPUT OFFSET VOLTAGE (µV)

–100

PERCENT OF UNITS (%)

40

35

30

25

20

15

10

5

060

LT1218/19 • TPC02

–60 –20 20 



 100

= 5V, 0V

= 0V TO 5V

VOS Shift, VCM = 0V to 5V

Supply Current vs Temperature Input Bias Current vs

Common Mode VoltageMinimum Supply Voltage

TEMPERATURE (°C)

–40

SUPPLY CURRENT (µA)

500

400

300

200

100

0040 60

LT1218/19 • TPC04

–20 20 80 100

= ±15V

= ±2.5V

COMMON MODE VOLTAGE (V)

–1

INPUT BIAS CURRENT (nA)

LT1218/19 • TPC06

135

50



25



0



–25



–50 0246

= 25°C

= 85°C

= –40°C

= 5V, 0V

= 25°C

TOTAL SUPPLY VOLTAGE (V)

1.0

CHANGE IN OFFSET VOLTAGE (µV)

200

150

100

50

0

–50 1.5 2.0 2.5

LT1218/19 • TPC05

3.53.0 4.0 4.5 5.0

= –40°C

= 25°C

= 85°C

LOAD CURRENT (mA)

0.001

SATURATION VOLTAGE (V)

0.1

0.10.01 10

LT1218/19 • TPC07

0.01



= 25°C

= 85°C

= –40°C

= 5V, 0V

Output Saturation Voltage vs

Load Current (Output Low) 0.1Hz to 10Hz Output

Voltage Noise

Output Saturation Voltage vs

Load Current (Output High)

LOAD CURRENT (mA)

0.001

SATURATION VOLTAGE (V)

0.1

0.10.01 10

LT1218/19 • TPC08

0.01



= 25°CT

= 85°C

= –40°C

= 5V, 0V

TIME (1s/DIV)

OUTPUT VOLTAGE (400nV/DIV)



LT1218/19 • TPC09

= ±2.5V

= 0V

LT1218/LT1219

TYPICAL PERFORMANCE CHARACTERISTICS

LT1218 Gain and Phase

Shift vs Frequency

FREQUENCY (kHz)

VOLTAGE GAIN (dB)

PHASE SHIFT (DEG)

70

60

50

40

30

20

10

0

–10

–20

–30

140

120

100

80

60

40

20

0

–20

–40

–60

1 100 1000 10000

LT1218/19 • TPC12

PHASE

GAIN

= ±2.5V

LT1219 Gain and Phase

Shift vs Frequency

FREQUENCY (kHz)

VOLTAGE GAIN (dB)

PHASE SHIFT (DEG)

70

60

50

40

30

20

10

0

–10

–20

–30

140

120

100

80

60

40

20

0

–20

–40

–60

1 100 1000 10000

LT1218/19 • TPC13

PHASE

GAIN

= ±2.5V

= 0.1µF

Noise Current Spectrum

FREQUENCY (Hz)

CURRENT NOISE (pA/√Hz)

2.5



2.0



1.5



1.0



0.5



0

10 100 1000

LT1218/19 • TPC11

= 5V, 0V



= 4V

= 2.5V

Noise Voltage Spectrum

LT1218 Gain Bandwidth and

Phase Margin vs Supply Voltage

SUPPLY VOLTAGE (V)

FREQUENCY (kHz)

PHASE MARGIN (DEG)

15 25

LT1218/19 • TPC

510 20

400

350

300

250

200

150

100

50

80

70

60

50

40

30

20

10

PHASE MARGIN

GBW

LT1218 Common Mode Rejection

Ratio vs Frequency

FREQUENCY (kHz)

COMMON MODE REJECTION RATIO (dB)

100

90

80

70

60

50

40

30

20

10

010 100 1000

LT1218/19 • TPC15

= ±2.5V

LT1219 Power Supply Rejection

Ratio vs Frequency

FREQUENCY (kHz)

POWER SUPPLY REJECTION RATIO (dB)

100

90

80

70

60

50

40

30

20

10

010 100 1000

LT1218/19 • TPC16

= ±2.5V

POSITIVE SUPPLY

NEGATIVE SUPPLY

FREQUENCY (Hz)

NOISE VOLTAGE (nV/√Hz)

100

90

80

70

60

50

40

30

20

10

010 100 1000

LT1218/19 • TPC10

= 5V, 0V



= 4V

= 2.5V

LT1218/LT1219

TYPICAL PERFORMANCE CHARACTERISTICS

LT1218 Power Supply Rejection

Ratio vs Frequency LT1218 Closed Loop Output

Impedance vs Frequency LT1219 Closed Loop Output

Impedance vs Frequency

FREQUENCY (kHz)

POWER SUPPLY REJECTION RATIO (dB)

100

90

80

70

60

50

40

30

20

10

010 100 1000

LT1218/19 • TPC17

= ±2.5V

POSITIVE SUPPLY

NEGATIVE SUPPLY

FREQUENCY (kHz)

0.1

OUTPUT IMPEDANCE (Ω)

1000

1 10 100 1000

LT1218/19 • TPC18

1.0

100

AV = 10

AV = 1

VS = ±2.5V

FREQUENCY (kHz)

0.1

OUTPUT IMPEDANCE (Ω)

1000

1 10 100 1000

LT1218/19 • TPC19

1.0

100

= ±2.5V

= 0.1µF

= 10

= 1

LT1218 Capacitive Load Handling LT1219 Overshoot vs Load

Current, VS = ±2.5V LT1219 Overshoot vs Load

Current, VS = ±15V

LOAD CURRENT (mA)

–10

OVERSHOOT (%)

LT1218/19 • TPC21

–5 0 10

70

60

50

40

30

20

10

= 0.22µF

= 0.1µF

= 0.047µF

= ±2.5V

= 1

CAPACITIVE LOAD (pF)

OVERSHOOT (%)

80

70

60

50

40

30

20

10

010 1000 10000 100000

LT1218/19 • TPC20

100

= 1

= 5

= 10

= ±2.5V

Open-Loop Gain, VS = ±15V THD + Noise vs Frequency

OUTPUT VOLTAGE (V)

–20

OFFSET VOLTAGE CHANGE (µV)

LT1218/19 • TPC23

–10 010

40

30

20

10

0

–10

–20

–30

–40 –15 –5 515

= 10k

= 2k

= ±15V

FREQUENCY (kHz)

0.01

0.001

THD + NOISE (%)

0.01

0.1

0.1 1 10

LT1218/19 • TPC25

VS = ±1.5V

VIN = 2VP-P

RL = 10k

AV = 1

AV = –1

Input Offset Drift vs Time

TIME AFTER POWER-UP (SEC)

CHANGE IN OFFSET VOLTAGE (µV)

40

30

20

10

0

–10

–20

–30

–40

LT1218/19 • TPC24

0 20 40 60 80 100 120 140 180 200160

= ±15V

= ±2.5V

= 0.22µF

= 0.1µF

LOAD CURRENT (mA)

–10

OVERSHOOT (%)

LT1218/19 • TPC22

–5 0 10

70

60

50

40

30

20

10

= 0.047µF

= ±15V

= 1

LT1218/LT1219

TYPICAL PERFORMANCE CHARACTERISTICS

THD + Noise vs

Peak-to-Peak Voltage Large-Signal Response

VS = ±15V

INPUT VOLTAGE (PEAK-TO-PEAK)

THD + NOISE (%)

10

1

0.1

0.01

0.001 02435

LT1218/19 • TPC26

= ±1.5V

= 1

= ±2.5V

= 1

= ±2.5V

= –1

= ±1.5V

= –1

f = 1kHz

= 10k

(ALL CURVES)



Small-Signal Response

VS = ±15V

= 1

= ±15V

LT1218/18 • TPC27

= 1

= ±15V

LT1218/18 • TPC28

APPLICATIONS INFORMATION

WUU U

Rail-to-Rail Operation

The LT1218/LT1219 differ from conventional op amps in

the design of both the input and output stages. Figure 1

shows a simplified schematic of the amplifier. The input

stage consists of two differential amplifiers, a PNP stage

Q1/Q2 and an NPN stage Q3/Q4, which are active over

different portions of the input common mode range.

Lateral devices are used in both input stages, eliminating

the need for clamps across the input pins. Each input stage

is trimmed for offset voltage. A complementary output

configuration (Q23 through Q26) is employed to create an

Q24

Q23

Q25

–

Q26

Q22

Q21

Q17

Q16

Q18

Q15

Q19

Q20

D5D4

Q11

I1 Q10

Q14

Q13

Q1 Q2

Q3 Q4

Q12

OUT



– 300mV

–

LT1218/19 • F01

TRIM

SHDN

BIAS

CONTROL

Figure 1. LT1218 Simplified Schematic Diagram

LT1218/LT1219

APPLICATIONS INFORMATION

WUU U

output stage with rail-to-rail swing. The amplifier is fabri-

cated on Linear Technology’s proprietary complementary

bipolar process, which ensures very similar DC and AC

characteristics for the output devices Q24 and Q26.

A simple comparator Q5 steers current from current

source I

between the two input stages. When the input

common mode voltage V

is near the negative supply,

Q5 is reverse biased, and I

becomes the tail current for the

PNP differential pair Q1/Q2. At the other extreme, when

is within about 1.3V from the positive supply, Q5

diverts I

to the current mirror D3/Q6, which furnishes the

tail current for the NPN differential pair Q3/Q4.

The collector currents of the two input pairs are combined

in the second stage, consisting of Q7 through Q11. Most

of the voltage gain in the amplifier is contained in this

stage. Differential amplifier Q14/Q15 buffers the output of

the second stage, converting the output voltage to differ-

ential currents. The differential currents pass through

current mirrors D4/Q17 and D5/Q16, and are converted to

differential voltages by Q18 and Q19. These voltages are

also buffered and applied to the output Darlington pairs

Q23/Q24 and Q25/Q26. Capacitors C1 and C2 form local

feedback loops around the output devices, lowering the

output impedance at high frequencies.

Input Offset Voltage

Since the amplifier has two input stages, the input offset

voltage changes depending upon which stage is active.

The input offsets are random, but bounded voltages.

When the amplifier switches between stages, offset volt-

ages may go up, down or remain flat; but will not exceed

the guaranteed limits. This behavior is illustrated in three

distribution plots of input offset voltage in the Typical

Performance Characteristics section.

Overdrive Protection

Two circuits prevent the output from reversing polarity

when the input voltage exceeds the common mode range.

When the noninverting input exceeds the positive supply

by approximately 300mV, the clamp transistor Q12 (Fig-

ure 1) turns on, pulling the output of the second stage low,

which forces the output high. For input below the negative

supply, diodes D1 and D2 turn on, overcoming the satu-

ration of the input pair Q1/Q2.

When overdriven, the amplifier draws input current that

exceeds the normal input bias current. Figures 2 and 3

show typical input current as a function of input voltage.

The input current must be less than 10mA for the phase

reversal protection to work properly. When the amplifier is

severely overdriven, an external resistor should be used to

limit the overdrive current.

COMMON MODE VOLTAGE RELATIVE TO

NEGATIVE SUPPLY (mV)

–800

–110

INPUT BIAS CURRENT (nA)

–90

–70

–50

–30

–600 –400



LT1218/19 • F03

–200

–10

–20

–40

–60

–80

–100

200

T = –55°C T = 25°C

T = 85°C

–

T = 70°C

MEASURED AS A FOLLOWER

Figure 3. Input Bias Current vs Common Mode Voltage

COMMON MODE VOLTAGE RELATIVE TO

POSITIVE SUPPLY (mV)

–500

INPUT BIAS CURRENT (nA)

–300 –100 VS

LT1218/19 • F02

100

110

300 500

T = –55°C

T = 25°C

T = 85°C

T = 70°C

MEASURED AS A 

FOLLOWER

–

Figure 2. Input Bias Current vs Common Mode Voltage

LT1218/LT1219

Shutdown

The biasing of the LT1218/LT1219 is controlled by the

SHDN pin. When the SHDN pin is low, the part is shut

down. In the shutdown mode, the output looks like a 40pF

capacitor and the supply current is less than 30µA. The

SHDN pin is referenced to the positive supply through an

internal bias circuit (see Figure 1). The SHDN pin current

with the pin low is typically 3µA.

The switching time between the shutdown and active

states is about 20µs, however, the total time to settle will

be greater by the slew time of the amplifier. For example,

if the DC voltage at the amplifier output is 0V in shutdown

and –2V in the active mode, an additional 20µs is required.

Figures 4a and 4b show the switching waveforms for a

sinusoidal and a –2V DC input to the LT1218.

The SHDN pin can be driven directly from CMOS logic if the

logic and the LT1218/LT1219 are operated from the same

supplies. For higher supply operation, an interface is

required. An easy way to interface between supplies is to

use open-drain logic, an example is shown in Figure 5.

Because the SHDN pin is referenced to the positive supply,

the logic used should have a breakdown voltage greater

than the positive supply.

APPLICATIONS INFORMATION

WUU U

OUT

SHDN

= 10V

= ±2.5V LT1218/19 • F04a

Figure 4a

OUT

SHDN

= 10V

= ±2.5V LT1218/19 • F04a

Figure 4b

–

–15V

15V

LT1218/

LT1219

LT1218/19 • F05

SHDN

SHDN 74C906

Figure 5. Shutdown Interface

Trim Pins

Trim pins are provided for compatibility with other single

op amps. Input offset voltage can be adjusted over a

±2.3mV range with a 10k potentiometer.

–

10k

–

OUT

LT1218/

LT1219

LT1218/19 • F06

Figure 6. Optional Offset Nulling

Improved Supply Rejection in the LT1219

The LT1219 is a variation of the LT1218 offering greater

supply rejection and lower high frequency output imped-

ance. The LT1219 requires a 0.1µF load capacitance for

LT1218/LT1219

APPLICATIONS INFORMATION

WUU U

compensation. The output capacitance forms a filter,

which reduces pickup from the supply and lowers the

output impedance. This additional filtering is helpful in

mixed analog/digital systems with common supplies or

systems employing switching supplies. Filtering also

reduces high frequency noise, which may be beneficial

when driving A/D converters.

Figures 7a and 7b show the outputs of the LT1218/LT1219

perturbed by a 200mV

P-P

50kHz square wave added to the

positive supply. The LT1219 power supply rejection is

about ten times greater than that of the LT1218 at 50kHz.

Note the 5-to-1 scale change in the output voltage traces.

The tolerance of the external compensation capacitor is

not critical. The plots of Overshoot vs Load Current in the

Typical Performance Characteristics section illustrate the

effect of a capacitive load.

LT1218/19 • F07a

Figure 7a. LT1218 Power Supply Rejection Test

LT1218/19 • F07b

Figure 7b. LT1219 Power Supply Rejection Test

TYPICAL APPLICATIONS

Buffer for 12-Bit A/D Converter

REF



+IN

–IN

GND



CLK

OUT

CS/SHDN

1

2

3

8

7

6

LTC1285

–

TO µP

1µF

0.1µF

LT1219

LT1218/19 • TA03

High-Side Current Source

–

LT1218

SENSE

0.2Ω

40k

Q1

MTP23P06

LOAD

5V < V

< 30V

0A < I

LOAD

< 1A AT V

= 5V

0mA < I

LOAD

< 160mA AT V

= 30V



Q2

2N4340

100Ω

0.0033µF

LT1004-1.2



10k

LT1218/19 • TA04

(AC)

OUT

(AC)

OUT

LT1218/LT1219

TYPICAL APPLICATIONS

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

S8 Package

8-Lead Plastic Small Outline (Narrow 0.150)

(LTC DWG # 05-08-1610)

1234

0.150 – 0.157**

(3.810 – 3.988)

8765

0.189 – 0.197*

(4.801 – 5.004)

0.228 – 0.244

(5.791 – 6.197)

0.016 – 0.050

0.406 – 1.270

0.010 – 0.020

(0.254 – 0.508)× 45°

0°– 8° TYP

0.008 – 0.010

(0.203 – 0.254)

SO8 0996

0.053 – 0.069

(1.346 – 1.752)

0.014 – 0.019

(0.355 – 0.483)

0.004 – 0.010

(0.101 – 0.254)

0.050

(1.270)

TYP

DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH 

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD 

FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE



*

Positive Supply Current Sense

–

LT1218 Q1

TP0610L

VO = (ILOAD)(RS)R2

()

= (ILOAD)(20Ω)

1218/19 • TA06

RS

0.2Ω

LOAD

ILOAD

VCC R1

200Ω

R2

20k

Dimensions in inches (millimeters) unless otherwise noted.

PACKAGE DESCRIPTION

N8 Package

8-Lead PDIP (Narrow 0.300)

(LTC DWG # 05-08-1510)

N8 0695

0.005

(0.127)

MIN

0.100 ± 0.010

(2.540 ± 0.254)

0.065

(1.651)

TYP

0.045 – 0.065

(1.143 – 1.651)

0.130 ± 0.005

(3.302 ± 0.127)

0.015

(0.380)

MIN

0.018 ± 0.003

(0.457 ± 0.076)

0.125

(3.175)

MIN



12 34

8765

0.255 ± 0.015*

(6.477 ± 0.381)



0.400*

(10.160)

MAX

0.009 – 0.015

(0.229 – 0.381)

0.300 – 0.325

(7.620 – 8.255)

0.325 +0.025

–0.015

+0.635

–0.381

8.255

()

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)

LT1218/LT1219

12189f LT/TP 0697 7K • PRINTED IN USA

 LINEAR TECHNOLOGY CORPORATION 1997

Linear Technology Cor poration

1630 McCarthy Blvd., Milpitas, CA 95035-7417

●

(408) 432-1900

FAX: (408) 434-0507

●

TELEX: 499-3977

●

www.linear-tech.com

TYPICAL APPLICATION

8-Channel, 12-Bit Data Acquisition System with Programmable Gain

1218/19 • TA05

CH0

CH1

CH2

CH3

CH4

CH5

CH6

CH7

20

21

22

23

24

1

2

64R

32R

16R

8R

4R

2R

R

–

8 COM

18 MUXOUT

GND

4, 9

10

6

5, 14

11

CSADC

CSMUX

CLK

OUT



12

NC

12-BIT

SAMPLING

ADC

8-CHANNEL

MUX

1

2

3

4

5

6

7

16

15

14

13

12

11

10

LTC1391

8-CHANNEL

MUX

1µF

ADCIN

17 16 15, 19 1µF

0.1µF

1µF

REF

–

CH0

CH1

CH2

CH3

CH4

CH5

CH6

CH7

V+

D

V–

OUT



CS

CLK

GND

LT1219L

LTC1598

µP/µC

INPUTS

 GAIN

 MUX 

CHANNEL GAIN

 0 1

 1 2

 2 4

 3 8

 4 16

 5 32

 6 64

 7 128

PART NUMBER DESCRIPTION COMMENTS

LTC®1152 Rail-to-Rail Input and Output, Zero-Drift Op Amp High DC Accuracy, 10µV V

OS(MAX)

, 100nV/°C Drift, 0.7MHz GBW, 0.5V/µs

Slew Rate, Maximum Supply Current 3mA

LT1366/LT1367 Dual/Quad Precision, Rail-to-Rail Input and Output 475µV V

OS(MAX)

, 400kHz GBW, 0.13V/µs Slew Rate,

Op Amps Maximum Supply Current 520µA per Op Amp

LT1466/LT1467 Dual/Quad Micropower, Rail-to-Rail Input and Output Maximum Supply Current 75µA per Op Amp, 390µV V

OS(MAX)

Op Amps 120kHz Gain Bandwidth

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