MM
D50R380P Datasheet
Jan.
2015
Revision 1.1
MagnaC
hip Semicond
uctor Ltd
.
1
Parameter
V
alue
Unit
V
DS
@
T
j,max
550
V
R
DS(on),max
0
.3
8
Ω
V
TH
,typ
3
V
I
D
1
1
A
Q
g,typ
21.8
nC
Order Code
Marking
T
emp. Range
Package
Packing
RoHS Status
MM
D50R380PRH
50R380
-55 ~ 150
℃
TO
-
252
(DP
AK)
Reel
Halogen Free
MM
D50R380P
500V 0.38
Ω
N-channel M
OSFET
Description
MMD50R
380P is pow
er
MOSFET
using magnac
hip
’
s advanced super
junction techn
ology that ca
n
realize v
ery low on-resistance and ga
te charge.
It will
provide much high ef
ficiency by
using
optimized char
ge coupling technolo
gy
.
These user friendl
y devices give an
advantage of Low
EMI to
designers as w
ell as low
switching loss.
Features
Low Pow
er Loss by High Speed
Switching and Lo
w On-Resistance
100%
Av
alanche
T
es
ted
Green Packa
ge
–
Pb Free Plating, Hal
ogen Free
Key Parameters
Ordering
Informatio
n
Applications
PFC Pow
er Supply Stages
Switching
Applications
Adapter
Motor Control
DC
–
DC Converters
D
G
S
G
D
S
Package & Internal
Circui
t
TO
-
252
(DP
AK)
MM
D50R380P Datasheet
Jan.
2015
Revision 1.1
MagnaC
hip Semicond
uctor Ltd
.
2
Parameter
Symbol
Rating
Unit
Note
Drain
–
Source vol
tage
V
DSS
5
00
V
Gate
–
Source vol
tage
V
GSS
±
30
V
Continuous drain
current
I
D
11
A
T
C
=25
℃
6.95
A
T
C
=100
℃
Pulsed drain cu
rrent
(1)
I
DM
33
A
Power dissi
pation
P
D
83
W
Single - pulse aval
anche energy
E
AS
220
mJ
MOSFE
T dv/dt rugg
edness
dv/dt
50
V/ns
Diode dv
/dt ruggedness
dv/dt
15
V/ns
Storage tempera
ture
T
stg
-55 ~150
℃
Maximum operatin
g junction
temperature
T
j
150
℃
1)
Pulse width t
P
limited by T
j,m
ax
2)
I
SD
≤
I
D
, V
DS peak
≤
V
(BR)DSS
Parameter
Symbol
V
alue
Unit
Thermal resistanc
e, junction-case max
R
thjc
1.5
℃
/W
Thermal resistanc
e, junction-ambient
max
R
thja
62.5
℃
/W
Thermal Character
istics
Absolute Maximum
Rating (T
c
=2
5
℃
unless oth
erw
ise specified)
MM
D50R380P Datasheet
Jan.
2015
Revision 1.1
MagnaC
hip Semicond
uctor Ltd
.
3
Parameter
Symbol
Min.
T
yp.
Max.
Unit
T
est Condition
Drain
–
Source
Breakdow
n voltage
V
(BR)D
SS
500
-
-
V
V
GS
= 0V
,
I
D
=0.25mA
Gate
Threshold V
oltage
V
GS
(th)
2
.5
3
.0
3.5
V
V
DS
= V
GS,
I
D
=0.25mA
Zero Gate V
oltage
Drain Current
I
D
SS
-
-
1
μ
A
V
DS
=
500V
,
V
GS
= 0V
Gate Leakage
Current
I
GSS
-
-
100
nA
V
GS
=
±3
0V
,
V
DS
=0V
Drain-Source On
State Resistance
R
DS(ON)
-
0.35
0.38
Ω
V
GS
= 10V
, I
D
=
3.8A
Parameter
Symbol
Min.
T
yp.
Max.
Unit
T
est Condition
Input Capacitance
C
iss
-
702
-
pF
V
DS
= 25V
, V
GS
= 0V
,
f = 1.0M
Hz
Output Capacitance
C
oss
-
357
-
Reverse
T
ransfer Capacitance
C
rss
-
33.7
-
Effectiv
e Output Capaci
tance
Energy Related
(3)
C
o(er)
-
27.6
-
V
DS
= 0V to
40
0V
,
V
GS
= 0V
,f = 1.0M
Hz
T
urn On
Delay
Time
t
d(on)
-
15.2
-
ns
V
GS
= 10V
, R
G
= 25Ω,
V
DS
=
25
0V
, I
D
=
1
1A
Rise
T
ime
t
r
-
32
-
T
urn O
ff Delay
T
ime
t
d(off)
-
59.6
-
Fall
T
ime
t
f
-
28.4
-
T
o
tal Gate Char
ge
Q
g
-
21
.8
-
nC
V
GS
= 10V
, V
DS
= 400V
,
I
D
= 1
1A
Gate
–
Source Cha
rge
Q
gs
-
4.8
-
Gate
–
Drain Char
ge
Q
gd
-
9.
7
-
Gate Resistance
R
G
-
3.0
-
Ω
V
GS
= 0V
, f = 1.0M
Hz
3) C
o(er)
is a capacitance that gives the same stored energy as C
OSS
while V
DS
is
rising from 0V to 80% V
(BR)DSS
Static Characterist
ics (T
c
=25
℃
unless
otherw
ise specified)
Dynamic Characteri
stics (T
c
=25
℃
unle
ss otherwise speci
fied)
MM
D50R380P Datasheet
Jan.
2015
Revision 1.1
MagnaC
hip Semicond
uctor Ltd
.
4
Parameter
Symbol
Min.
T
yp.
Max.
Unit
T
est Condition
Continuous Diod
e Forward
Current
I
SD
-
-
11
A
Diode Forw
ard Voltage
V
SD
-
-
1.4
V
I
SD
= 11 A, VGS
= 0 V
Reverse Recov
ery Time
t
rr
-
256
-
ns
I
SD
= 11 A
di/dt = 100 A/μs
V
DD
= 100 V
Reverse Recov
ery Charge
Q
rr
-
2.3
-
μ
C
Reverse Recov
ery Current
I
rrm
-
17.6
-
A
Reverse Diode Ch
aracteristics (
T
c
=25
℃
unless otherw
ise specified)
MM
D50R380P Datasheet
Jan.
2015
Revision 1.1
MagnaC
hip Semicond
uctor Ltd
.
5
Characteristic Gra
ph
MM
D50R380P Datasheet
Jan.
2015
Revision 1.1
MagnaC
hip Semicond
uctor Ltd
.
6
MM
D50R380P Datasheet
Jan.
2015
Revision 1.1
MagnaC
hip Semicond
uctor Ltd
.
7
MM
D50R380P Datasheet
Jan.
2015
Revision 1.1
MagnaC
hip Semicond
uctor Ltd
.
8
T
est Circuit
V
DS
10V
1mA
DUT
100K
Ω
10V
Same type as DUT
+
-
V
DD
DUT
+
-
Same type as DUT
V
DS
+
-
I
S
R
g
10K
Ω
V
gs
±
15V
L
I
F
V
DD
DUT
+
-
I
D
V
DS
V
gs
t
p
R
L
V
DD
DUT
+
-
I
AS
V
DS
R
g
V
gs
t
p
L
10V
V
GS
Charge
Q
g
Q
gs
Q
gd
V
DS
V
GS
90%
10%
T
d(on)
t
r
t
on
T
d(off)
t
f
t
off
V
DD
t
p
t
AV
V
DS(t)
BV
DSS
I
AS
Rds(on) * I
AS
t
rr
t
a
t
b
I
FM
I
RM
d
i
/d
t
0.25 I
RM
0.75 I
RM
0.5 I
RM
V
R
V
RM(REC)
Fig15-1. Gate charge measurement circuit
Fig15-2. Gate charge waveform
Fig16-1. Diode reverse recovery test circuit
Fig16-1. Diode reverse recovery test waveform
Fig17-1. Switching time test circuit for resistive load
Fig17-2. Switching time waveform
Fig18-1. Unclamped inductive load test circuit
Fig18-2. Unclamped inductive waveform
R
g
25
Ω
MM
D50R380P Datasheet
Jan.
2015
Revision 1.1
MagnaC
hip Semicond
uctor Ltd
.
9
Physical Dimension
TO
-252 (D-P
AK)
, 3L
Dimensions are in mil
limeters, un
less ot
herwise specified
W
orld
w
ide
S
a
l
e
s
S
uppo
rt Loca
tions
MM
D50R380P Datasheet
Jan.
2015
Revision 1.1
MagnaC
hip Semicond
uctor Ltd
.
10
DISCLAIMER:
The
Products
are
not
des
igned
for
use
in
hostile
environments,
including,
without
limitation,
a
ircraft,
nuclear
power
generation,
medical
appliance
s,
and
devices
or
systems
in
w
hich
malfunction
of
any
Produ
ct
can
reasonably
be
expected
to
result
in
a
personal
injury.
Seller’s
customers
using
or
selling
Seller’s
products
for
use
in
such
applications do so at their own risk and agree to fully defend and indemnify
Seller.
MagnaC
hip reserves
the
right
to
change the
specifications and circ
uitry without notice
at
any
time.
Mag
naChip does
not
consid
er responsibility
for
use
of
any
c
ircuitry
other
tha
n
c
ircuitry
entirely
included
in
a
Mag
naChip
product.
is
a
registered
trademark
of
MagnaChip
Semiconductor
Ltd.
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