©2001 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. A
File Number 2221.4
IRF9530, RF1S9530SM
12A, 100V, 0.300 Ohm, P-Channel Power
MOSFETs
These are P-Channel enhancement mode silicon gate power
field effect transistors. They are advanced power MOSFETs
designed, tested, and guaranteed to withstand a specified
level of energy in the breakdown avalanche mode of
operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching
convertors, motor drivers, relay drivers, and drivers for high
power bipolar switching transistors requiring high speed and
low gate drive power. The high input impedance allows these
types to be operated directly from integrated circuits.
Formerly developmental type TA17511.
Features
12A, 100V
•r
DS(ON) = 0.300
Single Pulse Avalanche Energy Rated
SOA is Power Dissipation Limited
Nanosecond Switching Speeds
Linear Transfer Characteristics
High Input Impedance
Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Packaging
JEDEC TO-220AB JEDEC TO-263A
Ordering Information
PART NUMBER PACKAGE BRAND
IRF9530 TO-220AB IRF9530
RF1S9530SM TO-263AB RF1S9530
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-263AB variant in the tape and reel, i.e., RF1S9530SM9A.
G
D
S
GATE
DRAIN (FLANGE)
SOURCE
DRAIN DRAIN
(FLANGE)
GATE
SOURCE
Data Sheet July 1999
[ /Title
(IRF95
30,
RF1S9
530SM
)
/Sub-
ject (-
12A, -
100V,
0.300
Ohm,
P-
Chan-
nel
Power
MOS-
FETs)
/Author
()
/Key-
words
(Inter-
sil Cor-
poratio
n, P-
Chan-
nel
Power
MOS-
FETs,
TO-
220AB,
TO-
263AB)
/Cre-
ator ()
/DOCI
©2001 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. A
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
IRF9530,
RF1S9530SM UNITS
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS -100 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR -100 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID
-12
-7.5
A
A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM -48 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
GS ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 75 W
Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 500 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to TJ = 125oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS ID = -250µA, VGS = 0V, (Figure 10) -100 - - V
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = -250µA -2 - -4 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - -25 µA
VDS = 0.8 x Rated BVDSS, VGS = 0V, TC= 125oC- - -250 µA
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = -10V,
(Figure 7)
-12 - - A
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 2) rDS(ON) ID = -6.5A, VGS = -10V, (Figures 8, 9) - 0.250 0.300
Forward Transconductance (Note 2) gfs VDS > ID(ON) x rDS(ON) Max, ID = -6.5A
(Figure 12)
2 3.8 - S
Turn-On Delay Time td(ON) VDD = 50V, ID -12A, RG = 50Ω, VGS = 10V
RL = 4.2Ω, (Figures 17, 18)
MOSFET Switching Times are Essentially Inde-
pendent of Operating Temperature
-3060 ns
Rise Time tr- 70 140 ns
Turn-Off Delay Time td(off) - 70 140 ns
Fall Time tf- 70 140 ns
Total Gate Charge
(Gate to Source + Gate to Drain)
Qg(TOT) VGS = -10V, ID = -12A, VDSS= 0.8 x Rated BVDSS,
(Figure 14, 19, 20) Gate Charge
is Essentially Independent of Operating
Temperature
-2545nC
Gate to Source Charge Qgs -13 - nC
Gate to Drain (“Miller”) Charge Qgd -12 - nC
Input Capacitance CISS VDS = -25V, VGS = 0V, f = 1MHz, (Figure 11) - 500 - pF
Output Capacitance COSS - 300 - pF
Reverse Transfer Capacitance CRSS - 100 - pF
Internal Drain Inductance LDMeasured From the
Contact Screw On Tab To
Center of Die
Modified MOSFET
Symbol Showing the
Internal Devices
Inductances
- 3.5 - nH
Measured From the Drain
Lead, 6mm (0.25in) From
Package to Center of Die
- 4.5 - nH
Internal Source Inductance LSMeasured From The
Source Lead, 6mm
(0.25in) From Header to
Source Bonding Pad
- 7.5 - nH
Thermal Resistance Junction to Case RθJC - - 1.67 oC/W
Thermal Resistance Junction to Ambient RθJA Typical Socket Mount - - 62.5 oC/W
LS
LD
G
D
S
IRF9530, RF1S9530SM
©2001 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. A
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET
Symbol Showing the In-
tegral Reverse
P-N Junction Diode
---12A
Pulse Source to Drain Current
(Note 2)
ISDM ---48A
Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = -12A, VGS = 0V,
(Figure 13)
- - -1.5 V
Reverse Recovery Time trr TJ = 150oC, ISD = -12A, dISD/dt = 100A/µs - 300 - ns
Reverse Recovery Charge QRR TJ = 150oC, ISD = -12A, dISD/dt = 100A/µs - 1.8 - µC
NOTES:
2. Pulse test: pulse width 300µs, duty cycle 2%.
3. Repetitive rating: pulse width limited by max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 25V, starting TJ = 25oC, L = 5.2mH, RG = 25Ω, peak IAS = 12A. See Figures 15, 16.
G
D
S
Typical Performance Curves Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
TC, CASE TEMPERATURE (oC)
POWER DISSIPATION MULTIPLIER
0
0 25 50 75 100 150
0.2
0.4
0.6
0.8
1.0
1.2
125
-2.4
0
25 50 100
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
-12.0
150
-9.6
75 125
-4.8
-7.2
t1, RECTANGULAR PULSE DURATION (s)
ZθJC, NORMALIZED
THERMAL IMPEDANCE
10-3 10-2
1
10-5 10-4
0.01
0.1
10
10-1 1
SINGLE PULSE t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + RθJA +TC
PDM
t1
0.1
0.02
0.2
0.5
0.01
0.05
t2
IRF9530, RF1S9530SM
©2001 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. A
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS
FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS
NOTE: Heating effect of 2µs pulse is minimal.
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Typical Performance Curves Unless Otherwise Specified (Continued)
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
-100
-1
100µs
10µs
DC
1ms
100ms
-10-1
-0.1 -1000
-10
-100
LIMITED BY rDS(ON)
AREA MAY BE
OPERATION IN THIS 10ms
SINGLE PULSE
TJ = MAX RATED
TC = 25oC
ID, DRAIN CURRENT (A)
0 -10 -20 -30 -40
-4
-8
-12
-16
-20
-50
VGS = -8V
VGS = -7V
VGS = -6V
VGS = -5V
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = -4V
PULSE DURATION = 80µs
VGS = -10V
VGS = -9V
DUTY CYCLE = 0.5% MAX
0
-2
0-2 -4 -6 -10
-4
-6
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
-8
-8
-10
VGS = -6V
VGS = -5V
VGS = -4V
VGS = -9V
VGS = -10V
VGS = -8V
VGS = -7V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
0-4 -6 -8 -10-2
0
-12
-16
ID(ON), ON-STATE DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
-20
-8
-4
VDS ID(ON) x rDS(ON)
125oC
25oC
-55oC
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
0
0.8
-10 -20 -30 -40
rDS(ON) DRAIN TO SOURCE
ID, DRAIN CURRENT (A)
-50
1.0
0
0.2
0.4
0.6
VGS = -10V
VGS = - 20V
2µs PULSE TEST
ON RESISTANCE ()
NORMALIZED DRAIN TO SOURCE
2.2
1.4
1.0
0.6
0.2 -40 0 40
TJ, JUNCTION TEMPERATURE (oC)
120
1.8
80
VGS = -10V, ID = -6.5A
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
IRF9530, RF1S9530SM
©2001 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. A
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Typical Performance Curves Unless Otherwise Specified (Continued)
1.25
0.95
0.85
0.75
-40 0 40 80
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
120 160
1.05
1.15
ID = 250µA
1000
200
00-20 -50
C, CAPACITANCE (pF)
600
VDS, DRAIN TO SOURCE VOLTAGE (V)
800
400
CISS = CGS + CGD
CRSS = CGD
COSS CDS + CGD
CISS
-10 -30 -40
COSS
CRSS
VGS = 0V, f = 1MHz
ID, DRAIN CURRENT (A)
gfs, TRANSCONDUCTANCE (S)
0 -4 -8 -12 -16
1
2
3
4
5
-20
TJ = 125oC
TJ = 25oC
TJ = -55oC
0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
-0.4 -1.0 -1.2 -1.6 -1.8-0.6
-0.1
-1.0
-10
ISD, DRAIN CURRENT (A)
VSD, SOURCE TO DRAIN VOLTAGE (V)
-100
-0.8 -1.4
TJ = 25oC
TJ = 150oC
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
Qg(TOT), TOTAL GATE CHARGE (nC)
VGS, GATE TO SOURCE (V)
0 8 16 24 40
- 5
0
- 10
- 15
42
VDS = -80V
ID = -12A
VDS = -50V
VDS = -20V
IRF9530, RF1S9530SM
©2001 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. A
Test Circuits and Waveforms
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
tP
0.01
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VGS
VDD
VDS
BVDSS
tP
IAS
tAV
0
VGS
RL
RG
DUT
+
-
VDD
td(ON)
tr
90%
10%
VDS 90%
tf
td(OFF)
tOFF
90%
50%
50%
10%
PULSE WIDTH
VGS
tON
10%
0
0
0.3µF
12V
BATTERY 50k
+VDS
S
DUT
D
G
IG(REF)
0
(ISOLATED
-VDS
0.2µF
CURRENT
REGULATOR
ID CURRENT
SAMPLING
IG CURRENT
SAMPLING
SUPPLY)
RESISTOR RESISTOR
DUT
Qg(TOT)
Qgd
Qgs
VDS
0
VGS
VDD
0
IG(REF)
IRF9530, RF1S9530SM
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As used herein:
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failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT ST A TUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
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changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
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that has been discontinued by Fairchild semiconductor.
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In Design
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