1
11/12/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
VN3205
Advanced DMOS Technology
These enhancement-mode (normally-off) transistors utilize a
vertical DMOS structure and Supertex’s well-proven silicon-gate
manufacturing process. This combination produces devices with
the power handling capabilities of bipolar transistors and with the
high input impedance and positive temperature coefficient
inherent in MOS devices. Characteristic of all MOS structures,
these devices are free from thermal runaway and thermally-
induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
Features
❏Free from secondary breakdown
❏Low power drive requirement
❏Ease of paralleling
❏Low CISS and fast switching speeds
❏Excellent thermal stability
❏Integral Source-Drain diode
❏High input impedance and high gain
❏Complementary N- and P-channel devices
Applications
❏Motor controls
❏Converters
❏Amplifiers
❏Switches
❏Power supply circuits
❏Drivers (relays, hammers, solenoids, lamps,
memories, displays, bipolar transistors, etc.)
Absolute Maximum Ratings
Drain-to-Source Voltage BVDSS
Drain-to-Gate Voltage BVDGS
Gate-to-Source Voltage ± 20V
Operating and Storage Temperature -55°C to +150°C
Soldering Temperature* 300°C
* Distance of 1.6 mm from case for 10 seconds.
TO-92
D1D4
G1G4
S1S4
NC NC
S2S3
G2G3
D2D3
Package Options
Note: See Package Outline section for dimensions.
1
7
6
5
4
3
2
top view
14
13
12
11
10
9
8
14-pin DIP
TO-243AA
(SOT-89)
S G D
G
D
S
D
BVDSS /R
DS(ON) VGS(th) Order Number / Package
BVDGS (max) (max) TO-92 14-Pin P-DIP TO-243AA* Die†
50V 0.3Ω2.4V VN3205N3 VN3205N6 VN3205N8 VN3205ND
*Same as SOT-89. Product supplied on 2000 piece carrier tape reels.
†MIL visual screening available
Ordering Information
N-Channel Enhancement-Mode
Vertical DMOS FETs
Product marking for TO-243AA:
VN2L❋
Where ❋ = 2-week alpha date code
2
Symbol Parameter Min Typ Max Unit Conditions
BVDSS Drain-to-Source Breakdown Voltage 50 V VGS = 0V, ID = 10mA
VGS(th) Gate Threshold Voltage 0.8 2.4 V VGS = VDS, ID = 10mA
∆VGS(th) Change in VGS(th) with Temperature -4.3 -5.5 mV/°CV
GS = VDS, ID = 10mA
IGSS Gate Body Leakage 1 100 nA VGS = ±20V, VDS = 0V
IDSS Zero Gate Voltage Drain Current 10 µAV
GS = 0V, VDS = Max Rating
1mA V
GS = 0V, VDS = 0.8 Max Rating
TA = 125°C
ID(ON) ON-State Drain Current 3.0 14 A VGS = 10V, VDS = 5V
RDS(ON) TO-92 and P-DIP 0.45 ΩVGS = 4.5V, ID = 1.5A
SOT-89 0.45 ΩVGS = 4.5V, ID = 0.75A
TO-92 and P-DIP 0.3 ΩVGS = 10V, ID = 3A
SOT-89 0.3 ΩVGS = 10V, ID = 1.5A
∆RDS(ON) Change in RDS(ON) with Temperature 0.85 1.2 %/°CV
GS = 10V, ID = 3A
GFS Forward Transconductance 1.0 1.5 VDS = 25V, ID = 2A
CISS Input Capacitance 220 300
COSS Common Source Output Capacitance 70 120 pF
CRSS Reverse Transfer Capacitance 20 30
td(ON) Turn-ON Delay Time 10
trRise Time 15
td(OFF) Turn-OFF Delay Time 25
tfFall Time 25
VSD Diode Forward Voltage Drop 1.6 V VGS = 0V, ISD = 1.5A
trr Reverse Recovery Time 300 ns VGS = 0V, ISD = 1A
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Package ID (continuous)* ID (pulsed) Power Dissipation
θ
jc
θ
ja IDR*I
DRM
@ TC = 25°C°C/W °C/W
TO-92 1.2A 8.0A 1.0W 125 170 1.2A 8.0A
SOT-89 1.5A 8.0A 1.6W (TA = 25°C) 15 78†1.5A 8.0A
Plastic DIP 1.5A 8.0A 3.0W‡41.6‡83.3‡1.5A 8.0A
*ID (continuous) is limited by max rated Tj. TA = 25°C.
†Mounted on FR5 board, 25mm x 25mm x 1.57mm. Significant PD increase possible on ceramic substrate.
‡Total for package.
VN3205
Electrical Characteristics (@ 25°C unless otherwise specified)
ns
Thermal Characteristics
VGS = 0V, VDS = 25V
f = 1 MHz
VDD = 25V
ID = 2A
RGEN = 10Ω
Static Drain-to-Source
ON-State Resistance
Ω
Switching Waveforms and Test Circuit
90%
10%
90% 90%
10%
10%
PULSE
GENERATOR
VDD
RL
OUTPUT
D.U.T.
t(ON)
td(ON)
t(OFF)
td(OFF) tF
tr
INPUT
INPUT
OUTPUT
10V
V
DD
Rgen
0V
0V
3
Output Characteristics
20
16
12
8
4
0
VDS (volts)
VDS (volts)
VDS (volts)
ID (amperes)
ID (amperes)
Saturation Characteristics
Maximum Rated Safe Operating Area
0 100101
10
1.0
0.1
.01
ID (amperes)
Thermal Response Characteristics
Thermal Resistance (normalized)
1.0
0.8
0.6
0.4
0.2
0
0.001 100.01 0.1 1.0
tp (seconds)
Transconductance vs. Drain Current
5
4
3
2
1
0
042
GFS (siemens)
ID (amperes)
Power Dissipation vs. Temperature
0 15010050
2.0
1.6
1.2
0.8
0.4
01257525
TC (°C)
PD (watts)
P-DIP
TO-243AA (TA = 25°C)
TO-92
TA = -55°C
0102030 5040
4V
3V
0246 108
125°C
6108
10V
8V
6V
20
16
12
8
4
0
4V
3V
10V
8V
6V
TO-92 (pulsed)
P-DIP (pulsed)
TO-243AA (DC)
TO-92 (DC)
P-DIP (DC)
VGS =
VGS =
VDS = 25V
TO-243AA
TA = 25°C
PD = 1.6W
TO-243AA
(pulsed)
T
C
= 25°C
TO-92
P
D
= 1W
T
C
= 25°C
25°C
Typical Performance Curves
VN3205
4
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com
11/12/01
©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
Gate Drive Dynamic Characteristics
Q (nanocoulombs)
G
V
GS
(volts)
T
j
(°C)
V
GS(th)
(normalized)
R
DS(ON)
(normalized)
V
DS(ON)GS(th)
and R Variation with Temperature
On-Resistance vs. Drain Current
R
DS(ON)
(ohms)
Variation with Temperature
DSS
DSS
BV (normalized)
C)°(T
j
Transfer Characteristics
V
GS
(volts)
I(amperes)
D
Capacitance vs. Drain-to-Source Voltage
300
C (picofarads)
V
DS
(volts)
I
D
(amperes)
BV
010203040
100
400
200
0
0246810
10
8
6
4
2
0
-50 0 50 100 150
1.1
1.0
1.0
0.8
0.6
0.4
0.2
0
1.2
1.1
1.0
0.9
0.8
0.7
10
8
6
4
2
012 345
-50 0 50 100 150
325 pF
V
DS
= 40V
V
DS
= 10V
V
GS
= 4.5V
V
GS
= 10V
T= -55°C
A
V
DS
= 25V
125°C
04812 2016
f = 1MHz
C
ISS
C
OSS
C
RSS
0.9
215 pF
1.6
1.4
1.2
1.0
0.8
0.6
V
GS(th)
@ 1mA
25°C
0
RDS(ON) @ 10V, 3A
VN3205
Typical Performance Curves
