L6287 - STMicroelectronics

L6287

POWER COMBO DRIVER

DESCRIPTION

The F-VHS Motor Driver COMBO IC includes a

double three phas e brushless motor dr iver plus a

DC full bridge motor driver for VCR application.

The package is SDIP42 (38+2+2 pin ground

frame).

The device is realized in BCD technology with

power LDMOS output stages.

The gat e drive for high side stages is provided by

an internal charge pump with two external capaci-

tors. The f irst three phase motor driver is devoted

to the DRUM motor control.

The phase sequence update signal is provided in-

itially by an external start-up signal (FSTART),

whose frequency is internally divided by four,

while, during normal operation, is provided by an

optical tacho converter signal.

This signal is used as clock and reset for the state

machine.

The regulation of the speed is externally provided

by means of PWM signal generated by the µP

(DPWM), without external sensing resistor. The

feedback to the µP unit is given by a suitable

open drain output signal (PUD) synchronized by

the internal state machine.

The second three phase motor driver is devoted

to t he CAPSTAN control. While the DRUM will al-

ways spin in a fixed direction, the CAPSTAN mo-

tor needs a more sophisticated logic to control the

changes in spin direction.

The motor position detection is carried out by

means of three comparators for Hall effect sen-

sors. T he loop r egulation f or this motor is still pr o-

vided by the µP with the signals CPWM and

CDIR.

The LOADING motor section include a full bridge

DC motor driver. The motor operations are di-

rectly set by the inputs LPWM, L DIR ac cording to

the truth table reported on the page 5.

The device also includes a circuit for early ther-

mal alarm, last thermal alarm and thermal shut-

down with hysteresys. The output of this stage is

an open drain, kept ON during normal operations.

The THERM signal follows the inverted FSTART

signal between early warning and last warning

temperature, while remains in high impedance

(OFF) after lastwarning temperature and during

thermal shutdown.

The STANDBY state of the device is imposed by

THERMAL SHUTDOWN

UNDERVOLTAGE ON VCC SUPPLY

EXTERNAL SIGNAL FSTART;

This state is imposed automatically after a de-

fined time-out.

The time-out is realized by sensing the falling

edges of the FSTART signal: if no edges are re-

corded for a time interval greater than a certain

time constant, the STANDBY condition is gener-

ated.

The time constant is defined by the external ca-

pacitor CTO.

In the STANDBY state the main functions (upper

power stages, opto decoder, etc) of the device

are turned off in order to minimize the power con-

sumption.

The device also implement a HEATER function.

The HEATER transistor is OFF during thermal

shutdown, undervoltage condition and during nor-

mal working mode.

The HEATER transistor is driven ON when the

external STANDBY condition is present according

to the following table:

FSTART HIGH LOW

HEATER OFF ON

During the ON condition, the specified heater Ron

is not guaranteed if all the voltage supplies are

not at their minimum nominal value.

This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without no tice .

July 2003

ORDERING NUMBER: L6287

SDIP42

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ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

VDD Drum Supply Voltage 20 V (**)

VDC Capstan Supply Voltage 20 V (**)

VDL Loading Supply Voltage 20 V (**)

UPPER POWER

VDS MA X Motor Output to Ground Voltage 20 V(***)

LOWER POWER

VDS MAX Motor Output to Supply Voltage 20 V (***)

VCC Logic Supply Voltage 7 V

VSSpecial Supply Voltage 7 V

Ip1 Loading Motor Peak Current (Ton = 1µs Duty Cycle = 2%) 1.6 A

Ipd Drum Motor Peak Current (Ton = 1µs Duty Cycle = 2%) 1.4 A

Ipc Capstan Motor Peak Current (Ton = 1µs Duty Cycle = 2%) 1.8 A

Vil Logic Input Low State Voltage -0.1 V

Vih Logic Input High StateVoltage 7 V

Vtherm Open Drain Maximum Voltage 7 V

Vheat Open Drain Maximum Voltage 20 V (**)

(**) Not operative - STANDBY condition

(* **) Each mot or dri ver

PINS CONNECTION

THERMAL DATA

Symbol Parameter Value Unit

Rthj-amb Thermal Resistance Junction to Ambient 48 °C/W

R th j-pins Thermal Resistance Junction to Pin 15 °C/W

Note: Batwing pin.

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BLOCK DIAGRAM

CP1 = 0.01µF

CP2 = 0.1µF

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PIN DESCRIPTION

VOLTAGE SUPPLIES (The power supply voltage VDD, VDC, VDL must be connected toghether externally)

VDD Power supply voltage for drump motor

VDC Power supply voltage for capstan motor

VDL Power supply voltage for loading motor and charge pump

VCC Logic voltage supply

LGND Logic Ground

GND R Capstan + drum power ground

GND L Loading + Charge pump Power ground

VSAnalog voltage supply

SGND Analog ground

Note: The VCC and VS Power Supply must be together either at maximum or minimum value.

DRUM MOTOR

DOUT U Winding Output U

DOUT V Winding Output V

DOUT W Winding Output W

DPWM PWM logic pulse input. Control signal generated by µP for dump motor current regulation.

PUD Logic output position feedback generated by the translator logic

OD Optocoupler diode output

OC External capacitor for tacho-converter integrator

OT Input for optocoupler transistor

OR Tacho-converter external resistor. This resistor defines the full-light current level of the tacho.

CAPSTAN MOTOR

COUT U Winding Output U

COUT V Winding Output V

COUT W Winding Output W

CPWM PWM logic pulse input. Control signal generated by µP for current regulation.

CDIR Motor Direction Logic Input Signal

H1+ Hall sensor differential input

H1-

H2+ Hall sensor differential input

H2-

H3+ Hall sensor differential input

H3-

LOADING MOTOR

LOUT A Winding Output A

LOUT B Winding Output B

LPWM PWM logic input.

LDIR Direction logic input

SERVICES

HEATER Open drain output for heater resistor

VCP Charge pump storage capacitor pin

CP1 Bootstrap Capacitor pin

CP2 Bootstrap Capacitor pin

THERM Open drain thermal alarm output

FSTART Start-up logic signal for drum motor

CTO Time out capacitor output

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ELECTRICA L CHARACTERI STICS (Tj = 0 to125°C; VCC = VS = 5V ±5%; VDC = VDL = VDD = 10 to 18V;

unless otherwise specified.)

POW E R SUPPLY

Symbol Parameter Test Condition Min. Typ. Max. Unit

(#)VDD Drum Power Supply Voltage 10 18 V

(#)VDC Capstan Power Supply Voltage 10 18 V

(#)VDL Loading Power Supply Voltage 10 18 V

VCC Logic Power Supply Voltage 4.5 5.5 V

VSSensor Power Supply Voltage 4.75 5.25 V

VCCth Undervoltage Threshold 3.6 4.4 V

# WARNING

The functionality of the I.C. is guaranted in this voltage range. Nevertheless the specified operating voltages (VDC, VDD, VDL), must be selected

according t o the load characteri st i cs . P roper cauti ons must be tak en in the appl ic at ion in order to assure t hat the drain -source voltage across

each output po wer tran si stor does not exceed 20V max.

LOADING MOTOR

ACTIVATION TRUT H TABLE

INPUT OUTPUT

LPWM LDIR LOUTA LOUTB

00LOWLOW

01LOWLOW

1 0 HIGH LOW

1 1 LOW HIGH

Symbol Parameter Test Condition Min. Typ. Max. Unit

RDSH High Side RDSonH 2Ω

RDSL Low Side RDSonL 2 Ω

(*)IOL DC Output Current 800 mA

(*)Ipl Peak Output Current DUTY CYCLE = 10%;

tON = 500m s 1A

DRUM MOTOR

Symbol Parameter Test Condition Min. Typ. Max. Unit

Icd DC Output Current 400 mA

(*)Icdp Peak Output Current 600 mA

(*)Ipdb Peak Output Current DUTY CYCLE = 10%;

tON = 500ms 800 mA

RDSH High Side RDSonH 1.6 Ω

RDSL Low Side RDSonL 1.6 Ω

CAPSTAN MOTOR

Symbol Parameter Test Condition Min. Typ. Max. Unit

Ico DC Output Current 800 mA

(*)Icop Peak Output Current 1 A

(*)Ipob Peak Output Current DUTY CYCLE = 10%;

tON = 1ms 1.5 A

RDSH High Side RDSonH 1 Ω

RDSL Low Side RDSonL 1 Ω

(*) WAR NING

Th ese current val ues are compati bl e wi th the struc ture of the IC power str uct ure. Nev ertheless the use of thes e curr ent level s could produce

junc tion temperatur es that force IC outside of the operative range due to the thermal charac terist ics of the choosen pac kage.

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ELECTRICA L CHARACTERI STICS (continued)

DRUM TACHO CONV ERTE R

Symbol Parameter Test Condition Min. Typ. Max. Unit

Iod Open Loop Output Current Vod = 1V; Ioc = 100µA (Note 1) 30 60 mA

Iot Full Light Current Range 0.5 3 mA

Ioc Sink Current Vor = 0; Iod = 0 0.2 0.5 µA

Iot vs Ior Mismatch 5 10 %

Vref Opto Resistor Reference

Voltage VS = 4.75V 3.36 3.72 V

VS = 5V 3.54 3.91 V

VS = 5.25V 3.72 4.11 V

VOC Open Loop Opto Capacitor

Voltage VOD = 1V see Fig. 1

VS = 4.75V

VS = 5V

VS = 5.25V

2.75 V

Vthr1 Clock Threshold Voltage VS = 4.75V 2.19 2.42 V

VS = 5V 2.30 2.54 V

VS = 5.25V 2.42 2.67 V

Vthr2 Reset Threshold Voltage VS = 4.75V 0.30 0.33 V

VS = 5V 0.32 0.35 V

VS = 5.25V 0.33 0.37 V

tpud µP Syncro Pulse Duration 1 3 µs

Ipud1 Open Drain Sink Current VO = 0.4V 5 mA

Note 1: The suggested Copt external capacitor value is 5µF (±5%)

HALL COMPARA TOR

Symbol Parameter Test Condition Min. Typ. Max. Unit

Vin Input Voltage Range 0.5 2.7 V

IbInput Bias Current 1 µA

Vof Input Offset Voltage 8 mV

Vhy Switchable Hysteresys Vref = 1.5V; 10 40 mV

THE R MAL PROTECTION

Symbol Parameter Test Condition Min. Typ. Max. Unit

Itherm Open Drain Sink Current Vout = 0.4V (see note 1) 5 mA

TsShutdown Temperature 155 170 185 oC

Tsdh Shutdown Hysteresis 60 oC

Tal1 Early Warning Temperature Ts -40 oC

Tal2 Last Warning Temperature (see note 2) Ts -20 °C

NOTE 1: Therm output stage is on in the normal temperature range

NOTE 2: In the Tal-Tll temperature range therm signal follows the inverted Fstart signal. After Tll temperature this output is always in high

impedance. If thermal shutdown is reached this pin will remain in this state until the shutdown hysteresys will be recovered.

HEATER

Symbol Parameter Test Condition Min. Typ. Max. Unit

Rdsheat Heater RDSon 3 ohm

Vheat Heater Voltage 18 V

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ELECTRICA L CHARACTERI STICS (continued.)

LOGIC LEV ELS FOR DI GITAL IN PUTS ( CPWM, C DIR, DPWM, FSTART, LPWM, LDIR)

A pull up resistor Ri is connected between the CDIR, FSTART, LPWM, LDIR inputs pads; CPWM and DPWM

are left unconnected.

Symbol Parameter Test Condition Min. Typ. Max. Unit

Vil Input Low Voltage 0.8 V

Vih Input High Voltage 2 V

RiPull Up Resistor 3.5 10.5 Kohm

TIME OUT STAGE

Symbol Parameter Test Condition Min. Typ. Max. Unit

Icto Time Out Output Current (Note 1) 5 20 uA

Note 1: The suggested external capacitor value is Cto = 1µF (±20% max) for fSTART = 20KHz .

Figure 1: Optocircuit Open Loop OC Voltage.

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SDIP42 (0.600")

B eB1

Gage Plane

.015

0,38

SDIP42

DIM. mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

A 5.08 0.20

A1 0.51 0.020

A2 3.05 3.81 4.57 0.120 0.150 0.180

B 0.38 0.46 0.56 0.0149 0.0181 0.0220

B1 0.89 1.02 1.14 0.035 0.040 0.045

c 0.23 0.25 0.38 0.0090 0.0098 0.0150

D 36.58 36.83 37.08 1.440 1.450 1.460

E 15.24 16.00 0.60 0.629

E1 12.70 13.72 14.48 0.50 0.540 0.570

e 1.778 0.070

e1 15.24 0.60

e2 18.54 0.730

e3 1.52 0.060

L 2.54 3.30 3.56 0.10 0.130 0.140

OUTLINE AND

MECHANICAL DAT A

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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is

granted b y implication or otherwise under any patent or patent rights of STMicroelectronic s. Specification mentioned in t his publication are

subj ect to change w ithout notic e. This public ation superse des and replac es all informat ion previ ously s upplied. STMic roelec tronic s product s

are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

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