(1/18)
*This document summarizes major features of the device. The contents of this document are
preliminary. A formal specification is separately provided by DATA SHEET.
FUJITSU ASSP PRODUCTS
Power Management ICs
Version 1.0
March ,2002
DC/DC Converter IC for Charging Li-ion battery
with Synchronous Rectification
MB39A107
DESCRIPTION
The MB39A107 is a DC/DC converter IC for charging suitable for down-conversion, using pulse-width
modulation (PWM) type and enabling output voltage to be set to any desired level from one cell to four
cells. The output for the Nch MOS drive of the synchronous rectification type is adopted.
The current amp which can set the offset voltage is built-in. As a result, it can be used for the current
watch of the AC adapter and the battery. Moreover, this IC can also dynamically control the secondary
battery’s charge current by detecting a voltage drop in an AC adapter in order to keep its power constant
(dynamically-controlled charging).
The MB39A107 provides a broad power supply voltage range and low standby current as well as high
efficiency, making it ideal for use as a built-in charging device in products such as notebook PC.
FEATURES
Built-in current detection amplifier by which offset voltage can be adjusted
Output voltage setting accuracy : 4.2V
±
0.74%(Ta=-10
°
C to +85
°
C)
Output voltage setting using external resistor : 1 cell to 4 cells
Power supply voltage range : 7 V to 25 V
Oscillation frequency range : 100kHz to (1MHz)
In standby mode, leave output voltage setting resistor open to prevent inefficient current loss
Built-in standby current function : 0
µ
A(Typ)
Built-in circuit for load-independent soft-start
Built-in output off function at low input voltage
Totem-pole type output for Nch MOS FET
(2/18)
PIN DISCRIPTIONS
Pin No. Pin Name I/O Description
1 VCC - Power supply terminal for reference voltage and control circuit.
2 +INUV I Under voltage detection comparator (UV Comp.) input terminal.
3 OUTC1 O Current detection amplifier (Current Amp1) output terminal.
4 -INC1 I Current detection amplifier (Current Amp1) input terminal.
5 +INC1 I Current detection amplifier (Current Amp1) input terminal.
6 IOFA1 I Current detection amplifier (Current Amp1) offset voltage input terminal.
7 +INE1 I Error amplifier (Error Amp1) non-inverted input terminal.
8 -INE1 I Error amplifier (Error Amp1) inverted input terminal.
9 FB1 O Error amplifier (Error Amp1) output terminal.
10 OUTC2 O Current detection amplifier (Current Amp2) output terminal.
11 -INC2 I Current detection amplifier (Current Amp2) input terminal.
12 +INC2 I Current detection amplifier (Current Amp2) input terminal.
13 +INE2 I Error amplifier (Error Amp2) non-inverted input terminal.
14 -INE2 I Error amplifier (Error Amp2) inverted input terminal.
15 FB2 O Error amplifier (Error Amp2) output terminal.
16 -INE3 I Error amplifier (Error Amp3) inverted input terminal.
17 FB3 O Error amplifier (Error Amp3) output terminal.
18 OUTD O With IC in standby mode, this terminal is set to “Hi-Z” to prevent loss
of current through output voltage setting resistance.
Set CTL terminal to “H” level to output “L” level.
19 CS - Soft-start setting capacitor terminal.
20 RT - Triangular wave oscillation frequency setting resistor connection terminal.
21 VREF O Reference voltage output terminal.
22 GND - Ground terminal.
23 CTL-1 I DC/DC converter block power supply control terminal.
24 CTL-2 I Current detection amplifier (Current Amp2) power supply control terminal.
25 PGND - Ground terminal.
26 OUT-2 O External synchronous rectification side FET gate drive terminal.
27 VS - External main side FET source connection terminal.
28 OUT-1 O External main side FET gate drive terminal.
29 CB - Boot capacitor connection terminal.
Connect a capacitor between the CB and VS terminals.
30 VB O Output circuit bias output terminal.
(3/18)
BLOCKDIAGRAM
-INE1
OUTC1
-INC1
+INE1
<CurrentAmp1>
<ErrorAmp1> VREF
OUTC2
+INC2
-INC2
+INE2
<CurrentAmp2> <ErrorAmp2>
VREF
<ErrorAmp3>
4.2V
VREF
< SOFT>
<OSC> <REF> <CTL>
bias
VREF
5.0V
+INC1
FB1
-INE2
FB2
-INE3
OUTD
FB3
CS
Cs
10uA
R
T
VREF GND
4.2V
Vcc
CTL-1
Out put volt age (Bat t ery
volt age) i s adj ust abl e.
Battery
<PWMComp>
Ichg
RS1
R
T
V
O
8
2
5
4
7
9
14
10
12
11
13
15
16
18
17
19
20 21 22
23
A
B×25
A B
VREF
Vcc
UVLO
VREF
UVLO
UVLO
2.5V
1.5V
CB
VB Reg. VB
VCC
Drv-1
Drv-2
VS
PGND
29
28
27
26
25
(6.0V)
OUT-1
OUT-2
30
Dead Tim e
Modulation
H:UV LO rel ease
6
7V to 25V
4.2V
C
T
To Microprocessor
24
CurrentAmp1
ON/OFF
CTL-2
×25
Offset adjus t m ent
IOFA1
DC/DC
ON/OFF
Chg_ctr
4.05V
<UVComp>
+INUV
45pF
RS2
3 1
(4/18)
PIN ASSIGNMENT
(TOP VIEW)
VCC 130 VB
+INUV 229 CB
OUTC1 328 OUT-1
-INC1 427 VS
+INC1 526 OUT-2
IOFA1 625 PGND
+INE1 724 CTL-2
-INE1 823 CTL-1
FB1 922 GND
OUTC2 10 21 VREF
-INC2 11 20 RT
+INC2 12 19 CS
+INE2 13 18 OUTD
-INE2 14 17 FB3
FB2 15 16 -INE3
(FPT-30P-M04)
(5/18)
ABSOLUTE MAXIMUM RATINGS
Parameter Symbol
Condition Rating Unit
Power supply voltage V
CC
27 V
Boot voltage V
CB
CB terminal 32 V
Control input voltage V
CTL
CTL-1,CTL-2 terminal 27 V
Output current I
OUT
60 mA
Power dissipation P
D
Ta
<
25
°
C 1390* mW
Storage temperature T
STG
-55 to 125
°
C
*
When mounted on a 10cm square epoxy double-sided.
(6/18)
RECOMMENDED OPERATION CONDITIONS
Parameter Symbol
Condition MIN TYP MAX Unit
Power supply voltage V
CC
7
25 V
Boot voltage V
CB
CB terminal
30 V
Reference voltage
Output current I
REF
-1
0 mA
Bias output current I
VB
-1
0 mA
V
INE
+INE1 to +INE3, -INE1,-
INE2
terminal 0
V
CC
-1.8
V
V
INC
+INC1,+INC2, -INC1,-INC2
terminal 0
V
CC
V
Input voltage
V
INUV
+INUV terminal 0
V
CC
V
IOFA1 terminal input
voltage V
IOFA1
0
5 V
OUTD terminal output
voltage V
OUTD
0
17 V
OUTD terminal output
current I
OUTD
0
2 mA
CTL terminal input
voltage V
CTL
0
25 V
Output current I
OUT
-45
45 mA
I
OUT
Main side,
Duty
5%(t=1/fosc
×
Duty) -600
600 mA
Peak output current I
OUT
Synchronous rectification
side,
Duty
5%(t=1/fosc
×
Duty)
-1200
1200 mA
Oscillation frequency f
OSC
100 (500) (1000) kHz
Timing resistor R
T
(22) (47) (200) k
Soft-start capacitor Cs
0.022 1.0
µ
F
Boot capacitor C
B
0.1 1.0
µ
F
Bias output capacitor C
VB
(0.47) (1.0) (10)
µ
F
Reference voltage
output capacitor C
REF
- - 0.1 1.0
µ
F
Operating ambient
Temperature Ta - -30 25 85
°
C
Please be advised that this specification might be changed for some reasons such as improvement of performance without any
pre-notice.
(7/18)
ELECTRICAL CHARACTERISTICS
(Ta = 25
°
C, VCC =19V, VB=0mA, VREF=0mA)
Parameter Symbol
Pin
No. Condition
Min. Typ. Max. Unit
1. Reference Voltage [REF]
V
REF1
Ta=+25
°
C (4.967)
5.000 (5.041) V
Output voltage V
REF2
Ta=-10
°
C to +85
°
C (4.95 5.00 (5.05) V
Input stability Line VCC=7V to 25V
3 10 mV
Load stability Load VREF=0mA to 1mA
1 10 mV
Short-circuit
output current
I
OS
VREF=1V -50 -25 -12 mA
2. Under Voltage Lockout Protection Circuit Block [UVLO]
V
TLH
VCC = 6.2 6.4 6.6 V
Threshold voltage V
THL
VCC =
5.2 5.4 5.6 V
Hysteresis width V
H
0.7 1.0 1.3 V
V
TLH
VREF =
2.6 2.8 3.0 V
Threshold voltage V
THL
VREF =
2.4 2.6 2.8 V
Hysteresis width V
H
0.05 0.20 0.35 V
3. Soft-Start Block [SOFT]
Charge Current I
CS
-14 -10 -6
µ
A
4. Triangular Wave Oscillator Block [OSC]
Oscillation frequency fosc (RT=47k
) (450) 500 (550) kHz
Frequency
temperature stability
f/fdt Ta=-30
°
C to +85
°
C
1*
%
5-1. Error Amplifier Block [Error Amp1]
V
TH1
FB1=2V, Ta=+25
°
C (4.179)
4.200 (4.221) V
Threshold voltage V
TH2
FB1=2V,
Ta=-10
°
C to +85
°
C 4.169 4.200 4.231 V
Input offset voltage V
IO
FB1=2V
1 5 mV
Input bias voltage I
B
-100 -30
nA
Voltage gain A
V
DC
100*
dB
Frequency band width BW AV=0dB
2*
MHz
V
FBH
4.7 4.9
V
Output voltage V
FBL
20 200 mV
*
Standard design value
(8/18)
(Ta = 25
°
C, VCC =19V, VB=0mA, VREF=0mA)
Parameter Symbol
Pin
No. Condition
Min. Typ. Max. Unit
Output source current I
SOURCE
FB1=2V
-2 -1 mA
Output sink current I
SINK
FB1=2V 150 300
µ
A
5-2. Error Amplifier Block [Error Amp2]
Input offset voltage V
IO
FB2=2V
1 5 mV
Input bias voltage I
B
-100 -30
nA
Voltage gain A
V
DC
100*
dB
Frequency band width BW AV=0dB
2*
MHz
V
FBH
4.7 4.9
V
Output voltage V
FBL
20 200 mV
Output source current I
SOURCE
FB2=2V
-2 -1 mA
Output sink current I
SINK
FB2=2V 150 300
µ
A
5-3. Error Amplifier Block [Error Amp3]
V
TH1
FB1=2V, Ta=+25
°
C (4.179)
4.200 (4.221) V
Threshold voltage V
TH2
FB1=2V,
Ta=-10
°
C to +85
°
C 4.169 4.200 4.231 V
Voltage gain A
V
DC
100*
dB
Frequency band width BW AV=0dB
2*
MHz
V
FBH
4.7 4.9
V
Output voltage V
FBL
20 200 mV
Output source current I
SOURCE
FB1=FB2=2V
-2 -1 mA
Output sink current I
SINK
FB1=FB2=2V 150 300
µ
A
OUTD terminal output
leak current I
LEAK
OUTD=17V
0 1
µ
A
OUTD terminal output
ON resistance R
ON
OUTD=1mA
35 50
6-1. Current Amplifier Block [Current Amp1]
Input offset voltage V
IO
+INC=-INC=
3V to Vcc,
IOFA1=2.5V (-1)
(1) mV
Voltage gain A
V
+INC=3V to Vcc
Vin=-100mV,
IOFA1=2.5V (24.25)
25 (27.25) V/V
*
: Standard design value
(9/18)
(Ta = 25
°
C, VCC =19V, VB=0mA, VREF=0mA)
Parameter Symbol
Pin
No. Condition
Min. Typ. Max. Unit
I
INC1
+INC=-INC=19V
(50)
µ
A
Input current
I
INC2
CTL-2=0V,
+INC=-INC=19V
(0)
µ
A
Frequency band width BW AV=0dB
(2)*
MHz
IOFA1 terminal
Input current I
-INCL
IOFA1=2.5V -100 -30
nA
V
OUTCH
(5.3) 5.6
V
Output voltage V
OUTCL
(0) (50) mV
Output source current I
SOURCE
OUTC=2V
-2 -1 mA
Output sink current I
SINK
OUTC=2V 150 300
µ
A
6-2. Current Amplifier Block [Current Amp2]
Input offset voltage V
IO
+INC=-INC=
3V to Vcc (-2)
(2) mV
Voltage gain A
V
+INC=3V to Vcc
Vin=-100mV (24.25)
25 (27.25) V/V
I
INC1
+INC=-INC=19V
(50)
µ
A
Input current
I
INC2
CTL-1=0V,
+INC=-INC=19V
(0)
µ
A
Frequency band width BW AV=0dB
(2)*
MHz
V
OUTCH
(5.3) 5.6
V
Output voltage V
OUTCL
(0) (50) mV
Output source current I
SOURCE
OUTC=2V
-2 -1 mA
Output sink current I
SINK
OUTC=2V 150 300
µ
A
7. PWM Comp. Block [PWM Comp.1]
V
TL
Duty cycle = 0% 1.4 1.5
V
Threshold voltage V
TH
Duty cycle = 100%
2.5 2.6 V
Maximum duty cycle Dtr (RT=47k
) (95) (97) (99)
%
*
: Standard design value
(10/18)
(Ta = 25
°
C, VCC =19V, VB=0mA, VREF=0mA)
Parameter Symbol
Pin
No. Condition
Min. Typ. Max. Unit
8. Output block [OUT]
I
SOURCE
Main side,
Duty
5%,
(t=1/fosc
×
Duty)
-400*
mA
Output source current
I
SOURCE
Synchronous side,
Duty
5%,
(t=1/fosc
×
Duty)
-800*
mA
I
SINK
Main side,
Duty
5%,
(t=1/fosc
×
Duty)
-400*
mA
Output sink current
I
SINK
Synchronous side,
Duty
5%,
(t=1/fosc
×
Duty)
-800*
mA
R
OH
OUT=-45mA
6.5 9.8
Output ON resistance R
OL
OUT=45mA
5 7.5
t
D1
(50)*
ns
Dead time t
D2
(50)*
ns
9. Under Voltage Detection Comparator Block [UV Comp.]
V
TLH
+INUV1=
(4.2)
V
Threshold Voltage V
THL
+INUV1= (3.97) (4.05) (4.13) V
Hysteresis width V
H
(0.15)
V
Input bias current I
INUV
+INUV=0V
(-100)
nA
10. Bias Voltage Block [VB]
Threshold Voltage V
B
5.9 6 6.1 V
11. Control Block [CTL]
ON condition V
ON
CTL-1,
CTL-2 terminal 2
25 V
OFF condition V
OFF
CTL-1,
CTL-2 terminal 0
0.8 V
I
CTLH
CTL -1=CTL-2=5V
100 150
µ
A
Input current I
CTLL
CTL -1=CTL-2=0V
0 1
µ
A
12. General
Standby current I
CCS
CTL-1=CTL-2=0V
0 10
µ
A
I
CC1
CTL-1=CTL-2=5V
(5.5) (8.3) mA
I
CC2
CTL-1=5V,
CTL-2=0V
(4.0) (6.0) mA
Power supply current
I
CC3
CTL-1=0V,
CTL-2=5V
(1.5) (2.3) mA
*
: Standard design value
(11/18)
FUNCTIONAL DESCRIPTION
1. DC/DC Converter Unit
(1) Reference voltage block (REF)
The reference voltage generator uses the voltage supplied from the VCC terminal (pin 1) to generate a
temperature compensated, stable voltage (5.0V Typ) used as the reference supply voltage for the IC’s internal
circuitry.
This terminal can also be used to obtain a load current to a maximum of 1 mA from the reference voltage VREF
terminal (pin 21) .
(2) Triangular wave oscillator block (OSC)
The triangular wave oscillator builds the capacitor for frequency setting into, and generates the triangular wave
oscillation waveform by connecting the frequency setting resistor with the RT termi nal (pin 20) .
The triangular wave is input to the PWM comparator on the IC.
(3) Error amplifier block (Error Amp1)
This amplifier detects the output signal from the current detection amplifier (Current Amp2) , compares this to
the +INE1 terminal (pin 7) , and outputs a PWM control signal to be used in controlling the charging current.
A double constant current value can be set together with the charging current control with error amplifier (Error
Amp.2). Therefore, the fail safe control with high safety or more can be achieved.
In addition, an arbitrary loop gain can be set up by connecting a feedback resistor and capacitor between the
FB1 terminal (pin 9) and -INE1 terminal (pin 8) , providing stable phase compensation to the system.
Connecting a soft-start capacitor to the CS terminal (pin 19) prevents rush currents when the IC is turned on.
Using an error amplifier for soft-start detection makes the soft-start time constant, independent of the output
load.
It is possible to correspond also to dynamic control charge (Dynamically-controlled charging) by which the
constant current control and the voltage drop of AC adaptor is detected by combining with current detection
amplifier (Current Amp1).
(4) Error amplifier block (Error Amp2)
This amplifier detects the output signal from the current detection amplifier (Current Amp2) , compares this to
the +INE2 terminal (pin 13) , and outputs a PWM control signal to be used in controlling the charging current.
In addition, an arbitrary loop gain can be set up by connecting a feedback resistor and capacitor between the
FB2 terminal (pin 15) and INE2 terminal (pin 14) , providing stable phase compensation to the system.
Connecting a soft-start capacitor to the CS terminal (pin 19) prevents rush currents when the IC is turned on.
Using an error amplifier for soft-start detection makes the soft-start time constant, independent of the output
load.
(5) Error amplifier block (Error Amp3)
This error amplifier (Error Amp3) detects the output voltage from the DC/DC converter and outputs the PWM
control signal. External output voltage setting resistors can be connected to the error amplifier inverted input
terminal to set the desired level of output voltage from 1 cell to 4 cells.
In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB3
terminal (pin 17) to the -INE3 terminal (pin 16) of the error amplifier, enabling stable phase compensation to
the system.
Connecting a soft-start capacitor to the CS terminal (pin 19) prevents rush currents when the IC is turned on.
Using an error amplifier for soft-start detection makes the soft-start time constant, independent of the output
load.
(6) Current detection amplifier block (Current Amp1)
The current detection amplifier (Current Amp1) detects a voltage drop which occurs between both ends of the
output sense resistor (R
S2
) due to the flow of the AC adapter current, using the +INC1 terminal (pin 5) and
-INC1 terminal (pin 4) . Then it outputs the signal amplified by 25 times to the OUTC1 terminal (pin 3).
Moreover, an equal offset voltage to the voltage impressed to the IOFA1 terminal (pin 6) can be set.
(7) Current detection amplifier block (Current Amp2)
The current detection amplifier (Current Amp2) detects a voltage drop which occurs between both ends of the
output sense resistor (R
S1
) due to the flow of the AC adapter current, using the +INC2 terminal (pin 12) and
INC2 terminal (pin 11) . Then it outputs the signal amplified by 25 times to the OUTC2 terminal (pin 10).
(12/18)
(8) PWM comparator block (PWM Comp.)
The PWM comparator circuit is a voltage-pulse width converter for controlling the output duty of the error
amplifiers (Error Amp1 to Error Amp3) depending on their output voltage.
The PWM comparator circuit compares the triangular wave voltage the lowest generated by the triangular wave
oscillator to the error amplifier output voltage and turns on the external main side output transistor, turns off the
external synchronous rectification side output transistor during the interval
(13/18)
SETTING THE CHARGING VOLTAGE
The charging voltage (DC/DC output voltage) can be set by connecting external voltage setting resistors (R1,
R2) to the -INE3 terminal (pin 16). Be sure to select a resistor value that allows you to ignore the on -resistor
(35
, 1mA) of the internal FET connected to the OUTD terminal (pin 18).
Battery charging voltage : Vo
Vo(V)
=
(R1
+
R2)
/
R2
×
-INE3 (V)
METHOD OF SETTING THE CHARGING CURRENT
The charge current (output limit current) value can be set with the voltage at the +INE2 terminal (pin 13).
If a current exceeding the set value attempts to flow, the charge voltage drops according to the set current value.
Battery charge current setting voltage : +INE2
+INE2(V)
=
25
×
Ichg (A)
×
R
S
(
)
METHOD OF SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY
The triangular wave oscillation frequency can be set by the timing resistor (R
T
) connected the RT terminal (pin
20) .
Triangular wave oscillation frequency : fosc
fosc(kHz)
13500
/
R
T
(k
)
B
16
18
19
<Error Amp.3>
CS
OUTD
-INE3
Vo
R1
R2
4.2V
(14/18)
METHOD OF SETTING THE SOFT-START TIME
(1) Setting constant voltage mode soft-start
For preventing rush current upon activation of IC, the IC allows soft-start using the capacitor (C
S
) connected to
the CS terminal (pin 19) .
When CTL-1 terminal (pin 23) is placed under “H” level and IC is activated (VCC
UVLO threshold voltage) , Q2
is turned off and the external soft-start capacitor (CS) connected to the CS terminal is charged at 10
µ
A.
Error Amp3 output (FB3 terminal (pin 17) ) is determined by comparison between the lower voltage of the two
non-inverted input terminals 4.2V and CS terminal voltage) and inverted input terminal voltage
(
-INE3 terminal
(pin 16) voltage). Within the soft-start period (CS terminal voltage < 4.2V), FB3 is determined by comparison
between INE3 terminal voltage and CS terminal voltage, and DC/DC converter output voltage goes up
proportionately with the increase of CS terminal voltage caused by charging on the soft-start capacitor.
Soft-start time is obtained from the following formula :
Soft-start time : ts (time to output 100 %)
ts
(s)
0.42
×
C
S
(µ
F)
Soft-start circuit
16
19
<Error Amp.3>
CS
-INE3
4.2V
Cs
UVLO
Q2
10uA
10uA
VREF
4.9V
Soft-start time ts
0V
CS terminal voltage
Error Amp block comparison voltage
to INE3 voltage
4.2V
(15/18)
(2) Setting constant current mode soft-start
For preventing rush current upon activation of IC, the IC allows soft start using the capacitor (C
S
) connected to
the CS terminal (pin 19) .
When CTL-1 terminal (pin 23) is placed under “H” level and IC is activated (VCC
UVLO threshold voltage), Q2
is turned off and the external soft-start capacitor (C
S
) connected to the CS terminal is charged at 10
µ
A.
Error Amp2 output (FB2 terminal (pin 15) ) is determined by comparison between the lower voltage of the two
non-inverted input terminals
(
+INE2 terminal (pin 13) and CS terminal voltage) and inverted input terminal
voltage
(
-INE2 terminal (pin 14) voltage) . Within the soft start period (CS terminal voltage
<
+INE2), FB2 is
determined by comparison between INE2 terminal voltage and CS terminal voltage, and DC/DC converter
output voltage goes up proportionately with the increase of CS terminal voltage caused by charging on the
soft-start capacitor. Soft-start time is obtained from the following formula .
Soft-start time : ts (time to output 100 %)
ts(s)
+INE2
/
10
(µ
A)
×
C
S
(µ
F)
Soft-start circuit
14
19
<Error Amp.2>
CS
-INE2
Cs
UVLO
Q2
10uA
10uA
VREF
13
+INE2
4.9V
Soft-start time ts
0V
CS terminal voltage
Error Amp block comparison voltage
to INE2 voltage
+INE2
(16/18)
PROCESSING WITHOUT USING OF THE SOFT-START FUNCTION
When soft-start function is not used, the CS terminal (pin 19) should be left open.
When no soft-start function is specified
PROCESSING WITHOUT USING OF THE UNDER VOLTAGE DETECTION COMPARATOR
When under voltage detection comparator is not used, the +INUV terminal (pin 2) should be made a short
circuit to VCC.
When no under voltage detection comparator is specified
CS
“Open”
19
VCC
1
+INUV
2
(17/18)
NOTE ON AN EXTERNAL REVERSE-CURRENT PREVENTIVE DIODE
• Insert a reverse-current preventive diode at one of the three locations marked * to prevent reverse current from
the battery.
• When selecting the reverse current prevention diode, be sure to consider the reverse voltage (VR) and reverse
current (I R) of the diode.
VIN
CB
OUT-1
Ichg BATT
Battery
VS
*
29
28
27
Vcc
1
OUT-2
26
A
B
RS1
*
*
(18/18)
PACKAGE DIMENSIONS
(19/18)
All Rights Reserved.
The contents of this document are subject to change
without notice. Customers are advised to consult with
FUJITSU sales representatives before ordering.
The information and circuit diagrams in this document
are presented as examples of semiconductor device
applications, and are not intended to be incorporated in
devices for actual use.
Also, FUJITSU is unable to assume responsibility for
infringement of any patent rights or other rights of third
parties arising from the use of this information or circuit
diagrams.
FUJITSU semiconductor devices are intended for use
in standard applications (computers, office automation
and other office equipment, industrial, communications,
and measurement equipment, personal or household
devices, etc.).
CAUTION
:
Customers considering the use of our products in
special applications where failure or abnormal
operation may directly affect human lives or cause
physical injury or property damage, or where extremely
high levels of reliability are demanded (such as
aerospace systems, atomic energy controls, sea floor
repeaters, vehicle operating controls, medical devices
for life support, etc.) are requested to consult with
FUJITSU sales representatives before such use. The
company will not be responsible for damages arising
from such use without prior approval.
Any semiconductor devices have an inherent chance
of failure. You must protect against injury, damage or
loss from such failures by incorporating safety design
measures into your facility and equipment such as
redundancy, fire protection, and prevention of
over-current levels and other abnormal operating
conditions.
If any products described in this document represent
goods or technologies subject to certain restrictions on
export under the Foreign Exchange and Foreign Trade
Law of Japan, the prior authorization by Japanese
government will be required for export of those
products from Japan.
All right Reserved.
FUJITSU Limited
FUJITSU LINITED
For further information please contact
Japan
FUJITSU LIMITED
Corporate Global Business Support Division
Electronic Devices
Akiruno Technology Center 50 Fuchigami,
Akiruno, Tokyo, 197-0833, Japan
Tel: 81(42) 532-2132
Fax: 81(42) 532-2414
http://www.fujitsu.co.jp/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA
PTE LTD
#05-08, 151 Lorong Chuan
New Tech Park
Singapore 556741
Tel: (65) 281-0770
Fax: (65) 281-0220
http://www.fmap.com.sg/
North and South America
FUJITSU MICROELECTRONICS, INC.
Semiconductor Division
3545 North First Street
San Jose, CA 95134-1804, USA
Tel: (408) 922-9000
Fax: (408) 922-9179
Customer Response Center
Mon. - Fri.: 7 am - 5 pm (PST)
Tel: (800) 866-8608
Fax: (408) 922-9179
http://www.fujitsumicro.com/
Europe
FUJITSU MIKROELEKTRONIK GmbH
Am Siebenstein 6-10
D-63303 Dreieich-Buchschlag
Germany
Tel: (06103) 690-0
Fax: (06103) 690-122
http://www.fujitsu-ede.com/