DG411LE, DG412LE, DG413LE
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16 , Low Parasitic Capacitance and Leakage,
+12 V / +5 V / +3 V / ± 5 V Quad SPST Switches
DESCRIPTION
The DG411LE, DG412LE, and DG413LE are monolithic
quad single-pole-single-throw analog switches. The
DG411LE and DG412LE differ only in that they respond to
opposite logic levels. The DG413LE has two normally open
and two normally closed switches. It can be given various
configurations, including four SPST, two SPDT, and one
DPDT.
The DG411LE, DG412LE, and DG413LE offer low on
resistance of 16 , low parasitic capacitance of 15 pF
switch on capacitance, and low charge injection over the
signal swing range.
The DG411LE, DG412LE, and DG413LE operate on single
and dual supplies. Single supply voltage ranges from 3 V
to 16 V while dual supply operation is recommended with
± 3 V to ± 8 V. Each switch conducts equally well in both
direction when on, and blocks input voltages up to the
supply levels when off.
The DG411LE, DG412LE, and DG413LE are available in
16 lead TSSOP, SOIC, and PDIP packages.
FEATURES
3 V to 16 V single supply or ± 3 V to ± 8 V dual
supply
On-resistance RDS(on): 16
Low parasitic capacitance:
CD(ON): 15 pF
CS(OFF): 5 pF
Less than 8 pC charge injection over the full signal swing
range
Fast switching tON: 16 ns
tOFF: 9 ns
TTL, CMOS compatible
Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
Note
*
This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details
BENEFITS
Wide operation voltage range
Low signal errors and distortion
•Fast switching time
Minimized switching glitch
APPLICATIONS
Automatic test equipment
Data acquisition systems
Meters and instruments
Medical and healthcare systems
Communication systems
Audio and video signal routing
Relay replacement
Battery powered systems
Computer peripherals
Audio and video signal routing
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
Available
Available
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Top View
IN1IN2
D1D2
S1S2
V- V+
GND VL
S4S3
D4D3
IN4IN3
DG411LE, DG412LE
Dual-In-Line, TSSOP and SOIC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Top View
IN1IN2
D1D2
S1S2
V- V+
GND VL
S4S3
D4D3
IN4IN3
DG413LE
Dual-In-Line, TSSOP and SOIC
DG411LE, DG412LE, DG413LE
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S19-0672-Rev. B, 05-Aug-2019 2Document Number: 78091
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Logic “0” 0.8 V
Logic “1” 2.4 V
Logic “0” 0.8 V
Logic “1” 2.4 V
Notes
a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings
b. All leads welded or soldered to PC board
c. Derate 7 mW/°C above 75 °C
d. Derate 7.6 mW/°C above 75 °C
e. Derate 12 mW/°C above 75 °C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
TRUTH TABLE
LOGIC DG411LE DG412LE
0ONOFF
1OFFON
TRUTH TABLE
LOGIC SW1, SW4SW2, SW3
0OFFON
1ONOFF
ORDERING INFORMATION
TEMP. RANGE CONFIGURATION PACKAGE PART NUMBER MIN. ORDER / PACK. QUANTITY
-40 °C to +85 °C
Lead-free
DG411LE
16-pin TSSOP DG411LEDQ-GE3 Tube 360 units
DG411LEDQ-T1-GE3 Tape and reel, 3000 units
16-pin SOIC DG411LEDY-GE3 Tube 500 units
DG411LEDY-T1-GE3 Tape and reel, 2500 units
16-pin PDIP DG411LEDJ-GE3 Tube 500 units
DG412LE
16-pin TSSOP DG412LEDQ-GE3 Tube 360 units
DG412LEDQ-T1-GE3 Tape and reel, 3000 units
16-pin SOIC DG412LEDY-GE3 Tube 500 units
DG412LEDY-T1-GE3 Tape and reel, 2500 units
16-pin PDIP DG412LEDJ-GE3 Tube 500 units
DG413LE
16-pin TSSOP DG413LEDQ-GE3 Tube 360 units
DG413LEDQ-T1-GE3 Tape and reel, 3000 units
16-pin SOIC DG413LEDY-GE3 Tube 500 units
DG413LEDY-T1-GE3 Tape and reel, 2500 units
16-pin PDIP DG413LEDJ-GE3 Tube 500 units
ABSOLUTE MAXIMUM RATINGS
PARAMETER LIMIT UNIT
V+ to V- -0.3 to +18
V
GND to V- 18
VL(GND -0.3) to (V+) +0.3
IN a, VS, VD-0.3 to (V+) +0.3
or 30 mA, whichever occurs first
Continuous Current (Any terminal) 30 mA
Peak Current, S or D (Pulsed 1 ms, 10 % duty cycle) 100
Storage Temperature (DQ, DY suffix) -65 to +125 °C
(AK suffix) -65 to +150
Power Dissipation (Packages) b
16-pin TSSOP c450
mW16-pin SOIC d 650
16-pin CerDIP e 900
ESD Human Body Model (HBM); per ANSI / ESDA / JEDEC® JS-001 2500 V
Latch Up Current, per JESD78D 400 mA
DG411LE, DG412LE, DG413LE
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S19-0672-Rev. B, 05-Aug-2019 3Document Number: 78091
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Notes
a. Refer to PROCESS OPTION FLOWCHART
b. Room = 25 °C, full = as determined by the operating temperature suffix
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet
e. Guaranteed by design, not subject to production test
f. VIN = input voltage to perform proper function
g. Leakage parameters are guaranteed by worst case test conditions and not subject to test
SPECIFICATIONS a (Single Supply 12 V)
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE
SPECIFIED
V+ = 12 V, V- = 0 V
VL = 5 V, VIN = 2.4 V, 0.8 V f
TEMP. b TYP.
c
A SUFFIX
LIMITS
-55 °C to +125 °C
D SUFFIX
LIMITS
-40 °C to +85 °C UNIT
MIN. dMAX. dMIN. dMAX. d
Analog Switch
Analog Signal Range eVANALOG Full - 0 12 0 12 V
Drain-Source
On-Resistance RDS(on) V+ = 10.8 V, V- = 0 V
IS = 10 mA, VD = 2/9 V
Room 16 - 26 - 26
Full - - 40 - 35
Switch Off Leakage Current
IS(off)
VD = 1/11 V, VS = 11/1 V
Room - -1 1 -1 1
nA
Full - -15 15 -10 10
ID(off)
Room - -1 1 -1 1
Full - -15 15 -10 10
Channel On Leakage
Current ID(on)
VS = VD = 11/1 V Room - -1 1 -1 1
Full - -15 15 -10 10
Digital Control
Input Current, VIN Low IIL VIN under test = 0.8 V Full 0.01 -1.5 1.5 -1 1 μA
Input Current, VIN High IIH VIN under test = 2.4 V Full -1.5 1.5 -1 1
Dynamic Characteristics
Turn-On Time tON RL = 300 , CL = 35 pF,
VS = 5 V, see figure 2
Room 16 - 50 - 50
ns
Full - - 70 - 60
Turn-Off Time tOFF
Room 9 - 30 - 30
Full - - 48 - 40
Break-Before-Make
Time Delay tDDG413L only, VS = 5 V,
RL = 300 , CL = 35 pF Room 5 - - - -
Charge Injection eQV
g = 0 V, Rg = 0 , CL = 10 nF Room 6.6 - - - - pC
Off-Isolation eOIRR
RL = 50 , CL = 5 pF, f = 1 MHz
Room 68.4 - - - -
dB
Channel-to-Channel
Crosstalk eXTALK Room 114 - - - -
Source Off Capacitance eCS(off)
f = 1 MHz
Room 5 - - - -
pFDrain Off Capacitance eCD(off) Room 6 - - - -
Channel-On Capacitance eCD(on) Room 15 - - - -
Power Supplies
Positive Supply Current I+
VIN = 0 V or 5 V
Room 0.02 - 1 - 1
μA
Full - - 7.5 - 5
Negative Supply Current I- Room -0.002 -1 - -1 -
Full - -7.5 - -5 -
Logic Supply Current IL
Room 0.002 - 1 - 1
Full - - 7.5 - 5
Ground Current IGND
Room -0.002 -1 - -1 -
Full - -7.5 - -5 -
DG411LE, DG412LE, DG413LE
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S19-0672-Rev. B, 05-Aug-2019 4Document Number: 78091
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Notes
a. Refer to PROCESS OPTION FLOWCHART
b. Room = 25 °C, full = as determined by the operating temperature suffix
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet
e. Guaranteed by design, not subject to production test
f. VIN = input voltage to perform proper function
g. Leakage parameters are guaranteed by worst case test conditions and not subject to test
SPECIFICATIONS a (Dual Supply ± 5 V)
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE
SPECIFIED
V+ = 5 V, V- = -5 V
VL = 5 V, VIN = 2.4 V, 0.8 V f
TEMP. b TYP.
c
A SUFFIX
LIMITS
-55 °C to +125 °C
D SUFFIX
LIMITS
-40 °C to +85 °C UNIT
MIN. dMAX. dMIN. dMAX. d
Analog Switch
Analog Signal Range eVANALOG Full - -5 5 -5 5 V
Drain-Source
On-Resistance RDS(on) V+ = 5 V, V- = -5 V,
IS = 10 mA, VD = ± 3.5 V
Room 18 - 30 - 30
Full - - 42 - 37
Switch Off
Leakage Current g
IS(off) V+ = 5.5, V- = -5.5 V,
VD = ± 4.5 V, VS = ± 4.5 V
Room - -1 1 -1 1
nA
Full - -15 15 -10 10
ID(off)
Room - -1 1 -1 1
Full - -15 15 -10 10
Channel On
Leakage Current gID(on) V+ = 5.5 V, V- = -5.5 V,
VS = VD = ± 4.5 V
Room - -1 1 -1 1
Full - -15 15 -10 10
Digital Control
Input Current, VIN Low eIIL VIN under test = 0.8 V Full 0.05 -1.5 1.5 -1 1 μA
Input Current, VIN High eIIH VIN under test = 2.4 V Full 0.05 -1.5 1.5 -1 1
Dynamic Characteristics
Turn-On Time etON RL = 300, CL = 35 pF,
VS = ± 3.5 V, see figure 2
Room 17 - 50 - 50
ns
Full - - 70 - 60
Turn-Off Time etOFF
Room 12 - 35 - 35
Full - - 50 - 40
Break-Before-Make Time
Delay etDDG413L only, VS = 3.5 V,
RL = 300, CL = 35 pF Room 5 - - - -
Charge Injection eQV
g = 0 V, Rg = 0 , CL = 10 nF Room 5.8 - - - - pC
Off Isolation eOIRR
RL = 50 , CL = 5 pF, f = 1 MHz
Room 68 - - - -
dB
Channel-to-Channel
Crosstalk eXTALK Room 113 - - - -
Source Off Capacitance e CS(off)
f = 1 MHz
Room 5 - - - -
pFDrain Off Capacitance eCD(off) Room 6 - - - -
Channel On Capacitance eCD(on) Room 14 - - - -
Power Supplies
Positive Supply Current eI+
VIN = 0 V or 5 V
Room 0.03 - 1 - 1
μA
Full - - 7.5 - 5
Negative Supply Current eI- Room -0.002 -1 - -1 -
Full - -7.5 - -5 -
Logic Supply Current eIL
Room 0.002 - 1 - 1
Full - - 7.5 - 5
Ground Current eIGND
Room -0.002 -1 - -1 -
Full - -7.5 - -5 -
DG411LE, DG412LE, DG413LE
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S19-0672-Rev. B, 05-Aug-2019 5Document Number: 78091
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Notes
a. Refer to PROCESS OPTION FLOWCHART
b. Room = 25 °C, full = as determined by the operating temperature suffix
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet
e. Guaranteed by design, not subject to production test
f. VIN = input voltage to perform proper function
g. Leakage parameters are guaranteed by worst case test conditions and not subject to test
SPECIFICATIONS a (Single Supply 5 V)
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE
SPECIFIED
V+ = 5 V, V- = 0 V
VL = 5 V, VIN = 2.4 V, 0.8 V f
TEMP. b TYP.
c
A SUFFIX
LIMITS
-55 °C
to
+125 °C
D SUFFIX
LIMITS
-40 °C to +85 °C UNIT
MIN. dMAX. dMIN. dMAX. d
Analog Switch
Analog Signal Range eVANALOG Full - - 5 - 5 V
Drain-Source
On-Resistance eRDS(on) V+ = 4.5 V,
IS = 5 mA, VD = 1 V, 3.5 V
Room 36 - 50 - 50
Full - - 88 - 75
Dynamic Characteristics
Turn-On Time etON RL = 300 , CL = 35 pF,
VS = 3.5 V, see figure 2
Room 27 - 50 - 50
ns
Hot - - 90 - 60
Turn-Off Time etOFF
Room 15 - 30 - 30
Hot - - 55 - 40
Break-Before-Make Time
Delay etDDG413L only, VS = 3.5 V,
RL = 300 , CL = 35 pF Room 11 - - - -
Charge Injection eQV
g = 0 V, Rg = 0 , CL = 10 nF Room 3.3 - - - - pC
Power Supplies
Positive Supply Current eI+
VIN = 0 V or 5 V
Room 0.02 - 1 - 1
μA
Hot - - 7.5 - 5
Negative Supply Current eI- Room -0.002 -1 - -1 -
Hot - -7.5 - -5 -
Logic Supply Current eIL
Room 0.002 - 1 - 1
Hot - - 7.5 - 5
Ground Current eIGND
Room -0.002 -1 - -1 -
Hot - -7.5 - -5 -
DG411LE, DG412LE, DG413LE
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Notes
a. Refer to PROCESS OPTION FLOWCHART
b. Room = 25 °C, full = as determined by the operating temperature suffix
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet
e. Guaranteed by design, not subject to production test
f. VIN = input voltage to perform proper function
g. Leakage parameters are guaranteed by worst case test conditions and not subject to test
SPECIFICATIONS a (Single Supply 3 V)
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE
SPECIFIED
V+ = 3 V, V- = 0 V
VL = 3 V, VIN = 0.4 V, 2.0 V f
TEMP. b TYP.
c
A SUFFIX LIMITS
-55 °C
to
+125
°C
D SUFFIX
LIMITS
-40 °C to +85 °C UNIT
MIN. dMAX. dMIN. dMAX. d
Analog Switch
Analog Signal Range eVANALOG Full - 0 3 0 3 V
Drain-Source
On-Resistance RDS(on) V+ = 2.7 V, V- = 0 V,
IS = 5 mA, VD = 0.5, 2.2 V
Room 106 - 130 - 130
Full - - 150 - 140
Switch Off
Leakage Current g
IS(off) V+ = 3.3, V- = 0 V,
VD = 1, 2 V, VS = 2, 1 V
Room - -1 1 -1 1
nA
Full - -15 15 -10 10
ID(off)
Room - -1 1 -1 1
Full - -15 15 -10 10
Channel On
Leakage Current gID(on) V+ = 3.3 V, V- = 0 V,
VS = VD = 1, 2 V
Room - -1 1 -1 1
Full - -15 15 -10 10
Digital Control
Input Current, VIN Low IIL VIN under test = 0.4 V Full 0.005 -1.5 1.5 -1 1 μA
Input Current, VIN High IIH VIN under test = 2.4 V Full 0.005 -1.5 1.5 -1 1
Dynamic Characteristics
Turn-On Time tON RL = 300 , CL = 35 pF,
VS = 1.5 V, see figure 2
Room 57 - 85 - 85
ns
Full - - 150 - 110
Turn-Off Time tOFF
Room 25 - 60 - 60
Full - - 100 - 85
Break-Before-Make Time
Delay tDDG413L only, VS = 1.5 V,
RL = 300 , CL = 35 pF Room24----
Charge Injection eQV
g = 0 V, Rg = 0 , CL = 10 nF Room 2 - - - - pC
Off Isolation eOIRR
RL = 50 , CL = 5 pF, f = 1 MHz
Room68----
dB
Channel-to-Channel
Crosstalk eXTALK Room 107 - - - -
Source Off Capacitance eCS(off)
f = 1 MHz
Room6----
pFDrain Off Capacitance eCD(off) Room7----
Channel On Capacitance eCD(on) Room15----
DG411LE, DG412LE, DG413LE
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S19-0672-Rev. B, 05-Aug-2019 7Document Number: 78091
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
RDS(on) vs. Drain Voltage (Single Supply)
RDS(on) vs. Drain Voltage and Temperature
RDS(on) vs. Drain Voltage and Temperature
RDS(on) vs. Drain Voltage and Temperature (Single Supply)
Supply Current vs. Temperature
Switching Time vs. Single Supply
0
10
20
30
40
50
60
70
80
90
0246810121416
RON -On-Resistance (Ω)
VD- Analog Voltage (V)
V+ = +3.0 V
V+ = +12.0 V
V+ = +5.0 V
V+ = +16.0 V
TA= 25 °C
IS= 10 mA
0
5
10
15
20
25
30
0123456789101112
RON -On-Resistance (Ω)
VD- Analog Voltage (V)
+125 °C
+85 °C
+25 °C-40 °C
V+ = +12 V
IS= 10 mA
-55 °C
10
15
20
25
30
35
40
45
50
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
RON -On-Resistance (Ω)
VD- Analog Voltage (V)
+125 °C
+85
°
C
+25 °C-40
°
C
V+ = +5 V
IS= 10 mA -55 °C
6
8
10
12
14
16
18
20
22
24
-8-6-4-202468
RON -On-Resistance (Ω)
VD- Analog Voltage (V)
= ± 8.0 V
TA= 25 °C
IS= 10 mA
= ± 5.0 V
0
5
10
15
20
25
30
35
-5 -4 -3 -2 -1 0 1 2 3 4 5
RON -On-Resistance (Ω)
VD- Analog Voltage (V)
+125
°
C
+85
°
C
+25
°
C-40
°
C
= ± 5.0 V
IS= 10 mA
-55 °C
0
10
20
30
40
50
60
70
80
90
100
-40-200 20406080100120
I+ - Supply Current (nA)
Temperature (°C)
V+ = +5.5 V
V- = 0 V
IN = 0 V
DG411LE, DG412LE, DG413LE
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S19-0672-Rev. B, 05-Aug-2019 8Document Number: 78091
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Leakage Current vs. Drain Voltage
Switching Time vs. Single Supply Voltage
Switching Time vs. Dual Supply Voltage
Charge Injection vs. Drain Voltage
Threshold vs. Single Supply Current
Drain Capacitance vs. Drain Voltage (Single Supply)
-40
-30
-20
-10
0
10
20
30
40
-5-4-3-2-1012345
Leakage Current (pA)
VD- Drain Voltage (V), VS= -VD
V+ = +5 V
V- = -5 V
ID(ON)
ID(OFF)
IS(OFF)
0
5
10
15
20
25
30
35
40
45
50
55
60
2 4 6 8 10121416
Switching Speed (ns)
V+ - Positive Supply Voltage (V)
Single supply
tON
tOFF
0
5
10
15
20
25
30
345678
Switching Speed (ns)
V+/- - Positive Supply Voltage (V)
Dual supply
tON
tOFF
0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
-5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12
QINJ - Charge Injection (pC)
VD- Analog Voltage (V)
V± = ± 5 V
V+ = 12 V
V+ = 5 V
V+ = 3V
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
246810121416
VTH - Threshold (V)
V+ - Positive Supply Voltage (V)
VIH
VIL
VL= V+ (for V+ < 5 V) and 5 V (V+ ≥ 5 V)
0
2
4
6
8
10
12
14
16
18
20
0123456789101112
Capacitance (pF)
Analog Voltage (V)
C
D
ON
, V+ = +12 V
Single supply
CD(ON), V+ = +5 V
CD(ON), V+ = +3 V
CS(OFF), V+ = +12 V
CS(OFF), V+ = +5 V
CD(OFF), V+ = +12 V
CD(OFF), V+ = +3 V
CS(OFF), V+ = +3 V
CD(OFF), V+ = +5 V
DG411LE, DG412LE, DG413LE
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S19-0672-Rev. B, 05-Aug-2019 9Document Number: 78091
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Drain Capacitance vs. Drain Voltage (Dual Supply) Insertion Loss, Off Isolation and Crosstalk vs. Frequency
SCHEMATIC DIAGRAM (Typical Channel)
Fig. 1
0
2
4
6
8
10
12
14
16
18
20
-5 -4 -3 -2 -1 0 1 2 3 4 5
Capacitance (pF)
Analog Voltage (V)
Dual supply
CD(ON), V± = ± 5 V
CS(OFF), V± = ± 5 V
CD(OFF), V± = ± 5 V
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
10
100K 1M 10M 100M 1G
Loss, OIRR, XTALK (dB)
Frequency (Hz)
Insertion loss, -3 dB = 301 MHz
V+ = +3 V
V- = 0 V
OIRR
X
TALK
Level
Shift/
Drive
VIN
VL
S
V+
GND
V-
D
V-
V+
DG411LE, DG412LE, DG413LE
www.vishay.com Vishay Siliconix
S19-0672-Rev. B, 05-Aug-2019 10 Document Number: 78091
For technical questions, contact: analogswitchsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TEST CIRCUITS
Fig. 2 - Switching Time
Fig. 3 - Break-Before-Make (DG413LE)
Fig. 4 - Charge Injection
0 V
Logic
Input
Switch
Input*
Switch
Output
3 V
50%
0 V
Switch
Input*
VS
tr < 20 ns
tf < 20 ns
90 %
- V
S
tON
tON
VO
90 %
VO
Note: Logic input waveform is inverted for switches that
have the opposite logic sense control
CL (includes fixture and stray capacitance)
V+
IN
RL
RL + rDS(on)
VO = VS
S D
V-
VO
GND
VL
CL
35 pF
V-
RL
300 Ω
VLV+
VS
0 V
Logic
Input
Switch
Switch
Output
3 V
50 %
0 V
Output
0 V
90 %
VO2
VO1
90 %
VS1
VS2
tDtD
VO2
CL (includes fixture and stray capacitance)
V+
S2
V-
S1
VL
VS2
IN2
D2
VS1
RL2
300 Ω
D1VO1
CL2
35 pF
GND
RL1
300 Ω
CL1
35 pF
IN1
V-
CL
10 nF
D
Rg
VO
V+
S
V-
3 V
IN
VL
Vg
GND
OFFONOFF
OFFONOFF
VO
ΔVO
INX
INX
Q = ΔV
O x CL
INX dependent on switch configuration Input polarity determined
by sense of switch.
V-
V+VL
DG411LE, DG412LE, DG413LE
www.vishay.com Vishay Siliconix
S19-0672-Rev. B, 05-Aug-2019 11 Document Number: 78091
For technical questions, contact: analogswitchsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TEST CIRCUITS
Fig. 5 - Crosstalk
Fig. 6 - Off-Isolation Fig. 7 - Source / Drain Capacitances
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?78091.
0 V, 2.4 V
S1
XTALK Isolation = 20 log
VS
VO
D2
C = RF bypass
RL
D1
S2
VS
0 V, 2.4 V
IN150 Ω
VO
IN2
Rg = 50 Ω
VLV+
GND V-
NC
C
CC
V+
V-
VL
RL
50 Ω
D
0 V, 2.4 V
V+
Rg = 50 Ω
GND V- C
VS
Off Isolation = 20 log
VS
VO
IN
VLVO
C
S
C
C = RF Bypass
V-
V+
VL
D
IN
S
VLV+
GND V- C
0 V, 2.4 V
Meter
HP4192A
Impedance
Analyzer
or Equivalent
CC
VLV+
V-
All Leads
0.101 mm
0.004 IN
E
HC
D
e B A1 LĬ
4312 8756
131416 15 91012 11
Package Information
Vishay Siliconix
Document Number: 71194
02-Jul-01 www.vishay.com
1
SOIC (NARROW): 16ĆLEAD
JEDEC Part Number: MS-012
MILLIMETERS INCHES
Dim Min Max Min Max
A1.35 1.75 0.053 0.069
A10.10 0.20 0.004 0.008
B0.38 0.51 0.015 0.020
C0.18 0.23 0.007 0.009
D9.80 10.00 0.385 0.393
E3.80 4.00 0.149 0.157
e1.27 BS C 0.050 BSC
H5.80 6.20 0.228 0.244
L0.50 0.93 0.020 0.037
Ĭ0_8_0_8_
ECN: S-03946—Rev. F, 09-Jul-01
DWG: 5300
E1E
Q1
A
L
A1
e1B
B1
S
CeA
D
15°
MAX
12345678
16 15 14 13 12 11 10 9
Package Information
Vishay Siliconix
Document Number: 71261
06-Jul-01 www.vishay.com
1
PDIP: 16ĆLEAD
MILLIMETERS INCHES
Dim Min Max Min Max
A3.81 5.08 0.150 0.200
A10.38 1.27 0.015 0.050
B0.38 0.51 0.015 0.020
B10.89 1.65 0.035 0.065
C0.20 0.30 0.008 0.012
D18.93 21.33 0.745 0.840
E7.62 8.26 0.300 0.325
E15.59 7.11 0.220 0.280
e12.29 2.79 0.090 0.110
eA7.37 7.87 0.290 0.310
L2.79 3.81 0.110 0.150
Q11.27 2.03 0.050 0.080
S0.38 1.52 .015 0.060
ECN: S-03946—Rev. D, 09-Jul-01
DWG: 5482
Vishay Siliconix
Package Information
Document Number: 74417
23-Oct-06
www.vishay.com
1
Symbols
DIMENSIONS IN MILLIMETERS
Min Nom Max
A - 1.10 1.20
A1 0.05 0.10 0.15
A2 - 1.00 1.05
B 0.22 0.28 0.38
C - 0.127 -
D 4.90 5.00 5.10
E 6.10 6.40 6.70
E1 4.30 4.40 4.50
e-0.65-
L 0.50 0.60 0.70
L1 0.90 1.00 1.10
y--0.10
θ10°3°6°
ECN: S-61920-Rev. D, 23-Oct-06
DWG: 5624
TSSOP: 16-LEAD
PAD Pattern
www.vishay.com Vishay Siliconix
Revision: 02-Sep-11 1Document Number: 63550
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
RECOMMENDED MINIMUM PAD FOR TSSOP-16
0.281
(7.15)
Recommended Minimum Pads
Dimensions in inches (mm)
0.171
(4.35)
0.055
(1.40)
0.012
(0.30)
0.026
(0.65)
0.014
(0.35)
0.193
(4.90)
Application Note 826
Vishay Siliconix
www.vishay.com Document Number: 72608
24 Revision: 21-Jan-08
APPLICATION NOTE
RECOMMENDED MINIMUM PADS FOR SO-16
RECOMMENDED MINIMUM PADS FOR SO-16
0.246
(6.248)
Recommended Minimum Pads
Dimensions in Inches/(mm)
0.152
(3.861)
0.047
(1.194)
0.028
(0.711)
0.050
(1.270)
0.022
(0.559)
0.372
(9.449)
Return to Index
Return to Index
Legal Disclaimer Notice
www.vishay.com Vishay
Revision: 01-Jan-2021 1Document Number: 91000
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