DATA SH EET
Preliminary specification
Supersedes data of July 1993
File under Integrated Circuits, IC02
1996 Nov 07
INTEGRATED CIRCUITS
SAA5254
Integrated VIP and teletext decoder
(IVT1.1X)
1996 Nov 07 2
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
FEATURES
•Complete teletext decoder including page memory and
FASTEXT links in a 40-pin DIP package
•Automatic processing of extension packet 26 for widest
possible language decoding. All our standard language
options can be available, and language option is
readable via I2C-bus
•100% hardware compatible with the SAA5244A; plug-in
replacement and extra market
•100% hardware compatible with the SAA5244A, except
if the special OSD symbols were used with the
SAA5244A, except ROM identification number
•The device is pin-aligned with the other members of the
new Philips teletext decoder family, i.e. SAA5280 and
the SAA5249, making one hardware solution for the full
range
•Low software overhead for the control microprocessor
•Single page acquisition system
•RGB interface to standard colour decoder ICs, push-pull
output drive
•Separate text and video signal quality detectors.
DESCRIPTION
The Integrated VIP and Teletext decoder (IVT1.1X) is
designed to decode 625-line based World System Teletext
transmissions. This single-chip teletext decoder hardware
is based on the SAA5244A with which it is completely
compatible.
Like the SAA5244A the device contains all the hardware
necessary to decode the teletext, but the SAA5254 also
contains extra hardware to process the extension packet
26 characters automatically, extending the markets to
which the TV chassis can be shipped and opening the
possibility of many more language options.
ORDERING INFORMATION
QUICK REFERENCE DATA
TYPE
NUMBER PACKAGE
NAME DESCRIPTION VERSION
SAA5254P DIP40 plastic dual in-line package; 40 leads (600 mil) SOT129-1
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
VDD supply voltage 4.5 5.0 5.5 V
IDD supply current −90 120 mA
Vsync sync voltage amplitude 0.1 0.3 0.6 V
Vvideo video voltage amplitude 0.7 1.0 1.4 V
fXTAL crystal frequency −27 −MHz
Tamb operating ambient temperature −20 −+70 °C
1996 Nov 07 3
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
BLOCK DIAGRAM
Fig.1 Block diagram; SOT129 (DIP40).
DATA
SLICER
AND
CLOCK
REGENERATOR
TELETEXT
ACQUISITION
AND
DECODING
ANALOG
TO
DIGITAL
CONVERTER
TIMING
CHAIN
PAGE
MEMORY
I2C-BUS
INTERFACE
CRYSTAL
OSCILLATOR
INPUT
CLAMP
AND SYNC
SEPARATOR
DISPLAY
CLOCK
PHASE
LOCKED
LOOP
25
24
1
10
14
SDA
SCL
VDD1
VDD2
VSS2
20 VSS3
DCVBS
5
VSS1
6
OSCOUT
OSCIN
2
3
REF
4 7 9 8 11 13 12
OSCGND BLACK IREF CVBS POL STTV/LFB
MLB207
SAA5254
VCR/FFB
DISPLAY
Y BLAN RGBREF RGB
23 19 21 18 15 to 17 22
ODD/EVENCOR
HAMMING
CHECKER
AND
PACKET 26
PROCESSING
ENGINE
1996 Nov 07 4
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
PINNING
SYMBOL PIN DESCRIPTION
VDD1 1 +5 V supply 1
OSCOUT 2 27 MHz crystal oscillator output
OSCIN 3 27 MHz crystal oscillator input
OSCGND 4 0 V crystal oscillator ground
VSS1 5 0 V ground 1
REF+ 6 Positive reference voltage for the ADC. This pin should be connected to +5 V.
BLACK 7 Video black level storage pin, connected to ground via a 100 nF capacitor.
CVBS 8 Composite video input pin. A positive-going 1 V (peak-to-peak) input is required,
connected via a 100 nF capacitor.
IREF 9 Reference current input pin, connected to ground via a 27 kΩ resistor.
VDD2 10 +5 V supply 2
POL 11 STTV/LFB/FFB polarity selection pin
STTV/LFB 12 Sync to TV output pin/line flyback input pin. Function controlled by an internal register bit
(scan sync mode).
VCR/FFB 13 PLL time constant switch/field flyback input pin. Function controlled by an internal register
bit (scan sync mode).
VSS2 14 0 V ground 2
R 15 Dot rate character output of the RED colour information.
G 16 Dot rate character output of the GREEN colour information.
B 17 Dot rate character output of the BLUE colour information.
RGBREF 18 DC input voltage to define the output high level on the RGB pins.
BLAN 19 Dot rate fast blanking output.
VSS3 20 0 V ground 3
COR 21 Programmable active LOW output to provide contrast reduction of the TV picture for mixed
text and picture displays or when viewing newsflash/subtitle pages; open drain output.
ODD/EVEN 22 25 Hz output synchronized with the CVBS inputs field sync pulses to produce a
non-interlaced display by adjustment of the vertical deflection currents.
Y 23 Dot rate character output of teletext foreground colour information; open drain output.
SCL 24 Serial clock input for the I2C-bus. It can still be driven during power-down of the device.
SDA 25 Serial input/output data port for the I2C-bus; open drain output. It can still be driven during
power-down of the device.
i.c. 26 to 40 Internally connected. Must be left open-circuit in application.
1996 Nov 07 5
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Fig.2 Pin configuration; SOT129 (DIP40).
1
2
3
4
5
6
7
8
9
10
11
12
13
40
39
38
37
36
35
34
33
32
31
30
29
28
2714
15
16
17
18
19
20 21
22
23
24
25
26
VDD1
OSCOUT
OSCIN
OSCGND
VSS1
BLACK
CVBS
IREF
VDD2
POL
STTV/LFB
R
G
B
RGBREF
BLAN
Y
SCL
SDA
i.c.
REF
VSS3
VCR/FFB
ODD/EVEN
COR
SAA5254
MLB208
VSS2
1996 Nov 07 6
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
QUALITY AND RELIABILITY
This device will meet Philips Semiconductors General Quality Specification for Business group
“Consumer Integrated
Circuits SNW-FQ-611-Part E”
. The principal requirements are shown in Tables 1 to 4.
Group A
Table 1 Acceptance tests per lot
Group B
Table 2 Processability tests (by package family)
Group C
Table 3 Reliability tests (by process family)
Table 4 Reliability tests (by device type)
Notes to Tables 1 to 4
1. ppm = fraction of defective devices, in parts per million.
LTPD = Lot Tolerance Percent Defective.
FPM = fraction of devices failing at test condition, in Failures Per Million.
FITS = Failures In Time Standard.
TEST CONDITIONS REQUIREMENTS(1)
Mechanical cumulative target < 100 ppm
Electrical cumulative target < 100 ppm
TEST CONDITIONS REQUIREMENTS(1)
Solderability < 7% LTPD
Mechanical < 15% LTPD
Solder heat resistance < 15% LTPD
TEST CONDITIONS REQUIREMENTS(1)
Operational life 168 hours at Tj= 150 °C < 1500 FPM; equivalent to
< 100 FITS at Tj=70°C
Humidity life temperature, humidity, bias
(1000 hours, 85 °C, 85% RH or
equivalent test)
< 2000 FPM
Temperature cycling performance Tstg(min) to Tstg(max) < 2000 FPM
TEST CONDITIONS REQUIREMENTS(1)
ESD and latch-up ESD Human body model
2000 V, 100 pF, 1.5 kΩ< 15% LTPD
ESD Machine model
200 V, 100 pF, 1.5 kΩ< 15% LTPD
latch-up 100 mA, 1.5 ×VDD
(absolute maximum) < 15% LTPD
1996 Nov 07 7
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
CHARACTERISTICS
VDD =5V±10%; Tamb =−20 to +70 °C, unless otherwise specified.
SYMBOL PARAMETER MIN. MAX. UNIT
VDD supply voltage (all supplies) −0.3 +6.5 V
VIinput voltage (any input) −0.3 VDD + 0.5 V
VOoutput voltage (any output) −0.3 VDD + 0.5 V
IOoutput current (each output) −10 +10 mA
IIOK DC input or output diode current −20 +20 mA
Tamb operating ambient temperature −20 +70 °C
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply
VDD supply voltage 4.5 5.0 5.5 V
IDD(tot) total supply current −90 120 mA
Inputs
CVBS
Vsync sync voltage amplitude 0.1 0.3 0.6 V
td(sync) delay from CVBS to TCS output from
STTV buffer (nominal video, average
of leading/trailing edge)
−150 0 +150 ns
∆td(sync) change in sync delay between all
black and all white video input at
nominal levels
0−25 ns
Vvideo(p-p) video input voltage amplitude
(peak-to-peak value) 0.7 1.0 1.4 V
PLLcatch display PLL catching range ±7−− %
Z
source source impedance −−250 Ω
Ciinput capacitance −−10 pF
IREF
RGND resistance to ground −27 −kΩ
POL
VIL LOW level input voltage −0.3 −+0.8 V
VIH HIGH level input voltage 2.0 −VDD + 0.5 V
ILI input leakage current VI=0toV
DD −10 −+10 µA
Ciinput capacitance −−10 pF
1996 Nov 07 8
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
LBF
VIL LOW level input voltage −0.3 −+0.8 V
VIH HIGH level input voltage 2.0 −VDD + 0.5 V
ILI input leakage current VI=0toV
DD −10 −+10 µA
IIinput current note 1 −1−+1 mA
td(LFB) delay between LFB front edge and
input video line sync −250 −ns
VCR/FFB
VIL LOW level input voltage −0.3 −+0.8 V
VIH HIGH level input voltage 2.0 −VDD + 0.5 V
ILI input leakage current VI=0toV
DD −10 −+10 µA
IIinput current note 1 −1−+1 mA
RGBREF (note 2)
VIinput voltage −0.3 −VDD + 0.5 V
ILI input leakage current VI=0toV
DD −10 −+10 µA
IDC DC current −−10 mA
SCL
VIL LOW level input voltage −0.3 −+1.5 V
VIH HIGH level input voltage 3.0 −VDD + 0.5 V
ILI input leakage current VI=0toV
DD −10 −+10 µA
fSCL clock frequency 0 −100 kHz
ti(r) input rise time 10% to 90% −−2µs
t
i(f) input fall time 90% to 10% −−2µs
C
iinput capacitance −−10 pF
Inputs/outputs
CRYSTAL OSCILLATOR (OSCIN; OSCOUT)
fXTAL crystal frequency −27 −MHz
Gvsmall signal voltage gain 3.5 −−
G
mmutual conductance f = 100 kHz 1.5 −− mA/V
Ciinput capacitance −−10 pF
CFB feedback capacitance −−5pF
BLACK
Cblack storage capacitor to ground −100 −nF
ILI input leakage current VI=0toV
DD −10 −+10 µA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
1996 Nov 07 9
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
SDA
VIL LOW level input voltage −0.3 −+1.5 V
VIH HIGH level input voltage 3.0 −VDD + 0.5 V
ILI input leakage current VI=0toV
DD −10 −+10 µA
Ciinput capacitance −−10 pF
ti(r) input rise time 10% to 90% −−2µs
t
i(f) input fall time 90% to 10% −−2µs
V
OL LOW level output voltage IOL = 3 mA 0 −0.5 V
to(f) output fall time 3 to 1 V −−200 ns
CLload capacitance −−400 pF
Outputs
STTV
GSTTV gain of STTV relative to video input 0.9 1.0 1.1
VTCS TCS voltage amplitude 0.2 0.3 0.45 V
VDCshift DC voltage shift between TCS output
and nominal video output −−0.15 V
IOoutput drive current −−3.0 mA
CLload capacitance −−100 pF
R, G AND B
VOL LOW level output voltage IOL = 2 mA 0 −0.2 V
VOH HIGH level output voltage IOH =−1.6 mA;
RGBREF ≤VDD −2V RGBREF
−0.25 V RGBREF RGBREF
+0.25 V V
Zooutput impedance −−200 Ω
CLload capacitance −−50 pF
IDC DC current −−−3.3 mA
to(r) output rise time 10% to 90% −−20 ns
to(f) output fall time 90% to 10% −−20 ns
BLAN
VOL LOW level output voltage IOL = 1.6 mA 0 −0.4 V
VOH HIGH level output voltage IOH =−0.2 mA;
VDD = 4.5 V 1.1 −− V
I
OH = 0 mA; VDD = 5.5 V −−2.8 V
VO(max) allowed output voltage at pin with external pull-up −−V
DD V
CLload capacitance −−50 pF
to(r) output rise time 10% to 90% −−20 ns
to(f) output fall time 90% to 10% −−20 ns
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
1996 Nov 07 10
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Notes
1. This current is the maximum allowed into the inputs when line and field flyback signals are connected to these inputs.
Series current limiting resistors must be used to limit the input currents to ±1 mA.
2. RGBREF is the positive supply for the RGB output pins and it must be able to source the IOH current from the
R, G and B pins. The leakage specification on RGBREF only applies when there is no current load on the RGB pins.
ODD/EVEN
VOL LOW level output voltage IOL = 1.6 mA 0 −0.4 V
VOH HIGH level output voltage IOH =−1.6 mA VDD −0.4 −VDD V
CLload capacitance −−120 pF
to(r) output rise time 0.6 to 2.2 V −−50 ns
to(f) output fall time 2.2 to 0.6 V −−50 ns
COR AND Y(OPEN DRAIN)
Vpu pull-up voltage at pin −−V
DD V
VOL LOW level output voltage IOL = 5 mA 0 −1.0 V
CLload capacitance −−25 pF
to(f) output fall time load resistor of
1.2 kΩto VDD;
measured between
VDD −0.5 and 1.5 V
−−50 ns
ILO output leakage current VI=0toV
DD −10 −+10 µA
Tskew skew delay between display outputs
R, G, B, COR, Y and BLAN −−20 ns
Timing
I2C-BUS (see Fig.3)
tLOW clock LOW period 4 −− µs
t
HIGH clock HIGH period 4 −− µs
t
SU;DAT data set-up time 250 −− ns
tHD;DAT data hold time 170 −− ns
tSU;STO set-up time from clock HIGH to
STOP 4−− µs
t
BUF START set-up time following a STOP 4 −− µs
t
HD;STA START hold time 4 −− µs
t
SU;STA START set-up time following clock
LOW-to-HIGH transition 4−− µs
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
1996 Nov 07 11
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Fig.3 I2C-bus timing.
handbook, full pagewidth
MBC764
tBUF tf
tHIGH
tSU;DAT
tSU;STO
tHD;DAT
tSU;STA
tr
tLOW
tHD;STA
SDA
SCL
SDA
TIMING CHAIN
Fig.4 Display output timing (a) line rate (b) field rate.
(1) Also BLAN in character and box blanking.
handbook, full pagewidth
0 4.66
0
0
LSP
MLA662 - 1
(TCS)
16.67
41
R, G, B, Y
(1)
R, G, B, Y
(1) display period
display period
lines 42 to 291 inclusive (and 355 to 604 inclusive interlaced)
291 312
line numbers
56.67 µs
40 µs64 µs
(b)
(a)
1996 Nov 07 12
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
handbook, full pagewidth
0 4.66
0 2.33
0
32 34.33
27.33 32
64 µs
59.33
621
(308) 622
(309) 623
(310) 624
(311) 625
(312) 1 2 3456 7
308 309 310 311 312 1 2 3 4 5 6 7
309 310 311 312 313 314 (1) 315 (2) 316 (3) 317 (4) 318 (5) 319 (6) 320 (7)
LSP
(Line Sync Pulse)
EP
(Equalizing Pulse)
BP
(Broad Pulse)
TCS interlaced
TCS interlaced
TCS non-interlaced
MLA037 - 2
64 µs
64 µs
Fig.5 Composite sync waveforms.
LSP, EP and BP are combined to give TCS as shown. All timings are measured from falling edge of LSP.
Line numbers placed in the middle of the line.
Equivalent count numbers in brackets.
TCS is available on STTV/LFB pin.
1996 Nov 07 13
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
FIRST FIELD START (EVEN)
621
(308) 622
(309) 623
(310) 624
(311) 625
(312) 1 2 3456 7
309 310 311 312 313 314 (1) 315 (2) 316 (3) 317 (4) 318 (5) 319 (6) 320 (7)
SECOND FIELD START (ODD)
TCS interlaced
ODD/EVEN output
(normal sync mode)
ODD/EVEN output
(normal sync mode
when VCS to SCS
mode active)
ODD/EVEN output
(slave sync mode)
TCS interlaced
ODD/EVEN output
(normal sync mode)
ODD/EVEN output
(normal sync mode
when VCS to SCS
mode active)
ODD/EVEN output
(slave sync mode)
MBA073 - 4
2 µs
48 µs
31 µs
2 µs
16 µs
31 µs
Fig.6 ODD/EVEN timing.
Line numbers placed in the middle of the line. Equivalent count numbers in brackets.
1996 Nov 07 14
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
ON-CHIP MEMORY
SAA5254 page memory organization
The organization of the page memory is shown in Fig.7. The device provides an additional row as compared with first
generation decoders; this brings the display format up to 40 characters by 25 rows. Rows 0 to 23 form the teletext page;
Row 24 is available for software generated status messages and FLOF/FASTEXT prompt information.
Fig.7 Basic page memory organization.
MBA274
7 characters
for status
8 characters
always rolling
(time)
fixed character
written by IVT hardware
alphanumerics white for normal
alphanumerics green when looking
for display page
71 824
24 characters from page header
rolling when display page looked for
5
to
20
0
1
2
3
4
ROW
21
22
23
24
25
MAIN PAGE DISPLAY AREA
PACKET X / 22
PACKET X / 23
PACKET X / 24 STORED HERE IF R0D7 = 1
10 14
10 bytes for
received
page information
14 bytes
free for use
by microcontroller
Fig.8 Organization of the extension memory.
MBA275 - 2
PACKET X / 24 if R0D7 = 0
PACKET X / 27 / 0
PACKETS 8 / 30 / 0 to 15
1
0
2
ROW
REMARK TO Fig.7
Row 0
Row 0 is for the page header. The first seven columns
(0 to 6) are free for status messages. The eighth is an
alphanumeric white or green control character, written
automatically by the SAA5254 to give a green rolling
header when a page is being looked for. The last eight
characters are for rolling time.
Row 25
The first 10 bytes of Row 25 contain control data relating
to the received page as shown in Table 5. The remaining
14 bytes are free for use by the microcontroller.
1996 Nov 07 15
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Table 5 Row 25 received control data format
ROW 25
D0 PU0 PT0 MU0 MT0 HU0 HT0 C7 C11 MAG0 0
D1 PU1 PT1 MU1 MT1 HU1 HT1 C8 C12 MAG1 0
D2 PU2 PT2 MU2 MT2 HU2 C5 C9 C13 MAG2 0
D3 PU3 PT3 MU3 C4 HU3 C6 C10 C14 0 0
D4 HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER FOUND 0
D5 0 0 0 0 0 0 0 0 0 PBLF
D60000000000
D70000000000
Column 0 1 2 3 4 5 6 7 8 9
Table 6 Page number and sub-code for Table 5
BIT NAME DESCRIPTION
Page number
MAG magazine
PU page units
PT page tens
PBLF page being looked for
FOUND LOW for page has been found
HAM.ER Hamming error in corresponding byte
Page sub-code
MU minutes units
MT minutes tens
HU hours units
HT hours tens
C4 to C14 transmitted control bits
Register maps
SAA5254 mode registers R0 to R11 are shown in Table 7.
R0 to R10 are WRITE only; R11 is READ/WRITE.
Register map (R3), for page requests, is shown in detail in
Table 9.
1996 Nov 07 16
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Table 7 Register map (notes 1 to 5)
REGISTER D7 D6 D5 D4 D3 D2 D1 D0
NAME No.
Advanced control 0 X/24 POS FREE RUN
PLL AUTO
ODD/EVEN DISABLE
HDR ROLL DISPLAY
STATUS
ROW ONLY
DISABLE
ODD/EVEN −R11/R11B
SELECT
Mode 1 VCS TO SCS 7 + P/ 8-BIT ACQ ON/OFF DISABLT
PKT 26 DEW/ FULL
FIELD TCS ON T1 T0
Page request
address 2−−−−TB START
COLUMN
SC2
START
COLUMN
SC1
START
COLUMN
SC0
Page request data 3 −−−PRD4 PRD3 PRD2 PRD1 PRD0
−−−−−−−−
Display control
(normal) 5 BKGND OUT BKGND IN COR OUT COR IN TEXT OUT TEXT IN PON OUT PON IN
Display control
(newsflash /subtitle) 6 BKGND OUT BKGND IN COR OUT COR IN TEXT OUT TEXT IN PON OUT PON IN
Display mode 7 STATUS TOP CURSOR ON REVEAL ON BOTTOM
HALF DOUBLE
HEIGHT BOX ON 24 BOX ON
1to23 BOX ON 0
−−−−−−−−
Cursor row 9 −CLEAR
MEMORY A0 R4 R3 R2 R1 R0
Cursor column 10 −−C5 C4 C3 C2 C1 C0
Cursor data 11 D7 D6 D5 D4 D3 D2 D1 D0
Device status 11B 625/525
SYNC ROM VER R4 ROM VER R3 ROM VER R2 ROM VER
R1 ROM
VER R0 TEXT
SIGNAL
QUALITY
VCS
SIGNAL
QUALITY
1996 Nov 07 17
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Notes to Table 7
1. The dash (−) indicates these bits are inactive and must be written to logic 0 for future compatibility.
2. All bits in Registers R0 to R13 are cleared to logic 0 on power-up except bits D0 and D1 of Registers R1, R5 and R6
which are set to logic 1.
3. All memory is cleared to space (00100000) on power-up, except Row 0 Column 7 Chapter 0, which is alpha white
(00000111) as the acquisition circuit is enabled but all pages are on hold.
4. TB must be set to logic 0 for normal operation.
5. The I2C-bus slave address is 00110001.
Table 8 Register description
REGISTER BIT D0 TO D7 FUNCTION
R0 AVANCED CONTROL - auto-increments to Register 1
R11/R11B SELECT Selects reading of R11 if LOW or if HIGH R11B.
DISABLE ODD/EVEN Forces ODD/EVEN output LOW when logic 1.
DISPLAY STATUS ROW When SET = 1 and R1D6 = 1 open (8-bit mode) then all the text display is blanked
out apart from the status row, this allows the page memory to be used for
non-textural data, such as in the German TOP system.
DISABLE HDR ROLL Disables green rolling header and time.
AUTO ODD/EVEN When SET forces ODD/EVEN LOW if any TV picture displayed, if DISABLE
ODD/EVEN = 0
FREE RUN PLL Will force the display PLL to free run in all conditions.
X/24 POS Automatic display of FASTEXT prompt row when logic 1.
R1 MODE - auto-increments to Register 2
T0, T1 Interlace/non-interlace 312/313 line control (see Table 10).
TCS ON Text composite sync or direct sync select (see Table 10 for FFB mode selection).
DEW/FULL FIELD Field-flyback or full-channel mode.
ACQ ON/OFF Acquisition circuits turned off when logic 1.
7 + P/8-BIT 7 bits with parity checking or 8-bit mode.
DISABLE PKT 26 Disable automatic processing of packet 26.
VCS TO SCS When logic 1 enables display of messages with 60 Hz input signal.
R2 PAGE REQUEST ADDRESS - auto-increments to Register 3
START COLUMN SC0 to SC2 Point to start column for page request data (see Table 9).
TB Must be logic 0 for normal operation.
R3 PAGE REQUEST DATA - does not auto-increment (see Table 9)
R5 NORMAL DISPLAY CONTROL - auto-increments to Register 6
R6 NEWSFLASH/SUBTITLE DISPLAY CONTROL - auto-increments to Register 7; note 1
PON Picture on.
TEXT Text on.
COR Contrast reduction on.
BKGND Background colour on.
1996 Nov 07 18
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Note
1. These functions have IN and OUT referring to inside and outside the boxing function respectively.
R7 DISPLAY MODE - does not auto-increment
BOX ON 0 Boxing function allowed on Row 0.
BOX ON 1 to 23 Boxing function allowed on Rows1 to 23.
BOX ON 24 Boxing function allowed on Row 24.
DOUBLE HEIGHT To display double height text.
BOTTOM HALF To select bottom half of page when DOUBLE HEIGHT = 1.
REVEAL ON To reveal concealed text.
CURSOR ON To display cursor.
STATUS TOP Row 25 displayed above or below the main text.
R9 CURSOR ROW - auto-increments to Register 10
R0 to R4 Active row for data written to or read from memory via the I2C-bus.
A0 Selects display memory page (when = 0) or extension memory (when = 1).
CLEAR MEM When set to logic 1, clears the display memory. This bit is automatically reset.
R10 CURSOR COLUMN - auto-increments to Register 11 or 11B
C0 to C5 Active column for data written to or read from memory via the I2C-bus.
R11 CURSOR DATA - does not auto-increment
D0 to D7 Data read from/written to memory via I2C-bus, at location pointed to by R9 and
R10. This location automatically increments each time R11 is accessed.
R11B DEVICE STATUS - does not auto-increment
VCS SIGNAL QUALITY Indicates that the video signal quality is good and PLL is phase-locked to input
video when logic 1.
TEXT SIGNAL QUALITY If a good teletext signal is being received then logic 1.
ROM VER R0 to R4 Indicated language/ROM variant. For Western European = 11000.
625/525 SYNC If the input video is a 525 line signal then logic 1.
REGISTER BIT D0 TO D7 FUNCTION
1996 Nov 07 19
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Table 9 Register map for page requests (R3)
Notes to Table 9
1. Abbreviations are as for Table 5 except for DO CARE bits.
2. When the DO CARE bit is set to logic 1 this means the corresponding digit is to be taken into account for page
requests. If the DO CARE bit is set to logic 0 the digit is ignored. This allows, for example, normal or timed page
selection.
3. If HOLD is set LOW, the page is held and not updated.
4. Columns auto-increment on successive I2C-bus transmission bytes.
5. X = Don't care.
Table 10 Interlace/non-interlace 312/313 line control and ODD/EVEN field detection option
Notes
1. X = don't care.
2. Reverts to interlaced mode if a newsflash or subtitle is being displayed.
START COLUMN PRD4 PRD3 PRD2 PRD1 PRD0
0 DO CARE
Magazine HOLD MAG2 MAG1 MAG0
1 DO CARE
Page tens PT3 PT2 PT1 PT0
2 DO CARE
Page units PU3 PU2 PU1 PU0
3 DO CARE
Hours tens X X HT1 HT0
4 DO CARE
Hours units HU3 HU2 HU1 HU0
5 DO CARE
Minutes tens X MT2 MT1 MT0
6 DO CARE
Minutes units MU3 MU2 MU1 MU0
TCS ON
FFB MODE(1) T1 T0 RESULT
X 0 0 interlaced 312.5/312.5 lines
X 0 1 non-interlaced 312/313 lines (note 2)
X 1 0 non-interlaced 312/313 lines (note 2)
0 1 1 SCS (scan composite sync) mode: FFB leading edge in first broad pulse of field
1 1 1 SCS (scan composite sync) mode: FFB leading edge in second broad pulse of field
1996 Nov 07 20
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
CLOCK SYSTEMS
Crystal oscillator
The crystal is a conventional 2-pin design operating at 27 MHz. It is capable of oscillating with both fundamental and third
overtone mode crystals. External components should be used to suppress the fundamental output of the third overtone,
as shown in Fig.9. The crystal characteristics are given in Table 11.
Table 11 Crystal characteristics (see Fig.9)
SYMBOL PARAMETER TYP. MAX. UNIT
Crystal (27 MHz, 3rd overtone)
C1 series capacitance 1.7 −pF
C0 parallel capacitance 5.2 −pF
CLload capacitance 20 −pF
Rrresonance resistance −50 Ω
R1 series resistance 20 −Ω
X
aageing −±5×10−6year−1
Xjadjustment tolerance −±25 ×10−6
Xddrift −±25 ×10−6
Fig.9 Crystal oscillator application diagram.
handbook, full pagewidth
3
2
SAA5254
MGD702
4
1
8.2 pF CRYSTAL
OSCILLATOR
100 nF15 pF
1 nF 3.3 µH
3.3 kΩOSCGND
OSCIN
OSCOUT
VDD1
27 MHz
3rd
overtone
1996 Nov 07 21
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
CHARACTER SETS
The WST specification allows the selection of national character sets via the page header transmission bits, C12 to C14.
The basic 96 character sets differ only in 13 national option characters as indicated in Tables 17, 18, 19 and 20 with
reference to their table position in the basic character matrix illustrated in Table 16. The SAA5254 automatically decodes
transmission bits C12 to C14. Tables 12, 13, 14 and 15 illustrates the character matrixes.
Fig.10 Character format.
handbook, full pagewidth
MLA663
alphanumerics and
graphics 'space'
character
0000010
alphanumerics
character
1011010
alphanumerics or
blast-through
alphanumerics
character
0001001
alphanumerics
character
1111111
contiguous
graphics character
1111111
separated
graphics character
1111111
separated
graphics character
0110111
contiguous
graphics character
0110111
background
colour display
colour
= =
1996 Nov 07 22
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Table 12 SAA5254P/E character data input decoding, West European languages; notes 1 to 9
For character version number (11000) see Register 11B.
handbook, full pagewidth
MBA429
normal
height
b4b3b2b1
b5
b6
b7
b8
0 1 22a3 3a4 5 66a77a8 912131415
column
r
o
w
B
I
T
S
0
0
0
0
0
0
0
1
0 or 1
01
0
0
01
1
0 or 1
01
1
0
01
1
0
10
0
0
10
1
1
00
0
1
00
1
1
10
0
1
10
1
1
11
0
1
11
1
0
1
1
0
0
1
1
1
141 1 1 0 SO hold
graphics
151 1 1 1 SI release
graphics
111 0 1 1 start box ESC
121 1 0 0 black
back -
ground
131 1 0 1 double
height
new
back -
ground
101 0 1 0 end box separated
graphics
91 0 0 1 steady contiguous
graphics
8
1 0 0 0 flash conceal
display
70 1 1 1 alpha -
numerics
white
graphics
white
60 1 1 0 alpha -
numerics
cyan graphics
cyan
5
0 1 0 1 alpha -
numerics
magenta
graphics
magenta
40 1 0 0 alpha -
numerics
blue graphics
blue
30 0 1 1 alpha -
numerics
yellow
graphics
yellow
2
0 0 1 0 alpha -
numerics
green
graphics
green
0
0 0 0 0 alpha -
numerics
black graphics
black
10 0 0 1 alpha -
numerics
red graphics
red
(2)
(2) (2)
(2)
(1)
(2) (2)
(1) (2)
(1)
1996 Nov 07 23
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Table 13 SAA5254P/H character data input decoding, East European languages; notes 1 to 9
For character version number (11001) see Register 11B.
handbook, full pagewidth
MLA961
normal
height
b4b3b2b1
b5
b6
b7
b8
0 1 22a3 3a4 5 66a77a8 912131415
column
r
o
w
B
I
T
S
0
0
0
0
0
0
0
1
0 or 1
01
0
0
01
0
0 or 1
01
1
0
01
1
0
10
0
0
10
1
1
00
0
1
00
1
1
10
0
1
10
1
1
11
0
1
11
1
0
1
1
0
0
1
1
1
141 1 1 0 SO hold
graphics
151 1 1 1 SI release
graphics
111 0 1 1 start box ESC
121 1 0 0 black
back -
ground
131 1 0 1 double
height
new
back -
ground
101 0 1 0 end box separated
graphics
91 0 0 1 steady contiguous
graphics
8
1 0 0 0 flash conceal
display
70 1 1 1 alpha -
numerics
white
graphics
white
60 1 1 0 alpha -
numerics
cyan graphics
cyan
5
0 1 0 1 alpha -
numerics
magenta
graphics
magenta
40 1 0 0 alpha -
numerics
blue graphics
blue
30 0 1 1 alpha -
numerics
yellow
graphics
yellow
2
0 0 1 0 alpha -
numerics
green
graphics
green
0
0 0 0 0 alpha -
numerics
black graphics
black
10 0 0 1 alpha -
numerics
red graphics
red
(2)
(2) (2)
(2)
(1)
(2) (2)
(1) (2)
(1)
1996 Nov 07 24
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Table 14 SAA5254P/T character data input decoding, West European and Turkish languages; notes 1 to 9
For character version number (11010) see Register 11B.
handbook, full pagewidth
MBA431
normal
height
b4b3b2b1
b5
b6
b7
b8
0 1 22a3 3a4 5 66a77a8 912131415
column
r
o
w
B
I
T
S
0
0
0
0
0
0
0
1
0 or 1
01
0
0
01
1
0 or 1
01
1
0
01
1
0
10
0
0
10
1
1
00
0
1
00
1
1
10
0
1
10
1
1
11
0
1
11
1
0
1
1
0
0
1
1
1
141 1 1 0 SO hold
graphics
151 1 1 1 SI release
graphics
111 0 1 1 start box ESC
121 1 0 0 black
back -
ground
131 1 0 1 double
height
new
back -
ground
101 0 1 0 end box separated
graphics
91 0 0 1 steady contiguous
graphics
8
1 0 0 0 flash conceal
display
70 1 1 1 alpha -
numerics
white
graphics
white
60 1 1 0 alpha -
numerics
cyan graphics
cyan
5
0 1 0 1 alpha -
numerics
magenta
graphics
magenta
40 1 0 0 alpha -
numerics
blue graphics
blue
30 0 1 1 alpha -
numerics
yellow
graphics
yellow
2
0 0 1 0 alpha -
numerics
green
graphics
green
0
0 0 0 0 alpha -
numerics
black graphics
black
10 0 0 1 alpha -
numerics
red graphics
red
(2)
(2) (2)
(2)
(1)
(2) (2)
(1) (2)
(1)
1996 Nov 07 25
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Table 15 SAA5254P/R character data input decoding, Baltic and Cyrillic languages; notes 1 to 9
For character version number (11101) see Register 11B.
handbook, full pagewidth
normal
height
b4b3b2b1
b5
b6
b7
b8
01 22a3 3a4 5 66a77a8 912131415
column
r
o
w
B
I
T
S
0
0
0
0
0
0
0
1
0 or 1
0
1
0
0
0
1
1
0 or 1
0
1
1
0
0
1
1
0
1
0
0
0
1
0
1
1
0
0
0
1
0
0
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
0
0
1
1
1
141 1 1 0 SO hold
graphics
151 1 1 1 SI release
graphics
111 0 1 1 start box TWIST
121 1 0 0 black
back -
ground
131 1 0 1 double
height
new
back -
ground
101 0 1 0 end box separated
graphics
91 0 0 1 steady contiguous
graphics
81 0 0 0 flash conceal
display
7
0 1 1 1 alpha -
numerics
white
graphics
white
60 1 1 0 alpha -
numerics
cyan graphics
cyan
5
0 1 0 1 alpha -
numerics
magenta
graphics
magenta
4
0 1 0 0 alpha -
numerics
blue graphics
blue
30 0 1 1 alpha -
numerics
yellow
graphics
yellow
20 0 1 0 alpha -
numerics
green
graphics
green
00 0 0 0 alpha -
numerics
black
graphics
black
1
0 0 0 1 alpha -
numerics
red
graphics
red
MBA648 - 1
(1)
(1)
(2)
(2)
(2)
(2) (2)
(2)
(2)
1996 Nov 07 26
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Notes to Tables 12, 13 14 and 15
1. These control characters are reserved for compatibility with other data codes.
2. These control characters are presumed before each row begins.
3. Control characters shown in Columns 0 and 1 are normally displayed as spaces.
4. Characters may be referred to by column and row (for example 2/5 refers to %).
5. Black represents displayed colour. White represents background.
6. The SAA5254 national option characters are illustrated in Tables 17, 18, 19 and 20.
7. Characters 8/6, 8/7, 9/5, 9/6 and 9/7 are special characters for combining with character 8/5 (E, H and T codes only).
8. National option characters will be displayed according to the setting of control bits C12 to C14. These will be mapped
into the basic code table into positions shown in Tables 17, 18, 19 and 20.
9. Columns 2a, 3a, 6a and 7a are displayed in graphics mode.
1996 Nov 07 27
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Table 16 SAA5254 basic character matrix; note 1
Note to Table 16
1. Where: NC = national option character position.
f
ull pagewidth
MLA630
2/1
2/0 2/8 3/0 3/8 4/0 4/8 5/0 5/8 7/86/8 7/0
NC
6/0
NC
2/9 3/1 3/9 4/1 4/9 5/1 5/9 6/1 6/9 7/1 7/9
2/2 2/10 3/2 3/10 4/2 4/10 5/2 5/10 6/2 6/10 7/2 7/10
2/11 3/3 3/11 4/3 4/11 5/3 6/3 6/11 7/3
2/12 3/4 3/12 4/4 4/12 5/4 6/4 6/12 7/4
2/5 2/13 3/5 3/13 4/5 4/13 5/5 6/5 6/13 7/5
2/6 2/14 3/6 3/14 4/6 4/14 5/6 6/6 7/6
2/7 2/15 3/7 3/15 4/7 4/15 5/7 6/7 6/15 7/7 7/15
2/3
NC
5/11
NC
5/12
NC
5/13
NC
5/14
NC
5/15
NC
7/11
NC
7/12
NC
7/13
NC
7/14
NC
2/4
NC
1996 Nov 07 28
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Table 17 SAA5254P/E national option character set
Table 18 SAA5254P/H national option character set
h
andbook, full pagewidth
MLB458
LANGUAGE C12 C13 C14
PHCB
000
001
010
011
100
FRENCH
ITALIAN
SWEDISH
GERMAN
ENGLISH
2 / 3 2 / 4 4 / 0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6 / 0 7 / 11 7 / 12 7 / 13 7 / 14
CHARACTER POSITION (COLUMN / ROW)
SPANISH 101
(1)
(1) PHCB are the Page Header Control Bits. Other combinations default to English.
handbook, full pagewidth
MLA966
LANGUAGE C12 C13 C14
PHCB
(1)
000
001
010
101
110
111
RUMANIAN
CZECHOSLOVAKIA
SERBO-CROAT
SWEDISH
GERMAN
POLISH
2 / 3 2 / 4 4 / 0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6 / 0 7 / 11 7 / 12 7 / 13 7 / 14
CHARACTER POSITION (COLUMN / ROW)
(1) PHCB are the Page Header Control Bits. Other combinations default to German. Only the above characters change with the PHCB. All other
characters in the basic set are shown in Table 16.
1996 Nov 07 29
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Table 19 SAA5254P/T national option character set
a
ndbook, full pagewidth
MBA430
LANGUAGE C12 C13 C14
PHCB (1)
000
001
110
011
100
101
SPANISH
FRENCH
ITALIAN
TURKISH
GERMAN
ENGLISH
2 / 3 2 / 4 4 / 0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6 / 0 7 / 11 7 / 12 7 / 13 7 / 14
CHARACTER POSITION (COLUMN / ROW)
(1) PHCB are the Page Header Control Bits. Other combinations default to English. Only the above characters change with the PHCB. All other
characters in the basic set are shown in Table 16.
1996 Nov 07 30
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
Table 20 SAA5254P/R national option character set
handbook, full pagewidth
LANGUAGE C12 C13 C14
PHCB (1)
010
011
100
RUSSIAN
LETTISH /
LITHUANIAN
ESTONIAN
2 / 3 2 / 4 4 / 0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6 / 0 7 / 11 7 / 12 7 / 13 7 / 14
CHARACTER POSITION (COLUMN / ROW)
MEA597
234567
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
(1) PHCB are the Page Header Control Bits. Other combinations default to Estonian.
1996 Nov 07 31
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
APPLICATION INFORMATION
Fig.11 Application diagram; SOT129 (DIP40).
(1) Value dependent on application.
MLB210
ODD/EVEN
COR
2.7 k Ω2.7 k Ω
Y
i.c.
VDD VDD
R
G
B
BLAN
R9
R10
LK2 LK1
CVBS 100 nF
R17 27 k Ω
C7 100 nF
100 nF
VDD
VDD2
C8
100 nF
OSCOUT
OSCIN
VDD1
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20 21
22
23
24
25
25
27
28
29
30
31
32
33
34
35
36
37
38
39
40
SAA5254
VDDD
SDA
SCL
VSS3
VSS (1) RGBREF
STTV/LFB
POL
VCR/FFB
VSS2
(1)
(1)
IREF
BLACK
OSCGND
REF
VSS
VSS VSS
VSS1
3
2
4
1
8.2 pF 100 nF15 pF
X1
27 MHz, 3rd Overtone
1 nF 3.3 µH
R1
3.3 k Ω
C1C2C3
L1
C4
1996 Nov 07 32
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
PACKAGE OUTLINE
UNIT A
max. 1 2 b1cD E e M
H
L
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
mm
inches
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
SOT129-1 92-11-17
95-01-14
A
min. A
max. bZ
max.
w
ME
e1
1.70
1.14 0.53
0.38 0.36
0.23 52.50
51.50 14.1
13.7 3.60
3.05 0.2542.54 15.24 15.80
15.24 17.42
15.90 2.254.7 0.51 4.0
0.067
0.045 0.021
0.015 0.014
0.009 2.067
2.028 0.56
0.54 0.14
0.12 0.010.10 0.60 0.62
0.60 0.69
0.63 0.089 0.19 0.020 0.16
051G08 MO-015AJ
MH
c
(e )
1
ME
A
L
seating plane
A1
wM
b1
e
D
A2
Z
40
1
21
20
b
E
pin 1 index
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
(1)
(1)(1)
DIP40: plastic dual in-line package; 40 leads (600 mil) SOT129-1
1996 Nov 07 33
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
“IC Package Databook”
(order code 9398 652 90011).
Soldering by dipping or by wave
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
Repairing soldered joints
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
1996 Nov 07 34
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
DEFINITIONS
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I2C COMPONENTS
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1996 Nov 07 35
Philips Semiconductors Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X) SAA5254
NOTES
Internet: http://www.semiconductors.philips.com
Philips Semiconductors – a worldwide company
© Philips Electronics N.V. 1996 SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
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Tel. +64 9 849 4160, Fax. +64 9 849 7811
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Tel. +47 22 74 8000, Fax. +47 22 74 8341
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Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
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Romania: see Italy
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Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 632 2000, Fax. +46 8 632 2745
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2686, Fax. +41 1 481 7730
Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66,
Chung Hsiao West Road, Sec. 1, P.O. Box 22978,
TAIPEI 100, Tel. +886 2 382 4443, Fax. +886 2 382 4444
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
Tel. +61 2 9805 4455, Fax. +61 2 9805 4466
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,
Tel. +43 1 60 101, Fax. +43 1 60 101 1210
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,
220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773
Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
51 James Bourchier Blvd., 1407 SOFIA,
Tel. +359 2 689 211, Fax. +359 2 689 102
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. +852 2319 7888, Fax. +852 2319 7700
Colombia: see South America
Czech Republic: see Austria
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,
Tel. +45 32 88 2636, Fax. +45 31 57 1949
Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. +358 9 615800, Fax. +358 9 61580/xxx
France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex,
Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,
Tel. +49 40 23 53 60, Fax. +49 40 23 536 300
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,
Tel. +30 1 4894 339/239, Fax. +30 1 4814 240
Hungary: see Austria
India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd.
Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722
Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180,
Tel. +972 3 645 0444, Fax. +972 3 649 1007
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,
Tel. +81 3 3740 5130, Fax. +81 3 3740 5077
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381
Middle East: see Italy
Printed in The Netherlands 537021/00/02/pp36 Date of release: 1996 Nov 07 Document order number: 9397 750 01015
