4 Ω RON, 4-/8-Channel
±15 V/+12 V/±5 V iCMOS Multiplexers
Enhanced Product ADG1408-EP/ADG1409-EP
Rev. B Document Feedback
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FEATURES
4.7 Ω maximum on resistance @ 25°C
0.5 Ω on resistance flatness
Up to 190 mA continuous current
Fully specified at ±15 V/+12 V/±5 V
3 V logic-compatible inputs
Rail-to-rail operation
Break-before-make switching action
16-lead TSSOP
ENHANCED PRODUCT FEATURES
Supports defense and aerospace applications
(AQEC standard)
Military temperature range: −55°C to +125°C
Controlled manufacturing baseline
One assembly and test site
One fabrication site
Enhanced product change notification
Qualification data available on request
FUNCTIONAL BLOCK DIAGRAM
ADG1408-EP
S1
S8
D
ADG1409-EP
S1A
S4B
DA
DB
S4A
S1B
1-OF-4
DECODER
1-OF-8
DECODER
A0 A1 ENA0 A1 A2 EN
09248-001
Figure 1.
GENERAL DESCRIPTION
The ADG1408-EP/ADG1409-EP are monolithic iCMOS® analog
multiplexers comprising eight single channels and four
differential channels, respectively. The ADG1408-EP switches
one of eight inputs to a common output, as determined by the
3-bit binary address lines, A0, A1, and A2. The ADG1409-EP
switches one of four differential inputs to a common differential
output, as determined by the 2-bit binary address lines, A0 and
A1. An EN input on both devices is used to enable or disable
the device. When disabled, all channels are switched off.
The iCMOS (industrial CMOS) modular manufacturing process
combines high voltage CMOS (complementary metal-oxide
semiconductor) and bipolar technologies. It enables the devel-
opment of a wide range of high performance analog ICs capable
of 33 V operation in a footprint that no other generation of high
voltage parts has been able to achieve. Unlike analog ICs using
conventional CMOS processes, iCMOS components can tolerate
high supply voltages while providing increased performance,
dramatically lower power consumption, and reduced package size.
The ultralow on resistance and on resistance flatness of these
switches make them ideal solutions for data acquisition and
gain switching applications where low distortion is critical.
iCMOS construction ensures ultralow power dissipation,
making the parts ideally suited for portable and battery-
powered instruments.
Full details about this enhanced product are available in the
ADG1408/ADG1409 data sheet, which should be consulted in
conjunction with this data sheet.
PRODUCT HIGHLIGHTS
1. 4 Ω on resistance
2. 0.5 Ω on resistance flatness
3. 3 V logic-compatible digital input, VINH = 2.0 V, VINL = 0.8 V
4. 16-lead TSSOP package
ADG1408-EP/ADG1409-EP Enhanced Product
Rev. B | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Enhanced Product Features ............................................................ 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
15 V Dual Supply .......................................................................... 3
12 V Single Supply ........................................................................ 5
5 V Dual Supply .............................................................................7
Continuous Current per Channel, S or D ..................................8
Absolute Maximum Ratings ............................................................9
ESD Caution...................................................................................9
Pin Configurations and Function Descriptions ......................... 10
Typical Performance Characteristics ........................................... 12
Test Circuits ..................................................................................... 14
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 16
REVISION HISTORY
11/2017—Rev. A to Rev. B
Changes to Ordering Guide .......................................................... 16
8/2017—Rev. 0 to Rev. A
Changes to Table 6 .......................................................................... 10
Changes to Table 7 .......................................................................... 11
3/2011—Revision 0: Initial Version
Enhanced Product ADG1408-EP/ADG1409-EP
Rev. B | Page 3 of 16
SPECIFICATIONS
15 V DUAL SUPPLY
VDD = +15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter +25°C
−55°C to
+125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range VSS to VDD V
On Resistance (RON) 4 Ω typ VS = ±10 V, IS = −10 mA; see Figure 12
4.7 6.7 Ω max VDD = +13.5 V, VSS = −13.5 V
On Resistance Match Between 0.2 Ω typ VS = ±10 V, IS = −10 mA
Channels (ΔRON) 0.78 1.1 Ω max
On Resistance Flatness (RFL AT(ON) ) 0.5 Ω typ VS = ±10 V, IS = −10 mA
0.72 0.92 Ω max
LEAKAGE CURRENTS VDD = +16.5 V, VSS = −16.5 V
Source Off Leakage, I
S
(Off )
±0.04
nA typ
VS = ±10 V, VD =
∓
10 V; see Figure 13
±0.2 ±5 nA max
Drain Off Leakage, ID (Off ) ±0.04 nA typ VS = ±10 V, VD =
∓
10 V; see Figure 13
±0.45 ±30 nA max
Channel On Leakage, ID, IS (On) ±0.1 nA typ VS = VD = ±10 V; see Figure 14
±1.5 ±30 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current ±0.005 µA typ VIN = VGND or VDD
±0.1 µA max
Digital Input Capacitance, CIN 4 pF typ
DYNAMIC CHARACTERISTICS1
Transition Time, tTRANSITION 140 ns typ RL = 100 Ω, CL = 35 pF
170 240 ns max VS = 10 V, see Figure 15
Break-Before-Make Time Delay, tBBM 50 ns typ RL = 100 Ω, CL = 35 pF
19
ns min
V
S1
= V
S2
= 10 V; see Figure 16
tON (EN) 100 ns typ RL = 100 Ω, CL = 35 pF
120 165 ns max VS = 10 V; see Figure 17
tOFF (EN) 100 ns typ RL = 100 Ω, CL = 35 pF
120 170 ns max VS = 10 V; see Figure 17
Charge Injection −50 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 18
Off Isolation −70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 19
Channel-to-Channel Crosstalk −70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 20
Total Harmonic Distortion, THD + N 0.025 % typ RL = 110 Ω, 15 V p-p, f = 20 Hz to 20 kHz;
see Figure 22
−3 dB Bandwidth RL = 50 Ω, CL = 5 pF; see Figure 21
ADG1408-EP
60
MHz typ
ADG1409-EP 115 MHz typ
Insertion Loss 0.24 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 21
CS (Off ) 14 pF typ f = 1 MHz
CD (Off )
ADG1408-EP
80
pF typ
f = 1 MHz
ADG1409-EP 40 pF typ f = 1 MHz
CD, CS (On)
ADG1408-EP 135 pF typ f = 1 MHz
ADG1409-EP 90 pF typ f = 1 MHz
ADG1408-EP/ADG1409-EP Enhanced Product
Rev. B | Page 4 of 16
Parameter +25°C
−55°C to
+125°C Unit Test Conditions/Comments
POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V
IDD 0.002 µA typ Digital inputs = 0 V or VDD
1 µA max
220 µA typ Digital inputs = 5 V
420 µA max
ISS 0.002 µA typ Digital inputs = 0 V, 5 V or VDD
1 µA max
VDD/VSS ±4.5/±16.5 V min/max
1 Guaranteed by design, not subject to production test.
Enhanced Product ADG1408-EP/ADG1409-EP
Rev. B | Page 5 of 16
12 V SINGLE SUPPLY
VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter +25°C
−55°C to
+125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 to VDD V
On Resistance (RON) 6 Ω typ VS = 0 V to 10 V, IS = −10 mA; see Figure 12
8
11.2
Ω max
DD
SS
On Resistance Match 0.2 Ω typ VS = 0 V to 10 V, IS = −10 mA
Between Channels (ΔRON) 0.82 1.1 Ω max
On Resistance Flatness (RFL AT(ON) ) 1.5 Ω typ VS = 0 V to 10 V, IS = −10 mA
2.5 2.8 Ω max
LEAKAGE CURRENTS VDD = 13.2 V
Source Off Leakage, IS (Off ) ±0.04 nA typ VS = 1 V/10 V, VD = 10 V/1 V; see Figure 13
±0.2 ±5 nA max
Drain Off Leakage, ID (Off ) ±0.04 nA typ VS = 1 V/10 V, VD = 10 V/1 V; see Figure 13
±0.45 ±37 nA max
Channel On Leakage, ID, IS (On) ±0.06 nA typ VS = VD = 1 V or 10 V; see Figure 14
±0.44 ±32 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current ±0.005 µA typ VIN = VGND or VDD
±0.1
µA max
Digital Input Capacitance, C
IN
5
pF typ
DYNAMIC CHARACTERISTICS1
Transition Time, tTRANSITION 200 ns typ RL = 100 Ω, CL = 35 pF
260 380 ns max VS = 8 V; see Figure 15
Break-Before-Make Time Delay, tBBM 90 ns typ RL = 100 Ω, CL = 35 pF
40 ns min VS1 = VS2 = 8 V; see Figure 16
tON (EN) 160 ns typ RL = 100 Ω, CL = 35 pF
210 285 ns max VS = 8 V; see Figure 17
t
OFF
(EN)
115
ns typ
L
L
145 200 ns max VS = 8 V; see Figure 17
Charge Injection −12 pC typ VS = 6 V, RS = 0 Ω, CL = 1 nF; see Figure 18
Off Isolation −70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 19
Channel-to-Channel Crosstalk −70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 20
−3 dB Bandwidth
L
L
ADG1408-EP
36
MHz typ
ADG1409-EP 72 MHz typ
Insertion Loss 0.5 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 21
CS (Off ) 25 pF typ f = 1 MHz
CD (Off )
ADG1408-EP 165 pF typ f = 1 MHz
ADG1409-EP 80 pF typ f = 1 MHz
CD, CS (On)
ADG1408-EP 200 pF typ f = 1 MHz
ADG1409-EP 120 pF typ f = 1 MHz
ADG1408-EP/ADG1409-EP Enhanced Product
Rev. B | Page 6 of 16
Parameter +25°C
−55°C to
+125°C Unit Test Conditions/Comments
POWER REQUIREMENTS VDD = 13.2 V
IDD 0.002 µA typ Digital inputs = 0 V or VDD
1 µA max
220 µA typ Digital inputs = 5 V
420 µA max
VDD 5/16.5 V min/max VSS = 0 V, GND = 0 V
1 Guaranteed by design, not subject to production test.
Enhanced Product ADG1408-EP/ADG1409-EP
Rev. B | Page 7 of 16
5 V DUAL SUPPLY
VDD = +5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 3.
Parameter +25°C
−55°C to
+125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range VSS to VDD V
On Resistance (RON) 7 Ω typ VS = ±4.5 V, IS = −10 mA; see Figure 12
9
12
Ω max
V
DD
= +4.5 V, V
SS
= −4.5 V
On Resistance Match Between 0.3 Ω typ VS = ±4.5 V, IS = −10 mA
Channels (ΔRON) 0.78 1.1 Ω max
On Resistance Flatness (RFL AT(ON) ) 1.5 Ω typ VS = ±4.5 V; IS = −10 mA
2.5 3 Ω max
LEAKAGE CURRENTS VDD = +5.5 V, VSS = −5.5 V
Source Off Leakage, IS (Off) ±0.02 nA typ VS = ±4.5 V, VD =
∓
4.5 V; see Figure 13
±0.2 ±5 nA max
Drain Off Leakage, ID (Off ) ±0.02 nA typ VS = ±4.5 V, VD =
∓
4.5 V; see Figure 13
±0.45 ±20 nA max
Channel On Leakage, ID, IS (On) ±0.04 nA typ VS = VD = ±4.5 V; see Figure 14
±0.3 ±22 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current ±0.005 µA typ VIN = VGND or VDD
±0.1 µA max
Digital Input Capacitance, CIN 5 pF typ
DYNAMIC CHARACTERISTICS1
Transition Time, tTRANSITION 330 ns typ RL = 100 Ω, CL = 35 pF
440 550 ns max VS = 5 V; see Figure 15
Break-Before-Make Time Delay, tBBM 100 ns typ RL = 100 Ω, CL = 35 pF
45 ns min VS1 = VS2 = 5 V; see Figure 16
tON (EN) 245 ns typ RL = 100 Ω, CL = 35 pF
330
440
ns max
V
S
= 5 V; see Figure 17
tOFF (EN) 215 ns typ RL = 100 Ω, CL = 35 pF
285 370 ns max VS = 5 V; see Figure 17
Charge Injection –10 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 18
Off Isolation –70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 19
Channel-to-Channel Crosstalk –70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 20
Total Harmonic Distortion, THD + N 0.06 % typ RL = 110 Ω, 5 V p-p, f = 20 Hz to 20 kHz;
see Figure 22
−3 dB Bandwidth RL = 50 Ω, CL = 5 pF; see Figure 21
ADG1408-EP 40 MHz typ
ADG1409-EP
80
MHz typ
Insertion Loss 0.5 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 21
CS (Off ) 20 pF typ f = 1 MHz
CD (Off )
ADG1408-EP 130 pF typ f = 1 MHz
ADG1409-EP 65 pF typ f = 1 MHz
CD, CS (On)
ADG1408-EP 180 pF typ f = 1 MHz
ADG1409-EP 120 pF typ f = 1 MHz
ADG1408-EP/ADG1409-EP Enhanced Product
Rev. B | Page 8 of 16
Parameter +25°C
−55°C to
+125°C Unit Test Conditions/Comments
POWER REQUIREMENTS VDD = +5.5 V, VSS = −5.5 V
IDD 0.001 µA typ Digital inputs = 0 V or VDD
1 µA max
ISS 0.001 µA typ Digital inputs = 0 V, 5 V or VDD
1 µA max
VDD/VSS ±4.5/±16.5 V min/max
1 Guaranteed by design, not subject to production test.
CONTINUOUS CURRENT PER CHANNEL, S OR D
Table 4.
Parameter 25°C 85°C 125°C Unit Test Conditions/Comments
CONTINUOUS CURRENT, S or D1
15 V Dual Supply VDD = +13.5 V, VSS = −13.5 V
ADG1408-EP 190 105 50 mA max
ADG1409-EP 140 85 45 mA max
12 V Single Supply VDD = 10.8 V, VSS = 0 V
ADG1408-EP 160 95 50 mA max
ADG1409-EP 120 75 40 mA max
5 V Dual Supply VDD = +4.5 V, VSS = −4.5 V
ADG1408-EP 155 90 45 mA max
ADG1409-EP 115 70 40 mA max
1 Guaranteed by design, not subject to production test.
Enhanced Product ADG1408-EP/ADG1409-EP
Rev. B | Page 9 of 16
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 5.
Parameter Rating
VDD to VSS 35 V
VDD to GND −0.3 V to +25 V
VSS to GND +0.3 V to −25 V
Analog Inputs, Digital Inputs1 VSS − 0.3 V to VDD + 0.3 V
or 30 mA, whichever
occurs first
Continuous Current, S or D Table 4 data + 10%
Peak Current, S or D (Pulsed at 1 ms,
10% Duty Cycle Maximum)
350 mA
Operating Temperature Range −55°C to +125°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
θJA 150.4°C/W
θJC 50°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
1 Overvoltages at A, EN, S, or D are clamped by internal diodes. Current should
be limited to the maximum ratings given.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Only one absolute maximum rating can be applied at any
one time.
ESD CAUTION
ADG1408-EP/ADG1409-EP Enhanced Product
Rev. B | Page 10 of 16
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
EN
V
SS
S1
S4
S3
S2
A0
A2
GND
V
DD
S7
DS8
S6
S5
A1
ADG1408-EP
TOP VIEW
(Not to Scale)
09248-002
Figure 2. ADG1408-EP Pin Configuration
Table 6. ADG1408-EP Pin Function Descriptions
Pin No. Mnemonic Description
1 A0 Logic Control Input.
2 EN Active High Digital Input. When low, the device is disabled and all switches are off. When high,
Ax logic inputs determine on switches.
3 VSS Most Negative Power Supply Potential. In single supply applications, it can be connected
to ground.
4 S1 Source Terminal 1. Can be an input or an output.
5 S2 Source Terminal 2. Can be an input or an output.
6 S3 Source Terminal 3. Can be an input or an output.
7 S4 Source Terminal 4. Can be an input or an output.
8 D Drain Terminal. Can be an input or an output.
9 S8 Source Terminal 8. Can be an input or an output.
10 S7 Source Terminal 7. Can be an input or an output.
11 S6 Source Terminal 6. Can be an input or an output.
12 S5 Source Terminal 5. Can be an input or an output.
13 VDD Most Positive Power Supply Potential.
14 GND Ground (0 V) Reference.
15 A2 Logic Control Input.
16 A1 Logic Control Input.
Table 7. ADG1408-EP Truth Table
A2 A1 A0 EN On Switch
X X X 0 None
0 0 0 1 1
0 0 1 1 2
0 1 0 1 3
0 1 1 1 4
1 0 0 1 5
1 0 1 1 6
1 1 0 1 7
1 1 1 1 8
Enhanced Product ADG1408-EP/ADG1409-EP
Rev. B | Page 11 of 16
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
EN
V
SS
S1A
S4A
S3A
S2A
A0
GND
V
DD
S1B
S4B
DA DB
S3B
S2B
A1
ADG1409-EP
TOP VIEW
(Not to Scale)
09248-003
Figure 3. ADG1409-EP Pin Configuration (TSSOP)
Table 8. ADG1409-EP Pin Function Descriptions
Pin No. Mnemonic Description
1 A0 Logic Control Input.
2 EN Active High Digital Input. When low, the device is disabled and all switches are off. When high,
Ax logic inputs determine on switches.
3 VSS Most Negative Power Supply Potential. In single supply applications, it can be connected
to ground.
4 S1A Source Terminal 1A. Can be an input or an output.
5 S2A Source Terminal 2A. Can be an input or an output.
6 S3A Source Terminal 3A. Can be an input or an output.
7 S4A Source Terminal 4A. Can be an input or an output.
8 DA Drain Terminal A. Can be an input or an output.
9 DB Drain Terminal B. Can be an input or an output.
10 S4B Source Terminal 4B. Can be an input or an output.
11 S3B Source Terminal 3B. Can be an input or an output.
12 S2B Source Terminal 2B. Can be an input or an output.
13 S1B Source Terminal 1B. Can be an input or an output.
14 VDD Most Positive Power Supply Potential.
15 GND Ground (0 V) Reference.
16 A1 Logic Control Input.
Table 9. ADG1409-EP Truth Table
A1 A0 EN On Switch Pair
X X 0 None
0 0 1 1
0 1 1 2
1 0 1 3
1 1 1 4
ADG1408-EP/ADG1409-EP Enhanced Product
Rev. B | Page 12 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
8
0
1
2
3
4
5
6
7
–15 –10 –5 0 5 10 15
ON RESISTANCE (Ω)
SOURCE OR DRAIN VOLTAGE (V)
V
DD
= +15V
V
SS
= –15V
+125°C
+85°C
+25°C
–40°C
–55°C
09248-004
Figure 4. On Resistance vs. VD, VS for Different Temperatures;
15 V Dual Supply
12
0
2
4
6
8
10
–5–4–3–2–1012345
ON RESISTANCE (Ω)
SOURCE OR DRAIN VOLTAGE (V)
V
DD
= +5V
V
SS
= –5V
+125°C
+85°C
+25°C
–40°C
–55°C
09248-005
Figure 5. On Resistance vs. VD, VS for Different Temperatures;
5 V Dual Supply
10
9
8
7
6
5
4
3
2
1
0
024681012
ON RESISTANCE (Ω)
SOURCE OR DRAIN VOLTAGE (V)
V
DD
= 12V
V
SS
= 0V
+125°C
+85°C
+25°C
–40°C
–55°C
09248-006
Figure 6. On Resistance vs. VD, VS for Different Temperatures;
12 V Single Supply
450
400
350
300
250
200
150
100
50
0
–55 –35 –15 5 25 45 65 85 105 125
TIME (ns)
TEMPERATURE (°C)
V
DD
= +5V
V
SS
= –5V
V
DD
= +12V
V
SS
= 0V
V
DD
= +15V
V
SS
= –15V
09248-007
Figure 7. Transition Time vs. Temperature
1.0
–1.0
0
TEMPERATURE (°C)
LEAKAGE CURRENT (nA)
09248-011
80
I
S
(OFF) +–
I
D
(OFF) +–
I
S
(OFF) –+
I
D
(OFF) –+
I
D,
I
S
(ON) ++
I
D,
I
S
(ON) ––
V
DD
= +15V
V
SS
= –15V
V
BIAS
= +10V/–10V
0.8
0.6
0
0.2
0.4
–0.2
–0.4
–0.6
–0.8
10 20 30 40 50 60 70
Figure 8. Leakage Current vs. Temperature;
15 V Dual Supply
14
–4
0
TEMPERATURE (°C)
LEAKAGE CURRENT (nA)
09248-012
120
I
S
(OFF) +–
I
D
(OFF) +–
I
S
(OFF) –+
I
D
(OFF) –+
I
D,
I
S
(ON) ++
I
D,
I
S
(ON) ––
V
DD
= +15V
V
SS
= –15V
V
BIAS
= +10V/–10V
8
10
12
4
6
2
0
–2
20 40 60 80 100
Figure 9. Leakage Current vs. Temperature;
15 V Dual Supply
Enhanced Product ADG1408-EP/ADG1409-EP
Rev. B | Page 13 of 16
10
–1
0
TEMPERATURE (°C)
LEAKAGE CURRENT (nA)
09248-015
120
I
S
(OFF) +–
I
D
(OFF) +–
I
S
(OFF) –+
I
D
(OFF) –+
I
D,
I
S
(ON) ++
I
D,
I
S
(ON) ––
V
DD
= +5V
V
SS
= –5V
V
BIAS
= +4.5V/–4.5V
9
8
7
4
5
6
3
2
1
0
20 40 60 80 100
Figure 10. Leakage Current vs. Temperature;
5 V Dual Supply
18
16
–2
0
TEMPERATURE (°C)
LEAKAGE CURRENT (nA)
09248-013
120
I
S
(OFF) +–
I
D
(OFF) +–
I
S
(OFF) –+
I
D
(OFF) –+
I
D,
I
S
(ON) ++
I
D,
I
S
(ON) ––
V
DD
= 12V
V
SS
= 0V
V
BIAS
= 1V/10V
10
12
14
6
8
4
2
0
20 40 60 80 100
Figure 11. Leakage Current vs. Temperature;
12 V Single Supply
ADG1408-EP/ADG1409-EP Enhanced Product
Rev. B | Page 14 of 16
TEST CIRCUITS
I
DS
SD
V
S
V
09248-020
Figure 12. On Resistance
SD
V
S
A A
V
D
I
S
(OFF) I
D
(OFF)
09248-021
Figure 13. Off Leakage
SD
A
VD
ID(ON)
NC
NC = NO CONNECT
09248-022
Figure 14. On Leakage
3V
0V
OUTPUT
tr
< 20ns
tf
< 20ns
ADDRESS
DRIVE (V
IN
)
tTRANSITION tTRANSITION
50% 50%
90%
90%
OUTPUT
ADG1408-EP
1
A0
A1
A2
50Ω
100Ω
GND
S1
S2 TO S7
S8
D
35pF
V
IN
2.4V EN
V
DD
V
SS
V
DD
V
SS
V
S1
V
S8
1
SIMILAR CONNECTION FOR ADG1409-EP.
09248-023
Figure 15. Address to Output Switching Times, tTRANSITION
OUTPUT
ADG1408-EP
1
A0
A1
A2
50Ω
100Ω
GND
S1
S2 TO S7
S8
D
35pF
V
IN
2.4V EN
V
DD
V
SS
V
DD
V
SS
V
S
1
SIMILAR CONNECTION FOR ADG1409-EP.
3V
0V
OUTPUT
80% 80%
A
DDRESS
DRIVE (V
IN
)
tBBM
09248-024
Figure 16. Break-Before-Make Delay, tBBM
OUTPUT
ADG1408-EP
1
A0
A1
A2
50Ω100Ω
GND
S1
S2 TO S8
D
35pF
V
IN
EN
V
DD
V
SS
V
DD
V
SS
V
S
1
SIMILAR CONNECTION FOR ADG1409-EP.
3V
0V
OUTPUT
50% 50%
t
OFF
(EN)
t
ON
(EN)
0.9V
O
0.9V
O
ENABLE
DRIVE (V
IN
)
09248-025
Figure 17. Enable Delay, tON (EN), tOFF (EN)
Enhanced Product ADG1408-EP/ADG1409-EP
Rev. B | Page 15 of 16
3V
VIN
VOUT
QINJ = CL × ΔVOUT
ΔVOUT DS
EN
GND CL
1nF
VOUT
VIN
RS
VS
VDD VSS
VDD VSS
A0
A1
A2
ADG1408-EP
1
1SIM IL AR CONNECTION F OR ADG1409- E P .
09248-026
Figure 18. Charge Injection
VOUT
50Ω
NETWORK
ANALYZER
RL
50Ω
S
D
50Ω
OFF ISOLATION = 20 log VOUT
VS
VS
VDD VSS
0.1µFVDD 0.1µF
VSS
GND
09248-027
Figure 19. Off Isolation
CHANNEL-TO-CHANNE L CROS S TAL K = 20 log V
OUT
GND
S1
D
S2
V
OUT
NETWORK
ANALYZER
R
L
50Ω
R
50Ω
V
S
V
S
V
DD
V
SS
0.1µFV
DD
0.1µF
V
SS
09248-028
Figure 20. Channel-to-Channel Crosstalk
VOUT
50Ω
NETWORK
ANALYZER
RL
50Ω
S
D
INSERTION LOSS = 20 log VOUT WITH SWITCH
VOUT WITHOUT SWITCH
VS
VDD VSS
0.1µFVDD 0.1µF
VSS
GND
09248-029
Figure 21. Insertion Loss
V
OUT
R
S
AUDIO P RE CISION
R
L
10kΩ
IN
V
IN
S
D
V
S
V p-p
V
DD
V
SS
0.1µFVDD 0.1µF
VSS
GND
09248-030
Figure 22. THD + Noise
ADG1408-EP/ADG1409-EP Enhanced Product
Rev. B | Page 16 of 16
OUTLINE DIMENSIONS
16 9
81
PIN 1
SEATING
PLANE
8°
0°
4.50
4.40
4.30
6.40
BSC
5.10
5.00
4.90
0.65
BSC
0.15
0.05
1.20
MAX 0.20
0.09 0.75
0.60
0.45
0.30
0.19
COPLANARITY
0.10
COM PLI ANT T O JEDEC S TANDARDS M O-153-AB
Figure 23. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
ORDERING GUIDE
Model1Temperature Range Package Description Package Option
ADG1408SRUZ-EP
−55°C to +125°C
16-Lead Thin Shrink Small Outline Package [TSSOP]
RU-16
ADG1408SRUZ-EP-RL7 −55°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG1408SRU-EP −55°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG1408SRU-EP-RL7 −55°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG1409SRUZ-EP −55°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG1409SRUZ-EP-RL7 −55°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG1409SRU-EP −55°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG1409SRU-EP-RL7 −55°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
1 Z = RoHS Compliant Part.
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D09248-0-11/17(B)