Oe lhe) APEX MICROTECHNOLOGY CORPORATION APPLICATIONS HOLIINE 800 546-APEX (800.546 Cari oe FEATURES POWER MOS TECHNOLOGY 2A peak rating HIGH GAIN BANDWIDTH PRODUCT 150MHz VERY FAST SLEW RATE 400V/s PROTECTED OUTPUT STAGE Thermal shutoff EXCELLENT LINEARITY Class A/B output WIDE SUPPLY RANGE +12V to +40V LOW BIAS CURRENT, LOW NOISE FET input APPLICATIONS VIDEO DISTRIBUTION AND AND AMPLIFICATION HIGH SPEED DEFLECTION CIRCUITS POWER TRANSDUCERS TO 5MHz * COAXIAL LINE DRIVERS POWER LED OR LASER DIODE EXCITATION DESCRIPTION The PAO9 is a high voltage, high output current operational amplifier optimized to drive a variety of loads from DC through the video frequency range. Excellent input accuracy is achieved with a dual monolithic FET input transistor which is cascoded by two high voltage transistors to provide outstand- ing common mode characteristics. All internal current and voltage levels are referenced to a zener diode biased on by a current source. As a result, the PAO9 exhibits superior DC and AC stability over a wide supply and temperature range. High speed and freedom from second breakdown is as- sured by a complementary Power MOS output stage. For optimum linearity, especially at low levels, the Power MOS transistors are biased in the class A/B mode. Thermal shutoff provides full protection against overheating and limits the heatsink requirements to dissipate the internal power losses under normal operating conditions. A built-in current limit protects the amplifier against overloading. Transient induc- tive load kickback protection is provided by two internal clamping diodes. External phase compensation allows the user maximum flexibility in obtaining the optimum slew rate and gain bandwidth product at all gain settings. For continu- ous operation under load, a heatsink of proper rating is recommended. This hybrid integrated circuit utilizes thick film (cermet) resistors, ceramic capacitors and silicon semiconductor chips to maximize reliability, minimize size and give top performance. Ultrasonically bonded aluminum wires provide reliable interconnections at all operating tempera- tures. The 8-pin TO-3 437V packageishermetically sealed and electrically isolated. The use of ,, I com-pressible thermal washers and/or im- propermountingtorque will void the product warranty. Please see General Operating Considerations. di = 15A/us dt Hu FIGURE 1. PAOS AS DEFLECTION AMPLIFIER DEFLECTION AMPLIFIER (Figure 1) The deflection amplifier circuit of Figure 1 achieves arbitrary beam positioning for a fast heads-up display. Maximum tran- sition times are 4us while delivering 2A pk currents to the 13mH coil. The key to this circuit is the sense resistor (Rg) which converts yoke current to voltage for op amp feedback. This negative feedback forces the coil current to stay exactly proportional to the control voltage. The network consisting of Rp, Re and C, serves to shift from a current feedback via R, to a direct voltage feedback at high frequencies. This removes the extra phase shift caused by the inductor thus preventing oscillation. See Application Note 5 for details of this and other precision magnetic deflection circuits. EQUIVALENT SCHEMATIC EXTERNAL CONNECTIONS PHASE COMPENSATION GAIN Co. Ay 1 100pF 2000 10 15pF 0Q 100 5pF 02 1000 none none OUT Rg = (1 +Vg | + | -Vg I) Ry/1.6 NOTE: tnput offset voltage trim optional. Ry = 10K Q MAX APEX MICROTECHNOLOGY CORPORATION * TELEPHONE (520) 690-8601) * FAX (520) 888-3329 * ORDERS (520) 690-8601 * EMAIL ProdLit@ TeamApex.com cstPAOS PAO9SA ABSOLUTE MAXIMUM RATINGS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS SUPPLY VOLTAGE, +V, to -V. gov OUTPUT CURAENT, within SOA 5A POWER DISSIPATION, internal 78W INPUT VOLTAGE, differential 40V INPUT VOLTAGE, common mode Vy TEMPERATURE, pin solder - 10s 300C TEMPERATURE, junction 150C TEMPERATURE RANGE, storage -65 to +150C OPERATING TEMPERATURE RANGE. case 55 to +125C SPECIFICATIONS PA0S PAOSA PARAMETER TEST CONDITIONS? MIN TYP MAX MIN TYP MAX | UNITS INPUT OFFSET VOLTAGE, initial Ty = 25C 5 +3 + 25 + mv OFFSET VOLTAGE, vs. temperature To = 25 to +85C 10 30 5 10 pvc OFFSET VOLTAGE, vs. supply T. = 26C 10 , V/V OFFSET VOLTAGE, vs. power T; = 25 to +85C 20 . nViw BIAS CURRENT. initia! Ty = 25C 5 100 3 20 pA BIAS CURRENT, vs. supply Ty = 26C .01 . pAV OFFSET CURRENT, initial To = 25C 2.5 50 41.5 10 pA INPUT IMPEDANCE, DC Ty = 25C 70" . 2 INPUT CAPACITANCE Ty. = 25C 6 . pF COMMON MODE VOLTAGE RANGE? Ty = -25 to +85C + V5-10| + V.-8 * * v COMMON MODE REJECTION, DC To = -25 to +85C, Vou = + 20V 104 * dB GAIN OPEN LOOP GAIN at 10Hz Ty. = 25C, R, = 1kQ 90 * dB OPEN LOOP GAIN at 10Hz T, = 25C, R, = 152 80 88 * * dB GAIN BANDWIDTH PRODUCT at tMHz | T, = 25C, R, = 159, C, = 5pF 150 * MHz POWER BANDWIDTH, gain of 100 comp | T, = 25C, R, = 15, C, = 5pF 1.2 * MHz POWER BANDWIDTH, unity gaincomp | T, = 25C, R, = 159, C, = 100pF 75 . MHz OUTPUT VOLTAGE SWING? T, =-25 to +85C, |p = 2A +V,-8|+V;5-7 * . v CURRENT, PEAK Tp = 25C 45 . A SETTLING TIME to .1% T, = 25C, 2V step 3 * us SETTLING TIME to .01% T, = 25C, 2V step 4.2 * us SLEW RATE, gain of 100 comp T, = 25C, C, = SpF 400 . Vis SLEW RATE, unity gain comp To = 25C, C. = 100pF 75 . Vius POWER SUPPLY VOLTAGE T, = 25 to +85C #12 +35 +40 * . * Vv CURRENT, quiescent Ty = 25C 70 85 * * mA THERMAL RESISTANCE, AC junction to case* Te = -25 to +85C, F > 6OHz 4.2 1.3 . * oC AW RESISTANCE, DC junction to case Te = -25 to +85C, F < 60Hz 1.6 1.8 . . C/W RESISTANCE, junction to air T, = -25 to +85C 30 . C/W TEMPERATURE RANGE, case Meets full range specifications 25 25 +85 . * * C NOTES: * The specification of PAOQA is identical to the specification for PAO in applicable column to the left. 1. Long term operation at the maximum junction temperature will result in reduced product life. Derate power dissipation to achieve high MTTF. 2. The power supply voltage for all tests is +35V unless otherwise specified as a test condition. 3. +; and -V, denote the positive and negative supply rail respectively. Total V, is measured from +V; to Vg. 4 Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz. The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to temperatures in excess of 850C to avoid generating toxic fumes. APEX MICROTECHNOLOGY CORPORATION 5980 NORTH SHANNON ROALD! TUCSON, ARIZONA 85741 USA * APPLICATIONS HOTLINE: | &00) 546-2739 C82Gack PERFORMANCE PAOS e PAOSA a POWER DERATING CURRENT LIMIT x QUIESCENT CURRENT = 80 9 16 | 7 4 > 70 8 5 So z # 1.4 & 60 = 7 id 3 g 50 EC 6 5 1.2 a 40 25 i Bi a9 5 4 iB 1.0 ; : 3 a 20 a3 Z 5 a 8 3 10 Oe N & 2 woo 1 s 6 Z 0 2 50 75 100 125 150 55 -25 0 25 50 75 100128 & 30 40 50 60 70 80 CASE TEMPERATURE, Te (C) JUNCTION TEMPERATURE. T, (C) 3 TOTAL SUPPLY VOLTAGE, Vs (V} 10 SMALL SIGNAL RESPONSE 10 OUTPUT VOLTAGE SWING om POWER RESPONSE S Co = SpF > ~ aw 80 c = SPI z 9 c 50 Co = 15pF S 6 ~, 40 = 60 oer a > 99 z 2 ui =< 9 7 oO S 40 i < o F 20 9 Co = 100pF a 6 2 4 20 & > 45 2 o 5 Eb = ui 3 a & 0 < 4 & 10 8 3 14Vg 1 +1-Vg |= 80V -20 100 1K 10K 100K 1M 10M100M ~~ 1 2 3 4 100K 300K 1M 3M 10M 30M FREQUENCY, F (Hz) OUTPUT CURRENT, Ig (A) FREQUENCY, F (Hz) SLEW RATE VS. COMP. PULSE RESPONSE INPUT NOISE 600 30 @ 30 500 Vin = 2V, Ay = 10, t, = 10ns = S > 20 400 = = a > * 15 2 i 2300 o Wi w 5 < 10 _ r <= a a 200 > 9 7 = kb Af 4 a a H 150 a gos > Zz o kK > a 100 3 10 20 30 50 100 Oo 4 2 3 4 5 6 7 8 10 400 1K 10K 100K 1M COMPENSATION CAPACITOR, Cc(pF) TIME, t (us} FREQUENCY, F (Hz) = COMMON MODE REJECTION ao POWER SUPPLY REJECTION COMMON MODE VOLTAGE & 120 %B 100 | $70 c | gs \ | = 50 100 2 80 ~ FP 40 1+Vg 1+1-Vg | = 80V 3 9 w = 5 6 30 5 80 8 60 . g 4 w a w a Q 20 60 > 40 J w a z a 1s 3 Q gS = = 40 3B 20 > 40 5 Fa g = wi = 2 20 5 0 a7 8 1K 10K 100K 1M 10M 100M a 1K 10K 100K 1M 10M 100M 6 100K 300K iM 3M 10M 30M FREQUENCY, F (Hz) FREQUENCY, F(Hz) FREQUENCY. F(Hz) APEX MICROTECHNOLOGY CORPORATION TELEPHONE (520) 690-8600 * FAX (520% 888-3329 * ORDERS (520) 690-8601 * EMAIL ProdLit@ TeamApex.com C83PAO9S PAOSA OPERATING CONSIDERATIONS GENERAL Please read the General Operating Considerations sec- tion, which covers stability, supplies, heatsinking, mounting, current limit, SOA interpretation, and specification interpreta- tion. Additional information can be found in the application notes. For information on the package outline, heatsinks, and mounting hardware, consult the Accessory and Package Mechanical Data section of the handbook. SUPPLY VOLTAGE The specified voltage (tV,) applies for a dual (+) supply having equal voltages. A nonsymmetrical (ie. +70/-10V) or a single supply (ie. 80V) may be used as long as the total voltage between the +V, and V, rails does not exceed the sum of the voltages of the specified dual supply. SAFE OPERATING AREA (SOA) The MOSFET output stage of this power operational ampli- fier has two distinct limitations: 1. The current handling capability of the MOSFET geometry and the wire bonds. 2. The junction temperature of the output MOSFETs. SAFE OPERATING AREA CURVES 5.0 4.0 3.5 3.0 2.5 2.0 1.5 UTPUT CURRENT FROM +Vz5 OR Vsg (A) 20 25 30 35 40 3 INTERNAL VOLTAGE DROP SUPPLY TO OUTPUT Vg -Vo (V) 50 60 70 80 The SOA curves combine the effect of these limits and allow for internal thermal delays. For a given application, the direc- tion and magnitude of the output current should be calculated or measured and checked against the SOA curves. This is simple for resistive loads but more complex for reactive and EMF generating loads. The following guidelines may save extensive analytical efforts: 1. Capacitive and inductive loads up to the following maxi- mums are safe: +V, CAPACITIVE LOAD = INDUCTIVE LOAD 400 ALF 11mH 30V 500uF 24mH 20V 2500uF 75mH 15V co 100mH 2. Short circuits to ground are safe with dual supplies up to +20V. 3. The output stage is protected against transient flyback. However, for protection against sustained, high energy flyback, external fast-recovery diodes should be used. BYPASSING OF SUPPLIES Each supply rail must be bypassed to common with a tantalum capacitor of at least 47uF in parallel with a .47uF ceramic capacitor directly connected from the power supply pins to the ground plane. OUTPUT LEADS Keep the output leads as short as possible. In the video frequency range, even a few inches of wire have significant inductance, raising the interconnection impedance and limit- ing the output current slew rate. Furthermore, the skin effect increases the resistance of heavy wires at high frequencies. Multistrand Litz Wire is recommended to carry large video currents with low losses. GROUNDING Single point grounding of the input resistors and the input signal to a common ground plane will prevent undesired current feedback, which can cause large errors and/or insta- bilities. THERMAL SHUTDOWN PROTECTION The thermal protection circuit shuts off the amplifier when the substrate temperature exceeds approximately 150C. This allows heatsink selection to be based on normal operating conditions while protecting the amplifier against excessive junction temperature during temporary fault conditions. Thermal protection is a fairly slow-acting circuit and there- fore does not protect the amplifier against transient SOA violations (areas outside of the T, = 25C boundary). It is designed to protect against short-term fault conditions that result in high power dissipation within the amplifier, If the conditions that cause thermal shutdown are not removed, the amplifier will oscillate in and out of shutdown. This will result in high peak power stresses, destroy signal integrity, and reduce the reliability of the device. STABILITY Due to its large bandwidth the PAOQ is more likely to oscillate than lower bandwidth Power Operational Amplifiers. To pre- vent oscillations a reasonable phase margin must be main- tained by: 1. Selection of the proper phase compensation capacitor and resistor. Use the values given in the table under external connections on the first page of this data sheet and interpo- late if necessary. The phase margin can be increased by using a larger capacitor and a smaller resistor than the slew rate optimized values listed in the table. 2. Keeping the external sumpoint stray capacitance to ground ata minimum and the sumpoint load resistance (input and feedback resistors in parallel) below 500Q. Larger sumpoint load resistances can be used with increased phase com- pensation and/or bypassing of the feedback resistor. 3. Connect the case to a local AC ground potential. CURRENT LIMIT Internal current limiting is provided in the PAOY. Note the current limit curve given under typical performance graphs is based on junction temperature. If the amplifier is operated at cold junction temperatures, current limit could be as high as 8 amps. This is above the maximum allowed current on the SOA curve of 5 amps. Systems using this part must be designed to keep the maximum output current to less than 5 amps under all conditions. The internal current limit only provides this protection for junction temperatures of 80C and above. PAO9U REV H SEPTEMBER 1993 1993 Apex Microtechnology Corp C34ae be) APEX MICROTECHNQOLOGY CORPORATION + APPLICATIONS HOTLINE 800 546-APE XK (800-546-2739) SG PARAMETER SYMBOL | TEMP. |POWER | TEST CONDITIONS MIN MAX | UNITS 1 Quiescent Current la 25C +35V Vin = 0, Ay = 100 85 mA 1 tnput Offset Voltage Vos 25C +35V Vi, = 0, A, = 100 3 mV 1 Input Offset Voltage Vos 25C +12V Viy = 0, Ay = 100 5.3 mV 1 Input Offset Voltage Vos 25C +40V Vin = 0, Ay = 100 3.5 mV 1 Input Bias Current, +iN tla 25C +35V Vaz 100 pA 1 Inout Bias Current, -IN le 25C +35V Vy =O 400 pA 1 Input Offset Current los 25C +35V Vn =0 50 pA 3 Quiescent Current lo -55C | +35V Vin = 0, Ay = 100 165 mA 3 Input Offset Voltage Vos -56C | +35V Vin = 0, Ay = 100 5.4 mV 3 Input Offset Voltage Vos -58C | +12V Vin = 0, Ay = 100 7.7 mV 3 Input Offset Voltage Vos -55C | +40V Vi, = 0, A, = 100 5.9 mV 3. Input Bias Current, +IN tle -56C | +35V Vin =O 100 pA 3 Input BiasCurrent, -IN lp -56C | +35V Vy=O 100 pA 3. Input Offset Current los -55C | +35V Vy zO 50 pA 2 Quiescent Current Ip 125C | +35V Vi, #0, Ay = 100 140 mA 2 Input Offset Voltage Vos 126C | +35V Vin = 0, Ay = 100 6 mv 2 Input Offset Voltage Vos 125C | +12V Vin = 0, A, = 100 8.3 mV 2 Input Offset Voltage Vos 125C | +40V Vin = 0, A, = 100 6.5 mV 2 Input Bias Current, +IN tl 125C | +35V Vi =O 10 nA 2 Input Bias Current, -IN le 125C | +35V Vin = 10 nA 2 Input Offset Current log 126C | +35V | Vw=0 10 nA 4 Qutput Voltage, Ip = 3A Vo 26C | +21.3V | R, =3.75Q 11.3 Vv 4 Output Voltage, |p = 66MA Vo 25C | +40V R, = 5002 33 Vv 4 Output Voltage, Ip = 2A Vo 26C | +38V | R,= 152 30 v 4 Current Limits lot 25C | +32.2V | R,=3.75Q 3.4 6 A 4 Stability/Noise Ey 25C | +35V | R_=5000, A, =1, C, = 1.5nF 1 mv 4 Slew Rate SR 25C | +35V | R, = 50002 25 500 Vins 4 Open Loop Gain Ao. 25C | +35V | R, = 5000, F = 10Hz 80 dB 4 Common Mode Rejection CMR 25C | +34.5V | R, = 500Q, F = DC, V,, = +22.5V 64 dB 6 Output Voltage, |, = 3A Vo 55C | +21.3V | A, =3.75Q 11.3 Vv 6 Output Voltage, |, = 66mMA Vo -55C | +40V R, = 5000 33 v 6 Output Voltage, Ilp=2A Vo -55C | +38V R, = 152 30 Vv 6 _ Stability/Noise Ey -55C | +35V R, = 5000, Ay = 1, C, = 1.5nF 1 mV 6 Slew Rate SR 55C | +35V R, = 5000 25 500 Vius 6 Open Loop Gain Aa 55C | +35V R, = 500Q, F = 10Hz 80 dB 6 Common Mode Rejection CMR -55C | +34.5V | R, = 500Q, F = DC, V,, = 22.5V 64 dB 5 Output Voltage, Ip = 66MA Vo 125C | +40V | R,=5000 33 Vv 5 Output Voltage. Ip = 1A Vo 125C | +23.5V | R, = 152 15 v 5 Stability/Noise En 425C +35V R, = 500Q, Ay = 1, C, = 1.5nF 1 mv 5 Slew Rate SR 125C | +35V | R, =5000, 20 500 Vins 5 Open Loop Gain Aa 125C | +35V | R,=500Q, F = 10Hz 80 dB 5 Common Mode Rejection CMR 125C | +34.5V | R, = 5009, F = DC, Voy = +22.5V 64 dB BURN IN CIRCUIT 100K& * These components are used to stabilize device due to poor high frequency characteristics of +15V burn in board. 100K 5 ood Input signals are calculated to result in internal power dissipation of approximately 2.1W at case temperature = 125C. ae 4 PAQSMU REV I JUNE 1996 1996 Apex Microtechnology Corp Cas