CMOS/TTL Compatible, Low Input Current, High Speed, High CMR Optocoupler Technical Data HCPL-7601 HCPL-7611 Features Applications * Low Input Current Version of HCPL-2601/11 and 6N137 * Wide Input Current Range: IF = 2 mA to 10 mA * CMOS/TTL Compatible * Guaranteed Switching Threshold: IF = 2 mA (max.) * Internal Shield for High Common Mode Rejection (CMR) HCPL-7601: 5,000 V/s (Typical) at VCM = 50 V, IF = 4 mA HCPL-7611: 15,000 V/s (Typical) at VCM = 1000 V, IF = 4 mA * High Speed: 10 Mbd Typical * Guaranteed ac and dc Performance Over Temperature: -40C to 85C * VDE 0884 Approval: VIORM = 600 VRMS * UL Recognized: 3750 VRMS, 1 minute * CSA Accepted * Low Supply Current Requirement * Low TPSK: 40 ns Guaranteed * Isolated Line Receiver * Simplex/Multiplex Data Transmission * Programmable Logic Controllers * Computer-Peripheral Interface * Microprocessor System Interface * Digital Isolation for A/D, D/A Conversion * Switching Power Supply * Instrument Input/Output Isolation * Ground Loop Elimination * Pulse Transformer Replacement Schematic IF ICC 8 2+ IO 6 VCC VO VF 3- 5 GND HCPL-7601/11 SHIELD USE OF A 0.1 F BYPASS CAPACITOR CONNECTED BETWEEN PINS 5 AND 8 IS REQUIRED (SEE NOTE 1). TRUTH TABLE (POSITIVE LOGIC) OUTPUT LED L ON H OFF CAUTION: The small device geometries inherent to the design of this bipolar component increase the component's susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. 2 Description The HCPL-7601/11 is a low input current version of the HCPL-2601/11 and 6N137 (without enable). The optically coupled gates combine an AlGaAs high-efficiency light emitting diode and an integrated high gain photon detector to create a low input current device for low power applications. The output of the detector IC is an open collector Schottky-clamped transistor. The internal shield provides a guaranteed common mode transient immunity specification of 10,000 V/s (HCPL-7611). This unique design provides maximum ac and dc circuit isolation while achieving CMOS and TTL compatibility. The optocoupler ac and dc operational parameters are guaranteed from -40C to 85C with no derating required allowing trouble free system performance. This product is suitable for high speed logic interfacing, input/output buffering, and applications that require low input-current switching levels. The HCPL-7601/11 family offers many features that are especially beneficial to system designers. The low input current requirements and guaranteed switching threshold (2 mA max.) allows the LED to be driven directly by any standard high-speed CMOS gate (e.g. 74HC/HCT). This will simplify designs by eliminating the need for special driver circuits and result in lower part counts and greater system reliability while freeing up valuable printed circuit board space. Regulatory Information The wide current input range of 2 mA to 10 mA and guaranteed ac and dc performance over a wide temperature range will also simplify designs. Low supply current requirements mean lower power dissipation allowing for the use of a smaller, less expensive power supply. The high speed (10 Mbd typ.) and low propagation delay skew (Tpsk 40 ns guaranteed) allow for easier design of high speed parallel applications. The world-wide regulatory approval (UL/CSA/VDE 0884) will facilitate the acceptance of the end product in international markets. Can be used for safe electrical separation between ac mains and SELV (safety extra-low voltage) in equipment according to the following specifications: DIN VDE 0804/05.89 DIN VDE 0160/05.88 The HCPL-7601 and HCPL-7611 have been approved by the following organizations: UL-Approved under UL 1577, component recognition FILE E55361). VDE-Approved according to VDE0884/08.87. This optocoupler is suitable for "safe electrical isolation" only within the safety limit data. Maintenance of the safety data shall be ensured by means of protective circuits. Reference voltage (VDE 011b Tab 4): 630 Vac. CSA-Approved under CSA22.2 No. 0 - General Requirements, Canadian Electrical Code, Part II; and CSA Component Acceptance Notice #5, File CA 88324. 3 Absolute Maximum Ratings (No Derating Required up to 85C) Storage Temperature ................................................. -55C to +125C Operating Temperature ............................................... -40C to +85C Lead Solder Temperature .............................................. 260C for 10 s (1.6 mm below seating plane) Average Input Current - IF (See Note 2.) .................................. 20 mA Reverse Input Voltage - VR ......................................................................................... 3 V Supply Voltage - VCC ..................................................... 7V (1 Minute Maximum) Output Collector Current - IO ........................................................................... 50 mA Output Collector Power Dissipation ......................................... 85 mW Output Collector Voltage - VO*........................................................ 7 V Total Package Power Dissipation ........................................... 250 mW *Selection for higher output voltage up to 20 V is available. Recommended Operating Conditions Parameter Symbol Min. Max. Units Input Voltage, Low Level VFL 0 0.8 V Input Current, High Level I FH 2 10 mA Supply Voltage, Output VCC 4.5 5.5 V 5 TTL Loads Fan Out @ RL= 1 k N Operating Temperature TA -40 85 C Output Pull-up Resistor RL 330 4k 4 Package Outline Drawing Standard DIP Package 9.40 (0.370) 9.90 (0.390) 8 7 A 6 5 TYPE NUMBER* 7601 7.36 (0.290) 7.88 (0.310) YYWW PIN ONE 1 2 3 0.18 (0.007) 0.33 (0.013) 6.10 (0.240) 6.60 (0.260) DATE CODE 5 TYP. 4 1.78 (0.070) MAX. 1.19 (0.047) MAX. DIMENSIONS IN MILLIMETERS AND (INCHES). 4.70 (0.185) MAX. PIN ONE PINOUT DIAGRAM N/C 1 8 VCC ANODE 2 7 N/C CATHODE 3 6 VOUT N/C 4 5 GND 0.51 (0.020) MIN. 2.92 (0.115) MIN. 0.76 (0.030) 1.24 (0.049) 0.65 (0.025) MAX. 2.28 (0.090) 2.80 (0.110) *TYPE NUMBER FOR: HCPL-7601 = 7601 HCPL-7611 = 7611 Gull Wing Surface Mount Option 300* 8 7 6 5 DIMENSIONS IDENTICAL TO STANDARD DIP EXCEPT AS NOTED. 1 2 3 4 9.65 0.25 (0.380 0.010) 7.62 0.25 (0.300 0.010) 0.255 0.075 (0.010 0.003) 0.51 0.130 (0.020 0.005) * REFER TO OPTION 300 DATA SHEET FOR MORE INFORMATION. 0.635 0.25 (0.025 0.010) 12 NOM. 5 VDE 0884 Insulation Characteristics Description Symbol Installation classification per DIN VDE 0109*/12.83, Table 1 for rated mains voltage 300VRMS for rated mains voltage 600VRMS Characteristics Unit I-IV I-III Climatic Classification 40/85/21 Pollution Degree (DIN VDE 0109/12.83)* 2 Maximum Working Insulation Voltage VIORM Input to Output Test Voltage, Method b** Production test with tP = 1 sec, Partial discharge < 5 pC VPR = 1.6 X VIORM Input to Output Test Voltage, Method a** Production test with tP = 60 sec, Partial discharge < 5 pC VPR = 1.2 X VIORM 600 VRMS 848 Vpeak 960 VRMS 1357 Vpeak 720 VRMS 1018 Vpeak VTR 6000 Vpeak TSI PSI,Input PSI,Output 175 80 250 C mW mW RIS 1011 VPR VPR Highest Allowable Overvoltage** (Transient Overvoltage, tTR = 10 sec) Safety-limiting values (Maximum values allowed in the event of a failure, also see Figure 16) Case Temperature Input Power Output Power Insulation Resistance at TSI, VIO = 500 V * This part may also be used in Pollution Degree 3 environments where the rated mains voltage is 300 VRMS (per DIN VDE 0190/12.83). **Refer to the front of the optocoupler section of the current Optoelectronics Designers Catalog for a more detailed description of VDE 0884 and other product safety regulations. Insulation Related Specifications Parameter Symbol Value Units Conditions Minimum External Clearance (External Air Gap) L (IO1) 7.0 mm Measured from input terminals to output terminals Minimum External Creepage (External Tracking) L (IO2) 8.0 mm Measured from input terminals to output terminals 0.5 mm Through insulation distance from conductor to conductor 175 V Minimum Internal Clearance (Internal Plastic Gap) Comparitive Tracking Index Isolation Group (per DIN VDE 0109) CTI IIIa DIN IEC 112/VDE 303 P1 Material Group 6 Electrical Specifications Over recommended temperature (TA = -40C to 85C) unless otherwise specified. (See note 1.) Parameter Symbol Min. Typ.* Max. Units Test Conditions Fig. Input Threshold Current ITH 1 2 mA VCC = 5.5V, I O 13 mA, VO = 0.6 V 5 High Level Output Current IOH 3 100 A VCC = 5.5 V, VO = 5.5 V VFL = 0.8 V 1 Low Level Output Voltage VOL 0.35 0.6 V VCC = 5.5 V, IF = 2 mA, IOL (Sinking) = 13 mA 2, 4, 6 High Level Supply Current ICCH 4.75 7 mA VCC = 5.5 V, IF = 0 mA Low Level Supply Current ICCL 6 10 mA VCC = 5.5 V, IF = 4 mA Input Forward Voltage VF 1.2 1.5 1.85 V IF = 4 mA Input Reverse Breakdown Voltage BVR 3 V IR = 100 A Input Capacitance CIN 72 pF Input Diode Temperature Coefficient VF /TA -1.6 mV/C IF = 4 mA Input-Output Insulation VISO 3750 VRMS RH 50%, t = 1 min. TA = 25C Resistance (Input-Output) RI-O 1012 1013 1011 Capacitance (Input-Output) CI-O *All typicals at TA = 25C, VCC = 5 V. Note 3 VF = 0, f = 1 MHz TA = 25C 3 VI-O = 500 V 3, 9 3 TA = 100C 0.6 pF f = 1 MHz, VI-O = 0 Vdc 3 7 Switching Specifications Over recommended temperature (TA = -40C to 85C), VCC = 5 V, CL = 15 pF Parameter Symbol Device Min. Propagation Delay Time to High Output Level Propagation Delay Time to Low Output Level tPLH Typ.* Max Unit 25 58 25 55 35 73 25 57 tPHL Pulse Width |tPHL-tPLH| Distortion 16 4 75 100 75 100 100 120 75 100 Test Conditions TA = 25C TA = 25C ns TA = 25C TA = 25C Fig. Note IF = 2 mA, RL = 1 k IF = 4 mA RL = 350 7, 8, 4, 10 10 IF = 2 mA RL = 1 k IF = 4 mA RL = 350 7, 9, 5, 10 10 11, 12 55 40 IF = 2 mA IF = 4 mA RL = 1 k RL = 350 75 40 IF = 2 mA IF = 4 mA RL = 1 k RL = 350 4, 5 Propagation Delay Skew tPSK Output Rise Time (10% - 90%) trise 58 24 IF = 2 mA IF = 4 mA RL = 1 k RL = 350 13 Output Fall Time (10% - 90%) tfall 10 IF = 2 - 4 mA RL = 350 - 1 k 13 Common Mode Transient Immunity at High Output Level CMH VCM = 50 V IF = 0 mA Vo(min) = 2 V RL = 350 - 1 k TA = 25C 14 7 Common Mode Transient Immunity at Low Output Level CML 14 8 HCPL- 1,000 7601 5,000 HCPL- 10,000 15,000 7611 HCPL- 1,000 7601 5,000 HCPL- 2,000 7611 5,000 10,000 15,000 *All typicals at TA = 25C, VCC = 5 V. VCM = 1000 V V/s IF = 2 - 4 mA Vo(max) = 0.8V RL = 350 - 1 k TA = 25C VCM = 50 V IF = 2 mA RL = 1 k VCM = 1000 V IF = 4 mA RL = 350 VCM = 1000 V 6, 10 8 VCC = 5.5 V VO = 5.5 V VIN = 0.8 V 10 5 0 -60 -40 -20 0 20 40 60 80 100 0.6 VCC = 5.5 V IF = 2 - 4 mA 0.5 0.4 0.3 RL = 1 k RL = 4 k 2.0 1.0 0.5 1.0 1.5 2.0 IF - FORWARD INPUT CURRENT - mA Figure 4. Output Voltage vs. Forward Input Current. 40 60 80 100 TA = -40 C TA = 85 C -3 10 -4 10 -5 10 -6 10 0.8 1.0 1.2 1.4 1.6 1.8 2.0 VF - INPUT FORWARD VOLTAGE - V Figure 2. Low Level Output Voltage vs. Temperature. Figure 3. Typical Input Forward Current vs. Input Forward Voltage. IOL - LOW LEVEL OUTPUT CURRENT - mA RL = 350 0 20 TA = 25 C -2 10 ITH - INPUT THRESHOLD CURRENT - mA VO - OUTPUT VOLTAGE - V 5.0 0 0 10-1 TA - TEMPERATURE - C Figure 1. High Level Output Current vs. Temperature. 3.0 IO = 13.0 mA 0.2 -60 -40 -20 TA - TEMPERATURE - C 4.0 IO = 16.0 mA 8. CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e., VOUT < 0.8 V). This specification assumes that good board layout procedures were followed to reduce the effective input/output capacitance as shown in Figure 15. 9. In accordance with UL and CSA requirements, each optocoupler is proof tested by applying an insulation test voltage 5000 Vrms for one second (leakage detection current limit, II-O 5 A). 10. AC performance at IF = 4 mA is approximately equivalent to the HCPL-2601/11 at IF = 7.5 mA for comparison purposes. IF - INPUT FORWARD CURRENT - A 15 trailing edge of the input pulse to the 1.5 V point on the trailing edge of the output pulse. 5. The tPHL propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.5 V point on the leading edge of the output pulse. 6. tPSK is equal to the worst case difference in tPHL and/or tPLH that will be seen between units at any given temperature within the operating condition range. 7. CM H is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state (i.e., VOUT > 2.0 V). VOL - LOW LEVEL OUTPUT VOLTAGE - V IOH - HIGH LEVEL OUTPUT CURRENT - A Notes: 1. Bypassing of the power supply line is required with a 0.1 F ceramic disc capacitor adjacent to each optocoupler, as illustrated in Figure 15. Total lead length between both ends of the capacitor and the isolator pins should not exceed 10 mm. 2. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 20 mA. 3. Device considered a two terminal device: pins 1 , 2, 3 and 4 shorted together, and pins 5, 6, 7, and 8 shorted together. 4. The tPLH propagation delay is measured from the 50% point on the 2.5 VCC = 5.0 V VO = 0.6 V IO = 13.0 mA 2.0 1.5 1.0 0.5 0 -60 -40 -20 0 20 40 60 80 100 TA - TEMPERATURE - C Figure 5. Input Threshold Current vs. Temperature. 55 50 IF = 4 mA 45 IF = 2 mA 40 35 VCC = 5 V VOL = 0.6 V 30 -50 -30 -10 0 10 30 50 70 90 TA - TEMPERATURE - C Figure 6. Low Level Output Current vs. Temperature. 9 +5 V IF INPUT MONITORING NODE 1 VCC 8 2 7 3 6 4 5 0.1F BYPASS RL OUTPUT VO MONITORING NODE RM GND 120 tPLH - PROPAGATION DELAY - ns *CL *CL IS APPROXIMATELY 15 pF WHICH INCLUDES PROBE AND STRAY WIRING CAPACITANCE. IF INPUT IF 50% IF tPHL tPLH IF = 2 mA 70 60 IF = 4 mA 50 40 30 -50 -30 -10 0 10 30 50 70 100 80 TPHL @ RL = 350 - 4 k 70 TPLH @ RL = 1 k 60 50 40 TPLH @ RL = 350 2 3 4 5 6 330 VCC = 5 V TA = 25 C 10 0 RL = 350 -10 -20 RL = 1 k -30 -40 RL = 4 k -50 -60 0 2 4 6 8 10 IF - INPUT CURRENT - mA Figure 12. Pulse Width Distortion vs. Input Current. 9 10 11 8 Figure 10. Propagation Delay vs. Input Current. 30 20 7 IF - INPUT CURRENT - mA tRISE, tFALL - RISE, FALL TIME - ns PULSE WIDTH DISTORTION (tPHL - tPLH) - ns TPLH @ RL = 4 k 90 TA - TEMPERATURE - C -70 VCC = 5 V TA = 25 C 110 30 1 90 Figure 9. t PHL - Propagation Delay vs. Temperature. 12 IF = 2-4 mA, RL = 4 k 90 80 70 60 IF = 2-4 mA, RL = 1 k 50 40 IF = 2-4 mA, RL = 350 -30 -10 0 10 30 50 70 90 Figure 8. tPLH - Propagation Delay vs. Temperature. tP - PROPAGATION DELAY - ns tPHL - PROPAGATION DELAY - ns 80 VCC = 5 V TA = 25 C TA - TEMPERATURE - C 120 VCC = 5 V RL = 350 - 4 k TA = 25 C 90 100 1.5 V Figure 7. Test Circuit for tPHL and t PLH. 100 110 30 -50 OUTPUT VO 320 tFALL VCC = 5.0 V IF = 2 - 4 mA tRISE 310 300 RL = 4 k 290 60 RL = 1 k 40 RL = 350 20 RL = 350 , 1 k, 4 k 0 -60 -40 -20 0 20 40 60 80 100 TA - TEMPERATURE - C Figure 13. Rise and Fall Time vs. Temperature. PULSE WIDTH DISTORTION (tPHL- tLPLH) - ns PULSE GEN. ZO = 50 tf = tr = 5 ns 30 15 IF = 2 mA, RL = 350 IF = 2 mA, RL = 1 k IF = 4 mA, RL = 350 0 IF = 4 mA, RL = 1 k -15 -30 IF = 2 mA, RL = 4 k -45 -60 -50 IF = 4 mA, RL = 4 k -30 -10 0 10 30 50 70 TA - TEMPERATURE - C Figure 11. Pulse Width Distortion vs. Temperature. 90 10 IF B 1 VCC 8 2 7 3 6 +5 V 0.1 F BYPASS RL A VFF 4 GND OUTPUT VO MONITORING NODE 5 VCM _ + PULSE GENERATOR ZO = 50 VCM (PEAK) VCM 0V VO 5V SWITCH AT A: IF = 0 mA CMH VO (MIN.) SWITCH AT B: IF = 2 or 4 mA VO (MAX.) VO CML 0.35 V Figure 14. Test Circuit for Common Mode Transient Immunity and Typical Waveforms. 250 150 0.1F OUTPUT GND BUS 10 mm MAX. (SEE NOTE 1) Figure 15. Recommended Printed Circuit Board Layout. PSI, INPUT - mW VCC BUS 100 50 40 30 20 10 0 PSI, OUTPUT - mW 220 200 50 0 25 50 75 0 100 125 140 150 175 TA - TEMPERATURE - C Figure 16. Dependence of SafetyLimiting Data on Ambient Temperature. 11 DEVICE (INPUT DRIVE CIRCUIT) 8 VCC = 5 V I k (MAX.) 6 2 2N3906** 0.1 F BYPASS 3 *74LS04 VCC2 390 5 GND 2 SHIELD *ANY TTL GATE **ANY PNP TRANSITOR CMOS OR TTL INTERFACE CIRCUIT 1N4148 VCC = 5 V VCC = 5 V *74HC04 I K (MAX.) 620 (MAX.) 2 *74LS05 3 *ANY CMOS HC OR HCT GATE CMOS DRIVE CIRCUIT FOR LOW POWER APPLICATIONS Figure 17. Recommended Interface Circuits. *ANY OPEN COLLECTOR TTL OR OPEN DRAIN CMOS GATE INPUT DRIVE CIRCUIT FOR HIGH CMR APPLICATIONS www.semiconductor.agilent.com Data subject to change. Copyright (c) 2001 Agilent Technologies August 27, 2001 Obsoletes 5091-7387E (5/93) 5988-4037EN