LT8640S-2/LT8643S-2 42V, 6A Synchronous Step-Down Silent Switcher with 2.5A Quiescent Current DESCRIPTION FEATURES Silent Switcher (R) Architecture nn Ultralow EMI Emissions nn Optional Spread Spectrum Modulation nn High Efficiency at High Frequency nn Up to 96% Efficiency at 1MHz, 12V to 5V IN OUT nn Up to 95% Efficiency at 2MHz, 12V to 5V IN OUT nn Wide Input Voltage Range: 3.4V to 42V nn 6A Maximum Continuous, 7A Peak Output nn Ultralow Quiescent Current Burst Mode(R) Operation nn 2.5A I Regulating 12V to 3.3V Q IN OUT (LT8640S-2) nn Output Ripple < 10mV P-P nn External Compensation: Fast Transient Response and Current Sharing (LT8643S-2) nn Fast Minimum Switch On-Time: 30ns nn Low Dropout Under All Conditions: 100mV at 1A nn Forced Continuous Mode nn Adjustable and Synchronizable: 200kHz to 3MHz nn Output Soft-Start and Tracking nn Small 24-Lead 4mm x 4mm LQFN Package The LT(R)8640S-2/LT8643S-2 synchronous step-down regulator features Silent Switcher architecture designed to minimize EMI emissions while delivering high efficiency at high switching frequencies. Peak current mode control with a 30ns minimum on-time allows high step-down ratios even at high switching frequencies.The LT8643S-2 has external compensation to enable current sharing and fast transient response at high switching frequencies. nn Burst Mode operation enables ultralow standby current consumption, forced continuous mode can control frequency harmonics across the entire output load range, or spread spectrum operation can further reduce EMI emissions. SYNC/ INTERNAL PACKAGE MODE 0 VC COMP H-GRADE CLKOUT CAPS APPLICATIONS Automotive and Industrial Supplies nn General Purpose Step-Down nn PulseInternal Skipping Yes No No Internal Yes No No FCM Internal No Yes Yes LQFN FCM External No Yes Yes LQFN FCM Internal Yes Yes No LQFN FCM External Yes Yes No LT8640 QFN LT8640-1 QFN FCM LT8640S LQFN LT8643S LT8640S-2 LT8643S-2 All registered trademarks and trademarks are the property of their respective owners. Protected by U.S. patents, including 8823345. TYPICAL APPLICATION 12VIN to 5VOUT Efficiency 5V, 6A Step-Down Converter VIN 5.7V TO 42V GND VIN BST 0.1F SW 3.3H VOUT 5V 6A BIAS 1F 41.2k fSW = 1MHz INTVCC 10pF RT 1M 100F FB GND 95 2.8 90 1F GND LT8640S-2 3.2 243k 2.4 EFFICIENCY 85 2.0 80 1.6 1.2 75 POWER LOSS POWER LOSS (W) 1F EN/UV VIN EFFICIENCY (%) 4.7F 100 0.8 1MHz, L = 3.3H 65 2MHz, L = 2.2H 0.4 3MHz, L = 1H 0 60 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 LOAD CURRENT (A) 70 8640s2 TA01b 8640s2 TA01a Rev 0 Document Feedback For more information www.analog.com 1 LT8640S-2/LT8643S-2 ABSOLUTE MAXIMUM RATINGS (Note 1) VIN, EN/UV, PG...........................................................42V BIAS...........................................................................25V FB, TR/SS ...................................................................4V SYNC/MODE Voltage ..................................................6V Operating Junction Temperature Range (Note 2) LT8640S-2E/LT8643S-2E................... -40C to 125C LT8640S-2I/LT8643S-2I..................... -40C to 125C LT8640S-2H/LT8643S-2H.................. -40C to 150C Storage Temperature Range................... -65C to 150C Maximum Reflow (Package Body) Temperature...... 260C PIN CONFIGURATION INTVCC 2 GND 3 15 NC NC 4 14 VIN VIN 5 13 VIN VIN 6 10 11 12 SYNC/MODE CLKOUT CLKOUT 9 TR/SS SYNC/MODE 8 VC TR/SS 7 PG GND 16 GND FB PG 28 GND 17 EN 24 23 22 21 20 19 18 RT 25 GND 26 GND 27 GND 28 GND 17 EN 16 GND 15 NC 14 VIN 13 VIN 7 8 9 10 11 12 SW 6 27 GND 1 SW VIN 26 GND BIAS SW 5 25 GND 18 RT SW 4 19 TOP VIEW SW NC VIN 20 SW 3 21 SW GND 22 SW 2 23 SW INTVCC 24 SW 1 BST BIAS LT8643S-2 FB TOP VIEW BST LT8640S-2 LQFN PACKAGE 24-LEAD (4mm x 4mm x 0.94mm) LQFN PACKAGE 24-LEAD (4mm x 4mm x 0.94mm) JEDEC BOARD: JA = 38C/W, JC(PAD) = 7C/W (NOTE 3) EXPOSED PAD (PINS 25 TO 28) ARE GND, SHOULD BE SOLDERED TO PCB JEDEC BOARD: JA = 38C/W, JC(PAD) = 7C/W (NOTE 3) EXPOSED PAD (PINS 25 TO 28) ARE GND, SHOULD BE SOLDERED TO PCB ORDER INFORMATION PART NUMBER PART MARKING* FINISH CODE PAD FINISH PACKAGE TYPE** MSL RATING LT8640SEV-2#PBF LT8640SIV-2#PBF -40C to 125C 86402 LT8640SHV-2#PBF e4 LT8643SEV-2#PBF LT8643SIV-2#PBF TEMPERATURE RANGE -40C to 125C Au (RoHS) LQFN (Laminate Package with QFN Footprint) 86432 3 -40C to 150C -40C to 125C -40C to 125C LT8643SHV-2#PBF -40C to 150C * Consult Marketing for parts specified with wider operating temperature ranges. *Device temperature grade is identified by a label on the shipping container. * Pad finish code is per IPC/JEDEC J-STD-609. * Recommended PCB Assembly and Manufacturing Procedures: www.analog.com/umodule/pcbassembly * Package and Tray Drawings: www.analog.com/packaging Parts ending with PBF are RoHS and WEEE compliant. **The LT8640S-2/LT8643S-2 package has the same dimensions as a standard 4mm x 4mm QFN package. Rev 0 2 For more information www.analog.com LT8640S-2/LT8643S-2 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. PARAMETER CONDITIONS Minimum Input Voltage VIN Quiescent Current in Shutdown TYP MAX l MIN 3.0 3.4 V l 0.75 0.75 3 10 A A l 1.7 1.7 4 10 A A l 230 230 290 340 A A 19 25 A 200 260 A 21 220 60 390 A A 0.970 0.970 0.976 0.982 V V 0.004 0.02 %/V 20 nA VEN/UV = 0V LT8640S-2 VIN Quiescent Current in Sleep (Internal Compensation) VEN/UV = 2V, VFB > 0.97V, VSYNC = 0V LT8643S-2 VIN Quiescent Current in Sleep (External Compensation) VEN/UV = 2V, VFB > 0.97V, VSYNC = 0V, VBIAS = 0V VEN/UV = 2V, VFB > 0.97V, VSYNC = 0V, VBIAS = 5V LT8643S-2 BIAS Quiescent Current in Sleep VEN/UV = 2V, VFB > 0.97V, VSYNC = 0V, VBIAS = 5V LT8640S-2 VIN Current in Regulation VOUT = 0.97V, VIN = 6V, ILOAD = 100A, VSYNC = 0 VOUT = 0.97V, VIN = 6V, ILOAD = 1mA, VSYNC = 0 l l Feedback Reference Voltage VIN = 6V VIN = 6V l l 0.964 0.958 UNITS Feedback Voltage Line Regulation VIN = 4.0V to 36V Feedback Pin Input Current VFB = 1V LT8643S-2 Error Amp Transconductance VC = 1.25V 1.7 LT8643S-2 VC Source Current VFB = 0.77V, VC = 1.25V 350 A LT8643S-2 VC Sink Current VFB = 1.17V, VC = 1.25V 350 A 5 A/V -20 LT8643S-2 Error Amp Gain 260 LT8643S-2 VC Pin to Switch Current Gain LT8643S-2 VC Clamp Voltage 2.6 BIAS Pin Current Consumption VBIAS = 3.3V, fSW = 2MHz Minimum On-Time ILOAD = 1.5A, SYNC = 0V ILOAD = 1.5A, SYNC = 2V Oscillator Frequency RT = 221k RT = 60.4k RT = 18.2k Top Power NMOS On-Resistance ISW = 1A V 14 l l Minimum Off-Time l l l 180 665 1.8 l 7.5 mA 30 30 50 45 ns ns 80 110 ns 210 700 1.95 240 735 2.1 kHz kHz MHz 66 Top Power NMOS Current Limit Bottom Power NMOS On-Resistance mS VINTVCC = 3.4V, ISW = 1A SW Leakage Current VIN = 42V, VSW = 0V, 42V EN/UV Pin Threshold EN/UV Rising 10 m 12.5 27 -1.5 l 0.94 EN/UV Pin Hysteresis 1.0 m 1.5 A 1.06 V 40 EN/UV Pin Current VEN/UV = 2V -20 PG Upper Threshold Offset from VFB VFB Falling l 5 PG Lower Threshold Offset from VFB VFB Rising l -5.25 PG Hysteresis mV 20 nA 7.5 10.25 % -8 -10.75 % 0.2 PG Leakage VPG = 3.3V PG Pull-Down Resistance VPG = 0.1V l SYNC/MODE Threshold SYNC/MODE DC and Clock Low Level Voltage SYNC/MODE Clock High Level Voltage SYNC/MODE DC High Level Voltage l l l -40 0.7 2.2 A % 40 nA 700 2000 0.9 1.2 2.55 1.4 2.9 V V V Rev 0 For more information www.analog.com 3 LT8640S-2/LT8643S-2 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. PARAMETER CONDITIONS Spread Spectrum Modulation Frequency Range RT = 60.4k, VSYNC = 3.3V Spread Spectrum Modulation Frequency VSYNC = 3.3V MIN MAX 22 l TR/SS Pull-Down Resistance Fault Condition, TR/SS = 0.1V Output Sink Current in Forced Continuous Mode VFB = 1.01V, L = 6.8H, RT = 60.4k VIN to Disable Forced Continuous Mode VIN Rising 1.2 1.9 UNITS % 3 TR/SS Source Current Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT8640-2E/LT8643E is guaranteed to meet performance specifications from 0C to 125C junction temperature. Specifications over the -40C to 125C operating junction temperature range are assured by design, characterization, and correlation with statistical process controls. The LT8640-2I/LT8643I is guaranteed over the full -40C to 125C operating junction temperature range. The LT8640-2H/LT8643H is guaranteed over the full -40C to 150C operating junction temperature range. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125C. The junction TYP kHz 2.6 200 A 0.25 0.6 1.1 A 35 37 39 V temperature (TJ, in C) is calculated from the ambient temperature (TA in C) and power dissipation (PD, in Watts) according to the formula: TJ = TA + (PD * JA) where JA (in C/W) is the package thermal impedance. Note 3: values determined per JEDEC 51-7, 51-12. See the Applications Information section for information on improving the thermal resistance and for actual temperature measurements of a demo board in typical operating conditions. Note 4: This IC includes overtemperature protection that is intended to protect the device during overload conditions. Junction temperature will exceed 150C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature will reduce lifetime. Rev 0 4 For more information www.analog.com LT8640S-2/LT8643S-2 TYPICAL PERFORMANCE CHARACTERISTICS 12VIN to 3.3VOUT Efficiency vs Frequency 3.2 2.4 90 80 1.6 75 1.2 POWER LOSS 1.6 75 1.2 POWER LOSS 70 3.0 2.7 90 2.4 EFFICIENCY 85 2.1 80 1.8 75 1.5 70 65 60 55 50 1.2 POWER LOSS 0 1 VIN = 12V 0.9 VIN = 24V 0.6 VIN = 36V fSW = 1MHz 0.3 L = IHLP3232DZ-01, 2.2H 0 2 3 4 5 6 LOAD CURRENT (A) 100 50 VIN = 12V VIN = 24V VIN = 36V 40 30 20 0.01 30 20 0.01 fSW = 1MHz L = IHLP3232DZ-01, 4.7H 0.1 1 10 100 LOAD CURRENT (mA) 1000 8640s2 G07 EFFICIENCY (%) EFFICIENCY (%) 100 80 40 1 8640s2 G03 100 LT8643S-2 Low Load Efficiency at 5VOUT 1 10 100 LOAD CURRENT (mA) 60 50 40 VIN = 12V VIN = 24V VIN = 36V 30 20 fSW = 1MHz L = IHLP3232DZ-01, 4.7H 0.1 70 10 0.1 1000 fSW = 1MHz L = IHLP3232DZ-01, 4.7H 1 10 100 LOAD CURRENT (mA) 1000 8640s2 G05 80 VIN = 12V VIN = 24V VIN = 36V 0 1.2 VIN = 12V 0.9 VIN = 24V 0.6 VIN = 36V fSW = 1MHz 0.3 L = IHLP3232DZ-01, 3.3H 0 2 3 4 5 6 LOAD CURRENT (A) 65 80 60 90 50 1.5 POWER LOSS 70 90 70 90 60 75 50 80 LT8640S-2 Low Load Efficiency at 3.3V Efficiency OUT at 3.3V OUT 70 1.8 55 LT8640S-2 Low Load Efficiency at 5VOUT OUT 8640s2 G04 100 2.1 80 60 90 EFFICIENCY (%) 95 2.4 EFFICIENCY 85 8640s2 G02 POWER LOSS (W) EFFICIENCY (%) 100 2.0 80 8640s2 G01 Efficiency at 3.3VOUT 90 L = WE-LHMI1040 0.8 1MHz, L = 2.2H 0.4 65 2MHz, L = 1H 3MHz, L = 1H 0 60 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 LOAD CURRENT (A) L = WE-LHMI1040 0.8 1MHz, L = 3.3H 65 2MHz, L = 2.2H 0.4 3MHz, L = 1H 0 60 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 LOAD CURRENT (A) 70 2.7 2.4 EFFICIENCY 85 2.8 POWER LOSS (W) 2.0 3.0 95 POWER LOSS (W) 85 100 EFFICIENCY (%) EFFICIENCY 95 POWER LOSS (W) EFFICIENCY (%) 90 2.8 Efficiency at 5VOUT 3.2 8640s2 G06 LT8643S-2 Low Load Efficiency at 3.3VOUT 94 92 70 60 50 40 VIN = 12V VIN = 24V VIN = 36V 30 fSW = 1MHz L = IHLP3232DZ-01, 4.7H 20 10 0.1 Efficiency vs Frequency 96 1 10 100 LOAD CURRENT (mA) 1000 8640s2 G08 EFFICIENCY (%) 95 100 EFFICIENCY (%) 100 EFFICIENCY (%) 12VIN to 5VOUT Efficiency vs Frequency Frequency vs 90 88 86 84 VIN = 12V VOUT = 3.3V ILOAD = 2A L = IHLP3232DZ-01, 4.7H 82 80 0 0.5 1 1.5 2 2.5 SWITCHING FREQUENCY (MHz) 3 8640s2 G09 Rev 0 For more information www.analog.com 5 LT8640S-2/LT8643S-2 TYPICAL PERFORMANCE CHARACTERISTICS Burst Mode Operation Efficiency vs Inductor Value (LT8640S-2) Reference Voltage 100 VIN = 12V VIN = 24V 85 80 75 VOUT = 5V ILOAD = 10mA L = IHLP3232DZ-01 70 65 1 2 3 4 5 6 INDUCTOR VALUE (H) 977 1.02 973 971 969 967 -25 0 25 50 75 TEMPERATURE (C) 8640s2 G10 LT8640S-2 Load Regulation 0 0.05 VOUT = 5V VIN = 12V VSYNC = 0V 1 2 3 4 LOAD CURRENT (A) 6 0.30 0.10 0.10 0.00 -0.10 -0.20 -0.40 1 0.02 0.00 -0.02 -0.04 VOUT = 5V VIN = 12V VSYNC = 0V 0 0.04 2 3 4 LOAD CURRENT (A) 5 6 -0.08 VOUT = 5V ILOAD = 1A -0.15 5 10 15 20 25 30 35 INPUT VOLTAGE (V) 40 45 20 25 30 35 INPUT VOLTAGE (V) 3.0 2.5 2.0 1.5 1.0 40 45 VOUT = 5V L = 4.7H IN REGULATION 200 INPUT CURRENT (A) INPUT CURRENT (A) CHANGE IN VOUT (%) 0.09 -0.12 15 225 3.5 -0.09 10 LT8643S-2 No-Load Supply Current 4.0 -0.06 5 8640s2 G15 0.12 0 VOUT = 5V ILOAD = 1A -0.06 8640s2 G14 0.15 125 0.06 LT8640S-2 No-Load Supply Current -0.03 100 0.08 0.20 LT8643S-2 Line Regulation 0.03 0 25 50 75 TEMPERATURE (C) LT8640S-2 Line Regulation 0.12 8640s2 G13 0.06 -25 8640s2 G12 0.40 -0.30 5 EN FALLING 0.95 -50 125 CHANGE IN VOUT (%) CHANGE IN VOUT (%) CHANGE IN VOUT (%) 0.05 0 100 LT8643S-2 Load Regulation 0.10 -0.15 0.98 8640s2 G11 0.15 -0.10 0.99 0.96 961 -50 8 1.00 0.97 965 963 7 EN RISING 1.01 EN THRESHOLD (V) EFFICIENCY (%) 90 1.03 975 REFERENCE VOLTAGE (mV) 95 EN Pin Thresholds 979 VOUT = 3.3V L = 4.7H IN REGULATION 0 5 10 15 20 25 30 35 INPUT VOLTAGE (V) 8640s2 G16 40 175 150 125 100 75 50 45 8640s2 G17 25 5 10 15 20 25 30 35 INPUT VOLTAGE (V) 40 45 8640s2 G18 Rev 0 6 For more information www.analog.com LT8640S-2/LT8643S-2 TYPICAL PERFORMANCE CHARACTERISTICS Top FET Current Limit vs Duty Cycle Top FET Current Limit Switch Drop vs Temperature 12 11.0 150 SWITCH CURRENT = 1A 10.5 125 9.0 8.5 8.0 7.5 10 SWITCH DROP (mV) 11 9.5 CURRENT LIMIT (A) CURRENT LIMIT (A) 10.0 5% DC 9 7.0 100 TOP SWITCH 75 50 25 BOTTOM SWITCH 6.5 6.0 0.1 0.3 0.5 DUTY CYCLE 0.7 8 -50 0.9 -25 0 25 50 75 TEMPERATURE (C) 100 600 DROPOUT VOLTAGE (mV) SWITCH DROP (mV) 350 300 TOP SWITCH 200 150 100 0 400 300 200 BOTTOM SWITCH 0 1 2 3 4 SWITCH CURRENT (A) 0 5 0 0.5 1 1.5 2 2.5 3 3.5 LOAD CURRENT (A) Switching Frequency 720 710 700 690 680 670 -25 0 25 50 75 TEMPERATURE (C) 4 4.5 20 -50 5 100 125 8640s2 G25 ILOAD = 2A VOUT = 0.97V fSW = 3MHz -25 0 25 50 75 TEMPERATURE (C) 1.2 1000 1.0 800 0.8 600 400 0 FRONT PAGE APPLICATION VIN = 12V VOUT = 5V 0 100 200 300 400 LOAD CURRENT (mA) 125 LT8640S-2 Soft-Start Tracking 1200 200 100 8640s2 G24 FB VOLTAGE (V) RT = 60.4k 660 -50 28 Burst Frequency SWITCHING FREQUENCY (kHz) SWITCHING FREQUENCY (kHz) 730 32 8640s2 G23 8640s2 G22 740 36 24 100 50 125 Burst Mode OPERATION FORCED CONTINUOUS MODE 40 MINIMUM ON-TIME (ns) 500 100 Minimum On-Time 44 VIN = 5V VOUT SET TO REGULATE AT 5V L = IHLP3232DZ-01, 1H 450 0 25 50 75 TEMPERATURE (C) 8640s2 G21 Dropout Voltage Switch Drop vs Switch Current 500 400 -25 8640s2 G20 8640s2 G19 250 0 -50 125 500 600 8640s2 G26 0.6 0.4 0.2 0 0 0.2 1.0 0.4 0.6 0.8 TR/SS VOLTAGE (V) 1.2 1.4 8640s2 G27 Rev 0 For more information www.analog.com 7 LT8640S-2/LT8643S-2 TYPICAL PERFORMANCE CHARACTERISTICS LT8643S-2 Soft-Start Tracking 2.2 1.2 0.4 1.9 1.8 1.7 1.6 0.2 0.4 0.6 0.8 1 1.2 TR/SS VOLTAGE (V) 1.4 1.6 1.4 -50 -500 -200 -25 0 25 50 75 TEMPERATURE (C) 100 PG THRESHOLD OFFSET FROM VREF (%) PG THRESHOLD OFFSET FROM VREF (%) 9.0 FB RISING 7.5 FB FALLING 6.5 -25 0 25 50 75 TEMPERATURE (C) 100 125 250 -6.5 225 -7.5 FB RISING -8.0 FB FALLING -8.5 -9.0 100 75 25 -25 0 25 50 75 TEMPERATURE (C) 100 0 0.2 125 Bias Pin Current 2.6 125 8640s2 G34 3 Bias Pin Current 25 7.5 7.0 6.5 VBIAS = 5V VOUT = 5V ILOAD = 1A fSW = 1MHz 6.0 100 0.6 1.4 1.8 2.2 2.6 1 SWITCHING FREQUENCY (MHz) 8640s2 G33 BIAS PIN CURRENT (mA) INPUT VOLTAGE (V) 125 8640s2 G32 8.0 0 25 50 75 TEMPERATURE (C) 150 50 -10.0 -50 3.4 -25 175 -9.5 8.5 2.8 200 200 -7.0 Minimum Input Voltage 3.0 -100 0 100 FB PIN ERROR VOLTAGE (mV) 8640s2 G30 -6.0 3.6 3.2 VC = 1.25V RT Programmed Switching Frequency 8640s2 G31 2.4 -50 125 PG Low Thresholds 9.5 6.0 -50 -250 8640s2 G29 10.0 7.0 -125 -375 PG High Thresholds 8.0 0 1.5 8640s2 G28 8.5 125 RT PIN RESISTOR (k) 0.2 250 BIAS PIN CURRENT (mA) 0 VC PIN CURRENT (A) 0.6 375 2.0 TR/SS PIN CURRENT (A) FB VOLTAGE (V) 0.8 500 VSS = 0.5V 2.1 1.0 0 LT8643S-2 Error Amp Output Current Soft-Start Current 5.5 5 10 15 20 25 30 35 INPUT VOLTAGE (V) 40 45 8640s2 G35 20 VBIAS = 5V VOUT = 5V VIN = 12V ILOAD = 1A 15 10 5 0 0.2 0.6 1 1.4 1.8 2.2 2.6 SWITCHING FREQUENCY (MHz) 3.0 8640s2 G36 Rev 0 8 For more information www.analog.com LT8640S-2/LT8643S-2 TYPICAL PERFORMANCE CHARACTERISTICS Case Temperature Rise vs 7A Pulsed Load Case Temperature Rise 80 90 DC2530A DEMO BOARD VIN = 12V, fSW = 1MHz VIN = 24V, fSW = 1MHz VIN = 12V, fSW = 2MHz VIN = 24V, fSW = 2MHz 60 50 40 30 20 10 0 DC2530A DEMO BOARD VIN = 12V VOUT = 5V fSW = 2MHz STANDBY LOAD = 0.25A 1kHz PULSED LOAD = 7A 80 CASE TEMPERATURE RISE (C) CASE TEMPERATURE RISE (C) 70 Switching Rising Edge 70 60 VSW 2V/DIV 50 40 30 20 10 0 1 2 3 4 LOAD CURRENT (A) 5 6 0 0 0.2 0.4 0.6 0.8 DUTY CYCLE OF 7A LOAD 8640s2 G37 1 Switching Waveforms, Burst Mode Operation Switching Waveforms IL 1A/DIV IL 500mA/DIV VSW 5V/DIV VSW 10V/DIV VSW 5V/DIV 500ns/DIV 8640s2 G40 8640s2 G41 5s/DIV FRONT PAGE APPLICATION 12VIN TO 5VOUT AT 10mA VSYNC = 0V FRONT PAGE APPLICATION 12VIN TO 5VOUT AT 1A ILOAD 2A/DIV ILOAD 2A/DIV VOUT 100mV/DIV VOUT 100mV/DIV FRONT PAGE APPLICATION 2A TO 4A TRANSIENT 12VIN, 5VOUT fSW = 2MHz COUT = 100F, CLEAD = 10pF 500ns/DIV FRONT PAGE APPLICATION 36VIN TO 5VOUT AT 1A 8640s2 G42 LT8643S-2 Transient Response; External Compensation LT8640S-2 Transient Response; Internal Compensation 20s/DIV 8640s2 G39 8640s2 G38 Switching Waveforms, Full Frequency Continuous Operation IL 1A/DIV 2ns/DIV VIN = 12V ILOAD = 2A 8640s2 G43 20s/DIV 8640s2 G44 FRONT PAGE APPLICATION 2A TO 4A TRANSIENT 12VIN, 5VOUT fSW = 2MHz CC = 330pF, RC = 8.45k COUT = 100F, CLEAD = 4.7pF Rev 0 For more information www.analog.com 9 LT8640S-2/LT8643S-2 TYPICAL PERFORMANCE CHARACTERISTICS LT8640S-2 Transient Response; 100mA to 1.1A Transient LT8643S-2 Transient Response; 100mA to 1.1A Transient ILOAD 1A/DIV ILOAD 1A/DIV Burst Mode OPERATION Burst Mode OPERATION VOUT 100mV/DIV VOUT 100mV/DIV FCM FCM 8640s2 G45 50s/DIV VIN 2V/DIV VOUT 2V/DIV 8640s2 G46 FRONT PAGE APPLICATION 100mA TO 1.1A TRANSIENT 12VIN, 5VOUT, fSW = 1MHz COUT = 100F 50s/DIV FRONT PAGE APPLICATION CC = 330pF, RC = 6.49k, CLEAD = 4.7pF 100mA TO 1.1A TRANSIENT 12VIN, 5VOUT, fSW = 1MHz COUT = 100F Start-Up Dropout Performance Start-Up Dropout Performance VIN VOUT 100ms/DIV 2.5 LOAD (2A IN REGULATION) VIN VIN 2V/DIV VOUT VOUT 2V/DIV 8640s2 G47 100ms/DIV 20 LOAD (250mA IN REGULATION) 8640s2 G48 Rev 0 10 For more information www.analog.com LT8640S-2/LT8643S-2 TYPICAL PERFORMANCE CHARACTERISTICS Conducted EMI Performance Conducted EMI Performance 60 50 AMPLITUDE (dBV) 40 30 20 10 0 -10 -20 SPREAD SPECTRUM MODE FIXED FREQUENCY MODE -30 -40 0 3 6 9 12 15 18 FREQUENCY (MHz) DC2530A DEMO BOARD USING LT8640S (WITH EMI FILTER INSTALLED) 14V INPUT TO 5V OUTPUT AT 4A, fSW = 2MHz 21 24 27 30 8640s2 G49 Radiated EMI Performance (CISPR25 Radiated Emission Test with Class 5 Peak Limits) 50 VERTICAL POLARIZATION PEAK DETECTOR 45 AMPLITUDE (dBV/m) 40 35 30 25 20 15 10 5 CLASS 5 PEAK LIMIT SPREAD SPECTRUM MODE FIXED FREQUENCY MODE 0 -5 0 100 200 300 400 500 600 FREQUENCY (MHz) 700 800 900 1000 8640s2 G50a 50 HORIZONTAL POLARIZATION PEAK DETECTOR 45 AMPLITUDE (dBV/m) 40 35 30 25 20 15 10 5 CLASS 5 PEAK LIMIT SPREAD SPECTRUM MODE FIXED FREQUENCY MODE 0 -5 0 100 200 300 400 500 600 FREQUENCY (MHz) DC2530A DEMO BOARD USING LT8640S (WITH EMI FILTER INSTALLED) 14V INPUT TO 5V OUTPUT AT 4A, fSW = 2MHz 700 800 900 1000 8640s2 G50b Rev 0 For more information www.analog.com 11 LT8640S-2/LT8643S-2 PIN FUNCTIONS BIAS (Pin 1): The internal regulator will draw current from BIAS instead of VIN when BIAS is tied to a voltage higher than 3.1V. For output voltages of 3.3V to 25V this pin should be tied to VOUT. If this pin is tied to a supply other than VOUT use a 1F local bypass capacitor on this pin. If no supply is available, tie to GND. However, especially for high input or high frequency applications, BIAS should be tied to output or an external supply of 3.3V or above. BST (Pin 7): This pin is used to provide a drive voltage, higher than the input voltage, to the topside power switch. Place a 0.1F boost capacitor as close as possible to the IC. INTVCC (Pin 2): Internal 3.4V Regulator Bypass Pin. The internal power drivers and control circuits are powered from this voltage. INTVCC maximum output current is 20mA. Do not load the INTVCC pin with external circuitry. INTVCC current will be supplied from BIAS if BIAS > 3.1V, otherwise current will be drawn from VIN. Voltage on INTVCC will vary between 2.8V and 3.4V when BIAS is between 3.0V and 3.6V. Place a low ESR ceramic capacitor of at least 1F from this pin to ground close to the IC. EN/UV (Pin 17): The LT8640S-2/LT8643S-2 is shut down when this pin is low and active when this pin is high. The hysteretic threshold voltage is 1.00V going up and 0.96V going down. Tie to VIN if the shutdown feature is not used. An external resistor divider from VIN can be used to program a VIN threshold below which the LT8640S-2/ LT8643S-2 will shut down. GND (Pins 3, 16, Exposed Pad Pins 25-28): Ground. Place the negative terminal of the input capacitor as close to the GND pins as possible. The exposed pads should be soldered to the PCB for good thermal performance. If necessary due to manufacturing limitations Pins 25 to 28 may be left disconnected, however thermal performance will be degraded. NC (Pins 4, 15): No Connect. This pin is not connected to internal circuitry and can be tied anywhere on the PCB, typically ground. VIN (Pins 5, 6, 13, 14): The VIN pins supply current to the LT8640S-2/LT8643S-2 internal circuitry and to the internal topside power switch. The LT8640S-2/LT8643S-2 requires the use of multiple VIN bypass capacitors. Two small 1F capacitors should be placed as close as possible to the LT8640S-2/LT8643S-2, one capacitor on each side of the device (CIN1, CIN2). A third capacitor with a larger value, 2.2F or higher, should be placed near CIN1 or CIN2. See Applications Information section for sample layout. SW (Pins 8-12): The SW pins are the outputs of the internal power switches. Tie these pins together and connect them to the inductor. This node should be kept small on the PCB for good performance and low EMI. RT (Pin 18): A resistor is tied between RT and ground to set the switching frequency. CLKOUT (Pin 19): In forced continuous mode, spread spectrum, and synchronization modes, the CLKOUT pin will provide a ~200ns wide pulse at the switch frequency. The low and high levels of the CLKOUT pin are ground and INTVCC respectively, and the drive strength of the CLKOUT pin is several hundred ohms. In Burst Mode operation, the CLKOUT pin will be low. Float this pin if the CLKOUT function is not used. SYNC/MODE (Pin 20): For the LT8640S-2/LT8643S-2, this pin programs four different operating modes: 1) Burst Mode operation. Tie this pin to ground for Burst Mode operation at low output loads--this will result in ultralow quiescent current. 2) Forced Continuous mode (FCM). This mode offers fast transient response and full frequency operation over a wide load range. Float this pin for FCM. When floating, pin leakage currents should be <1A. See Block Diagram for internal pull-up and pull-down resistance. 3) Spread spectrum mode. Tie this pin high to INTVCC (~3.4V) or an external supply of 3V to 4V for forced continuous mode with spreadspectrum modulation. 4) Synchronization mode. Drive this pin with a clock source to synchronize to an external frequency. During synchronization the part will operate in forced continuous mode. Rev 0 12 For more information www.analog.com LT8640S-2/LT8643S-2 PIN FUNCTIONS TR/SS (Pin 21): Output Tracking and Soft-Start Pin. This pin allows user control of output voltage ramp rate during start-up. For the LT8640S-2, a TR/SS voltage below 0.97V forces it to regulate the FB pin to equal the TR/SS pin voltage. When TR/SS is above 0.97V, the tracking function is disabled and the internal reference resumes control of the error amplifier. For the LT8643S-2, a TR/SS voltage below 1.6V forces it to regulate the FB pin to a function of the TR/SS pin voltage. See plot in the Typical Performance Characteristics section. When TR/SS is above 1.6V, the tracking function is disabled and the internal reference resumes control of the error amplifier. An internal 1.9A pull-up current from INTVCC on this pin allows a capacitor to program output voltage slew rate. This pin is pulled to ground with an internal 200 MOSFET during shutdown and fault conditions; use a series resistor if driving from a low impedance output. This pin may be left floating if the tracking function is not needed. GND (Pin 22, LT8640S-2 Only): Ground. Connect this pin to system ground and to the ground plane. VC (Pin 22, LT8643S-2 Only): The VC pin is the output of the internal error amplifier. The voltage on this pin controls the peak switch current. Tie an RC network from this pin to ground to compensate the control loop. PG (Pin 23): The PG pin is the open-drain output of an internal comparator. PG remains low until the FB pin is within 8% of the final regulation voltage, and there are no fault conditions. PG is also pulled low when EN/UV is below 1V, INTVCC has fallen too low, VIN is too low, or thermal shutdown. PG is valid when VIN is above 3.4V. FB (Pin 24): The LT8640S-2/LT8643S-2 regulates the FB pin to 0.970V. Connect the feedback resistor divider tap to this pin. Also, connect a phase lead capacitor between FB and VOUT. Typically, this capacitor is 4.7pF to 22pF. Corner Pins: These pins are for mechanical support only and can be tied anywhere on the PCB, typically ground. Rev 0 For more information www.analog.com 13 LT8640S-2/LT8643S-2 BLOCK DIAGRAM VIN 13, 14 VIN 5, 6 VIN CIN3 CIN1 R3 OPT 22 RC 23 CC EN/UV VC 1V + - SHDN R2 PG R1 24 21 RT 18 INTVCC 2 CVCC OSCILLATOR 200kHz TO 3MHz ERROR AMP 8% BST FB TR/SS VC CBST M1 SHDN THERMAL SHDN INTVCC UVLO VIN UVLO LT8640S-2 ONLY SWITCH LOGIC AND ANTI-SHOOT THROUGH SHDN THERMAL SHDN VIN UVLO 1.9A 7 BURST DETECT SW 8-12 L VOUT COUT M2 GND 3, 16, 25-28 RT INTVCC 20 1 LT8643S-2 ONLY + + - CSS OPT BIAS 3.4V REG SLOPE COMP VOUT C1 - + INTERNAL 0.97V REF 17 R4 OPT CF CIN2 SYNC/MODE GND 60k CLKOUT 22 LT8640S-2 ONLY 19 600k 8640s2 BD Rev 0 14 For more information www.analog.com LT8640S-2/LT8643S-2 OPERATION The LT8640S-2/LT8643S-2 is a monolithic, constant frequency, current mode step-down DC/DC converter. An oscillator, with frequency set using a resistor on the RT pin, turns on the internal top power switch at the beginning of each clock cycle. Current in the inductor then increases until the top switch current comparator trips and turns off the top power switch. The peak inductor current at which the top switch turns off is controlled by the voltage on the internal VC node. The error amplifier servos the VC node by comparing the voltage on the VFB pin with an internal 0.97V reference. When the load current increases it causes a reduction in the feedback voltage relative to the reference leading the error amplifier to raise the VC voltage until the average inductor current matches the new load current. When the top power switch turns off, the synchronous power switch turns on until the next clock cycle begins or inductor current falls to zero. If overload conditions result in more than 10A flowing through the bottom switch, the next clock cycle will be delayed until switch current returns to a safe level. If the EN/UV pin is low, the LT8640S-2/LT8643S-2 is shut down and draws 1A from the input. When the EN/UV pin is above 1V, the switching regulator will become active. To optimize efficiency at light loads, the LT8640S-2/ LT8643S-2 operates in Burst Mode operation in light load situations. Between bursts, all circuitry associated with controlling the output switch is shut down, reducing the input supply current to 1.7A (LT8640S-2) or 230A (LT8643S-2 with BIAS = 0). In a typical application, 2.5A (LT8640S-2) or 120A (LT8643S-2 with BIAS = 5VOUT) will be consumed from the input supply when regulating with no load. The SYNC/MODE pin is tied low to use Burst Mode operation and can be floated to use forced continuous mode (FCM). If a clock is applied to the SYNC/ MODE pin, the part will synchronize to an external clock frequency and operate in FCM. The LT8640S-2/LT8643S-2 can operate in forced continuous mode (FCM) for fast transient response and full frequency operation over a wide load range. When in FCM the oscillator operates continuously and positive SW transitions are aligned to the clock. Negative inductor current is allowed. The LT8640S-2/LT8643S-2 can sink current from the output and return this charge to the input in this mode, improving load step transient response. To improve EMI, the LT8640S-2/LT8643S-2 can operate in spread spectrum mode. This feature varies the clock with a triangular frequency modulation of +20%. For example, if the LT8640S-2/LT8643S-2's frequency is programmed to switch at 2MHz, spread spectrum mode will modulate the oscillator between 2MHz and 2.4MHz. The SYNC/MODE pin should be tied high to INTVCC (~3.4V) or an external supply of 3V to 4V to enable spread spectrum modulation with forced continuous mode. To improve efficiency across all loads, supply current to internal circuitry can be sourced from the BIAS pin when biased at 3.3V or above. Else, the internal circuitry will draw current from VIN. The BIAS pin should be connected to VOUT if the LT8640S-2/LT8643S-2 output is programmed at 3.3V to 25V. The VC pin optimizes the loop compensation of the switching regulator based on the programmed switching frequency, allowing for a fast transient response. The VC pin also enables current sharing and a CLKOUT pin enables synchronizing other regulators to the LT8643S-2. Comparators monitoring the FB pin voltage will pull the PG pin low if the output voltage varies more than 8% (typical) from the set point, or if a fault condition is present. The oscillator reduces the LT8640S-2/LT8643S-2's operating frequency when the voltage at the FB pin is low. This frequency foldback helps to control the inductor current when the output voltage is lower than the programmed value which occurs during start-up or overcurrent conditions. When a clock is applied to the SYNC/MODE pin, the SYNC/MODE pin is floated, or held DC high, the frequency foldback is disabled and the switching frequency will slow down only during overcurrent conditions. Rev 0 For more information www.analog.com 15 LT8640S-2/LT8643S-2 APPLICATIONS INFORMATION Low EMI PCB Layout The LT8640S-2/LT8643S-2 is specifically designed to minimize EMI emissions and also to maximize efficiency when switching at high frequencies. For optimal performance the LT8640S-2/LT8643S-2 requires the use of multiple VIN bypass capacitors. Two small 1F capacitors should be placed as close as possible to the LT8640S-2/LT8643S-2, one capacitor on each side of the device (CIN1, CIN2). A third capacitor with a larger value, 2.2F or higher, should be placed near CIN1 or CIN2. See Figure 1 for a recommended PCB layouts. For more detail and PCB design files refer to the Demo Board guide for the LT8640S-2/LT8643S-2. Note that large, switched currents flow in the LT8640S-2/ LT8643S-2 VIN and GND pins and the input capacitors. The loops formed by the input capacitors should be as small as possible by placing the capacitors adjacent to the VIN and GND pins. Capacitors with small case size such as 0603 are optimal due to lowest parasitic inductance. The input capacitors, along with the inductor and output capacitors, should be placed on the same side of the circuit board, and their connections should be made on that layer. Place a local, unbroken ground plane under the application circuit on the layer closest to the surface layer. The SW and BOOST nodes should be as small as possible. Finally, keep the FB and RT nodes small so that the ground traces will shield them from the SW and BOOST nodes. CC R2 R2 C1 CF RC CSS CSS C1 RT R1 RT R1 CVCC CVCC CIN3 CIN1 CIN3 CIN2 CIN1 CIN2 CBST CBST COUT COUT L L 8640s2 F01a GROUND VIA VIN VIA VOUT VIA OTHER SIGNAL VIAS 8640s2 F01b GROUND VIA (a) LT8640S-2 VIN VIA VOUT VIA OTHER SIGNAL VIAS (b) LT8643S-2 Figure 1. Recommended PCB Layouts for the LT8640S-2 and LT8643S-2 Rev 0 16 For more information www.analog.com LT8640S-2/LT8643S-2 APPLICATIONS INFORMATION The exposed pads on the bottom of the package should be soldered to the PCB to reduce thermal resistance to ambient. To keep thermal resistance low, extend the ground plane from GND as much as possible, and add thermal vias to additional ground planes within the circuit board and on the bottom side. Burst Mode Operation To enhance efficiency at light loads, the LT8640S-2/ LT8643S-2 operates in low ripple Burst Mode operation, which keeps the output capacitor charged to the desired output voltage while minimizing the input quiescent current and minimizing output voltage ripple. In Burst Mode operation the LT8640S-2/LT8643S-2 delivers single small pulses of current to the output capacitor followed by sleep periods where the output power is supplied by the output capacitor. While in sleep mode the LT8640S-2 consumes 1.7A and the LT8643S-2 consumes 230A. As the output load decreases, the frequency of single current pulses decreases (see Figure 2) and the percentage of time the LT8640S-2/LT8643S-2 is in sleep mode increases, resulting in much higher light load efficiency than for typical converters. By maximizing the time between pulses, the LT8640S-2's quiescent current approaches 2.5A for a typical application when there is no output load. Therefore, to optimize the quiescent current performance at light loads, the current in the feedback resistor divider must be minimized as it appears to the output as load current. In order to achieve higher light load efficiency, more energy must be delivered to the output during the single small pulses in Burst Mode operation such that the LT8640S-2/LT8643S-2 can stay in sleep mode longer between each pulse. This can be achieved by using a larger value inductor (i.e., 4.7H), and should be considered independent of switching frequency when choosing an inductor. For example, while a lower inductor value would typically be used for a high switching frequency application, if high light load efficiency is desired, a higher inductor value should be chosen. See curve in Typical Performance Characteristics. While in Burst Mode operation the current limit of the top switch is approximately 900mA (as shown in Figure 3), resulting in low output voltage ripple. Increasing the output capacitance will decrease output ripple proportionally. As load ramps upward from zero the switching frequency will increase but only up to the switching frequency programmed by the resistor at the RT pin as shown in Figure 2. The output load at which the LT8640S-2/LT8643S-2 reaches the programmed frequency varies based on input voltage, output voltage and inductor choice. To select low ripple Burst Mode operation, tie the SYNC/MODE pin below 0.4V (this can be ground or a logic low output). SWITCHING FREQUENCY (kHz) 1200 1000 800 IL 500mA/DIV 600 400 0 VSW 5V/DIV FRONT PAGE APPLICATION VIN = 12V VOUT = 5V 200 0 100 200 300 400 LOAD CURRENT (mA) 500 5s/DIV FRONT PAGE APPLICATION 12VIN TO 5VOUT AT 10mA VSYNC = 0V 600 8640s2 F02 Figure 2. SW Frequency vs Load Information in Burst Mode Operation 8640s2 F03 Figure 3. Burst Mode Operation Rev 0 For more information www.analog.com 17 LT8640S-2/LT8643S-2 APPLICATIONS INFORMATION Forced Continuous Mode The LT8640S-2/LT8643S-2 can operate in forced continuous mode (FCM) for fast transient response and full frequency operation over a wide load range. When in FCM, the oscillator operates continuously and positive SW transitions are aligned to the clock. Negative inductor current is allowed at light loads or under large transient conditions. The LT8640S-2/LT8643S-2 can sink current from the output and return this charge to the input in this mode, improving load step transient response (see Figure 4). At light loads, FCM operation is less efficient than Burst Mode operation, but may be desirable in applications where it is necessary to keep switching harmonics out of the signal band. FCM must be used if the output is required to sink current. To enable FCM, float the SYNC/MODE pin. Leakage current on this pin should be <1A. See Block Diagram for internal pull-up and pull-down resistance. FCM is disabled if the VIN pin is held above 37V or if the FB pin is held greater than 8% above the feedback reference voltage. FCM is also disabled during soft-start until the soft-start capacitor is fully charged. When FCM is disabled in these ways, negative inductor current is not allowed and the LT8640S-2/LT8643S-2 operates in pulse-skipping mode. ILOAD 1A/DIV Burst Mode OPERATION VOUT 100mV/DIV FCM 50s/DIV 8640s2 F04 FRONT PAGE APPLICATION 100mA TO 1.1A TRANSIENT 12VIN, 5VOUT, fSW = 1MHz COUT = 100F Figure 4. LT8640S-2 Load Step Transient Response with and without Forced Continuous Mode For robust operation over a wide VIN and VOUT range, use an inductor value greater than LMIN: LMIN = VOUT V * 1- OUT 2 * fSW VIN,MAX Spread Spectrum Mode The LT8640S-2/LT8643S-2 features spread spectrum operation to further reduce EMI emissions. To enable spread spectrum operation, the SYNC/MODE pin should be tied high to INTVCC (~3.4V)or an external supply of 3V to 4V. In this mode, triangular frequency modulation is used to vary the switching frequency between the value programmed by RT to approximately 20% higher than that value. The modulation frequency is approximately 3kHz. For example, when the LT8640S-2/LT8643S-2 is programmed to 2MHz, the frequency will vary from 2MHz to 2.4MHz at a 3kHz rate. When spread spectrum operation is selected, Burst Mode operation is disabled, and the part will run in forced continuous mode. Synchronization To synchronize the LT8640S-2/LT8643S-2 oscillator to an external frequency, connect a square wave to the SYNC/ MODE pin. The square wave amplitude should have valleys that are below 0.4V and peaks above 1.5V (up to 6V) with a minimum on-time and off-time of 50ns. The LT8640S-2/LT8643S-2 will not enter Burst Mode operation at low output loads while synchronized to an external clock, but instead will run forced continuous mode to maintain regulation. The LT8640S-2/LT8643S-2 may be synchronized over a 200kHz to 3MHz range. The RT resistor should be chosen to set the LT8640S-2/ LT8643S-2 switching frequency equal to or below the lowest synchronization input. For example, if the synchronization signal will be 500kHz and higher, the RT should be selected for 500kHz. The slope compensation is set by the RT value, while the minimum slope compensation required to avoid subharmonic oscillations is established by the inductor size, input voltage and output voltage. Since the synchronization frequency will not change the slopes of the inductor current waveform, if the inductor Rev 0 18 For more information www.analog.com LT8640S-2/LT8643S-2 APPLICATIONS INFORMATION is large enough to avoid subharmonic oscillations at the frequency set by RT, then the slope compensation will be sufficient for all synchronization frequencies. FB Resistor Network The output voltage is programmed with a resistor divider between the output and the FB pin. Choose the resistor values according to: V R1= R2 OUT - 1 0.970V (1) The RT resistor required for a desired switching frequency can be calculated using: RT = 46.5 - 5.2 fSW where RT is in k and fSW is the desired switching frequency in MHz. Table 1. SW Frequency vs RT Value fSW (MHz) RT (k) 0.2 232 0.3 150 0.4 110 0.5 88.7 0.6 71.5 0.7 60.4 0.8 52.3 1.0 41.2 1.2 33.2 1.4 28.0 1.6 23.7 1.8 20.5 2.0 17.8 2.2 15.8 3.0 10.7 Reference designators refer to the Block Diagram. 1% resistors are recommended to maintain output voltage accuracy. For the LT8640S-2, if low input quiescent current and good light-load efficiency are desired, use large resistor values for the FB resistor divider. The current flowing in the divider acts as a load current, and will increase the noload input current to the converter, which is approximately: V V 1 IQ = 1.7A + OUT OUT R1+R2 VIN n (3) (2) where 1.7A is the quiescent current of the LT8640S-2 and the second term is the current in the feedback divider reflected to the input of the buck operating at its light load efficiency n. For a 3.3V application with R1 = 1M and R2 = 412k, the feedback divider draws 2.3A. With VIN = 12V and n = 80%, this adds 0.8A to the 1.7A quiescent current resulting in 2.5A no-load current from the 12V supply. Note that this equation implies that the no-load current is a function of VIN; this is plotted in the Typical Performance Characteristics section. Operating Frequency Selection and Trade-Offs Selection of the operating frequency is a trade-off between efficiency, component size, and input voltage range. The advantage of high frequency operation is that smaller inductor and capacitor values may be used. The disadvantages are lower efficiency and a smaller input voltage range. When using large FB resistors, a 4.7pF to 22pF phase-lead capacitor should be connected from VOUT to FB. The highest switching frequency (fSW(MAX)) for a given application can be calculated as follows: Setting the Switching Frequency The LT8640S-2/LT8643S-2 uses a constant frequency PWM architecture that can be programmed to switch from 200kHz to 3MHz by using a resistor tied from the RT pin to ground. A table showing the necessary RT value for a desired switching frequency is in Table 1. fSW(MAX) = ( VOUT + VSW(BOT) tON(MIN) VIN - VSW(TOP) + VSW(BOT) ) (4) where VIN is the typical input voltage, VOUT is the output voltage, VSW(TOP) and VSW(BOT) are the internal switch drops (~0.4V, ~0.15V, respectively at maximum load) Rev 0 For more information www.analog.com 19 LT8640S-2/LT8643S-2 APPLICATIONS INFORMATION and tON(MIN) is the minimum top switch on-time (see the Electrical Characteristics). This equation shows that a slower switching frequency is necessary to accommodate a high VIN/VOUT ratio. A good first choice for the inductor value is: For transient operation, VIN may go as high as the absolute maximum rating of 42V regardless of the RT value, however the LT8640S-2/LT8643S-2 will reduce switching frequency as necessary to maintain control of inductor current to assure safe operation. where fSW is the switching frequency in MHz, VOUT is the output voltage, VSW(BOT) is the bottom switch drop (~0.15V) and L is the inductor value in H. The LT8640S-2/LT8643S-2 is capable of a maximum duty cycle of approximately 99%, and the VIN-to-VOUT dropout is limited by the RDS(ON) of the top switch. In this mode the LT8640S-2/LT8643S-2 skips switch cycles, resulting in a lower switching frequency than programmed by RT. For applications that cannot allow deviation from the programmed switching frequency at low VIN/VOUT ratios use the following formula to set switching frequency: VIN(MIN) = VOUT + VSW(BOT) 1- fSW * tOFF(MIN) - VSW(BOT) + VSW(TOP) (5) where VIN(MIN) is the minimum input voltage without skipped cycles, VOUT is the output voltage, VSW(TOP) and VSW(BOT) are the internal switch drops (~0.4V, ~0.15V, respectively at maximum load), fSW is the switching frequency (set by RT), and tOFF(MIN) is the minimum switch off-time. Note that higher switching frequency will increase the minimum input voltage below which cycles will be dropped to achieve higher duty cycle. Inductor Selection and Maximum Output Current The LT8640S-2/LT8643S-2 is designed to minimize solution size by allowing the inductor to be chosen based on the output load requirements of the application. During overload or short-circuit conditions the LT8640S-2/ LT8643S-2 safely tolerates operation with a saturated inductor through the use of a high speed peak-current mode architecture. VOUT + VSW(BOT) L= * 0.7 fSW (6) To avoid overheating and poor efficiency, an inductor must be chosen with an RMS current rating that is greater than the maximum expected output load of the application. In addition, the saturation current (typically labeled ISAT) rating of the inductor must be higher than the load current plus 1/2 of in inductor ripple current: 1 IL(PEAK) =ILOAD(MAX) + IL 2 (7) where IL is the inductor ripple current as calculated in Equation 9 and ILOAD(MAX) is the maximum output load for a given application. As a quick example, an application requiring 3A output should use an inductor with an RMS rating of greater than 3A and an ISAT of greater than 4A. During long duration overload or short-circuit conditions, the inductor RMS rating requirement is greater to avoid overheating of the inductor. To keep the efficiency high, the series resistance (DCR) should be less than 0.02, and the core material should be intended for high frequency applications. The LT8640S-2/LT8643S-2 limits the peak switch current in order to protect the switches and the system from overload faults. The top switch current limit (ILIM) is 10A at low duty cycles and decreases linearly to 7A at DC = 0.8. The inductor value must then be sufficient to supply the desired maximum output current (IOUT(MAX)), which is a function of the switch current limit (ILIM) and the ripple current. IOUT(MAX) =ILIM - IL 2 (8) Rev 0 20 For more information www.analog.com LT8640S-2/LT8643S-2 APPLICATIONS INFORMATION The peak-to-peak ripple current in the inductor can be calculated as follows: IL = VOUT V * 1- OUT L * fSW VIN(MAX) (9) where fSW is the switching frequency of the LT8640S-2/ LT8643S-2, and L is the value of the inductor. Therefore, the maximum output current that the LT8640S-2/ LT8643S-2 will deliver depends on the switch current limit, the inductor value, and the input and output voltages. The inductor value may have to be increased if the inductor ripple current does not allow sufficient maximum output current (IOUT(MAX)) given the switching frequency, and maximum input voltage used in the desired application. In order to achieve higher light load efficiency, more energy must be delivered to the output during the single small pulses in Burst Mode operation such that the LT8640S-2/LT8643S-2 can stay in sleep mode longer between each pulse. This can be achieved by using a larger value inductor (i.e., 4.7H), and should be considered independent of switching frequency when choosing an inductor. For example, while a lower inductor value would typically be used for a high switching frequency application, if high light load efficiency is desired, a higher inductor value should be chosen. See curve in Typical Performance Characteristics. The optimum inductor for a given application may differ from the one indicated by this design guide. A larger value inductor provides a higher maximum load current and reduces the output voltage ripple. For applications requiring smaller load currents, the value of the inductor may be lower and the LT8640S-2/LT8643S-2 may operate with higher ripple current. This allows use of a physically smaller inductor, or one with a lower DCR resulting in higher efficiency. Be aware that low inductance may result in discontinuous mode operation, which further reduces maximum load current. For more information about maximum output current and discontinuous operation, see Analog Devices Application Note 44. For duty cycles greater than 50% (VOUT/VIN > 0.5), a minimum inductance is required to avoid sub-harmonic oscillation. See Application Note 19. Input Capacitors The VIN of the LT8640S-2/LT8643S-2 should be bypassed with at least three ceramic capacitors for best performance. Two small ceramic capacitors of 1F should be placed close to the part; one on each side of the device (CIN1, CIN2). These capacitors should be 0402 or 0603 in size. For automotive applications requiring 2 series input capacitors, two small 0402 or 0603 may be placed at each side of the LT8640S-2/LT8643S-2 near the VIN and GND pins. A third, larger ceramic capacitor of 2.2F or larger should be placed close to CIN1 or CIN2. See layout section for more detail. X7R or X5R capacitors are recommended for best performance across temperature and input voltage variations. Note that larger input capacitance is required when a lower switching frequency is used. If the input power source has high impedance, or there is significant inductance due to long wires or cables, additional bulk capacitance may be necessary. This can be provided with a low performance electrolytic capacitor. A ceramic input capacitor combined with trace or cable inductance forms a high quality (under damped) tank circuit. If the LT8640S-2/LT8643S-2 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT8640S-2/LT8643S-2's voltage rating. This situation is easily avoided (see Analog Devices Application Note 88). Rev 0 For more information www.analog.com 21 LT8640S-2/LT8643S-2 APPLICATIONS INFORMATION Output Capacitor and Output Ripple The output capacitor has two essential functions. Along with the inductor, it filters the square wave generated by the LT8640S-2/LT8643S-2 to produce the DC output. In this role it determines the output ripple, thus low impedance at the switching frequency is important. The second function is to store energy in order to satisfy transient loads and stabilize the LT8640S-2/LT8643S-2's control loop. Ceramic capacitors have very low equivalent series resistance (ESR) and provide the best ripple performance. For good starting values, see the Typical Applications section. Use X5R or X7R types. This choice will provide low output ripple and good transient response. Transient performance can be improved with a higher value output capacitor and the addition of a feedforward capacitor placed between VOUT and FB. Increasing the output capacitance will also decrease the output voltage ripple. A lower value of output capacitor can be used to save space and cost but transient performance will suffer and may cause loop instability. See the Typical Applications in this data sheet for suggested capacitor values. When choosing a capacitor, special attention should be given to the data sheet to calculate the effective capacitance under the relevant operating conditions of voltage bias and temperature. A physically larger capacitor or one with a higher voltage rating may be required. Ceramic Capacitors Ceramic capacitors are small, robust and have very low ESR. However, ceramic capacitors can cause problems when used with the LT8640S-2/LT8643S-2 due to their piezoelectric nature. When in Burst Mode operation, the LT8640S-2/LT8643S-2's switching frequency depends on the load current, and at very light loads the LT8640S-2/ LT8643S-2 can excite the ceramic capacitor at audio frequencies, generating audible noise. Since the LT8640S-2/ LT8643S-2 operates at a lower current limit during Burst Mode operation, the noise is typically very quiet to a casual ear. If this is unacceptable, use a high performance tantalum or electrolytic capacitor at the output. Low noise ceramic capacitors are also available. A final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LT8640S-2/ LT8643S-2. As previously mentioned, a ceramic input capacitor combined with trace or cable inductance forms a high quality (underdamped) tank circuit. If the LT8640S-2/LT8643S-2 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT8640S-2/LT8643S-2's rating. This situation is easily avoided (see Analog Devices Technology Application Note 88). Enable Pin The LT8640S-2/LT8643S-2 is in shutdown when the EN pin is low and active when the pin is high. The rising threshold of the EN comparator is 1.0V, with 40mV of hysteresis. The EN pin can be tied to VIN if the shutdown feature is not used, or tied to a logic level if shutdown control is required. Adding a resistor divider from VIN to EN programs the LT8640S-2/LT8643S-2 to regulate the output only when VIN is above a desired voltage (see the Block Diagram). Typically, this threshold, VIN(EN), is used in situations where the input supply is current limited, or has a relatively high source resistance. A switching regulator draws constant power from the source, so source current increases as source voltage drops. This looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions. The VIN(EN) threshold prevents the regulator from operating at source voltages where the problems might occur. This threshold can be adjusted by setting the values R3 and R4 such that they satisfy the following equation: R3 VIN(EN) = +1 *1.0V R4 (10) where the LT8640S-2/LT8643S-2 will remain off until VIN is above VIN(EN). Due to the comparator's hysteresis, switching will not stop until the input falls slightly below VIN(EN). When operating in Burst Mode operation for light load currents, the current through the VIN(EN) resistor network can easily be greater than the supply current consumed by the LT8640S-2/LT8643S-2. Therefore, the VIN(EN) Rev 0 22 For more information www.analog.com LT8640S-2/LT8643S-2 APPLICATIONS INFORMATION resistors should be large to minimize their effect on efficiency at low loads. INTVCC Regulator An internal low dropout (LDO) regulator produces the 3.4V supply from VIN that powers the drivers and the internal bias circuitry. The INTVCC can supply enough current for the LT8640S-2/LT8643S-2's circuitry and must be bypassed to ground with a minimum of 1F ceramic capacitor. Good bypassing is necessary to supply the high transient currents required by the power MOSFET gate drivers. To improve efficiency the internal LDO can also draw current from the BIAS pin when the BIAS pin is at 3.1V or higher. Typically the BIAS pin can be tied to the output of the LT8640S-2/LT8643S-2, or can be tied to an external supply of 3.3V or above. If BIAS is connected to a supply other than VOUT, be sure to bypass with a local ceramic capacitor. If the BIAS pin is below 3.0V, the internal LDO will consume current from VIN. Applications with high input voltage and high switching frequency where the internal LDO pulls current from VIN will increase die temperature because of the higher power dissipation across the LDO. Do not connect an external load to the INTVCC pin. Frequency Compensation (LT8643S-2 Only) Loop compensation determines the stability and transient performance, and is provided by the components tied to the VC pin. Generally, a capacitor (CC) and a resistor (RC) in series to ground are used. Designing the compensation network is a bit complicated and the best values depend on the application. A practical approach is to start with one of the circuits in this data sheet that is similar to your application and tune the compensation network to optimize the performance. LTspice(R) simulations can help in this process. Stability should then be checked across all operating conditions, including load current, input voltage and temperature. The LT1375 data sheet contains a more thorough discussion of loop compensation and describes how to test the stability using a transient load. Figure 5 shows an equivalent circuit for the LT8643S-2 control loop. The error amplifier is a transconductance amplifier with finite output impedance. The power section, consisting of the modulator, power switches, and inductor, is modeled as a transconductance amplifier generating an output current proportional to the voltage at the VC pin. Note that the output capacitor integrates this current, and that the capacitor on the VC pin (CC) integrates the error amplifier output current, resulting in two poles in the loop. A zero is required and comes from a resistor RC in series with CC. This simple model works well as long as the value of the inductor is not too high and the loop crossover frequency is much lower than the switching frequency. A phase lead capacitor (CPL) across the feedback divider can be used to improve the transient response and is required to cancel the parasitic pole caused by the feedback node to ground capacitance. LT8643S-2 CURRENT MODE POWER STAGE M1 OUTPUT M2 R1 gm = 5S CPL gm = 1.7mS VC RC 150k - + FB C1 0.97V CF R2 CC 8640s2 F05 Figure 5. Model for Loop Response Output Voltage Tracking and Soft-Start The LT8640S-2/LT8643S-2 allows the user to program its output voltage ramp rate by means of the TR/SS pin. An internal 1.9A pulls up the TR/SS pin to INTVCC. Putting an external capacitor on TR/SS enables soft starting the output to prevent current surge on the input supply. During the soft-start ramp the output voltage will proportionally track the TR/SS pin voltage. For output tracking applications, TR/ SS can be externally driven by another voltage source. For the LT8640S-2, from 0V to 0.97V, the TR/SS voltage will override the internal 0.97V reference input to the error amplifier, thus regulating the FB pin voltage to that of TR/SS pin. When TR/SS is above 0.97V, tracking is disabled and the feedback voltage will regulate to the internal reference voltage. For Rev 0 For more information www.analog.com 23 LT8640S-2/LT8643S-2 APPLICATIONS INFORMATION the LT8643S-2, from 0V to 1.6V, the TR/SS voltage will override the internal 0.97V reference input to the error amplifier, thus regulating the FB pin voltage to a function of the TR/SS pin. See plot in the Typical Performance Characteristics section. When TR/SS is above 1.6V, tracking is disabled and the feedback voltage will regulate to the internal reference voltage. The TR/SS pin may be left floating if the function is not needed. An active pull-down circuit is connected to the TR/SS pin which will discharge the external soft-start capacitor in the case of fault conditions and restart the ramp when the faults are cleared. Fault conditions that clear the soft-start capacitor are the EN/UV pin transitioning low, VIN voltage falling too low, or thermal shutdown. Paralleling (LT8643S-2 Only) To increase the possible output current, two LT8643S-2s can be connected in parallel to the same output. To do this, the VC and FB pins are connected together, and each LT8643S-2's SW node is connected to the common output through its own inductor. The CLKOUT pin of one LT8643S-2 should be connected to the SYNC/MODE pin of the second LT8643S-2 to have both devices operate in the same mode. During FCM, spread spectrum, and synchronization modes, both devices will operate at the same frequency. Figure 6 shows an application where two LT8643S-2 are paralleled to get one output capable of up to 12A. LT8643S-2 L1 VC VOUT 12A SW CLKOUT R1 FB RC COUT C1 R2 LT8643S-2 CC SYNC/MODE FB L2 VC SW 8640s2 F06 Figure 6. Paralleling Two LT8643S-2s Output Power Good When the LT8640S-2/LT8643S-2's output voltage is within the 8% window of the regulation point, the output voltage is considered good and the open-drain PG pin goes high impedance and is typically pulled high with an external resistor. Otherwise, the internal pull-down device will pull the PG pin low. To prevent glitching both the upper and lower thresholds include 0.2% of hysteresis. PG is valid when VIN is above 3.4V. The PG pin is also actively pulled low during several fault conditions: EN/UV pin is below 1V, INTVCC has fallen too low, VIN is too low, or thermal shutdown. Shorted and Reversed Input Protection The LT8640S-2/LT8643S-2 will tolerate a shorted output. Several features are used for protection during output short-circuit and brownout conditions. The first is the switching frequency will be folded back while the output is lower than the set point to maintain inductor current control. Second, the bottom switch current is monitored such that if inductor current is beyond safe levels switching of the top switch will be delayed until such time as the inductor current falls to safe levels. Frequency foldback behavior depends on the state of the SYNC pin: If the SYNC pin is low the switching frequency will slow while the output voltage is lower than the programmed level. If the SYNC pin is connected to a clock source, floated or tied high, the LT8640S-2/LT8643S-2 will stay at the programmed frequency without foldback and only slow switching if the inductor current exceeds safe levels. There is another situation to consider in systems where the output will be held high when the input to the LT8640S-2/LT8643S-2 is absent. This may occur in battery charging applications or in battery-backup systems where a battery or some other supply is diode ORed with the LT8640S-2/LT8643S-2's output. If the VIN pin is allowed to float and the EN pin is held high (either by a logic signal or because it is tied to VIN), then the LT8640S-2/LT8643S-2's internal circuitry will pull its quiescent current through its SW pin. This is acceptable if the system can tolerate several A in this state. If the EN pin is grounded the SW pin current will drop to near 1A. Rev 0 24 For more information www.analog.com LT8640S-2/LT8643S-2 APPLICATIONS INFORMATION VIN LT8640S-2 LT8643S-2 EN/UV GND 8640s2 F07 Figure 7. Reverse VIN Protection Thermal Considerations and Peak Output Current For higher ambient temperatures, care should be taken in the layout of the PCB to ensure good heat sinking of the LT8640S-2/LT8643S-2. The ground pins on the bottom of the package should be soldered to a ground plane. This ground should be tied to large copper layers below with thermal vias; these layers will spread heat dissipated by the LT8640S-2/LT8643S-2. Placing additional vias can reduce thermal resistance further. The maximum load current should be derated as the ambient temperature approaches the maximum junction rating. Power dissipation within the LT8640S-2/LT8643S-2 can be estimated by calculating the total power loss from an efficiency measurement and subtracting the inductor loss. The die temperature is calculated by multiplying the LT8640S-2/ LT8643S-2 power dissipation by the thermal resistance from junction to ambient. The internal overtemperature protection monitors the junction temperature of the LT8640S-2/LT8643S-2. If the junction temperature reaches approximately 180C, the LT8640S-2/LT8643S-2 will stop switching and indicate a fault condition until the temperature drops about 10C cooler. Temperature rise of the LT8640S-2/LT8643S-2 is worst when operating at high load, high VIN, and high switching frequency. If the case temperature is too high for a given application, then either VIN, switching frequency, or The LT8640S-2/LT8643S-2's internal power switches are capable of safely delivering up to 7A of peak output current. However, due to thermal limits, the package can only handle 7A loads for short periods of time. This time is determined by how quickly the case temperature approaches the maximum junction rating. Figure 9 shows an example of how case temperature rise changes with the duty cycle of a 1kHz pulsed 7A load. The LT8640S-2/LT8643S-2's top switch current limit decreases with higher duty cycle operation for slope compensation. This also limits the peak output current the LT8640S-2/LT8643S-2 can deliver for a given application. See curve in Typical Performance Characteristics. 80 DC2530A DEMO BOARD VIN = 12V, fSW = 1MHz VIN = 24V, fSW = 1MHz VIN = 12V, fSW = 2MHz VIN = 24V, fSW = 2MHz 70 CASE TEMPERATURE RISE (C) D1 VIN load current can be decreased to reduce the temperature to an acceptable level. Figure 8 shows examples of how case temperature rise can be managed by reducing VIN, switching frequency, or load. 60 50 40 30 20 10 0 0 1 2 3 4 LOAD CURRENT (A) 5 6 8640s2 F08 Figure 8. Case Temperature Rise Pulsed Load 90 DC2530A DEMO BOARD VIN = 12V VOUT = 5V fSW = 2MHz STANDBY LOAD = 0.25A 1kHz PULSED LOAD = 7A 80 CASE TEMPERATURE RISE (C) However, if the VIN pin is grounded while the output is held high, regardless of EN, parasitic body diodes inside the LT8640S-2/LT8643S-2 can pull current from the output through the SW pin and the VIN pin, which may damage the IC. Figure 7 shows a connection of the VIN and EN/UV pins that will allow the LT8640S-2/LT8643S-2 to run only when the input voltage is present and that protects against a shorted or reversed input. 70 60 50 40 30 20 10 0 0 0.2 0.4 0.6 0.8 DUTY CYCLE OF 7A LOAD 1 8640s2 F09 Figure 9. Case Temperature Rise vs 7A Pulsed Load For more information www.analog.com Rev 0 25 LT8640S-2/LT8643S-2 TYPICAL APPLICATIONS VIN 5.7V TO 42V 4.7F VIN 1F 0603 EN/UV GND VIN GND LT8640S-2 LT8643S-2 CLKOUT BST 6.49k 10nF 330pF SYNC/MODE SW VC* PG TR/SS BIAS 1F INTVCC 41.2k FB RT 1F 0603 0.1F 3.3H VOUT 5V 6A 100k 4.7pF (LT8643S-2) 10pF (LT8640S-2) 1M 243k GND 100F 1210 X5R/X7R fSW = 1MHz L: XEL6030 8640s2 F10 Figure 10. 5V, 6A Step-Down Converter with Soft-Start and Power Good VIN 4V TO 42V 4.7F VIN 1F 0603 EN/UV GND VIN GND LT8640S-2 LT8643S-2 CLKOUT BST 8.45k 10nF 330pF SYNC/MODE SW VC* PG TR/SS BIAS 1F 41.2k INTVCC RT FB 1F 0603 0.1F 2.2H VOUT 3.3V 6A 100k 4.7pF (LT8643S-2) 10pF (LT8640S-2) GND 1M 412k fSW = 1MHz L: XEL6030 100F 1210 X5R/X7R 8640s2 F11 Figure 11. 3.3V, 6A Step-Down Converter with Soft-Start and Power Good * VC pin and components only apply to LT8643S-2. Rev 0 26 For more information www.analog.com LT8640S-2/LT8643S-2 TYPICAL APPLICATIONS VIN 5.7V TO 42V FB1 BEAD 10F 1210 10F 1210 10F 1210 EN/UV 1F 0603 PINS NOT USED IN THIS CIRCUIT: VIN VIN GND GND LT8640S-2 BST LT8643S-2 CLKOUT, PG, TR/SS 1F 1F 0603 0.1F 1.5H INTVCC SYNC/MODE 8.45k VC* RT 330pF GND 17.8k VOUT 5V 6A SW BIAS FB 4.7pF (LT8643S-2) 10pF (LT8640S-2) 1M 100F 1210 X5R/X7R 243k fSW = 2MHz L: XEL6030 FB1 BEAD: WE-MPSB 100 8A 1812 8640s2 F12 Figure 12. Ultralow EMI 5V, 6A Step-Down Converter with Spread Spectrum VIN 5.7V TO 42V 4.7F 1F 0603 8.45k PINS NOT USED IN THIS CIRCUIT: CLKOUT, PG, TR/SS EN/UV VIN GND LT8640S-2 LT8643S-2 VC* SYNC/MODE 330pF VIN GND BST SW BIAS 1F 17.8k INTVCC RT FB 1F 0603 0.1F 1.5H 4.7pF (LT8643S-2) 10pF (LT8640S-2) GND VOUT 5V 6A 1M 243k fSW = 2MHz L: XEL6030 100F 1210 X5R/X7R 8640s2 F13 Figure 13. 2MHz 5V, 6A Step-Down Converter with Spread Spectrum * VC pin and components only apply to LT8643S-2. Rev 0 For more information www.analog.com 27 LT8640S-2/LT8643S-2 TYPICAL APPLICATIONS VIN 4V TO 42V 4.7F 1F 0603 GND 16.2k VIN GND LT8640S-2 LT8643S-2 BST VC* PINS NOT USED IN THIS CIRCUIT: CLKOUT, PG, TR/SS EN/UV VIN SW SYNC/MODE 220pF BIAS 1F FB INTVCC 17.8k RT 1F 0603 0.1F 1H 4.7pF (LT8643S-2) 10pF (LT8640S-2) VOUT 3.3V 6A 1M 412k GND fSW = 2MHz L: XEL6030 100F 1210 X5R/X7R 8640s2 F14 Figure 14. 2MHz 3.3V, 6A Step-Down Converter with Spread Spectrum VIN 12.7V TO 42V 4.7F EN/UV VIN1 1F 0603 GND1 VIN2 GND2 LT8640S-2 BST SW 10nF 1F TR/SS INTVCC 41.2k RT 1F 0603 0.1F 4.7H VOUT 12V 6A BIAS 4.7pF 1M FB GND fSW = 1MHz L: XEL6060 88.7k 47F 1210 X5R/X7R 8640s2 F15 PINS NOT USED IN THIS CIRCUIT: CLKOUT, PG, SYNC/MODE Figure 15. 12V, 6A Step-Down Converter * VC pin and components only apply to LT8643S-2. Rev 0 28 For more information www.analog.com 0.25 0.05 PACKAGE OUTLINE 0.70 0.05 4.50 0.05 aaa Z 2x D PACKAGE TOP VIEW Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications more by information www.analog.com subject to change without notice. No license For is granted implication or otherwise under any patent or patent rights of Analog Devices. 4.50 0.05 1.125 0.20 1.2500 1.2500 SUGGESTED PCB LAYOUT TOP VIEW 1.125 0.20 0.7500 5 0.2500 0.0000 0.2500 PAD "A1" CORNER 0.7500 0.375 X aaa Z 1.2500 0.7500 0.2500 0.0000 0.2500 0.7500 1.2500 0.375 Y E 2x Z SYMBOL A A1 L b D E D1 E1 e H1 H2 aaa bbb ccc ddd eee fff DETAIL B H2 MOLD CAP ddd Z MIN 0.85 0.01 0.30 0.22 H1 DETAIL C NOM 0.94 0.02 0.40 0.25 4.00 4.00 2.45 2.45 0.50 0.24 0.70 DIMENSIONS 24b eee M Z X Y fff M Z Z SUBSTRATE DETAIL C A1 24x // bbb Z 0.10 0.10 0.10 0.10 0.15 0.08 MAX 1.03 0.03 0.50 0.28 e/2 e NOTES DETAIL A DETAIL B A L (Reference LTC DWG # 05-08-1511 Rev C) e 13 b 18 12 19 D1 e 0.375 0.20 PACKAGE BOTTOM VIEW b 1.125 6 0.20 1.125 7 24 DETAIL A 6 1 4 SEE NOTES PIN 1 NOTCH 0.283 x 45 7 SEE NOTES TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION LGA 24 0317 REV C CORNER SUPPORT PAD CHAMFER IS OPTIONAL 7 LTXXXXXX THE EXPOSED HEAT FEATURE IS SEGMENTED AND ARRANGED IN A MATRIX FORMAT. IT MAY HAVE OPTIONAL CORNER RADII ON EACH SEGMENT 6 COMPONENT PIN "A1" DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE METAL FEATURES UNDER THE SOLDER MASK OPENING NOT SHOWN SO AS NOT TO OBSCURE THESE TERMINALS AND HEAT FEATURES 5 4 3. PRIMARY DATUM -Z- IS SEATING PLANE 2. ALL DIMENSIONS ARE IN MILLIMETERS NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 0.375 E1 ccc M Z X Y ccc M Z X Y LQFN Package 24-Lead (4mm x 4mm x 0.94mm) LT8640S-2/LT8643S-2 PACKAGE DESCRIPTION Rev 0 29 LT8640S-2/LT8643S-2 TYPICAL APPLICATIONS 2MHz 1.8V, 6A Step-Down Converter VIN 3.4V TO 22V (42V TRANSIENT) 4.7F EN/UV VIN1 1F 0603 GND1 VIN2 GND2 BST LT8640S-2 SW 10nF TR/SS 1F EXTERNAL SOURCE >3.1V OR GND VOUT 1.8V 6A 10pF 866k FB INTVCC RT 1H 0.1F BIAS 1F 17.8k 1F 0603 1M GND 100F 1210 X5R/X7R 8640s2 TA02 fSW = 2MHz L: XEL6030 PINS NOT USED IN THIS CIRCUIT: CLKOUT, PG, SYNC/MODE RELATED PARTS PART DESCRIPTION COMMENTS LT8640S/ LT8643S 42V, 6A Synchronous Step-Down Silent Switcher 2 with IQ = 2.5A VIN(MIN) = 3.4V, VIN(MAX) = 42V, VOUT(MIN) = 0.97V, IQ = 2.5A, ISD < 1A, 4mm x 4mm LQFN-24 LT8640/ LT8640-1 42V, 5A, 96% Efficiency, 3MHz Synchronous MicroPower Step-Down DC/DC Converter with IQ = 2.5A VIN(MIN) = 3.4V, VIN(MAX) = 42V, VOUT(MIN) = 0.97V, IQ = 2.5A, ISD < 1A, 3mm x 4mm QFN-18 LT8645S 65V, 8A, Synchronous Step-Down Silent Switcher 2 with IQ = 2.5A VIN(MIN) = 3.4V, VIN(MAX) = 65V, VOUT(MIN) = 0.97V, IQ = 2.5A, ISD < 1A, 4mm x 6mm LQFN-32 LT8641 65V, 3.5A, 95% Efficiency, 3MHz Synchronous MicroPower Step-Down DC/DC Converter with IQ = 2.5A VIN(MIN) = 3V, VIN(MAX) = 65V, VOUT(MIN) = 0.81V, IQ = 2.5A, ISD < 1A, 3mm x 4mm QFN-18 LT8609/ LT8609A 42V, 2A, 94% Efficiency, 2.2MHz Synchronous MicroPower Step-Down DC/DC Converter with IQ = 2.5A VIN(MIN) = 3V, VIN(MAX) = 42V, VOUT(MIN) = 0.8V, IQ = 2.5A, ISD < 1A, MSOP-10E LT8610A/ LT8610AB 42V, 3.5A, 96% Efficiency, 2.2MHz Synchronous MicroPower StepDown DC/DC Converter with IQ = 2.5A VIN(MIN) = 3.4V, VIN(MAX) = 42V, VOUT(MIN) = 0.97V, IQ = 2.5A, ISD < 1A, MSOP-16E LT8610AC 42V, 3.5A, 96% Efficiency, 2.2MHz Synchronous MicroPower StepDown DC/DC Converter with IQ = 2.5A VIN(MIN) = 3V, VIN(MAX) = 42V, VOUT(MIN) = 0.8V, IQ = 2.5A, ISD < 1A, MSOP-16E LT8610 42V, 2.5A, 96% Efficiency, 2.2MHz Synchronous MicroPower StepDown DC/DC Converter with IQ = 2.5A VIN(MIN) = 3.4V, VIN(MAX) = 42V, VOUT(MIN) = 0.97V, IQ = 2.5A, ISD < 1A, MSOP-16E LT8616 42V, Dual 2.5A + 1.5A, 95% Efficiency, 2.2MHz Synchronous MicroPower Step-Down DC/DC Converter with IQ = 5A VIN(MIN) = 3.4V, VIN(MAX) = 42V, VOUT(MIN) = 0.8V, IQ = 5A, ISD < 1A, TSSOP-28E, 3mm x 6mm QFN-28 LT8620 65V, 2.5A, 94% Efficiency, 2.2MHz Synchronous MicroPower StepDown DC/DC Converter with IQ = 2.5A VIN(MIN) = 3.4V, VIN(MAX) = 65V, VOUT(MIN) = 0.97V, IQ = 2.5A, ISD < 1A, MSOP-16E, 3mm x 5mm QFN-24 LT8614 42V, 4A, 96% Efficiency, 2.2MHz Synchronous Silent Switcher StepDown DC/DC Converter with IQ = 2.5A VIN(MIN) = 3.4V, VIN(MAX) = 42V, VOUT(MIN) = 0.97V, IQ = 2.5A, ISD < 1A, 3mm x 4mm QFN18 LT8612 42V, 6A, 96% Efficiency, 2.2MHz Synchronous MicroPower Step-Down DC/DC Converter with IQ = 2.5A VIN(MIN) = 3.4V, VIN(MAX) = 42V, VOUT(MIN) = 0.97V, IQ = 3.0A, ISD < 1A, 3mm x 6mm QFN-28 LT8602 42V, Quad Output (2.5A + 1.5A + 1.5A + 1.5A) 95% Efficiency, 2.2MHz Synchronous MicroPower Step-Down DC/DC Converter with IQ = 25A VIN(MIN) = 3V, VIN(MAX) = 42V, VOUT(MIN) = 0.8V, IQ = 2.5A, ISD < 1A, 6mm x 6mm QFN-40 Rev 0 30 D17009-0-10/18(0) For more information www.analog.com www.analog.com ANALOG DEVICES, INC. 2018