CY621282BNLL-70SXE - Cypress Semiconductor

CY621282BN MoBL® Automotive

1-Mbit (128 K × 8) St atic RAM

Cypress Semiconductor Corporation • 198 Champion Court • San Jose,CA 95134-1709 • 408-943-2600

Document #: 001-65526 Rev. *B Revised March 5, 2012

1-Mbit (128 K × 8) Stat ic RAM

Features

■Temperature Ranges

❐Automotive-E: –40 °C to 125 °C

■4.5 V to 5.5 V operation

■Complementary metal oxide semiconductor (CMOS) for

optimum speed/power

■Low active power

137.5 mW (max.) (25 mA)

■Low standby power

137.5 W (max.) (25 A)

■Automatic power-down when deselected

■TTL-compatible inputs and outputs

■Easy memory expansion with CE1, CE2, and OE options

■Available in Pb-free 32-pin (450 mil-wide) small outline

integrated circuit (SOIC) package

Functional Description

The CY621282BN is a high-performance CMOS static RAM

organized as 128K words by 8 bits. Easy memory expansion is

provided by an a ctive LOW Chi p Enable (CE 1), an active HIGH

Chip Enable (CE2), and active LOW Output Enable (OE). This

device has an automatic power-down feature that reduces power

consumption by more than 75% when deselected.

Writing to the device is accomplished by taking Chip Enable One

(CE1) and Write Enable (WE) inputs LOW and Chip Enable Two

(CE2) input HIGH. Data on the eight I/O pins (I/O0 through I/O7)

is then written into the location specified on the address pins (A0

through A16).

Reading from the device is accomplished by taking Chip Enable

One (CE1) and Output Enable (OE) LOW while forcing Write

Enable (WE) and Chip Enable Two (CE2) HIGH. Under these

conditions, the contents of the memory location specified by the

address pins will appear on the I/O pins.

The eight input/output pins (I/O0 through I/O7) are placed in a

high-impedance state when the device is deselected (CE1 HIGH

or CE2 LOW), the outputs are disabled (OE HIGH), or during a

write operation (CE1 LOW, CE2 HIGH, and WE LOW).

COLUMN

DECODER

ROW DECODER

SENSE AMPS

INPUT BUFFER

POWER

DOWN

I/O0

CE2

I/O1

I/O2

I/O3

128K x 8

ARRAY

I/O7

I/O6

I/O5

I/O4

A10

A12

A11

CE1

A15

Logic Block Diagram

CY621282BN MoBL® Automotive

Document #: 001-65526 Rev. *B Page 2 of 14

Contents

Product Portfolio ..............................................................3

Pin Configuration .............................................................3

Pin Definitions ..................................................................3

Maximum Ratings .............................................................4

Operating Range ..................... .. .............. ... .............. ... ......4

Electrical Characteristics .................................................4

Capacitance ......................................................................5

Thermal Resistance ..........................................................5

AC Test Loads and Waveforms .......................................5

Data Retention Waveform ................................................6

Data Retention Characteristics .......................................6

Switching Characteristics ...................... ... .............. ... ......7

Switching Waveforms ................. .............. ... .............. ... ...8

Truth Table ......................................................................10

Ordering Information ......................................................10

Ordering Code Definitions .........................................10

Package Diagrams ..........................................................11

Acronyms ........................................................................ 12

Document Conventions ....... ... .............. ... .............. ... .. ...12

Units of Measure ................ ... .............. ... .. .............. ...12

Document History Page .......... .............. ... ... .............. .. ...13

Sales, Solutions, and Legal Information ......................14

Worldwide Sales and Design Support .......................14

Products .................................................................... 14

PSoC Solutions ............... .............. ... ... ......................14

CY621282BN MoBL® Automotive

Document #: 001-65526 Rev. *B Page 3 of 14

Product Portfolio

Product VCC Range (V) Speed (ns) Power Dissipation

Operating, ICC (m A) Standby, ISB2 (A)

Min Typ [1] Max Typ [1] Max Typ [1] Max

CY621282BN Automotive-E 4.5 5.0 5.5 70 6 25 2.5 25

Pin Configuration Figure 1. 32-pin SOIC (Top View)

14 19

Top View

15 17

A16

A14

A12

A15

A13

I/O

A10

I/O

A11

SOIC

gnc

GND

Pin Definitions

I/O Type Description

Input A0–A16. Address inputs

Input/output I/O0–I/O7. Data lines. Used as input or output lines depending on operation.

Input/control WE. Write Enable, Active LOW. When selected LOW, a WRITE is conducted. When selected HIGH, a READ is

conducted.

Input/control CE1. Chip Enable 1, Active LOW.

Input/control CE2. Chip Enable 2, Active HIGH.

Input/control OE. Output Enable, Active LOW. Controls the direction of the I/O pins. When LOW , the I/O pins behave as outputs.

When deasserted HIGH, I/O pins are tri-stated, and act as input data pins.

Ground GND. Ground for the device.

Power supply VCC. Power supply for the device.

Note

1. Typical values are included for reference only and are not tested or guaranteed. Typical values are measured at VCC = 5.0 V, TA = 25 °C.

CY621282BN MoBL® Automotive

Document #: 001-65526 Rev. *B Page 4 of 14

Maximum Ratings

Exceeding maximum ratings may impair the useful life of the

device. These user guidelines are not tested.

Storage temperature ................................ –65 °C to +150 °C

Ambient temperature with

power applied .......................................... –55 °C to +125 °C

Supply voltage on

VCC to relative GND[2] .................................–0.5 V to +7.0 V

DC voltage applied to outputs

in High Z state [2] ........................... ... ..–0.5 V to VCC + 0.5 V

DC input voltage [2, 3 ] ..........................–0.5 V to VCC + 0.5 V

Current into outputs (LOW) ........................................20 mA

Static discharge voltage ..................... ... ... ... ............> 2001 V

(per MIL-STD-883, Method 3015)

Latch-up current ....................................................> 200 mA

Operating Range

Range Ambient Temperature VCC

Automotive-E –40 °C to +125 °C 5 V  10%

Electrical Characteristics

Over the Operating Range

Parameter Description Test Conditions -70 Unit

Min Typ [4] Max

VOH Output HIGH voltage VCC = 4.5 V, IOH = –1.0 mA 2.4 – – V

VCC = 5.5 V, IOH = –0.1 mA 3.95 – –

VCC = 5 V, IOH = –0.1 mA 3.6 – –

VCC = 4.5 V, IOH = –0.1 mA 3.25 – –

VOL Output LOW voltage VCC = 4.5 V, IOL = 2.1 mA – – 0.4 V

VIH Input HIGH voltage 2.2 – VCC+ 0.3 V

VIL Input LOW voltage[2] –0.3 – 0.8 V

IIX Input leakage current GND  VIN  VCC –10 – +10 A

IOZ Output leakage current GND  VIN  VCC, Output Disabled –10 – +10 A

ICC VCC operating supply current f = fMAX = 1/tRC VCC = 5.5 V,

IOUT = 0 mA –625mA

f = 1 MHz 2 12

ISB1 Automatic CE power-down

current —TTL inputs VCC = 5.5 V, CE1  VIH or CE2 < VIL,

VIN  VIH or VIN  VIL, f = fMAX –0.12mA

ISB2 Automatic CE power-down

current —CMOS inputs VCC = 5.5 V, CE1  VCC – 0.3 V,

or CE2  0.3 V , VIN  VCC – 0.3 V, or

VIN  0.3 V, f = 0

–2.525A

Notes

2. VIL (min.) = –2.0 V for pulse durations of less than 20 ns.

3. No input may exceed VCC + 0.5 V.

4. Typical values are included for reference only and are not tested or guaranteed. Typical values are measured at VCC = 5.0 V, TA = 25 °C.

CY621282BN MoBL® Automotive

Document #: 001-65526 Rev. *B Page 5 of 14

Capacitance

Parameter [5] Description Test Conditions Max Unit

CIN Input capacitance TA = 25 C, f = 1 MHz, VCC = 5.0 V 9 pF

COUT Output capacitance 9pF

Thermal Resist ance

Parameter [5] Description Test Conditions 32-pin SOIC Unit

JA Thermal resistance

(junction to ambient) Test conditions follow standard test methods and

procedures for measuring thermal impedance, per EIA /

JESD51.

66.17 C/W

JC Thermal resistance

(junction to case) 30.87 C/W

AC Test Loads and Waveforms

Figure 2. AC Test Loads and Waveforms

90%

10%

VCC

GND

90%

10%

All Input Pulses

5 V

Output 100 pF

Including

JIG and

Scope

Output

5 pF

Including

JIG and

Scope

(a) (b)

OUTPUT

R1 1800

R1 1800

990R2

990

639

Equivalent to: THÉVENIN Equivalent

1.77 V

Rise TIme:

1 V/ns Fall TIme:

1 V/ns



Note

5. Tested initially and af ter any design or process changes that may affect these parameters.

CY621282BN MoBL® Automotive

Document #: 001-65526 Rev. *B Page 6 of 14

Data Retention Waveform Figure 3. Data Retention Waveform

VCC, min.

tCDR VDR >2 V tR

CE1

VCC

CE2

Data Retention Mode

Data Retention Characteristics

Over the Operating Range

Parameter Description Conditions Min Typ Max Unit

VDR VCC for data retention 2.0 – – V

ICCDR Data retention current VCC = VDR = 2.0 V,

CE1 VCC – 0.3 V, or

CE2  0.3 V,

VIN  VCC – 0.3 V or,

VIN  0.3 V

Automotive-E – 1.5 25 A

tCDR Chip deselect to data

retention time 0––ns

tROperation recovery

time 70 – – ns

CY621282BN MoBL® Automotive

Document #: 001-65526 Rev. *B Page 7 of 14

Switching Characteristics

Over the Operating Range

Parameter [6] Description CY621282BN-70 Unit

Min Max

Read Cycle

tRC Read cycle time 70 – ns

tAA Address to data valid – 70 ns

tOHA Data hold from address change 5 – ns

tACE CE1 LOW to data valid, CE2 HIGH to data valid – 70 ns

tDOE OE LOW to data valid – 35 ns

tLZOE OE LOW to Low Z [7] 0–ns

tHZOE OE HIGH to High Z [7, 8] –25ns

tLZCE CE1 LOW to Low Z, CE2 HIGH to Low Z [7] 5–ns

tHZCE CE1 HIGH to High Z, CE2 LOW to High Z [7, 8] –25ns

tPU CE1 LOW to Power-up, CE2 HIGH to power-up 0 – ns

tPD CE1 HIGH to Power-down, CE2 LOW to power-down – 70 ns

Write Cycle [9]

tWC Write cycle time 70 – ns

tSCE CE1 LOW to Write End, CE2 HIGH to write end 60 – ns

tAW Address set-up to write end 60 – ns

tHA Address hold fro m write end 0 – ns

tSA Address set-up to write start 0 – ns

tPWE WE pulse width 50 – ns

tSD Data set-up to write end 30 – ns

tHD Data Hold from write end 0 – ns

tLZWE WE HIGH to Low Z [7] 5–ns

tHZWE WE LOW to High Z [7, 8] –25ns

Notes

6. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V, and output loading of the specified IOL/IOH

and 100-pF load capacitance.

7. At any given temperatur e and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device.

8. tHZOE, tHZCE, and tHZWE are specified with a load capacitance of 5 pF as in (b) of Figure 2 on page 5. Transition is measured 500 mV from steady-state voltage.

9. The internal write time of the memory is defined by t he overlap of CE1 LOW, CE2 HIGH, a nd WE LOW. CE1 and WE must be LOW and CE2 HIGH to initiate a write,

and the transition of any of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edg e of the signal that

terminates the writ e.

CY621282BN MoBL® Automotive

Document #: 001-65526 Rev. *B Page 8 of 14

Switching Waveforms

Figure 4. Read Cycle No.1 [10, 11]

Figure 5. Read Cycle No. 2 (OE Controlled) [11, 12]

Figure 6. Write Cycle No. 1 (CE1 or CE2 Controlled) [13, 14]

Previous Data Valid DATA OUT VALID

tRC

tAA

tOHA

Address

DATA I/O

50%

DATA OUT VALID

tRC

tACE

tDOE

tLZOE

tLZCE

tPU

High Impedance

tHZOE tHZCE

tPD

High

CE1

ICC

ISB

Impedance

Address

CE2

DATA I/O

VCC

Supply

Current

tWC

DATAIN VALID

tAW

tSA

tPWE

tHA

tHD

tSD

tSCE

CE1

Address

CE2

DATA I/O

Notes

10.Device is continuously selected. OE, CE1 = VIL, CE2 = VIH.

11. WE is HIGH for read cycle.

12.Ad dress valid prior to or coincident with CE1 transition LOW and CE2 transition HIGH.

13.Data I/O is high impedance if OE = VIH.

14.If CE1 goes HIGH or CE2 goes LOW simultaneously with WE going HIGH, the output remains in a high-impedance state.

CY621282BN MoBL® Automotive

Document #: 001-65526 Rev. *B Page 9 of 14

Figure 7. Write Cycle No. 2 (WE Controlled, OE HIGH during Write) [15, 16]

Figure 8. Write Cycle No. 3 (WE Controlled, OE LOW) [15, 16]

Switching Waveforms (continued)

tHD

tSD

tPWE

tSA

tHA

tAW

tSCE

tWC

tHZOE

Data INValid

CE1

Address

CE2

Data I/O

NOTE 17

Data IN Valid

tHD

tSD

tLZWE

tPWE

tSA

tHA

tAW

tSCE

tWC

tHZWE

CE1

Address

CE2

Data I/O NOTE 17

Notes

15.Data I/O is high impedance if OE = VIH.

16.If CE1 goes HIGH or CE2 goes LOW simultaneously with WE goi ng HIGH, the output remains in a high- impedance state .

17.During this period the I/Os are in the output state and inp ut signals should not be applied.

CY621282BN MoBL® Automotive

Document #: 001-65526 Rev. *B Page 10 of 14

Truth Table

CE1CE2OE WE I/O0–I/O7Mode Power

H X X X High Z Power-down Standby (ISB)

X L X X High Z Power-down Standby (ISB)

LHLHData out Read Active (I

CC)

L H X L Data in Wr ite Active (ICC)

L H H H High Z Sele cted, Outputs disabled Active (ICC)

Ordering Information

Speed (ns) Ordering Code Package

Diagram Package Type Operating

Range

70 CY621282BNLL-70SXE 51-85081 32-pin 450-Mil SOIC (Pb-free) Automotive-E

Please contact your local Cypress sales representative for availability of these parts.

Ordering Code Definitions

Temperature Grade: E = Automotive-E

Pb-free

Package Type:

S = 32-pin SOIC

Speed Grade: 70 ns

LL = Low Power

Nitride Seal Mask fix

B = Process Technology 250 nm

Fixed value

Bus width = × 8

Density = 1-Mbit

Family Code: MoBL SRAM family

Company ID: CY = Cypress

CY 70 S

621 28NX

LL E

CY621282BN MoBL® Automotive

Document #: 001-65526 Rev. *B Page 11 of 14

Package Diagrams Figure 9. 32-pin Molded SOIC (450 Mil) S32.45/SZ32.45, 51-85081

51-85081 *D

CY621282BN MoBL® Automotive

Document #: 001-65526 Rev. *B Page 12 of 14

Acronyms Document Conventions

Units of Measure

Acronym Description

CE chip enable

CMOS complementary meta l oxide semiconductor

I/O input/output

OE output enable

SOIC small outline integrated circuit

SRAM static random access memory

TTL transistor-transistor logic

WE write enable

Symbol Unit of Measure

°C degree Celsius

MHz Mega Hertz

µA microamperes

smicroseconds

mA milliamperes

mV millivolts

mW milliwatts

ns nanoseconds

ohms

% percent

pF picofarad

VVolts

WWatts

CY621282BN MoBL® Automotive

Document #: 001-65526 Rev. *B Page 13 of 14

Document History Page

Document Title: CY621282BN MoBL® Automotive, 1-Mbit (128 K × 8) Static RAM

Document Number: 001-65526

REV. ECN NO. Issue Date Orig. of

Change Description of Change

** 3115909 01/06/2011 RAME New Data Sheet

*A 3288690 06/21/2011 RAME Removed the Note “For best-practice recommendations, please refer to the Cypress

application note “System Design Guidelines” on http://www.cypress.com.” and its

reference in Functional Description.

Updated in new template.

*B 3538379 03/05/2012 TAVA Updated Electrical Characteristics tab le

Updated Switching Waveforms

Updated Package Diagrams

Document #: 001-65526 Rev. *B Revised March 5, 2012 Page 14 of 14

All products and company names mentioned in this document may be the trademarks of their respective holders.

CY621282BN MoBL® Automotive

© Cypress Semico nducto r Co rpor ation , 2011-2012. The informati on con ta ined herei n is subje ct to cha nge wi thou t noti ce. C ypress S emiconductor Corporation assumes no responsibility for the use of

any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypre ss prod uc ts are n ot war r ant ed no r inte nd ed to be used fo r

medical, life supp or t, l if e savin g, cr it ical control or saf ety ap pl ic at io ns, unless pursuant to a n express written ag re em en t with Cypress. Furthermor e, Cyp ress doe s not author iz e its products for use as

critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems

application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protect ion (Unit ed States and fore ign),

United S t ates copyright laws and international treaty provis ions. Cyp ress he reby gr ant s to l icense e a pers onal, no n-excl usive , non-tr ansfer able license to copy, use, modify, create derivative works of,

and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of lice nsee product to be used on ly in conjunction wit h a Cypress

integrated circui t as specified in the applicab le agreement. Any r eproduction, mod ification, translati on, compilatio n, or represent ation of this Sour ce Code except a s specified abo ve is prohibit ed without

the express written permiss i on of Cypress.

Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES

OF MERCHANTABI LITY AND FITNESS FOR A PARTICULAR PURP OSE. Cypress reserves the right to make changes without further notice to the materi als described h erein. Cypre ss does not

assume any liabil ity ar ising ou t of the a pplic ation or use o f any pr oduct or circ uit descri bed herein . Cypress d oes not a uthor ize its p roducts fo r use as critical componen ts in life-su pport systems whe re

a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer

assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

Sales, Solutions, and Legal Information

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Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office

closest to you, visit us at Cypress Locations.

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