S-8252 Series
www.sii-ic.com
BATTERY PROTECTION IC
FOR 2-SERIAL-CELL PACK
© Seiko Instruments Inc., 2011-2012 Rev.2.3_00
Seiko Instruments Inc. 1
The S-8252 Series is a protection IC for 2-serial-cell lithium-ion / lithium polymer rechargeable batteries and includes high-
accuracy voltage detection circuits and delay circuits.
The S-8252 Series is suitable for protecting 2-serial-cell rechargeable lithium-ion / lithium polymer battery packs from
overcharge, overdischarge, and overcurrent.
Features
• High-accuracy voltage detection function for each cell
Overcharge detection voltage n (n = 1 , 2) 3.550 V to 4.600 V (5 mV steps) Accuracy ±20 mV (Ta = +25 °C)
Accuracy ±25 mV (Ta = −10 °C to +60°C)
Overcharge release voltage n (n = 1 , 2) 3.150 V to 4.600 V*1 Accuracy ±30 mV
Overdischarge detection voltage n (n = 1, 2) 2.00 V to 3.00 V (10 mV steps) Accuracy ±50 mV
Overdischarge release voltage n (n = 1, 2) 2.00 V to 3.40 V*2 Accuracy ±100 mV
Discharge overcurrent detection voltage 0.05 V to 0.40 V (10 mV steps) Accuracy ±10 mV
Load short-circuiting detection voltage 0.5 V (fixed) Accuracy ±100 mV
Charge overcurrent detection voltage −0.40 V to −0.05 V (25 mV s teps) Accuracy ±20 mV
• Detection delay times are generated only by an internal circuit (e xternal capacitors are unnecessary).
Accuracy ±20%
• High-withstand voltage device is used for charger connection pins
(VM pin and CO pin: Absolute maximum rating = 28 V)
• 0 V battery charge function "available" / "unavailable" is selectable.
• Power-do wn function " available" / "unavailable" is selectable.
• Wide operation temperature range Ta = −40°C to +85°C
• Low current consumption
During operation 8.0 μA max. (Ta = +25°C)
During power-down 0.1 μA max. (Ta = +25°C)
• Lead-free (Sn 100%), halogen-free
*1. Overcharge release voltage = Overcharge detection voltage − Overcharge hysteresis voltage
(Overcharge hysteresis voltage n (n = 1, 2) can be selected as 0 V or from a range of 0.10 V to 0.40 V in 50 mV
steps.)
*2. Overdischarge release voltage = Overdischar ge detection voltage + Overdischarge hysteresis voltage
(Overdischarge hysteresis voltage n (n = 1, 2) can be selected as 0 V or from a range of 0.1 V to 0.7 V in 100 mV
steps.)
Applications
• Lithium-ion rechargeable battery pack
• Lithium polymer rechargeable battery pack
Packages
• SOT-23-6
• SN T-6A
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8252 Series Rev.2.3_00
Seiko Instruments Inc.
2
Block Diagram
DO
VM VSS
VC
VDD
CO
Charger
detection
circuit
20 kΩ
300 kΩ
Divider
control
circuit
Oscillator
control
circuit
0 V battery charge /
charge inhibition
circuit
+
+
+
+
+
+
+
−
−
−
−
−
−
−
Remark All diodes sho wn in figure are parasitic diodes.
Figure 1
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_00 S-8252 Series
Seiko Instruments Inc. 3
Product Name Structure
1. Product name
S-8252A xx - xxxx U
Package abbreviation and IC packing specifications*1
M6T1: SOT-23-6, Tape
I6T1: SNT-6A, Tape
Serial code*2
Sequentially set from AA to ZZ
Environmental code
U: Lead-free (Sn 100%), halogen-free
*1. Refer to the tape drawing.
*2. Refer to "3. Product name list".
2. Packages Table 1 Package Drawing Codes
Package Name Dimension Tape Reel Land
SOT-23-6 MP006-A-P-SD MP006-A-C-SD MP006-A-R-SD −
SNT-6A PG006-A-P-SD PG006-A-C-SD PG006-A-R-SD PG006-A-L-SD
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8252 Series Rev.2.3_00
Seiko Instruments Inc.
4
3. Product name list
3. 1 SOT-23-6
Table 2
Product Name
Over-
charge
Detection
Voltage
[VCU]
Over-
charge
Release
Voltage
[VCL]
Over-
discharge
Detection
Voltage
[VDL]
Over-
discharge
Release
Voltage
[VDU]
Discharge
Overcurrent
Detection
Voltage
[VDIOV]
Charge
Overcurrent
Detection
Voltage
[VCIOV]
0 V Battery
Charge
Function
Power-
down
Function
Delay Time
Combination*1
S-8252AAA-M6T1U 4.280 V 4.080 V 2.00 V 2.00 V 0.20 V −0.10 V Unavailable Available (1)
S-8252AAB-M6T1U 4.325 V 4.075 V 2.20 V 2.90 V 0.21 V −0.20 V Unavailable Available (1)
S-8252AAC-M6T1U 4.300 V 4.100 V 2.40 V 3.00 V 0.20 V −0.20 V Unavailable Available (1)
S-8252AAD-M6T1U 4.280 V 4.130 V 2.40 V 2.90 V 0.15 V −0.15 V Unavailable Available (1)
S-8252AAE-M6T1U 4.350 V 4.150 V 2.30 V 3.00 V 0.30 V −0.30 V Available Available (1)
S-8252AAF-M6T1U 4.350 V 4.100 V 2.40 V 3.00 V 0.15 V −0.15 V Available Available (1)
S-8252AAG-M6T1U 4.300 V 4.150 V 2.80 V 3.00 V 0.15 V −0.15 V Available Available (1)
S-8252AAH-M6T1U 4.250 V 4.100 V 3.00 V 3.00 V 0.20 V −0.20 V Available Available (1)
S-8252AAI-M6T1U 3.650 V 3.450 V 2.00 V 2.70 V 0.20 V −0.20 V Available Unavailable (1)
S-8252AAJ-M6T1U 3.900 V 3.500 V 2.00 V 2.50 V 0.20 V −0.20 V Available Unavailable (1)
S-8252AAK-M6T1U 4.350 V 4.150 V 2.30 V 3.00 V 0.20 V −0.20 V Available Available (1)
S-8252AAL-M6T1U 4.200 V 4.050 V 2.50 V 3.00 V 0.20 V −0.20 V Unavailable Available (1)
S-8252AAO-M6T1U 4.250 V 4.100 V 2.50 V 3.00 V 0.20 V −0.10 V Unavailable Available (1)
S-8252AAP-M6T1U 4.350 V 4.150 V 2.20 V 2.90 V 0.20 V −0.40 V Unavailable Available (1)
S-8252AAQ-M6T1U 4.300 V 4.100 V 2.60 V 3.00 V 0.40 V −0.40 V Unavailable Available (1)
S-8252AAS-M6T1U 4.250 V 4.050 V 2.50 V 3.00 V 0.20 V −0.20 V Available Unavailable (1)
S-8252AAT-M6T 1U 4.250 V 4.100 V 2.70 V 3.00 V 0. 12 V −0.05 V Available Available (1)
S-8252AAU-M6T1U 4.275 V 4.075 V 2.50 V 2.90 V 0.30 V −0.10 V Available Available (1)
S-8252AAV-M6T1U 4.400 V 4.250 V 2.50 V 2.90 V 0.15 V −0.10 V Available Available (1)
S-8252AAW-M6T1U 4.350 V 4.150 V 2.30 V 3.00 V 0.20 V −0.40 V Unavailable Available (1)
S-8252AAX-M6T 1U 4.230 V 4.030 V 2.75 V 3.05 V 0.15 V −0.10 V Unavailable Available (1)
*1. Refer to Table 4 about the details of the delay time combinations.
Remark Please contact our sales office for the product s with detection volt age value other than those specified above.
3. 2 SNT-6A Table 3
Product Name
Over-
charge
Detection
Voltage
[VCU]
Over-
charge
Release
Voltage
[VCL]
Over-
discharge
Detection
Voltage
[VDL]
Over-
discharge
Release
Voltage
[VDU]
Discharge
Overcurrent
Detection
Voltage
[VDIOV]
Charge
Overcurrent
Detection
Voltage
[VCIOV]
0 V Battery
Charge
Function
Power-
down
Function
Delay Time
Combination*1
S-8252AAA-I6T1U 4.280 V 4.080 V 2.00 V 2.00 V 0.20 V −0.10 V Unavailable Available (1)
S-8252AAH-I6T1U 4.250 V 4.100 V 3.00 V 3.00 V 0.20 V −0.20 V Available Available (1)
S-8252AAM-I6T1U 4.250 V 4.050 V 2.40 V 3.00 V 0.10 V −0.10 V Available Available (1)
S-8252AAN-I6T1U 4.325 V 4.075 V 2.20 V 2.90 V 0.21 V −0.10 V Available Available (1)
*1. Refer to Table 4 about the details of the delay time combinations.
Remark Please contact our sales office for the product s with detection volt age value other than those specified above.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_00 S-8252 Series
Seiko Instruments Inc. 5
Table 4
Delay Time
Combination
Overcharge
Detection
Delay Time
[tCU]
Overdischarge
Detection
Delay Time
[tDL]
Discharge Overcurrent
Detection
Delay Time
[tDIOV]
Load Short-circuitin g
Detection
Delay Time
[tSHORT]
Charge Overcurrent
Detection
Delay Time
[tCIOV]
(1) 1.0 s 128 ms 8 ms 280 μs 8 ms
Remark The delay times ca n be changed within the range listed Table 5. For details, pleas e contact our sales office.
Table 5
Delay Time Symbol Selection Range Remark
Overcharge detection delay time tCU 256 ms 512 ms 1.0 s*1 Select a value from the left.
Overdischarge detection de lay time tDL 32 ms 64 ms 128 ms*1 Select a value from the left.
Discharge overcurrent detection delay time tDIOV 4 ms
8 ms*1 16 ms Select a value from the left.
Load short-circuiting detection delay time tSHORT 280 μs*1 500 μs 1 ms Select a value from the left.
Charge overcurrent detection dela y tim e tCIOV 4 ms
8 ms*1 16 ms Select a value from the left.
*1. This value is the delay time of the standard products.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8252 Series Rev.2.3_00
Seiko Instruments Inc.
6
Pin Configurations
1. SOT-23-6
Table 6
Pin No. Symbol Description
1
DO Connection pin of discharge control FET gate
(CMOS output)
2
CO Connection pin of charge control FET gate
(CMOS output)
3
VM Voltage detecti on pin between VM pin and V SS pin
(Overcurrent / charger detection pin)
4
VC Connection pin for negative voltage of battery 1 and
connection pin for posit ive voltage of battery 2
5
VDD Connection pin for positive power supply input and
connection pin for posit ive voltage of battery 1
132
546
Top view
Figure 2
6
VSS Connection pin for negative power supply input and
connection pin f or negative voltage of battery 2
2. SNT-6A
Table 7
Pin No. Symbol Description
1 VM
Voltage detecti on pin between VM pin and V SS pin
(Overcurrent / charger detection pin)
2 CO
Connection pin of charge control FET gate
(CMOS output)
3 DO
Connection pin of discharge control FET gate
(CMOS output)
4 VSS
Connection pin for negative power supply input and
connection pin f or negative voltage of battery 2
5 VDD
Connection pin for positive power supply input and
connection pin for posit ive voltage of battery 1
5
4
6
2
3
1
Top view
Figure 3
6 VC
Connection pin for negative voltag e of battery 1 and
connection pin for posit ive voltage of battery 2
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_00 S-8252 Series
Seiko Instruments Inc. 7
Absolute Maximum Ratings
Table 8 (Ta = +25°C unless otherwise specified)
Item Symbol Applied pin Absolute Maximum Rating Unit
Input voltage between VDD pin and VSS pin VDS VDD
VSS − 0.3 to VSS + 12 V
VC pin input voltage VVC VC VSS − 0.3 to VDD + 0.3 V
VM pin input voltage VVM VM VDD − 28 to VDD + 0.3 V
DO pin output voltage VDO DO VSS − 0.3 to VDD + 0.3 V
CO pin output voltage VCO CO VVM − 0.3 to VDD + 0.3 V
SOT-23-6 − 650*1 mW
Power dissipation SNT-6A PD − 400*1 mW
Operation ambient temperature Topr − −40 to +85 °C
Storage temperature Tstg − −55 to +125 °C
*1. When mounted on board
[Mounted board]
(1) Board size: 114.3 mm × 76.2 mm × t1.6 mm
(2) Board name: JEDEC STANDARD51-7
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
0 50 100 150
800
400
0
Power dissipation (PD) [mW]
Ambient temperature (Ta) [°C]
SOT-23-6
200
600
SNT-6A
Figure 4 Package Power Dissipation (When Mounted on Bo ard)
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8252 Series Rev.2.3_00
Seiko Instruments Inc.
8
Electrical Characteristics
1. Ta = +25°C
Table 9 (Ta = +25°C unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test
Circuit
DETECTION VOLTAGE
− V
CU − 0.020 V CU V
CU + 0.020 V 1
Overcharge detection voltage n (n = 1, 2) VCUn Ta = −10°C to +60°C*1 V
CU − 0.025 V CU V
CU + 0.025 V 1
VCL ≠ VCU V
CL − 0.030 VCL V
CL + 0.030 V 1
Overcharge release voltage n (n = 1, 2) VCLn VCL = VCU V
CL − 0.030 VCL V
CL + 0.020 V 1
Overdischarge detection voltage n (n = 1, 2) VDLn − V
DL − 0.050 VDL V
DL + 0.050 V 2
VDL ≠ VDU V
DU − 0.100 V DU V
DU + 0.100 V 2
Overdischarge release voltage n (n = 1, 2) VDUn VDL = VDU V
DU − 0.050 V DU V
DU + 0.050 V 2
Discharge overcurrent detection voltage VDIOV − V
DIOV − 0.010 VDIOV V
DIOV + 0.010 V 2
Load short-circuiting detection voltage VSHORT − 0.40 0.50 0.60 V 2
Charge overcurrent detection voltage VCIOV − V
CIOV − 0.020 VCIOV V
CIOV + 0.020 V 2
0 V BATTERY CHARGE FUNCTION
0 V battery charge starting ch arger voltage V0CHA 0 V battery charge funct ion
"available" 0.0 0.7 1.0 V
2
0 V battery charge inhibition battery voltage V0INH 0 V battery charge function
"unavailable" 0.4 0.8 1.1 V
2
INTERNAL RESISTANCE
Resistance between VM pin and VDD pin RVMD V1 = V2 = 1.8 V, V3 = 0 V 100 300 900 kΩ3
Resistance between VM pin and VSS pin RVMS V1 = V2 = 3.5 V, V3 = 1.0 V 10 20 40 kΩ3
INPUT VOLTAGE
Operation voltage between VDD pin and
VSS pin VDSOP1 − 1.5 − 10 V −
INPUT CURRENT (WITH POWR-DOWN FUNCTION)
Current consumption d uring operation IOPE V1 = V2 = 3.5 V, V3 = 0 V − 4.0 8.0 μA2
Current consumption durin g power-down IPDN V1 = V2 = 1.5 V, V3 = 3.0 V − − 0.1 μA2
VC pin current IVC V1 = V2 = 3.5 V, V3 = 0 V 0.0 0.7 1.5 μA2
INPUT CURRENT (WITHOUT POWR-DOWN FUNCTION)
Current consumption d uring operation IOPE V1 = V2 = 3.5 V, V3 = 0 V − 4.0 8.0 μA2
Current consumption durin g overdischarge IOPED V1 = V2 = 1.5 V, V3 = 3.0 V − 2.5 5.0 μA2
VC pin current IVC V1 = V2 = 3.5 V, V3 = 0 V 0.0 0.7 1.5 μA2
OUTPUT RESISTANCE
CO pin resistance "H" RCOH V1 = V2 = 3.5 V,
V3 = 0 V, V4 = 6.5 V 2.5 5 10 kΩ4
CO pin resistance "L" RCOL V1 = V2 = 4.7 V,
V3 = 0 V, V4 = 0.5 V 2.5 5 10 kΩ4
DO pin resistance "H" RDOH V1 = V2 = 3.5 V,
V3 = 0 V, V5 = 6.5 V 5 10 20 kΩ4
DO pin resistance "L" RDOL V1 = V2 = 1.8 V,
V3 = 3.6 V, V5 = 0.5 V 5 10 20 kΩ4
DELAY TIME
Overcharge detection delay time tCU − tCU × 0.8 tCU t
CU × 1.2 − 5
Overdischarge detection de lay time tDL − tDL × 0.8 tDL t
DL × 1.2 − 5
Discharge overcurrent detection delay time tDIOV − tDIOV × 0.8 tDIOV t
DIOV × 1.2 − 5
Load short-circuiting detection delay time tSHORT − tSHORT × 0.8 tSHORT t
SHORT × 1.2 − 5
Charge overcurrent detection dela y tim e tCIOV − tCIOV × 0.8 tCIOV t
CIOV × 1.2 − 5
*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by
design, not tested in production.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_00 S-8252 Series
Seiko Instruments Inc. 9
2. Ta = −40°C to +85°C*1
Table 10 (Ta = −40°C to +85°C*1 unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test
Circuit
DETECTION VOLTAGE
Overcharge detection voltage n ( n = 1, 2) VCUn −
VCU − 0.045 VCU V
CU + 0.030 V 1
VCL ≠ VCU V
CL − 0.070 VCL V
CL + 0.040 V 1
Overcharge release voltage n ( n = 1 , 2) VCLn VCL = VCU V
CL − 0.050 VCL V
CL + 0.030 V 1
Overdischarge detection voltage n ( n = 1, 2) VDLn − V
DL − 0.085 VDL V
DL + 0.060 V 2
VDL ≠ VDU V
DU − 0.140 VDU V
DU + 0.110 V 2
Overdischarge release voltage n ( n = 1, 2 ) VDUn VDL = VDU V
DU − 0.085 VDU V
DU + 0.060 V 2
Discharge overcurrent detection voltage VDIOV − V
DIOV − 0.010 VDIOV V
DIOV + 0.010 V 2
Load short-circuiting detection voltage VSHORT − 0.40 0.50 0.60 V 2
Charge overcurrent detection voltage VCIOV − V
CIOV − 0.020 VCIOV V
CIOV + 0.020 V 2
0 V BATTERY CHARGE FUNCTION
0 V battery charge starting ch arger voltage V0CHA 0 V batt ery charge function
"available" 0.0 0.7 1.5 V
2
0 V battery charge inhibition battery voltage V0INH 0 V battery charge function
"unavailable" 0.3 0.8 1.3 V
2
INTERNAL RESISTANCE
Resistance between VM pin and VDD pin RVMD V1 = V2 = 1.8 V, V3 = 0 V 78 300 1310
kΩ3
Resistance between VM pin and VSS pin RVMS V1 = V2 = 3. 5 V, V3 = 1.0 V 7.2 20 44 kΩ3
INPUT VOLTAGE
Operation voltage between VDD pin and
VSS pin VDSOP1 − 1.5 − 10 V −
INPUT CURRENT (WITH POWER-DOWN FUNCTION)
Current consumption d uring operation IOPE V1 = V2 = 3.5 V, V3 = 0 V − 4.5 8.5 μA2
Current consumption durin g power-down IPDN V1 = V2 = 1.5 V, V3 = 3.0 V − − 0.15 μA2
VC pin current IVC V1 = V2 = 3.5 V, V3 = 0 V 0. 0 1.2 2.0 μA2
INPUT CURRENT (WITHOUT POWER-DOWN FUNCTION)
Current consumption d uring operation IOPE V1 = V2 = 3.5 V, V3 = 0 V − 4.5 8.5 μA2
Current consumption durin g overdischarge IOPED V1 = V2 = 1.5 V, V3 = 3.0 V − 2.5 5.5 μA2
VC pin current IVC V1 = V2 = 3.5 V, V3 = 0 V 0. 0 1.2 2.0 μA2
OUTPUT RESISTANCE
CO pin resistance "H" RCOH V1 = V2 = 3.5 V,
V3 = 0 V, V4 = 6.5 V 1.2 5 15 kΩ4
CO pin resistance "L" RCOL V1 = V2 = 4.7 V,
V3 = 0 V, V4 = 0.5 V 1.2 5 15 kΩ4
DO pin resistance "H" RDOH V1 = V2 = 3.5 V,
V3 = 0 V, V5 = 6.5 V 2.4 10 30 kΩ4
DO pin resistance "L" RDOL V1 = V2 = 1.8 V,
V3 = 3.6 V, V5 = 0.5 V 2.4 10 30 kΩ4
DELAY TIME
Overcharge detection delay time tCU − tCU × 0.3 tCU t
CU × 2.0 − 5
Overdischarge detection de lay time tDL − tDL × 0.3 t DL t
DL × 2.0 − 5
Discharge overcurrent detection delay time tDIOV − tDIOV × 0.3 tDIOV t
DIOV × 2.0 − 5
Load short-circuiting detection delay time tSHORT − tSHORT × 0.3 tSHORT t
SHORT × 2.0 − 5
Charge overcurrent detection dela y tim e tCIOV − tCIOV × 0.3 tCIOV t
CIOV × 2.0 − 5
*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by
design, not tested in production.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8252 Series Rev.2.3_00
Seiko Instruments Inc.
10
Test Circuits
Caution Unless ot herwise sp ecified, the ou tput voltage le vels "H" and "L" at CO pi n (VCO) and DO pin (VDO) are
judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to
VVM and the DO pin level wi th respect to VSS.
1. Overcharge detection voltage, overcharge release voltage
(Test circuit 1)
Overcharge detection volt age (VCU1) is defi ned as the voltag e V1 at which V CO goes from "H" to "L" when the voltag e
V1 is gradually increased from t he starting condit ion of V1 = V2 = VCU − 0.05 V, V3 = 0 V. Overcharge release voltage
(VCL1) is defined as the voltage V1 at which VCO goes from "L" to "H" when the voltage V1 is then gradually decreased
after setting V2 = 3.5 V. Overcharge hysteresis voltage (VHC1) is defined as the dif ference between VCU1 and VCL1.
Overcharge detection volt age (VCU2) is defi ned as the voltag e V2 at which V CO goes from "H" to "L" when the voltage
V2 is gradually increased from t he starting condit ion of V1 = V2 = VCU − 0.05 V, V3 = 0 V. Overcharge rele ase voltage
(VCL2) is defined as the voltage V2 at which VCO goes from "L" to "H" when the voltage V2 is then gradually decreased
after setting V1 = 3.5 V. Overcharge hysteresis voltage (VHC2) is defined as the dif ference between VCU2 and VCL2.
2. Overdischarge detection voltage, overdischarge release voltage
(Test circuit 2)
Overdischarge detection voltage (VDL1) is defined as the voltage V1 at which VDO goes from "H" to "L" when the
voltage V1 is gradually decreased from the starting condition of V1 = V2 = 3.5 V, V3 = 0 V. Overdischarge release
voltage (VDU1) is defined as the voltage V1 at which VDO goes from "L" to "H" when the voltage V1 is then gradually
increased. Overdischarge hysteresis voltage (VHD1) is defined as the difference between VDU1 and VDL1.
Overdischarge detection voltage (VDL2) is defined as the voltage V2 at which VDO goes from "H" to "L" when the
voltage V2 is gradually decreased from the starting condition of V1 = V2 = 3.5 V, V3 = 0 V. Overdischarge release
voltage (VDU2) is defined as the voltage V2 at which VDO goes from "L" to "H" when the voltage V2 is then gradually
increased. Overdischarge hysteresis voltage (VHD2) is defined as the difference between VDU2 and VDL2.
3. Discharge overcurrent detection voltage
(Test circuit 2)
Discharge overcurrent detection voltage (V DIOV) is defined as t he voltage V3 whose delay time for cha nging VDO from
"H" to "L" is discharge overcurrent detection delay time (tDIOV) when the voltage V3 is increased from the starting
condition of V1 = V2 = 3.5 V, V3 = 0 V.
4. Load short-circuiting detection voltage
(Test circuit 2)
Load short-circuiting d etection voltage (VSHORT) is define d as the voltage V3 whose delay ti me for changing VDO from
"H" to "L" is load short-circuiting detection delay time (tSHORT) when the voltage V3 is increased from the starting
condition of V1 = V2 = 3.5 V, V3 = 0 V.
5. Charge overcurrent detection voltage
(Test circuit 2)
Charge overcurrent detection voltage (V CIOV) is defined as the voltage V3 whose delay time for changin g VCO from "H"
to "L" is charge overcurrent detect ion delay time (tCIOV) when the voltage V3 is decreased fr om the starting condition
of V1 = V2 = 3.5 V, V3 = 0 V.
6. Current consumption during operation
(Test circuit 2)
The current consumption during operation (IOPE) is the current that flows through the VDD pin (IDD) under the set
conditions of V1 = V2 = 3.5 V, V3 = 0 V.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_00 S-8252 Series
Seiko Instruments Inc. 11
7. VC pin current
(Test circuit 2)
The VC pin current (I VC) is the current that flo ws through the VC pin (IVC) under the s et conditions of V1 = V2 = 3. 5 V,
V3 = 0 V.
8. Current consumption during power-down, current consumption during overdischarge
(Test circuit 2)
8. 1 With power-down function
The current consumption during power-down (IPDN) is the current that flows through the VSS pin (ISS) under the set
conditions of V1 = V2 = 1.5 V, V3 = 3.0 V.
8. 2 Without power-down function
The current consumpti on during ov erdisc har ge (I OPED) is the current that fl o ws through the VSS pin (ISS) under the set
conditions of V1 = V2 = 1.5 V, V3 = 3.0 V.
9. Resistance between VM pin and VDD pin
(Test circuit 3)
RVMD is the resistance between VM pin and VDD pin under t he set conditions of V1 = V2 = 1. 8 V, V3 = 0 V.
10. Resistance between VM pin and VSS pin
(Test circuit 3)
RVMS is the resistance between VM pin and VSS pin under the set conditions of V1 = V2 = 3.5 V, V3 = 1.0 V.
11. CO pin resistance "H"
(Test circuit 4)
The CO pin resistance "H" (RCOH) is the resistance between VDD pin and CO pin under the set conditions of V1 = V2 =
3.5 V, V3 = 0 V , V 4 = 6 . 5 V .
12. CO pin resistance "L"
(Test circuit 4)
The CO pin resistance "L" (RCOL) is the resistance between VM pin and CO pin under the set conditions of V1 = V2 =
4.7 V, V3 = 0 V , V 4 = 0 . 5 V .
13. DO pin resistance "H"
(Test circuit 4)
The DO pin resistance "H" (RDOH) is the resistance bet ween VDD pin a nd D O pin und er the set conditi on s of V1 = V2 =
3.5 V, V3 = 0 V, V5 = 6.5 V
14. DO pin resistance "L"
(Test circuit 4)
The DO pin resistance "L" (RDOL) is the resistance between VSS pin and DO pin under the set conditions of V1 = V2 =
1.8 V, V3 = 0 V, V5 = 0.5 V.
15. Overcharge detection delay time
(Test circuit 5)
The overcharge detection delay time (tCU) is the time needed for VCO to go to "L" just after the voltage V1 increases
and exceeds VCU under the set condition of V1 = V2 = 3.5 V, V3 = 0 V.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8252 Series Rev.2.3_00
Seiko Instruments Inc.
12
16. Overdischarge detection delay time
(Test circuit 5)
The overdischarge detection delay time (tDL) is the time needed for VDO to go to "L" after the voltage V1 decreases
and falls belo w VDL under the set condition of V1 = V2 = 3.5 V, V3 = 0 V.
17. Discharge overcurrent detection delay time
(Test circuit 5)
The discharge overcurrent detection delay time (tDIOV) is the time needed for VDO to go to "L" after the voltage V3
increases and exceeds VDIOV under the set conditions of V1 = V2 = 3.5 V, V3 = 0 V.
18. Load short-circuiting detection delay time
(Test circuit 5)
The load short-circuiting detection delay time (tSHORT) is the time needed for VDO to go to "L" after the voltage V3
increases and exceeds VSHORT under the set conditions of V1 = V2 = 3.5 V, V3 = 0 V.
19. Charge overcurrent detection de lay time
(Test circuit 5)
The charge overcurrent detection delay time (tCIOV) is the time needed for VCO to go to "L" after the voltage V3
decreases and falls below VCIOV under the set condition of V1 = V2 = 3.5 V, V3 = 0 V.
20. 0 V battery charge starting charger v oltage (0 V battery charge function "available")
(Test circuit 2)
The 0 V battery charge starting charger voltage (V0CHA) is defined as the absolute value of voltage V3 at which VCO
goes to "H" (VCO = VDD) when the vo ltage V3 is gradually decreased f rom the starting condition of V1 = V2 = V3 = 0
V.
21. 0 V battery charge inhibition battery voltage (0 V batte ry charge function "unavailable")
(Test circuit 2)
The 0 V battery c harge inhibition bat tery voltage (V0INH) is defined as t he voltage V1 at which VCO goes to "L" (VVM +
0.1 V or lower) when the voltage V1 is gradually decreased, after setting V1 = V2 = 1.5 V, V3 = −6.0 V.
VC
S-8252 Series
CO
VM
DO
V
V3
V
VDD
VSS
R1 = 470
Ω
V1
V2
C1 = 0.1
μ
F
C2 = 0.1
μ
F
R2 = 470
Ω
COM
VCO
VDO
Figure 5 Test Circuit 1
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_00 S-8252 Series
Seiko Instruments Inc. 13
CO
VM
DO
S-8252 Series
A
V4
VDD
VC
VSS
V1
V2
A
V5
COM
V3 ICO
IDO
Figure 8 Test Circuit 4
CO
VM
DO
S-8252 SeriesVDD
VC
VSS
V1
V2
COM
V3
Oscillosco
p
e
Oscillosco
p
e
Figure 9 Test Circuit 5
CO
VM
DO
S-8252 Series
V
V3
V
VDD
VC
VSS A
A V1
V2
A
COM
VCO
VDO
IDD
IVC
ISS
Figure 6 Test Circuit 2
CO
VM
DO
S-8252 Series
A VDD
VC
VSS A V2
V1
COM
V3
IVM
ISS
Figure 7 Test Circuit 3
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8252 Series Rev.2.3_00
Seiko Instruments Inc.
14
Operation
Remark Refer to the " Battery Protection IC Connection Example".
1. Normal status
The S-8252 Series monitors the voltage of the battery connected bet ween the VDD pin and VSS pin and the voltage
difference between the VM pin and VSS pin to control charging and discharging. When the battery voltage is in the
range from overdischarge det ection voltage (VDL) to overcharge detecti on voltage (VCU), and the VM pin voltage is in
the range from the charge overcurrent detection voltage (VCIOV) to discharge overcurrent detection voltage (VDIOV),
The S-8252 Series turns both the charging and discharging control FETs on. This condition is called the normal
status, and in this con dit ion charging and discharging can be carried o ut freely.
The resistance (RVMD) bet ween the VM pin and VDD pin, and the res istance (RVMS) bet ween the VM pin and VSS pin
are not connected in the normal status.
Caution When the b attery is con nect ed for th e first time, di scharg ing may not be enab led. In this cas e, sho rt
the VM pin and VSS pin, or set the VM pin’s voltage at the level of VCIOV or more and VDIOV or less by
connecting the charger. The S-8252 Seri es then returns to th e normal status.
2. Overcharge status
When the batter y voltage bec omes higher than VCU during charging in the normal statu s and detection continues for
the overcharge detection delay time (tCU) or longer, the S-8252 Series turns the charging control FET off to stop
charging. This condition is called the overcharge status.
RVMD and RVMS are not connected in the overcharge status.
The overcharge status is rele ased in the following two cases ( (1) and (2) ).
(1) In the case that the VM pin voltage is lo wer than VDIOV, the S-8252 Series releases the overchar ge status when
the battery voltage falls below VCL.
(2) In t he case that the VM pin voltage is highe r than or equal to VDIOV, the S-8252 Seri es releases the overcharge
status when the battery voltage falls below VCU.
When the discharg e is started by connectin g a load after the overchar ge detection, the VM pin voltage rises more
than the voltage at VSS pin due to the Vf voltage of the parasitic diode, because the discharge current flows
through the parasitic dio de in the charging control FET . If this VM pin voltage is higher than or equal to VDIOV, the
S-8252 Series releases the overcharge status when the battery voltage is lower than or equal to VCU.
Caution 1. If the battery is charg ed to a voltage higher than VCU and the battery voltage does not fall below
VCU even when a heavy load is connected, discharge overcurrent detection and load short-
circuiting detection do not function until the battery voltage falls below VCU. Since an actual
battery has an internal impedance of tens of mΩ, the battery voltage drops immediately after a
heavy load that caus es overcurrent is conn ected, and discharge o vercurrent detec tion and load
short-circuiting detection function.
2. If a charger is connected after the overcharge detection, the overcharge status is not released
even when the batter y voltage falls below VCL. The S-8252 Series releases the o vercharge status
when the voltage at the VM pin returns to VCIOV or higher by removing the charger.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_00 S-8252 Series
Seiko Instruments Inc. 15
3. Overdischarge status
When the battery voltage falls below overdischarge detection voltage (VDL) during discharging in the normal status
and the detection continues for the overdischarge detection delay time (tDL) or longer, the S-8252 Series turns the
discharging control FE T off to stop discharging. This condition is called t he overdischarge status.
Under the overdischarge status, the VM pin and VDD pin are shorted by RVMD in the S-8252 Series. The VM pin
voltage is pulled up b y RVMD.
When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is lower
than −0.7 V typ., the S-8252 Series releases the overdischarge status when the battery voltage reaches VDL or
higher.
When VM pin voltage is not lower than −0.7 V typ., the S-8252 Series releases the overdischarge status when the
battery voltage reaches V DU o r higher.
RVMS is not connected in the overdischarge status.
3. 1 With power-down function
Under the overdischarge st atus, when voltage differenc e between the VM pin and VDD p in is 0.8 V typ. or lo wer,
the power-down function works and the current consumption is reduced to the current consumption during
power-down (IPDN). By connecting a battery charger, the power-down function is released when the VM pin
voltage is 0.7 V typ. or lower.
4. Discharge overcurrent status (Discharge overcurrent, load short-circuiting)
When a battery i n the normal status is in the status where the volt age of the VM pin is equal to or higher than VDIOV
because the discharge current is equal to or higher than the specified value and the status lasts for the discharge
overcurrent detect ion delay time (tDIOV) or longer, the discharge control FET is turned off and discharging is sto pped.
This status is called the discharge overcurrent status.
In the discharge overcurrent status, the VM pin and VSS pin are shorted by the RVMS in the S-8252 Series. However,
the voltage of the VM pin is at the VDD potential due to the load as long as the load is connected. When the load is
disconnected, the VM pin ret urns to the VSS potential.
If the voltage at the VM pin returns to VDIOV or lower, the S-8252 Series releases the discharge overcurrent status.
RVMD is not connected in the discharge overcurrent detection status.
5. Charge overcurrent status
When a battery in the normal status is in the status where the voltage of the VM pin is equal to or lower than VCIOV
because the charge current is equal to or higher than the specified value and the status lasts for the charge
overcurrent detection delay time (tCIOV) or longer, the charge control FET is turned off and charging is stopped. This
status is called the charge overcurrent status.
The S-8252 Series releases t he charge overcurrent status when the voltage at the VM pin ret urns to VCIOV or higher
by removing the charger.
The charge overcurrent detection function does not work in the overdischarge status.
RVMD and RVMS are not connected in the charge overcurrent detect ion status.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8252 Series Rev.2.3_00
Seiko Instruments Inc.
16
6. 0 V battery charge function "av ailable"
This function is used to recharge a connected battery whose voltage is 0 V due to self-discharge. When the 0 V
battery charge starting charger voltage (V0CHA) or a higher voltage is applied between the EB+ and EB− pins by
connecting a charger, the charging control FET gate is fixed to the VDD potential.
When the voltage between the gate and source of the charging control FET becomes equal to or higher than the
threshold voltage d ue to the charger volta ge, the chargin g control FET is turned on to start chargin g. At this time, the
discharging control FET is off and the charging current flows through the internal parasitic diode in the discharging
control FET. When the battery voltage becomes equal to or higher than VDU, the S-8252 Series enters the normal
status.
Caution 1. Some battery pro viders do no t recommend recharging for a comp letely self-discharged battery.
Please ask the batter y pro vider to d etermine whether to enable or inh ibit the 0 V battery charge
function.
2. The 0 V battery charge function has higher priority than the charge overcurrent detection
function. Consequently, a product in which use of the 0 V battery charge function is enabled
charges a battery forcibly and the charge overcurrent cannot be detected when the battery
voltage is lower than VDL.
7. 0 V battery charge function "unav ailable"
This function inhibits charging when a battery that is internally short-circuited (0 V battery) is connected. When the
battery voltage is the 0 V battery charge inhibition battery voltage (V0INH) or lower, the charging control FET gate is
fixed to the EB− pin voltage to inhibit charging. When the battery voltage is V0INH or higher, charging can be
performed.
Caution Some battery providers do not recommend recharging for a completely self-discharged battery.
Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charge
function.
8. Delay circuit
The detection delay times are determined by dividing a clock of approximately 4 kHz by the counter.
Remark tDIOV and tSHORT start when VDIOV is detected. When VSHORT is det ected over tSHORT after VDIOV, the S-8252
Series turns the discharging control FET off within tSHORT from the time of detecting VSHORT.
DO pin
VM pin
V
DD
V
DD
Time
V
DIOV
V
SS
V
SS
V
SHORT
t
SHORT
Time
t
D
0
≤
t
D
≤
t
SHORT
Figure 10
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_00 S-8252 Series
Seiko Instruments Inc. 17
Timing Chart
1. Overcharge detection, overdischarge detection
VCUn
VDUn (VDLn + VHDn)
VDLn
VCLn (VCUn − VHCn)
Battery voltage
VSS
CO pin voltage
VDD
DO pin voltage
VSS
Charger connection
Load connection
Status*1
Overcharge detection delay time (tCU)Overdischarge detection delay time (
t
DL)
(1) (2) (1) (3) (1)
VDIOV
VSS
V
M pin voltage VDD
VEB−
VDD
VCIOV
VEB−
*1. (1): Normal status
(2): Overcharge status
(3): Overdischarge status
Remark The charger is assumed to charge with a constant current.
Figure 11
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8252 Series Rev.2.3_00
Seiko Instruments Inc.
18
2. Discharge overcurrent detection
V
DD
V
SS
V
SHORT
(1) (2) (1) (1)
Load short-circuiting
detection dela
y
time
(
t
SHORT
)
(2)
V
DIOV
Discharge overcurrent
detection dela
y
time
(
t
DIOV
)
V
CUn
V
DUn
(V
DLn
+ V
HDn
)
V
DLn
V
CLn
(V
CUn
− V
HCn
)
Batter y volt age
V
SS
CO pin volt age
V
DD
DO pin voltag e
V
SS
Load connection
Status
*1
VM pin voltag e
V
DD
*1. (1): Normal status
(2): Discharge overcurr ent status
Remark The charger is assumed to charge with a constant current.
Figure 12
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_00 S-8252 Series
Seiko Instruments Inc. 19
3. Charge overcurrent detection
V
DD
DO pin voltage
V
SS
V
DD
V
SS
CO pin voltage
V
DD
V
SS
VM pin voltage
V
CIOV
Status
*1
(
3
)
(
1
)
Charger connection
V
EB−
V
EB−
Charge overcurrent detection
delay time (t
CIOV
)
V
CUn
V
Dun
(V
DLn
+ V
HDn
)
V
DLn
V
CLn
(V
CUn
− V
HCn
)
Battery voltage
(
2
)
Load connection
(
1
) (
1
)
(
2
)
Overdischarge detection
dela
y
time
(
t
DL
)
Charge overcurrent detection
delay time (t
CIOV
)
*1. (1): Normal status
(2): Charge overcurrent status
(3): Overdischarge status
Remark The charger is assumed to charge with a constant current.
Figure 13
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8252 Series Rev.2.3_00
Seiko Instruments Inc.
20
Battery Protection IC Connection Example
R1
Battery 1 C1
VSS DO
VDD
CO VM
S-8252 Series
FET1 FET2 EB−
EB+
R3
R2 VC
Battery 2 C2
Figure 14
Table 11 Constants for External Components
Symbol Part Purpose Typ. Min. Max. Remark
FET1 N-channel
MOS FET Discharge control − − −
Threshold voltage ≤ Overdischarge
detection voltage*2
Gate to source withstand voltage ≥
Charger voltage*3
FET2 N-channel
MOS FET Charge control − − −
Threshold voltage ≤ Overdischarge
detection voltage*2
Gate to source withstand voltage ≥
Charger voltage*3
R1, R2 Resistor ESD protection,
For power fluctuation 470 Ω 150 Ω*1 1 kΩ*1
Resistance should be as small as
possible to avoid lowering the
overcharge detect ion accuracy due to
current consumption.*4
C1, C2 Cap acitor For power fluctuation 0.1 μF 0.068 μF*1 1.0 μF*1 Connect a capacitor of 0.068 μF or
higher between VDD pin and VSS pin.*5
R3 Resistor
Protection for reverse
connection of a
charger 2 kΩ 300 Ω*1 4 kΩ*1 Select as large a resistance as possible
to prevent current when a charger is
connected in reverse.*6
*1. Please set up a filter constant to be R1 × C1 = R2 × C2.
*2. If the threshold voltage of an FET is low, the FET may not cut the charge current. If an FET with a threshold voltage
equal to or higher than the overdischarge detection voltage is used, discharging may be stopped before overdischarge
is detected.
*3. If the withstand voltage between the gate and source is equal to or lower than the charger voltage, the FET may be
destroyed.
*4. An accuracy of overcharge detection voltage is guaranteed by R1 = 470 Ω. Connecting resistors with other values
worsen the accuracy. In case of connecting larger resistor to R1, the voltage between the VDD pin and VSS pin may
exceed the absolute maximum rating because the current flows to the S-8252 Series from the charger due to reverse
connection of charger. Connect a resistor of 150 Ω or more to R1 for ESD protection.
*5. When connecting a resistor of 150 Ω or less to R1 or R2 or a capacitor of 0.068 μF or less to C1 or C2, the S-8252
Series may malfunctio n when power dissipation is largely fluc tuated.
*6. When a resistor of 4 kΩ or more is connect ed to R3, the charge current may not be cut.
Caution 1. The above constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the above
example of connection. In addition, the example of connection shown above and the constant do not
guarantee proper operation. Perform thorough evaluation using the actual application to set the
constant.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_00 S-8252 Series
Seiko Instruments Inc. 21
Precautions
• The application conditions for the input voltage, output voltage, and load current should not exceed the package
power dissipation.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• SII claims no responsibility for any and all disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8252 Series Rev.2.3_00
Seiko Instruments Inc.
22
Characteristics (Typical Data)
1. Current consumption
1. 1 IOPE vs. Ta 1. 2 IPDN vs. T a
I
OPE
[μA]
0
2
4
6
8
−40 0 25 50 75 85
−25 Ta [°C]
0255075
85
Ta [°C]
0.100
0.075
0.050
0.025
0
1. 3 IOPE vs. V DD
0
1
2
3
4
6
5
V
DD
[V]
I
OPE
[μA]
0 2 4 6 810
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_00 S-8252 Series
Seiko Instruments Inc. 23
2. Overcharge detection / release voltage, overdischarge detection / relea se voltage,
overcurrent detection v oltage, charge overcurrent detection voltage, and delay time
2. 1 VCU vs. Ta 2. 2 VCL vs . Ta
4.32
4.30
4.28
4.26
4.24
V
CU
[V]
−40 0 25 50 75 85
−25 Ta [°C]
4.14
4.10
4.12
4.08
4.06
4.04
4.02
V
CL
[V]
−40 0 255075
85
−25 Ta [°C]
2. 3 VDL vs. Ta 2. 4 VDU vs. Ta
2.05
2.01
2.03
1.99
1.97
1.95
V
DL
[V]
−40 0 25 50 75 85
−25 Ta [°C]
2.10
2.05
2.00
1.95
1.90
V
DU
[V]
−40 0 255075
85
−25 Ta [°C]
2. 5 tCU vs. Ta 2. 6 tDL vs. Ta
0.8
0.4
0.6
t
CU
[s]
−40 0 25 50 75 85
−25 Ta [°C]
1.0
1.2
1.4
1.6
50
t
DL
[ms]
−40 0 255075
85
−25 Ta [°C]
75
100
150
125
175
200
2. 7 VDIOV vs. Ta 2. 8 tDIOV vs. VDD
0.220
0.210
0.200
0.190
0.180
V
DIOV
[V]
−40 0 255075
85
−25 Ta [°C]
4
6
8
10
12
VDD [V]
tDIOV [ms]
465 789
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8252 Series Rev.2.3_00
Seiko Instruments Inc.
24
2. 9 tDIOV vs. Ta 2. 10 VCIOV vs. Ta
12
10
8
6
4
t
DIOV
[ms]
−40 0 25 50 75 85
−25 Ta [°C]
−0.08
−0.09
−0.10
−0.11
−0.12
V
CIOV
[V]
−40 0 255075
85
−25 Ta [°C]
2. 11 tCIOV vs. VDD 2. 12 tCIOV vs. Ta
4
6
8
10
12
V
DD
[V]
t
CIOV
[ms]
4567 98
12
10
8
6
4
t
CIOV
[ms]
−40 0 255075
85
−25 Ta [°C]
2. 13 VSHORT vs. Ta 2. 14 tSHORT vs. VDD
0.40
V
SHORT
[V]
−40 0 25 50 75 85
−25 Ta [°C]
0.45
0.50
0.55
0.60
200
150
250
300
350
400
V
DD
[V]
t
SHORT
[μs]
456789
2. 15 tSHORT vs. Ta
200
150 −40 0 25 50 75 85
−25 Ta [°C]
250
300
350
400
t
SHORT
[μs]
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_00 S-8252 Series
Seiko Instruments Inc. 25
3. CO pin / DO pin
3. 1 RCOH vs. VCO 3. 2 RCOL vs. VCO
R
COH
[kΩ]
V
CO
[V] 73216540
0
6
4
2
8
10
R
COL
[kΩ]
V
CO
[V]
0
4
2
8
6
10
1086420
3. 3 RDOH vs. VDO 3. 4 RDOL vs. VDO
RDOH [kΩ]
VDO [V] 73216540
0
10
20
30
RDOL [kΩ]
VDO [V] 43210
0
20
10
30
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8252 Series Rev.2.3_00
Seiko Instruments Inc.
26
Marking Specifications
1. SOT-23-6
(1) to (3): Product code (Refer to Product name vs. Product code)
(4): Lot number
123
465
Top view
(1) (2) (3) (4)
Product name vs. Product code
Product Code
Product Name (1) (2) (3)
S-8252AAA-M6T1U C G A
S-8252AAB-M6T1U C G B
S-8252AAC-M6T1U C G C
S-8252AAD-M6T1U C G D
S-8252AAE-M6T1U C G E
S-8252AAF-M6T1U C G F
S-8252AAG-M6T1U C G G
S-8252AAH-M6T1U C G H
S-8252AAI-M6T1U C G I
S-8252AAJ-M6T1U C G J
S-8252AAK-M6T1U C G K
S-8252AAL-M6T1U C G L
S-8252AAO-M6T1U C G O
S-8252AAP-M6T1U C G P
S-8252AAQ-M6T1U C G Q
S-8252AAS-M6T1U C G S
S-8252AAT-M6T1U C G T
S-8252AAU-M6T1U C G U
S-8252AAV-M6T1U C G V
S-8252AAW-M6T1U C G W
S-8252AAX-M6T1U C G X
Remark Please contact our sales offic e for the products other than those specified above.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_00 S-8252 Series
Seiko Instruments Inc. 27
2. SNT-6A
(1) to (3): Product code (Refer to Product name vs. Product code)
(4) to (6): Lot number
1
3
6
4
25
Top view
(1) (2) (3)
(4) (5) (6)
Product name vs. Product code
Product Code
Product Name (1) (2) (3)
S-8252AAA-I6T1U C G A
S-8252AAH-I6T1U C G H
S-8252AAM-I6T1U C G M
S-8252AAN-I6T1U C G N
Remark Please contact our sales offic e for the products other than those specified above.
2.9±0.2
0.15
1.9±0.2
123
4
65
0.35±0.15
0.95
+0.1
-0.05
0.95
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
No. MP006-A-P-SD-2.0
MP006-A-P-SD-2.0
SOT236-A-PKG Dimensions
No.
TITLE
SCALE
UNIT mm
123
45
6
ø1.5 +0.1
-0 2.0±0.05
ø1.0 +0.2
-0 4.0±0.1
1.4±0.2
0.25±0.1
3.2±0.2
Seiko Instruments Inc.
No. MP006-A-C-SD-3.1
MP006-A-C-SD-3.1
SOT236-A-Carrier Tape
Feed direction
4.0±0.1(10 pitches:40.0±0.2)
No.
TITLE
SCALE
UNIT mm
12.5max.
9.0±0.3
ø13±0.2
(60°) (60°)
QTY 3,000
Seiko Instruments Inc.
Enlarged drawing in the central part
No. MP006-A-R-SD-2.1
MP006-A-R-SD-2.1
SOT236-A-Reel
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
SNT-6A-A-PKG Dimensions
PG006-A-P-SD-2.0
No. PG006-A-P-SD-2.0
0.2±0.05
0.48±0.02
0.08 +0.05
-0.02
0.5
1.57±0.03
123
45
6
Feed direction
4.0±0.1
2.0±0.05
4.0±0.1
ø1.5 +0.1
-0
ø0.5
1.85±0.05 0.65±0.05
0.25±0.05
5°
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
PG006-A-C-SD-1.0
SNT-6A-A-Carrier Tape
No. PG006-A-C-SD-1.0
+0.1
-0
1
2
4
3
56
12.5max.
9.0±0.3
ø13±0.2
(60°) (60°)
QTY.
No. PG006-A-R-SD-1.0
PG006-A-R-SD-1.0
Enlarged drawing in the central part
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
SNT-6A-A-Reel
5,000
No.
TITLE
SCALE
UNIT mm
SNT-6A-A-Land Recommendation
Seiko Instruments Inc.
PG006-A-L-SD-4.0
No. PG006-A-L-SD-4.0
0.3
0.2
0.52
1.36
0.52
1
2
Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package.
2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm
or less from the land pattern surface.
3. Match the mask aperture size and aperture position with the land pattern.
4. Refer to "SNT Package User's Guide" for details.
1. (0.25 mm min. / 0.30 mm typ.)
2. (1.30 mm ~ 1.40 mm)
0.03 mm
SNT
1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.).
2. Do not widen the land pattern to the center of the package ( 1.30 mm ~ 1.40 mm ).
1.
2.
※1. 䇋⊼ᛣ⛞Ⲭᓣⱘᆑᑺ(0.25 mm min. / 0.30 mm typ.)DŽ
※2. 䇋࣓ᇕ㺙Ё䯈ᠽሩ⛞Ⲭᓣ (1.30 mm ~ 1.40 mm)DŽ
⊼ᛣ1. 䇋࣓㛖ൟᇕ㺙ⱘϟ䴶ࠋϱ㔥ǃ⛞䫵DŽ
2. ᇕ㺙ϟǃᏗ㒓Ϟⱘ䰏⛞㝰ᑺ (Ң⛞Ⲭᓣ㸼䴶䍋) 䇋ࠊ0.03 mmҹϟDŽ
3. 㝰ⱘᓔষሎᇌᓔষԡ㕂䇋Ϣ⛞Ⲭᓣᇍ唤DŽ
4. 䆺㒚ݙᆍ䇋খ䯙 "SNTᇕ㺙ⱘᑨ⫼ᣛ"DŽ
www.sii-ic.com
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