Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
VCC6
LVPECL, LVDS Crystal Oscillator Data Sheet
Vectron’s VCC6 Crystal Oscillator is a quartz stabilized, di erential output oscillator, operating o either a 2.5 or 3.3 volt supply,
hermetically sealed 5x7 ceramic package.
Ultra Low Jitter Performance, Fundamental or 3rd OT Crystal Design•
Output Frequencies to 350.000MHz•
0.3 ps typical RMS jitter, 12k-20MHz•
Di erential Output•
Enable/Disable•
-10/70°C, -40/85°C or -55/125°C Operation•
Hermetically Sealed 5x7 Ceramic Package•
Product is compliant to RoHS directive •
and fully compatible with lead free assembly
Ethernet, GbE, Synchronous Ethernet•
Fiber Channel•
Enterprise Servers•
Telecom•
Clock source for A/D’s, D/A’s•
Driving FPGA’s•
Test and Measurement•
PON•
Medical•
COTS •
Features Applications
Block Diagram
Description
VCC6
VDD Output
E/D or NC Gnd
Oscillator
Crystal
E/D or NC
Complementary
Output
Page1
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Performance Speci cations
1. The VCC6 power supply pin should be  ltered, eg, a 0.1 and 0.01uf capacitor.
2. See Standard Frequencies and Ordering Information for more information.
3. Includes calibration tolerance, operating temperature, supply voltage variations, aging and IR re ow.
4. Figure 1 de nes the test circuit and Figure 2 de nes these parameters.
5. Duty Cycle is de ned as the On/Time Period.
6. Measured using an Agilent E5052, 155.520MHz. Please see “Typical Phase Noise and Jitter Report for the VCC6 series”.
7. Measured using a Wavecrest SIA3300C, 90K samples.
8. Outputs will be Enabled if Enable/Disable is left open.
Table 1. Electrical Performance, LVPECL Option
Parameter Symbol Min Typical Maximum Units
Supply
Voltage1VDD 3.135
2.375
3.3
2.5
3.465
2.625
V
V
Current (No Load) IDD 50 98 mA
Frequency
Nominal Frequency2fN10 350.000 MHz
Stability2,3 (Ordering Option) ±20, ±25, ±50, ±100 ppm
Outputs
Output Logic Levels4, -10/70°C
Output Logic High
Output Logic Low
VOH
VOL
VDD-1.025
VDD-1.810
VDD-0.880
VDD-1.620
V
V
Output Logic Levels4, -40/85°C
Output Logic High
Output Logic Low
VOH
VOL
VDD-1.085
VDD-1.830
VDD-0.880
VDD-1.555
V
V
Output Rise and Fall Time4tR/tF600 ps
Load 50 ohms into VDD-1.3V
Duty Cycle545 50 55 %
Jitter (12 kHz - 20 MHz BW)155.52MHz6фJ 0.3 0.7 ps
Period Jitter7
RMS
P/P
Random Jitter
Deterministic Jitter
фJ
2.3
20
2.4
0
ps
ps
ps
ps
Enable/Disable
Output Enabled8
Output Disabled
VIH
VIL
0.7*VDD
0.3*VDD
V
V
Disable Time tD200 ns
Enable/Disable Leakage Current ±200 uA
Enable Pull-Up Resistor
Output Enabled
Output Disabled
33
1
KOhm
MOhm
Start-Up Time tSU 10 ms
Operating Temp. (Ordering Option) TOP -10/70 or -40/85 °C
Package Size 5.0 x 7.0 x 1.8 or 5.08x7.5x2.2 mm
tRtF
VOH
VOL
50%
On Time
Period
Figure 2.
1
2
3
6
5
4
-1.3V
NC
NC
VDD -1.3V
50 ȍ50 ȍ
Figure 1.
Page2
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Performance Speci cations
1. The VCC6 power supply pin should be  ltered, eg, a 0.1 and 0.01uf capacitor.
2. See Standard Frequencies and Ordering Information for more information.
3. Includes calibration tolerance, operating temperature, supply voltage variations, aging and IR re ow.
4. Figure 2 de nes these parameters and Figure 3 de nes the test circuit.
5. Duty Cycle is de ned as the On/Time Period.
6. Measured using an Agilent E5052, 155.520MHz. Please see “Typical Phase Noise and Jitter Report for the VCC6 series”.
7. Measured using a Wavecrest SIA3300C, 90K samples.
8. Outputs will be Enabled if Enable/Disable is left open.
Table 2. Electrical Performance, LVDS Option
Parameter Symbol Min Typical Maximum Units
Supply
Voltage1VDD 3.135
2.375
3.3
2.5
3.465
2.625
V
V
Current (No Load) IDD 60 mA
Frequency
Nominal Frequency2fN10 350.000 MHz
Stability2,3, (Ordering Option) ±20, ±25, ±50, ±100 ppm
Outputs
Output Logic Levels4
Output Logic High
Output Logic Low
VOH
VOL 0.9
1.43
1.10
1.6 V
V
Di erential Output Amplitude 247 330 454 mV
Di erential Output Error 50 mV
O set Voltage 1.125 1.25 1.375 V
O set Voltage Error 50 mV
Output Leakage Current 10 uA
Output Rise and Fall Time4tR/tF600 ps
Load 100 ohms di erential
Duty Cycle545 50 55 %
Jitter (12 kHz - 20 MHz BW)155.52MHz6фJ 0.3 0.7 ps
Period Jitter7
RMS
P/P
Random Jitter
Deterministic Jitter
фJ
2.5
22
2.6
0
ps
ps
ps
ps
Enable/Disable
Output Enabled8
Output Disabled
VIH
VIL
0.7*VDD
0.3*VDD
V
V
Disable Time tD200 ns
Enable/Disable Leakage Current ±200 uA
Enable Pull-Up Resistor
Output Enabled
Output Disabled
33
1
KOhm
MOhm
Start-Up Time tSU 10 ms
Operating Temp. (Ordering Option) TOP -10/70 or -40/85 °C
Package Size 5.0 x 7.0 x 1.8 or 5.08x7.5x2.2 mm
DC 1
4
3
65
2
50
50
0.01 uF
Out
Out
Figure 3.
Page3
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Dimensions are in mm
Package and Pinout
Table 3. Pinout
Pin # Symbol Function
1 E/D or NC Enable Disable or No Connection
2 E/D or NC Enable Disable or No Connection
3 GND Electrical and Lid Ground
4f
OOutput Frequency
5Cf
OComplementary Output Frequency
6V
DD Supply Voltage
Figure 4. Package A Outline Drawing
7.0±0.15
5.0±0.15
1.397 1.27
3.57
2.54
5.08
Part Number
Frequency
Date Code
1
31
Bottom View
5
2
23
65 4
64
1.6 max
7.49±0.15
5.08±0.15
1.397 1.27
3.57
2.54
5.08
Part Number
Frequency
Date Code
1
31
Bottom View
5
2
23
65 4
64
2.16 max
Figure 5. Optional Package Outline Drawing
Figure 6. Pad Layout
1.96
3.66
5.08
2.54
1.78
The Enable/Disable function is set at the factory on either pin
1 or pin 2 and is an ordering option. Outputs will be Enabled if
the Enable/Disable is left open.
The VCC6 can be supplied in one of two package options and
Figure 4 shows the primary package used. The pad layout and
dimensions are identical and a reel would include only 1 of the
two options.
Page4
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
LVPECL Application Diagrams
The VCC6 incorporates a standard PECL output scheme, which are un-terminated emitters as shown in Figure 7. There are numerous application notes on
terminating and interfacing PECL logic and the two most common methods are a single resistor to ground, Figure 8, and a pull-up/pull-down scheme as
shown in Figure 9. An AC coupling capacitor is optional, depending on the application and the input logic requirements of the next stage.
Figure 7. Standard PECL Output Con guration Figure 8. Single Resistor Termination Scheme Figure 9. Pull-Up Pull Down Termination
Resistor values are typically 140 ohms for
3.3V operation.
Resistor values are typically 84 ohms for 2.5V
operation.
Resistor values are typically for 3.3V operation
For 2.5V operation, the resistor to ground is 62
ohms and the resistor to supply is 240 ohms
Environmental and IR Compliance
Table 4. Environmental Compliance
Parameter Condition
Mechanical Shock MIL-STD-883 Method 2002
Mechanical Vibration MIL-STD-883 Method 2007
Temperature Cycle MIL-STD-883 Method 1010
Solderability MIL-STD-883 Method 2003
Fine and Gross Leak
Fine and Gross Leak MIL-STD-883 Method 1014
Resistance to Solvents MIL-STD-883 Method 2015
Moisture Sensitivity Level
Moisture Sensitivity Level MSL1
Contact Pads Gold over Nickel
VCC
OUT+
OUT-
100ȍ
LVDS
Driver LVDS
Receiver 100ȍ
LVDS
Driver Receiver
Figure 10 Standard LVDS
Output Con guration
Figure 11. LVDS to LVDS Connection, Internal 100ohm Figure 12. LVDS to LVDS Connection
External 100ohm and AC blocking capsSome LVDS structures have an internal 100 ohm resistor on the
input and do not need additional components. Some input structures may not have an internal 100 ohm
resistor on the input and will need an external 100ohm
resistor for impedance matching. Also, the input may have
an internal DC bias which may not be compatible with
LVDS levels, AC blocking capacitors can be used.
LVDS Application Diagrams
One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left un-termi-
nated, and if one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 50 ohm impedance matching
into account. Load matching and power supply noise are the main contributors to jitter related problems.
140Ω140Ω
Page5
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Reliability
Table 5. Re ow Pro le
Parameter Symbol Value
PreHeat Time ts 200 sec Max
Ramp Up RUP 3°C/sec Max
Time above 217°C tL 150 sec Max
Time to Peak Temperature tAMB-P 480 sec Max
Time at 260°C
Time at 260°C tP 30 sec Max
Time at 240°C tP2 60 sec Max
Ramp down
Ramp down RDN 6°C/sec Max
Suggested IR Pro le
Devices are built using lead free epoxy and can be subjected to
standard lead free IR re ow conditions shown in Table 5. Contact
pads are gold over nickel and lower maximum temperatures can also
be used, such as 220C.
S
RUP
RDN
tS
tAMB-P
tL
tP
260
217
200
150
25
Time (sec)
Temperature (DegC)
IR Compliance
Table 7. Tape and Reel Information
Tape Dimensions (mm) Reel Dimensions (mm)
W F Do Po P1 A B C D N W1 W2 #/Reel
16 7.5 1.5 4 8 180 2 13 21 55 17 21 250
Absolute Maximum Ratings and Handling Precautions
Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation is not implied or any other
excess of conditions represented in the operational sections of this data sheet. Exposure to absolute maximum ratings for extended
periods may adversely a ect device reliability.
Although ESD protection circuitry has been designed into the VCC6, proper precautions should be taken when handling and mounting.
VI employs a Human Body Model and Charged Device Model for ESD susceptibility testing and design evaluation.
ESD thresholds are dependent on the circuit parameters used to de ne the model. Although no industry standard has been adopted for
the CDM a standard resistance of 1.5kOhms and capacitance of 100pF is widely used and therefor can be used for comparison purposes.
S
Table 6. Maximum Ratings
Parameter Symbol Rating Unit
Storage Temperature TSTORE -55/125 °C
Supply Voltage -0.5 to 5.0 V
Enable/Disable Voltage -0.5 to VDD+0.5 V
ESD, Human Body Model 1500 V
ESD, Charged Device Model 1000 V
Maximum Ratings, Tape & Reel
Page6
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Table 8. Standard Frequencies (MHz)
19.4400 25.0000 27.1200 30.7200 33.0000 33.3330 35.0000 35.5000 38.8800 40.0000 40.6800
43.7500 48.0000 50.0000 53.1250 56.0000 61.440 62.2080 62.5000 66.0000 68.0000 70.0000
71.5000 74.1758 74.2500 75.0000 75.4000 77.7600 78.1250 80.0000 81.2500 83.3330 84.0000
86.0000 87.5000 90.0000 95.0000 99.1440 100.0000 105.0000 106.2500 110.0000 112.0000 112.5000
114.2850 120.0000 122.8800 124.4160 125.0000 125.0093 128.0000 130.0000 130.5882 132.8125 133.0000
135.0000 136.0000 140.0000 142.5408 143.0000 148.7500 150.0000 153.6000 153.8500 155.5200 156.1734
156.2500 156.253906 156.261718 156.2740 156.2930 159.3750 160.0000 161.1300 161.1328 162.3250 164.3555
165.0000 166.0000 166.5600 166.6286 166.6667 167.3300 167.3317 167.328125 167.4100 168.2009 168.6997
172.6423 173.3700 173.3708 173.4380 175.000 176.0950 176.8382 177.3437 178.018970 178.1250 178.5000
180.0000
180.0000 187.0177 187.5000 190.0000 192.4560 195.3125 200.0000 210.0000 212.4840 212.5000 218.7500
225.0000 250.0000 260.0000 266.0000 275.0000 287.5000 312.5000
Enable/Disable
A: E/D is on Pin 2
C: E/D is on Pin 1
VCC6 - X X X - XXMXXXXXX
Product
XO, 5x7 Package
Output and Voltage
Q: +3.3 Vdc ±5%, LVPECL
R: +2.5 Vdc ±5%, LVPECL
L: +3.3 Vdc ±5%, LVDS
V: +2.5 Vdc ±5%, LVDS
Stability/Temp Range
A: ±100 ppm over -10/70°C
B: ±50 ppm over -10/70°C
C: ±100 ppm over -40/85°C
D: ±50 ppm over -40/85°C
E: ±25 ppm over -10/70°C
F: ±25 ppm over -40/85°C
G: ±20 ppm over -10/70°C, excludes aging
P: ±100 ppm over -55/125°C
Frequency in MHz
*Note: not all combination of options are available.
Other speci cations may be available upon request.
±20ppm Options
VCC6-107-frequency LVPECL +3.3V ±20ppm over -10/70°C, includes 10 years aging, E/D on Pin1
VCC6-109-frequency LVDS +3.3V ±20ppm over -10/70°C, includes 10 years aging, E/D on Pin1
VCC6-110-frequency LVPECL +2.5V ±20ppm over -10/70°C, includes 10 years aging, E/D on Pin1
VCC6-111-frequency LVDS +2.5V ±20ppm over -10/70°C, includes 10 years aging, E/D on Pin1
VCC6-119-frequency LVPECL +3.3V ±20ppm over -40/85°C, includes 10 years aging, E/D on Pin1
VCC6-120-frequency LVPECL +2.5V ±20ppm over -40/85°C, includes 10 years aging, E/D on Pin1
VCC6-121-frequency LVDS +3.3V ±20ppm over -40/85°C, includes 10 years aging, E/D on Pin1
VCC6-122-frequency LVDS +2.5V ±20ppm over -40/85°C, includes 10 years aging, E/D on Pin1
Page7
Disclaimer
Vectron International reserves the right to make changes to the product(s) and or information contained herein without notice. No liability is assumed as a result of their use or application.
No rights under any patent accompany the sale of any such product(s) or information.
Rev: 01/26/2011
For Additional Information, Please Contact
USA:
Vectron International
267 Lowell Road
Hudson, NH 03051
Tel: 1.888.328.7661
Fax: 1.888.329.8328
Europe:
Vectron International
Landstrasse, D-74924
Neckarbischofsheim, Germany
Tel: +49 (0) 3328.4784.17
Fax: +49 (0) 3328.4784.30
Asia:
Vectron International
1F-2F, No 8 Workshop, No 308 Fenju Road
WaiGaoQiao Free Trade Zone
Pudong, Shanghai, China 200131
Tel: 86.21.5048.0777
Fax: 86.21.5048.1881
Ordering Information