© 1999 Fairchild Semiconductor Corporation DS009929 www.fairchildsemi.com
November 1988
Revised November 1999
74AC157 • 74ACT157 Quad 2-Input Multiplexer
74AC157 74ACT157
Quad 2-Input Multiplexer
General Description
The AC/A CT157 is a high-speed qu ad 2-input multiplex er.
Four bits of data from two sources can be selected using
the common Select and Enable inputs. The four outputs
present the selected data in the true (noninverted) form.
The AC/ACT157 can also be used as a function generator.
Features
ICC and IOZ reduced by 50%
Outputs source/sink 24 mA
ACT157 has TTL-compatible inputs
Ordering Code:
Device a ls o av ailable in Tape and R eel. Spe c ify by appending suffix let te r “X” to the ordering co de.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
FACT is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74AC157SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Body
74AC157SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC157MTC MTC16 16 -Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC157PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
74ACT157SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Body
74ACT157SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACT157MTC MTC16 16 -Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT157PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
I0aI0d Source 0 Data Inputs
I1aI1d Source 1 Data Inputs
EEnable Input
S Select Input
ZaZdOutputs
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74AC157 74ACT157
Functional Description
The AC/ACT157 is a quad 2-input multiplexer. It selects
four bits of data from two sources under the control of a
common Select input (S). The Enable input (E) is active-
LOW. When E is HIGH, all of the outputs (Z) are forced
LOW regar dless of al l other in puts. The AC/A CT15 7 is the
logic implementation of a 4-pole, 2-position switch where
the posi tion of the swit ch is determined b y the logic levels
supplied to the Select input. The logic equations for the
outputs are shown bel o w:
Za = E (I1a S + I0a S)
Zb = E (I1b S + I0b S)
Zc = E (I1c S + I0c S)
Zd = E (I1d S + I0d S)
A common use of the AC/ACT157 is the moving of data
from two groups of registers to four common output bus-
ses. The particular register from which the data comes is
determ ined by th e state o f the S elect inpu t. A less o bvious
use is as a func tion gene rator. The AC/ACT 15 7 can ge ner -
ate any four of the sixteen different functions of two vari-
ables with one variable common. This is useful for
implementing gating functions.
Truth Table
H = HIGH Voltage Lev el
L = LOW Voltage Level
X = Immaterial
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Inputs Outputs
ESI
0I1Z
HX X X L
LH X L L
LH X H H
LL L X L
LLH X H
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74AC157 74ACT157
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: Absol ut e maximum r atings a re those va lues bey ond which damage
to the dev ice may occ ur. The databoo k specific ations sh ould be m et, with-
out exc eption, to e nsure that the system des ign is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits ou tside dat abook spe c if ic at ions.
DC Electrical Characteristics for AC
Note 2: All outputs lo aded; thre sholds on input as s oc iated with outpu t un der test.
Note 3: Maximum test durati on 2.0 ms, one output loaded at a time.
Note 4: IIN and ICC @ 3.0V are gu aranteed to be less t han or equa l t o th e respectiv e limit @ 5.5V VCC.
Supply Voltage (VCC) 0.5V to +7.0V
DC Input Diode Current (IIK)
V
I = 0.5V 20 mA
V
I = VCC + 0.5V +20 mA
DC Input Vo ltage (VI) 0.5V to VCC + 0.5V
DC Output Diode Current (IOK)
V
O = 0.5V 20 mA
V
O = VCC + 0.5V +20 mA
DC Output Voltage (VO) 0.5V to VCC + 0.5V
DC Output Source
or Sink Current (IO) ±50 mA
DC VCC or Ground Curre nt
per Output Pin (ICC or IGND) ±50 mA
Storage Temperature (TSTG) 65°C to +150°C
Junction Temperature (TJ)
PDIP 140°C
Supply Voltage (VCC)
AC 2.0V to 6.0V
ACT 4.5V to 5.5V
Input Voltage (VI) 0V to VCC
Output Voltage (VO) 0V to VCC
Operating Temperature (TA) 40°C to +85°C
Minimum Input Edge Rate (V/t)
AC Devices
V
IN from 30% to 70% of VCC
V
CC @ 3.3V, 4.5V, 5.5V 125 mV/ns
Minimum Input Edge Rate (V/t)
ACT Devices
V
IN from 0.8V to 2.0V
V
CC @ 4.5V, 5.5V 125 mV/ns
Symbol Parameter VCC TA = +25°C T
A = 40°C to +85°CUnits Conditions
(V) Typ Guaranteed Limits
VIH Minimum HIGH Level 3.0 1.5 2.1 2.1 VOUT = 0.1V
Input Voltage 4.5 2.25 3.15 3.15 V or VCC 0.1V
5.5 2.75 3.85 3.85
VIL Maximum LOW Level 3.0 1.5 0.9 0.9 VOUT = 0.1V
Input Voltage 4.5 2.25 1.35 1.35 V or VCC 0.1V
5.5 2.75 1.65 1.65
VOH Minimum HIGH Level 3.0 2.99 2.9 2.9
Output Voltage 4.5 4.49 4.4 4.4 V IOUT = 50 µA
5.5 5.49 5.4 5.4 VIN = VIL or VIH
3.0 2.56 2.46 IOH = 12 mA
4.5 3.86 3.76 V IOH = 24 mA
5.5 4.86 4.76 IOH = 24 mA (Note 2)
VOL Maximum LOW Level 3.0 0.002 0.1 0.1
Output Voltage 4.5 0.001 0.1 0.1 V IOUT = 50 µA
5.5 0.001 0.1 0.1 VIN = VIL or VIH
3.0 0.36 0.44 IOL = 12 mA
4.5 0.36 0.44 V IOL = 24 mA
5.5 0.36 0.44 IOL = 24 mA (Note 2)
IIN Maximum Input 5.5 ±0.1 ±1.0 µA V
I = VCC, GND
(Note 4) Leakage Curr ent
IOLD Minimum Dynamic 5.5 75 mA VOLD = 1.65V Max
IOHD Output Current (Note 3) 5.5 75 mA VOHD = 3.85V Min
ICC Maximum Quiescent 5.5 4.0 40.0 µA VIN = VCC
(Note 4) Supply Current or GND
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74AC157 74ACT157
DC Characteristics for ACT
Note 5: All outputs loaded; th resholds on input associate d w it h output under tes t.
Note 6: Maximum test du ration 2.0 m s, one out put loaded a t a tim e.
AC Electrical Characteristics for AC
Note 7: Voltage Range 3.3 is 3.3V ± 0.3V
Voltage Range 5. 0 is 5. 0V ± 0.5V
Symbol Parameter VCC TA = +25°C T
A = 40°C to +85°CUnits Conditions
(V) Typ Guaranteed Limits
VIH Minimum HIGH Level 4.5 1.5 2.0 2.0 V VOUT = 0.1V
Input Voltage 5.5 1.5 2.0 2.0 or VCC 0.1V
VIL Maximum LOW Level 4.5 1.5 0.8 0.8 V VOUT = 0.1V
Input Voltage 5.5 1.5 0.8 0.8 or VCC 0.1V
VOH Minimum HIGH Level 4.5 4.49 4.4 4.4 V I
OUT = 50 µA
Output Voltage 5.5 5.49 5.4 5.4 VIN = VIL or VIH
4.5 3.86 3.76 V IOH = 24 mA
5.5 4.86 4.76 IOH = 24 mA (Note 5)
VOL Maximum LOW Level 4.5 0.001 0.1 0.1 V I
OUT = 50 µA
Output Voltage 5.5 0.001 0.1 0.1 VIN = VIL or VIH
4.5 0.36 0.44 V IOL = 24 mA
5.5 0.36 0.44 IOL = 24 mA (Note 5)
IIN Maximum Input 5.5 ±0.1 ±1.0 µA V
I = VCC, GND
Leakage Current
ICCT Maximum 5.5 0.6 1.5 mA VI = VCC 2.1V
ICC/Input
IOLD Minimum Dynamic 5.5 75 mA VOLD = 1.65V Max
IOHD Output Current (Note 6) 5.5 75 mA VOHD = 3.85V Min
ICC Maximum Quiescent 5.5 4.0 40.0 µA VIN = VCC
Supply Current or GND
VCC TA = +25°CT
A = 40°C to +85°C
Symbol Parameter (V) CL = 50 pF CL = 50 pF Units
(Note 7) Min Typ Max Min Max
tPLH Propagation Delay 3.3 1.5 7.0 11.5 1.5 13.0 ns
S to Zn5.0 1.5 5.5 9.0 1.5 10.0
tPHL Propagation Delay 3.3 1.5 6.5 11.0 1.5 12.0 ns
S to Zn5.01.55.08.51.09.5
tPLH Propagation Delay 3.3 1.5 7.0 11.5 1.5 13.0 ns
E to Zn5.0 1.5 5.5 9.0 1.5 10.0
tPHL Propagation Delay 3.3 1.5 6.5 11.0 1.5 12.0 ns
E to Zn5.01.55.59.01.09.5
tPLH Propagation Delay 3.3 1.5 5.0 8.5 1.0 9.0 ns
In to Zn5.01.54.06.51.07.0
tPHL Propagation Delay 3.3 1.5 5.0 8.0 1.0 9.0 ns
In to Zn5.01.54.06.51.07.0
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74AC157 74ACT157
AC Electrical Characteristics for ACT
Note 8: Volt age Range 5.0 is 5.0V ± 0.5V
Capacitance
VCC TA = +25°CT
A = 40°C to +85°C
Symbol Parameter (V) CL = 50 pF CL = 50 pF Units
(Note 8) Min Typ Max Min Max
tPLH Propagation Delay 5.0 2.0 5.5 9.0 1.5 10.0 ns
S to Zn
tPHL Propagation Delay 5.0 2.0 5.5 9.5 2.0 10.5 ns
S to Zn
tPLH Propagation Delay 5.0 1.5 6.0 10.0 1.5 11.5 ns
E to Zn
tPHL Propagation Delay 5.0 1.5 5.0 8.5 1.0 9.0 ns
E to Zn
tPLH Propagation Delay 5.0 1.5 4.0 7.0 1.0 8.5 ns
In to Zn
tPHL Propagation Delay 5.0 1.5 4.5 7.5 1.0 8.5 ns
In to Zn
Symbol Parameter Typ Units Conditions
CIN Input Capacitance 4.5 pF VCC = OPEN
CPD Power Dissipation Capacitance 50.0 pF VCC = 5.0V
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74AC157 74ACT157
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Out line Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Body
Package Number M16A
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74AC157 74ACT157
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
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74AC157 74ACT157
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16- Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
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74AC157 74ACT157 Quad 2-Input Multiplexer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-L ead Plastic Dual-In-Line Package (PDIP ), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume an y responsibility for u se of any circuitry descr ibed, no circuit pat ent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life sup por t de vices o r syst ems are dev ic es or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instruct ions fo r use pr ovi de d in the l abe ling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A c ritica l compo nent i n any compo nent o f a li fe supp ort
device or system whose failure to perform can be rea-
sonabl y e xpec ted to cause th e fa i lure of the l ife s upport
device or system, or to affect its safety or effectiveness.
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