TC62D776CFG TOSHIBA CMOS Integrated Circuit Silicon Monolithic TC62D776CFG 16-Channel Constant-Current LED Driver of the 3.3-V and 5-V Power Supply The TC62D776CFG is a constant-current driver for LED and LED display lighting applications. The output current from each of the 16 outputs is programmable via a single external resistor. The TC62D776CFG contains a 16-channel shift register, a 16-channel latch, a 16-channel AND gate and a 16-channel constant-current output. Fabricated with a CMOS process, the TC62D776CFG allows high-speed data transfer. It operates with a 3.3- or 5-V power supply. . SSOP24-P-300-1.00B Weight : 0.32g Typ. Features Supply voltage : VDD = 3.0 to 5.5 V 16-output built-in Output current setup range : IOUT = 1.5 to 90 mA Constant current output accuracy (@ REXT = 1.2 k, VOUT = 1.0 V, VDD = 3.3 V, 5.0 V) : S rank; between outputs 1.5 % (max) : S rank; between devices 1.5 % (max) : N rank; between outputs 2.5 % (max) : N rank; between devices 2.5 % (max) Output voltage : VOUT = 17 V (max) I/O interface : CMOS interfaces (Schmitt trigger input) Data transfer frequency : fSCK = 25 MHz (max) Operation temperature range : Topr = -40 to 85 C 8-bit (256 steps) current correction function built-in. 1 bit (HC) by the MSB side: Selects the output current range. 7 bit by the LSB side: Output current is adjusted at 128 steps in the range of 11% to 45%. (In the case of HC=1) Output current is adjusted at 128 steps in the range of 50% to 200%. (In the case of HC=0) Thermal shutdown function (TSD) built-in. Output error detection function built-in. Auto-output error detection and manual-output error detection using commands Output open detection function (OOD) and output short detection function (OSD) built-in. Power-on-reset function built-in. (When the power supply is turned on, internal data is reset) Stand-by function built-in. (IDD = 1A at standby mode) Output delay function built-in. (Output switching noise is reduced) Package : SSOP24-P-300-1.00B For detailed part naming conventions, contact your local Toshiba sales representative or distributor. 1 2011-12-07 TC62D776CFG Block Diagram OUT0 OUT1 OUT15 Error detection result data register Error detection circuit TSD circuit Constant current output circuit Reference voltage circuit Output delay circuit 8bit DAC ON/OFF data register State setting register ENABLE 16 Data transfer control circuit Command control circuit TRANS 16 SIN R-EXT 16 16 SOUT selection circuit 16-bit shift registor F/F SOUT VDD POR circuit SCK GND Pin Assignment (top view) GND SIN SCK TRANS OUT0 VDD R-EXT SOUT ENABLE OUT1 OUT15 OUT14 OUT2 OUT3 OUT13 OUT12 OUT4 OUT11 OUT5 OUT6 OUT9 OUT7 OUT8 OUT10 2 2011-12-07 TC62D776CFG Terminal Description Pin No. Pin Name Function 1 GND GND terminal 2 SIN Serial data input terminal 3 SCK Serial data transfer clock input terminal 4 TRANS Data transfer command input terminal 5 OUT0 Constant-current output terminal 6 OUT1 Constant-current output terminal 7 OUT2 Constant-current output terminal 8 OUT3 Constant-current output terminal 9 OUT4 Constant-current output terminal 10 OUT5 Constant-current output terminal 11 OUT6 Constant-current output terminal 12 OUT7 Constant-current output terminal 13 OUT8 Constant-current output terminal 14 OUT9 Constant-current output terminal 15 OUT10 Constant-current output terminal 16 OUT11 Constant-current output terminal 17 OUT12 Constant-current output terminal 18 OUT13 Constant-current output terminal 19 OUT14 Constant-current output terminal 20 OUT15 Constant-current output terminal 21 ENABLE 22 SOUT Serial data output terminal. 23 R-EXT An external resistance for an output current setup is connected between this terminal and ground. 24 VDD An output current enable signal input terminal In "H" level input, outputs are turned off compulsorily. In "L" level input, outputs are ON/OFF controlled according to serial data. Power supply terminal 3 2011-12-07 TC62D776CFG Equivalent Circuits for Inputs and Outputs ENABLE Terminal VDD TRANS Terminal R (UP) VDD ENABLE TRANS GND GND SCK and SIN Terminals R (DOWN) SOUT Terminal VDD VDD SCK SIN SERIAL-OUT GND GND OUT0 to OUT15 Terminals OUT0 to OUT15 GND 4 2011-12-07 TC62D776CFG Timing Diagram n=0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 H SCK L H SIN L H TRANS L H ENABLE L ON OUT0 OFF ON OUT1 OFF ON OUT2 OFF ON OUT15 OFF SOUT H L The TC62D776CFG can operate with a 3.3- or 5.0-V power supply. The same voltage must be supplied to the power and signal (SCK/SIN/TRANS/ ENABLE ) domains. 5 2011-12-07 TC62D776CFG The explanation of the function (Basic data input pattern) Data is serially loaded into the TC62D776CFG using the SIN and SCK inputs. Command selection is done via the SCK and TRANS inputs. About the operation of each command Symbol Num of SCK at TRANS="H" (Note2) Operation S0 0,1 Input of output ON/OFF data. S1 5,6 Executes output open/short detection manually. (Note1) Transfers the result of open/short detection to the 16-bit Shift Register. (Note1) S2 S3 7,8 9,10 Input of state setting data (1). Input of state setting data (2). Note 1: When output open/short detection is enabled. Note 2: SCK pulse trains other than those shown above are not recognized as commands. *S0 command (Input of output ON/OFF data.) SCK TRANS SIN The number of SCK pulses at TRANS="H" is 0 or 1. OUTPUT ON/OFF DATA *S1 command (Output open/short detection function manual operation is executed.) The number of SCK pulses at TRANS="H" is 5 or 6 *S2 command (Input of state setting data (1).) The number of SCK pulses at TRANS="H" is 7 or 8 *S3 command (Input of state setting data (2).) The number of SCK pulses at TRANS="H" is 9 or 10 6 2011-12-07 TC62D776CFG About the operation of each command S0 command (Input of output ON/OFF data.) Description If SCK pulses High zero or one time while TRANS is High, it is interpreted as the S0 command, which acts as follows. Basic input pattern of S0 command Input form of output ON/OFF data MSB D15 D14 D13 D12 D11 LSB D10 D9 OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 D8 D7 D6 D5 D4 D3 D2 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 D1 D0 OUT1 OUT0 Input in MSB first. Output ON/OFF data setting Input Data 1 0 Default after power-on Setting Output turn on Output turn off Data Setting 0 Output turn off Automatic Error Detection Mode If output open/short detection is enabled, its result is automatically transferred from the Error Detection Result register to the 16-bit Shift Register, which can be shifted out from the SOUT pin. Output open/short detection can be enabled with the S3 command. Open/short errors can be detected only for output channels that are enabled for at least 800 ns (Note 1) and are configured to be turned on. For the disabled output channels, the detection result will be 1 (normal). If the output channels stay on for no longer than 800 ns, the automatic error detection result will be invalid; in this case, the detection results of all channels will be 1 (normal). Note 1: Automatic error detection is triggered by the falling edge of the ENABLE signal. Thus, this feature can not be used when ENABLE is tied Low. In the figure shown below, the outputs are enabled for over 800 ns during the Terr2 period, but the automatic error detection result is invalid; thus, it should be kept in mind that the detection results will be 1 (normal) for all channels. 7 2011-12-07 TC62D776CFG Output form of output opening/short detection result data The result of output open/short detection is transferred to the 16-bit Shift Register in the format shown below. MSB LSB E15 E14 E13 E12 E11 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 E0 OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT1 OUT0 OUT2 Error code (when output open detection function is effective) Judging in error detection Error code Condition of output terminal VOODVOUT VOOD<VOUT 0 1 Open Normal Error code (when output short detection function is effective) Judging in error detection Error code Condition of output terminal VOSDVOUT VOSD>VOUT 0 1 short-circuit Normal Error code (when output open/short detection function is effective) Judging in error detection Error code Condition of output terminal VOODVOUT or VOSDVOUT 0 Open or short-circuit VOOD<VOUT or VOSD>VOUT 1 Normal *When both output error detection function is effective, Open and short-circuit are undistinguishable. Basic input pattern of S0 commandWhen output opening/short detection is effective. After the S0 command is loaded, the first SCK pulse (marked X above) is used to transfer an error detection result to the 16-bit Shift Register. At this time, the TC62D776CFG ignores the SIN input. 8 2011-12-07 TC62D776CFG S1 command (Output open/short detection function manual operation is executed.) Description If SCK pulses High five or six times while TRANS is High, it is interpreted as the S1 command, which acts as follows. If output open/short detection is enabled, a current of approximately 60 A is forced to flow to all the outputs during the tON(S1) period in order to perform open/short detection. tON(S1) is approximately 800 ns long. Its result is immediately transferred to the 16-bit Shift Register, which can be shifted out from the SOUT pin. The format used to transfer the detection result is the same as for the S0 command. Output open/short detection can be enabled with the S3 command. Note: The S1 command should be loaded when the outputs are off. The S1 command is not executed if it is loaded when ENABLE = Low.The S1 command is not also executed when output open/short detection is disabled. SCK should not be applied during the tON(S1) period. Basic input pattern of S1 command After the S1 command is loaded, the first SCK pulse (marked X above) is used to transfer an error detection result to the 16-bit Shift Register. At this time, the TC62D776CFG ignores the SIN input. 9 2011-12-07 TC62D776CFG S2 command (Input of state setting data (1).) Description If SCK pulses High seven or eight times while TRANS is High, it is interpreted as the S0 command, which acts as follows. The TC62D776CFG transfers the state control data (1) from the 16-bit Shift Register to the State Control register. The states that can be programmed with the S2 command are shown below. Basic input pattern of S2 command) Input form of state setting data (1) MSB LSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A7 A6 A5 A4 A3 A2 A1 A0 R0 S0 T0 U0 - - H0 L0 *Input in MSB first. *Please input "L" data to D7 to D2. State setting data (1) setting Setting bit A7 A6 to A0 R0 to U0 H0 L0 Input data Outline of command 0 1 Setting of High set mode Low set mode current correction range 50% to 200% 11% to 45% Setting of Refer to attached table. current correction data TEST Mode setting. Please input "L" data. Data Initialization Normal Initialization Setting of Normal Active standby mode (1) 10 Default after power-on High set mode 50% to 200% 100% "L" Normal Normal 2011-12-07 TC62D776CFG Details of each setting A setting (setting of current correction data) 1. In the case of a high setting mode (50% to 200%) A[6] 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A[5] 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A[4] 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 A[3] 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 A[2] 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 A[1] 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 A[0] 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Current gain(%) 200.00 198.82 197.64 196.46 195.28 194.09 192.91 191.73 190.55 189.37 188.19 187.01 185.83 184.65 183.46 182.28 181.10 179.92 178.74 177.56 1 1 0 1 0 1 1 176.38 0 1 0 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 175.20 174.02 172.83 171.65 170.47 169.29 168.11 166.93 165.75 164.57 163.39 162.20 161.02 159.84 158.66 157.48 156.30 155.12 153.94 152.76 151.57 150.39 149.21 148.03 146.85 145.67 144.49 143.31 142.13 140.94 139.76 138.58 137.40 136.22 135.04 133.86 132.68 131.50 130.31 129.13 127.95 126.77 125.59 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 11 A[6] 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A[5] 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A[4] 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 A[3] 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 A[2] 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 A[1] 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 A[0] 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Current gain(%) 124.41 123.23 122.05 120.87 119.69 118.50 117.32 116.14 114.96 113.78 112.60 111.42 110.24 109.06 107.87 106.69 105.51 104.33 103.15 101.97 100.79 (Default) 99.61 98.43 97.24 96.06 94.88 93.70 92.52 91.34 90.16 88.98 87.80 86.61 85.43 84.25 83.07 81.89 80.71 79.53 78.35 77.17 75.98 74.80 73.62 72.44 71.26 70.08 68.90 67.72 66.54 65.35 64.17 62.99 61.81 60.63 59.45 58.27 57.09 55.91 54.72 53.54 52.36 51.18 50.00 2011-12-07 TC62D776CFG 2. In the case of a low setting mode (11% to 45%) A[6] 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A[5] 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A[4] 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A[3] 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 A[2] 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 A[1] 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 A[0] 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Current gain(%) 45.00 44.73 44.46 44.20 43.93 43.66 43.39 43.13 42.86 42.59 42.32 42.06 41.79 41.52 41.25 40.98 40.72 40.45 40.18 39.91 39.65 39.38 39.11 38.84 38.57 38.31 38.04 37.77 37.50 37.24 36.97 36.70 36.43 36.17 35.90 35.63 35.36 35.09 34.83 34.56 34.29 34.02 33.76 33.49 33.22 32.95 32.69 32.42 32.15 31.88 31.61 31.35 31.08 30.81 30.54 30.28 30.01 29.74 29.47 29.20 28.94 28.67 28.40 28.13 12 A[6] 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A[5] 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A[4] 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A[3] 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 A[2] 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 A[1] 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 A[0] 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Current gain(%) 27.87 27.60 27.33 27.06 26.80 26.53 26.26 25.99 25.72 25.46 25.19 24.92 24.65 24.39 24.12 23.85 23.58 23.31 23.05 22.78 22.51 22.24 21.98 21.71 21.44 21.17 20.91 20.64 20.37 20.10 19.83 19.57 19.30 19.03 18.76 18.50 18.23 17.96 17.69 17.43 17.16 16.89 16.62 16.35 16.09 15.82 15.55 15.28 15.02 14.75 14.48 14.21 13.94 13.68 13.41 13.14 12.87 12.61 12.34 12.07 11.80 11.54 11.27 11.00 2011-12-07 TC62D776CFG R, S, T, U setting (Setting of Test Mode) R, S, T, U[0] 0 1 Setting of Test Mode Normal operation mode. (Default after power-on) Test Mode. H setting (Setting of Initialization H[0] 0 1 Setting of Initialization Normal operation mode (Default after power-on) Initializes all the internal data of the IC. After initialization, the TC62D776CFG returns to normal operation mode. L setting (Setting of standby mode (1)) L[0] 0 1 Setting of standby mode (1) Normal operation mode (Default after power-on) Standby mode Disables all circuits except digital logic, reducing the supply current of the IC. (All data in the TC62D776CFG is retained, and data can be loaded into the TC62D776CFG.) Loading the S0 command in Standby mode causes the TC62D776CFG to return to normal operation mode. 13 2011-12-07 TC62D776CFG S3 command (Input of state setting data (2).) Description If SCK pulses High nine or ten times while TRANS is High, it is interpreted as the S3 command, which acts as follows. The TC62D776CFG transfers the state control data (2) from the 16-bit Shift Register to the State Control register. The states that can be programmed with the S3 command are shown below. Basic input pattern of S3 command) SCK 2 3 4 5 6 7 8 D8 K0 D7 M0 D6 N0 D5 O0 D4 P0 D3 Q0 D2 - 9 10 TRANS SIN SOUT D15 D14 D13 D12 D11 D10 C0 D0 E0 F0 G0 I0 D9 J0 D1 - D0 - Previous Data D15 D14 D13 D12 Previous Data D15 D14 D13 (In case of J0=0) SOUT (In case of J0=1) Command execution Input form of state setting data (2) MSB LSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 C0 D0 E0 F0 G0 I0 J0 K0 M0 N0 O0 D4 P0 D3 Q0 D2 - D1 - D0 - *Input in MSB first. *Please input "L" data to D8 to D0. State setting data (2) setting Setting bit C0 D0 E0 F0 G0 I0 J0 K0 to Q0 Input data Outline of command 0 Setting of Active thermal shutdown function (TSD) Setting of Not Active output open detection function (OOD) Setting of Not Active output short detection function (OSD) Setting of Normal standby mode (2) Operation Setting of VOSD1 output short detection voltage Setting of Active output deLay function of output terminal Setting of Up SCK trigger of SOUT TEST Mode setting. Please input "L" data. 14 1 Default after power-on Not Active Active Active Not Active Active Not Active Active Normal Operation VOSD2 VOSD1 Not Active Active Down Up "L" 2011-12-07 TC62D776CFG Details of each setting C setting (Setting of thermal shutdown function (TSD)) C[0] Setting of thermal shutdown function Enables thermal shutdown. (Default after power-on) Disables thermal shutdown. 0 1 D setting (Setting of output open detection function (OOD)) D[0] Setting of output open detection function 0 1 Disables output error detection. (Default after power-on) Enables output error detection. E setting (Setting of output short detection function (OSD)) E[0] Setting of output short detection function 0 1 Disables output error detection. (Default after power-on) Enables output error detection. F setting (Setting of standby mode (2)) F[0] Setting of standby mode (2) 0 Normal operation mode. (Default after power-on) Pre standby mode. Condition 1: Enters Standby mode when the contents of the Latch become all-0s in normal operation mode. This disables all circuits except digital logic, reducing the supply current of the IC.(All data in the TC62D776CFG is retained, and data 1 can be loaded into the TC62D776CFG.) Condition 2: Other than Condition 1 The TC62D776CFG operates the same way as normal operation mode. G setting (Setting of output short detection voltage) G[0] Setting of output short detection voltage 0 1 VOSD1 (Default after power-on) VOSD2 I setting (Setting of output delay function of output terminal) I[0] Setting of output delay function of output terminal 0 1 Disables output delay function. (Default after power-on) Enables output delay function. J setting (Setting of SCK trigger of SOUT) J[0] Setting of SCK trigger of SOUT 0 1 Data output trigger of SOUT is up edge of SCK (Default after power-on) Data output trigger of SOUT is down edge of SCK K,M,N,O,P,Q setting (Setting of Test Mode) K,M,N,O,P,Q[0] 0 1 Setting of Test Mode Normal operation mode. (Default after power-on) Test Mode. 15 2011-12-07 TC62D776CFG Thermal shutdown function (TSD) If the internal temperature of the IC exceeds 150C, the thermal shutdown (TSD) circuitry trips, turning off all constant-current outputs. When the temperature drops below the TSD release threshold, the TC62D776CFG restarts constant-current output. Since TSD is not intended to protect the IC against permanent damage. it should not be employed actively to monitor chip temperature. Output delay function In order to reduce di/dt caused by simultaneously switching outputs, the TC62D776CFG allows for delays (tDLY (ON), tDLY (OFF)) between contiguous outputs. Switching time difference between outputs are provided in order as follows; OUT0 OUT15 OUT7 OUT8 OUT1 OUT14 OUT6 OUT9 OUT2 OUT13 OUT5 OUT10 OUT3 OUT12 OUT4 OUT11 Power on reset function (POR) The TC62D776CFG provides a power-on reset to reset all internal data in order to prevent malfunctions. The POR circuitry works properly only when VDD rises from 0 V. To re-activate the POR circuitry, VDD must be brought to less than 0.1 V. Internal data is guaranteed to be retained after VDD exceeds 3.0 V. VDD waveform VDD=3.0V VDD voltage for guaranteed data VDD=2.8 V VDD voltage for end of reset VDD=0.1 V End of POR VDD=0 V POR working range Beyond POR working range 16 POR working range 2011-12-07 TC62D776CFG Absolute Maximum Ratings (Ta = 25C) Symbol Rating Unit Supply voltage VDD 6.0 V Output current IOUT 95 mA Logic input voltage VIN -0.3 to VDD + 0.3 (Note 1) V Output voltage VOUT -0.3 to 17 V Operating temperature Topr -40 to 85 C Storage temperature Thermal resistance Power dissipation Tstg -55 to 150 C Rth(j-a) PD 94 (Note 2) 1.32 (Notes 2 and 3) C/W W Characteristics Note 1: However, do not exceed 6.0 V. Note 2: When mounted on a PCB (76.2 x 114.3 x 1.6 mm; Cu = 30%; 35-m-thick; SEMI-compliant) Note 3: Power dissipation is reduced by 1/Rth (j-a) for each C above 25C ambient. Operating Ranges (unless otherwise specified, VDD = 3.0 to 5.5 V, Ta = -40C to 85C) Characteristics Symbol Test Conditions Min Typ. Max Unit Supply voltage VDD 3.0 5.5 V High level logic input voltage VIH Test terminal are SIN, SCK, TRANS, ENABLE 0.7xVDD VDD V Low level logic input voltage VIL Test terminal are SIN, SCK, TRANS, ENABLE GND 0.3xVDD V High level SOUT output current IOH -1 mA Low level SOUT output current IOL 1 mA Constant current output IOUT 1.5 90 mA Test terminal is OUTn 17 2011-12-07 TC62D776CFG AC Characteristics (Unless otherwise noted, VDD = 5.0 V, Ta = 25 C) Characteristics Symbol Serial data transfer frequency fSCK SCK pulse width twSCK TRANS pulse width ENABLE pulse width Serial data setup time Serial data hold time twTRANS twENA Test Conditions Min Typ. Max Unit Cascade connect 25 MHz SCK="H" or "L" 20 ns TRANS="H" 20 ns 25 ns ENABLE ="H" or "L" REXT =200 to 12 k tSETUP1 Test terminal are SIN-SCK 1 tSETUP2 Test terminal are TRANS-SCK 5 tHOLD1 Test terminal are SIN-SCK 3 tHOLD2 Test terminal are TRANS-SCK 7 Min Typ. Max Unit ns ns AC Characteristics (Unless otherwise noted, VDD = 3.3 V, Ta = 25 C) Characteristics Symbol Serial data transfer frequency fSCK Cascade connect 25 MHz SCK pulse width twSCK SCK="H" or "L" 20 ns TRANS="H" 20 ns 25 ns TRANS pulse width ENABLE pulse width Serial data setup time Serial data hold time twTRANS twENA Test Conditions ENABLE ="H" or "L" REXT =200 to 12 k tSETUP1 Test terminal are SIN-SCK 1 tSETUP2 Test terminal are TRANS-SCK 5 tHOLD1 Test terminal are SIN-SCK 3 tHOLD2 Test terminal are TRANS-SCK 7 18 ns ns 2011-12-07 TC62D776CFG Electrical Characteristics (Unless otherwise specified, VDD = 5.0 V ,Ta = 25C) Symbol Test Circuit High level SOUT output voltage VOH 1 Low level SOUT output voltage VOL 1 High level logic input current IIH 2 Low level logic input current IIL Characteristics Min Typ. Max Unit IOH=-1mA VDD - 0.3 VDD V IOL=+1mA GND 0.3 V VIN = VDD Test terminal are ENABLE , SIN, SCK 1 A 3 VIN = GND Test terminal are SIN, SCK, TRANS -1 A IDD1 4 Stand-by mode, VOUT=1.0V, SCK="L" 1.0 A IDD2 4 VOUT=1.0V, REXT=1.2k, All output off 7.0 mA Constant current error (IC to IC) (S rank) IOUT(IC) 5 1.0 1.5 % Constant current error (Ch to Ch) (S rank) IOUT(Ch) 5 1.0 1.5 % Constant current error (IC to IC) (N rank) IOUT(IC) 5 1.0 2.5 % Constant current error (Ch to Ch) (N rank) IOUT(Ch) 5 VOUT=1.0V, REXT=1.2k, OUT0 to OUT15 , 1ch output on 1.0 2.5 % IOK 5 VOUT=17V, REXT=1.2k, OUTn off 0.5 A %VDD 5 VDD=4.5 to 5.5V, VOUT=1.0V, REXT=1.2k, OUT0 to OUT15 , 1ch output on 1 5 %/V %VOUT 5 VOUT=1.0 to 3.0V, REXT=1.2k, OUT0 to OUT15 , 1ch output on 0.1 0.5 %/V R (Up) 3 Test terminal is ENABLE 240 300 360 k R (Down) 2 Test terminal is TRANS 240 300 360 k VOOD 7 REXT=200 to 12k 0.2 0.3 0.4 V VOSD1 7 REXT=200 to 12k VDD - 1.3 VDD - 1.4 VDD - 1.5 0.525 0.55 x x VDD VDD Ta=-40 to +85C Power supply current Output OFF leak current Constant current output power supply voltage regulation Constant current output output voltage regulation Pull-up resistor Pull-down resistor OOD voltage Test Conditions VOUT=1.0V, REXT=1.2k, OUT0 to OUT15 , 1ch output on VOUT=1.0V, REXT=1.2k, OUT0 to OUT15 , 1ch output on VOUT=1.0V, REXT=1.2k, OUT0 to OUT15 , 1ch output on OSD voltage V VOSD2 7 REXT=200 to 12k 0.5 x VDD TSD start temperature TTSD(ON) Junction temperature 150 C Return time of normal mode from SHDN mode tON Time until output current after it becomes the Normal mode from SHDN mode flows 30 s 19 2011-12-07 TC62D776CFG Electrical Characteristics (Unless otherwise specified, VDD = 3.3 V ,Ta = 25C) Symbol Test Circuit High level SOUT output voltage VOH 1 Low level SOUT output voltage VOL 1 High level logic input current IIH 2 Low level logic input current IIL Characteristics Min Typ. Max Unit IOH=-1mA VDD - 0.3 VDD V IOL=+1mA GND 0.3 V VIN = VDD Test terminal are ENABLE , SIN, SCK 1 A 3 VIN = GND Test terminal are SIN, SCK, TRANS -1 A IDD1 4 Stand-by mode, VOUT=1.0V, SCK="L" 1.0 A IDD2 4 VOUT=1.0V, REXT=1.2k, All output off 7.0 mA Constant current error (IC to IC) (S rank) IOUT(IC) 5 1.0 1.5 % Constant current error (Ch to Ch) (S rank) IOUT(Ch) 5 1.0 1.5 % Constant current error (IC to IC) (N rank) IOUT(IC) 5 1.0 2.5 % Constant current error (Ch to Ch) (N rank) IOUT(Ch) 5 VOUT=1.0V, REXT=1.2k, OUT0 to OUT15 , 1ch output on 1.0 2.5 % IOK 5 VOUT=17V, REXT=1.2k, OUTn off 0.5 A %VDD 5 VDD=3.0 to 3.6V, VOUT=1.0V, REXT=1.2k, OUT0 to OUT15 , 1ch output on 1 5 %/V %VOUT 5 VOUT=1.0 to 3.0V, REXT=1.2k, OUT0 to OUT15 , 1ch output on 0.1 0.5 %/V R (Up) 3 Test terminal is ENABLE 240 300 360 k R (Down) 2 Test terminal is TRANS 240 300 360 k VOOD 7 REXT=200 to 12k 0.2 0.3 0.4 V VOSD1 7 REXT=200 to 12k VDD - 1.3 VDD - 1.4 VDD - 1.5 0.525 0.55 x x VDD VDD Ta=-40 to +85C Power supply current Output OFF leak current Constant current output power supply voltage regulation Constant current output output voltage regulation Pull-up resistor Pull-down resistor OOD voltage Test Conditions VOUT=1.0V, REXT=1.2k, OUT0 to OUT15 , 1ch output on VOUT=1.0V, REXT=1.2k, OUT0 to OUT15 , 1ch output on VOUT=1.0V, REXT=1.2k, OUT0 to OUT15 , 1ch output on OSD voltage V VOSD2 7 REXT=200 to 12k 0.5 x VDD TSD start temperature TTSD(ON) Junction temperature 150 C Return time of normal mode from SHDN mode tON Time until output current after it becomes the Normal mode from SHDN mode flows 30 s 20 2011-12-07 TC62D776CFG Switching Characteristics (Unless otherwise specified, VDD = 5.0V ,Ta = 25C) Characteristics Symbol Test Circ Test Condition uit 6 Up edge trigger mode Min Typ. Max 6 16 30 SCK-SOUT tPD1U SCK-SOUT tPD1D 6 Down edge trigger mode 2 12 16 ENABLE - OUTn tPD2 6 REXT = 1.2k 30 40 TRANS- OUTn tPD3 6 ENABLE ="L" 30 40 Output rise time tor 6 10% to 90% points of OUT0 to OUT15 voltage waveforms 10 20 Output fall time tof 6 90% to 10% points of OUT0 to OUT15 voltage waveforms 10 20 tDLY (ON) 6 Reference timing waveforms 1 4 9 tDLY (OFF) 6 Reference timing waveforms 1 4 9 Propagation delay time Output delay time Unit ns Switching Characteristics (Unless otherwise specified, VDD = 3.3 V ,Ta = 25C) Characteristics Propagation delay time Symbol Test Circ Test Condition uit 6 Up edge trigger mode Min Typ. Max SCK-SOUT tPD1U 6 16 30 SCK-SOUT tPD1D 6 Down edge trigger mode 2 14 18 ENABLE - OUTn tPD2 6 REXT = 1.2k 30 40 TRANS- OUTn tPD3 6 ENABLE ="L" 30 40 tor 6 10% to 90% points of OUT0 to OUT15 voltage waveforms 10 20 tof 6 90% to 10% points of OUT0 to OUT15 voltage waveforms 10 20 tDLY (ON) 6 Reference timing waveforms REXT = 1.2k 2 6 12 tDLY (OFF) 6 Reference timing waveforms REXT = 1.2k 2 6 12 Output rise time Output fall time Output delay time 21 Unit ns 2011-12-07 TC62D776CFG Test Circuits Test Circuit 1: High level SOUT output voltage / Low level SOUT output voltage ENABLE SCK OUT0 TRANS OUT15 SIN SOUT GND CL = 10.5 pF IO = -1 mA to 1 mA R-EXT V VDD = 5 V, 3.3V F.G VDD Test Circuit 2: High level logic input current / Pull-down resistor VIN = VDD A A A ENABLE SCK VDD OUT0 TRANS SOUT GND CL = 10.5 pF R-EXT VDD = 5.5 V, 3.3V OUT15 SIN A Test Circuit 3: Low level logic input current / Pull-up resistor A A VDD OUT0 SCK TRANS OUT15 SIN R-EXT GND SOUT 22 VDD = 5V, 3.3V A ENABLE CL = 10.5 pF A 2011-12-07 TC62D776CFG Test Circuit 4: Supply Current VDD OUT0 TRANS GND SOUT CL = 10.5 pF REXT = 1.2 k R-EXT VDD = 5 V, 3.3V OUT15 SIN VOUT = 1.0V F.G ENABLE SCK A Test Circuit 5: Constant current error(IC to IC) / Constant current error(ch to ch) Output OFF leak current Constant current output power supply voltage regulation Constant current output voltage regulation VDD OUT0 A OUT15 A SIN SOUT GND CL = 10.5 pF REXT = 1.2 k R-EXT VDD = 4.5 to 5.5 V, 3 to 3.6V TRANS VOUT = 1V to 3V, 17V F.G ENABLE SCK Test Circuit 6: Switching Characteristics ENABLE OUT0 SCK CL TRANS IOUT SIN CL = 10.5 pF R-EXT SOUT GND CL = 10.5 pF REXT = 1.2 k VIH = VDD VIL = 0 V tr = tf = 10 ns (10 to 90%) 23 VDD = 5 V, 3.3V OUT15 VL = 5 V F.G RL=300 VDD 2011-12-07 TC62D776CFG Test Circuit 7: ODD and OSD voltage F.G SCK SIN VDD OUT0 V TRANS OUT15 ENABLE V VOUT2 VDD =5 V, 3.3V SOUT VOUT1 = 1V GND CL = 10.5 pF REXT = 200, 12 k REXT All outputs are configured to be on. One output is connected to VDS2, and the other outputs are connected to VDS1.VOOD and VOSD are measured by changing VDS2 and monitoring the other output voltages and error detection results from SOUT. 24 2011-12-07 TC62D776CFG Timing Waveforms 1. SCK, TRANS, SIN, SOUT 2. TRANS, ENABLE , OUTn 3. OUTn OUTn are Voltage waveform. 25 2011-12-07 TC62D776CFG 4. ENABLE , OUTn OUTn are Voltage waveform. 26 2011-12-07 TC62D776CFG Reference data The above data is for reference only, not guaranteed. Careful evaluation is required prior to creating a production design. Output Current vs. External Resistor IOUT I-O R -EXT REXT 90 80 Theoretical formula 70 IOUT (A) = 1.03 (V) / REXT ()) x 16.5 IO (mA) IOUT (mA) 60 50 40 30 20 Ta=25C VOUT=1V 10 0 100 1000 10000 REXT () This graph shows the characteristics per channel when all the outputs are on. 27 2011-12-07 TC62D776CFG Reference data The above data is for reference only, not guaranteed. Careful evaluation is required prior to creating a production design. Output current (IOUT) - Output voltage (VOUT) IOUT - VOUT VDD =3.3V,Ta=25,1chON 100 90 80 IOUT (mA) 70 60 50 40 30 20 10 0 0 0.5 1 1.5 VOUT (V) 2 2.5 3 2 2.5 3 IOUT - VOUT VDD=5.0V,Ta=25,1chON 100 90 80 IOUT (mA) 70 60 50 40 30 20 10 0 0 0.5 1 1.5 VOUT (V) 28 2011-12-07 TC62D776CFG Notes on design of ICs 1Decoupling capacitors between power supply and GND It is recommended to place decoupling capacitors between power supply and GND as close to the IC as possible. 2Output current setting resistors When the output current setting resistors (REXT) are shared among multiple ICs, production design should be evaluated carefully. 3Board layout Ground noise generated by output switching might cause the IC to malfunction if the ground line exhibits inductance and resistance due to PC board traces and wire leads. Also, the inductance between the IC output pins and the LED cathode pins might cause large surge voltage, damaging LEDs and the IC outputs. To avoid this situation, PC board traces and wire leads should be carefully laid out. 4Consult the latest technical information for mass production. 29 2011-12-07 TC62D776CFG Package Dimensions CFG Type SSOP24-P-300-1.00B Unit : mm Weight : 0.32g Typ. 30 2011-12-07 TC62D776CFG Notes on Contents 1. Block Diagrams Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. 2. Equivalent Circuits The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 3. Timing Charts Timing charts may be simplified for explanatory purposes. 4. Application Circuits The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is required, especially at the mass production design stage. Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. 5. Test Circuits Components in the test circuits are used only to obtain and confirm the device characteristics. These components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. IC Usage Considerations Notes on handling of ICs The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. Do not exceed any of these ratings. Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead smoke or ignition. To minimize the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON or the negative current resulting from the back electromotive force at power OFF. IC breakdown may cause injury, smoke or ignition. Use a stable power supply with ICs with built-in protection functions. If the power supply is unstable, the protection function may not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition. Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative terminals of power supplies are connected properly. Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. In addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time. Carefully select external components (such as inputs and negative feedback capacitors) and load components (such as speakers), for example, power amp and regulator. If there is a large amount of leakage current such as input or negative feedback condenser, the IC output DC voltage will increase. If this output voltage is connected to a speaker with low input withstand voltage, overcurrent or IC failure can cause smoke or ignition. (The over current can cause smoke or ignition from the IC itself.) In particular, please pay attention when using a Bridge Tied Load (BTL) connection type IC that inputs output DC voltage to a speaker directly. 31 2011-12-07 TC62D776CFG Points to remember on handling of ICs (1) Heat Radiation Design In using an IC with large current flow such as power amp, regulator or driver, please design the device so that heat is appropriately radiated, not to exceed the specified junction temperature (TJ) at any time and condition. These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, please design the device taking into considerate the effect of IC heat radiation with peripheral components. (2) Back-EMF When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor's power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the device's motor power supply and output pins might be exposed to conditions beyond absolute maximum ratings. To avoid this problem, take the effect of back-EMF into consideration in system design. (3) Thermal Shutdown Circuit Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown circuits operate against the over temperature, clear the heat generation status immediately. Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the thermal shutdown circuit to not operate properly or IC breakdown before operation. 32 2011-12-07 TC62D776CFG RESTRICTIONS ON PRODUCT USE * Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. * This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission. * Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR APPLICATIONS. * Product is intended for use in general electronics applications (e.g., computers, personal equipment, office equipment, measuring equipment, industrial robots and home electronics appliances) or for specific applications as expressly stated in this document. Product is neither intended nor warranted for use in equipment or systems that require extraordinarily high levels of quality and/or reliability and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage or serious public impact ("Unintended Use"). Unintended Use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control combustions or explosions, safety devices, elevators and escalators, devices related to electric power, and equipment used in finance-related fields. Do not use Product for Unintended Use unless specifically permitted in this document. * Do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy Product, whether in whole or in part. * Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable laws or regulations. * The information contained herein is presented only as guidance for Product use. No responsibility is assumed by TOSHIBA for any infringement of patents or any other intellectual property rights of third parties that may result from the use of Product. No license to any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise. * ABSENT A WRITTEN SIGNED AGREEMENT, EXCEPT AS PROVIDED IN THE RELEVANT TERMS AND CONDITIONS OF SALE FOR PRODUCT, AND TO THE MAXIMUM EXTENT ALLOWABLE BY LAW, TOSHIBA (1) ASSUMES NO LIABILITY WHATSOEVER, INCLUDING WITHOUT LIMITATION, INDIRECT, CONSEQUENTIAL, SPECIAL, OR INCIDENTAL DAMAGES OR LOSS, INCLUDING WITHOUT LIMITATION, LOSS OF PROFITS, LOSS OF OPPORTUNITIES, BUSINESS INTERRUPTION AND LOSS OF DATA, AND (2) DISCLAIMS ANY AND ALL EXPRESS OR IMPLIED WARRANTIES AND CONDITIONS RELATED TO SALE, USE OF PRODUCT, OR INFORMATION, INCLUDING WARRANTIES OR CONDITIONS OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, ACCURACY OF INFORMATION, OR NONINFRINGEMENT. * Do not use or otherwise make available Product or related software or technology for any military purposes, including without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology products (mass destruction weapons). Product and related software and technology may be controlled under the Japanese Foreign Exchange and Foreign Trade Law and the U.S. Export Administration Regulations. Export and re-export of Product or related software or technology are strictly prohibited except in compliance with all applicable export laws and regulations. * Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product. Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. TOSHIBA assumes no liability for damages or losses occurring as a result of noncompliance with applicable laws and regulations. 33 2011-12-07 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Toshiba: TC62D776CFG,EL