EV-ADF4372SD2Z User Guide
UG-1548
One Technology Way • P. O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the ADF4372 Microwave Wideband Synthesizer with Integrated VCO
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 21
FEATURES
Self contained board, including ADF4372 frequency
synthesizer with integrated VCO, loop filter (180 kHz),
USB interface, and voltage regulators
Windows-based software allows control of synthesizer
functions from a PC
Externally powered by 6 V
EVALUATION KIT CONTENTS
EV-ADF4372SD2Z evaluation board
EQUIPMENT NEEDED
Windows®-based PC with USB port for evaluation software
System demonstration platform, serial only (SDP-S)
EVAL-SDP-CS1Z controller board
Power supply (6 V)
Spectrum analyzer
50 Ω terminators
Low noise REFIN source (optional)
DOCUMENTS NEEDED
ADF4372 data sheet
EV-ADF4372SD2Z user guide
REQUIRED SOFTWARE
ACE software, Version 1.10 or newer
ADF4372 plugin, latest version
GENERAL DESCRIPTION
The EV-ADF4372SD2Z evaluates the performance of the
ADF4372 frequency synthesizer with an integrated voltage
controlled oscillator (VCO) for phase-locked loops (PLLs). A
photograph of the evaluation board is shown in Figure 1. The
evaluation board contains the ADF4372 frequency synthesizer
with an integrated VCO, a USB interface, power supply connectors,
and subminiature Version A (SMA) connectors.
The EV-ADF4372SD2Z requires an SDP-S board (not supplied
with the kit). The SDP-S allows software programming of the
EV-ADF4372SD2Z.
Full specifications for the ADF4372 frequency synthesizer are
available in the product data sheet, which must be consulted in
conjunction with this user guide when working with the evaluation
board.
EV-AD4372SD2Z EVALUATION BOARD PHOTOGRAPH
20393-001
Figure 1.
UG-1548 EV-ADF4372SD2Z User Guide
Rev. 0 | Page 2 of 21
TABLE OF CONTENTS
Features .............................................................................................. 1
Evaluation Kit Contents ................................................................... 1
Equipment Needed ........................................................................... 1
Documents Needed .......................................................................... 1
Required Software ............................................................................ 1
General Description ......................................................................... 1
EV-AD4372SD2Z Evaluation Board Photograph ........................ 1
Revision History ............................................................................... 2
Getting Started .................................................................................. 3
Software Installation Procedures ................................................ 3
Evaluation Board Setup Procedures ........................................... 3
Evaluation Board Hardware ............................................................ 4
Power Supplies .............................................................................. 4
RF Output .......................................................................................4
Loop Filter ......................................................................................4
Additional Optimization on Loop Filter ....................................4
Reference Source ...........................................................................4
Default Configuration ..................................................................4
Doubler Output .............................................................................4
Evaluation Board Software ...............................................................6
Main Controls ................................................................................7
Output Controls ............................................................................7
Evaluation and Test ...........................................................................9
Evaluation Board Schematics and Artwork ................................ 10
Ordering Information .................................................................... 20
Bill of Materials ........................................................................... 20
REVISION HISTORY
4/2019—Revision 0: Initial Version
EV-ADF4372SD2Z User Guide UG-1548
Rev. 0 | Page 3 of 21
GETTING STARTED
SOFTWARE INSTALLATION PROCEDURES
To install the ACE software and ADF4372 plugin, perform the
following steps:
1. Install the latest version of the ACE software platform.
2. If the ADF4372 plugin appears automatically, proceed
to Step 4.
3. Double click the ADF4372 plugin file,
Board.ADF4372.1.2019.12300.acezip or the latest version.
4. Check that the ADF4372 plugin appears when the
EV-ADF4372SD2Z board is attached through the system
demonstration platform (SDP-S) connector to the PC.
EVALUATION BOARD SETUP PROCEDURES
To run the software, perform the following steps:
1. Select Start > All Programs > Analog Devices > ACE.
2. On the Start tab, choose ADF4372 and the ADF4372 board
appears under Attached Hardware.
3. When connecting the EV-ADF4372SD2Z board, allow
5 sec to 10 sec for the label on the status bar to change.
UG-1548 EV-ADF4372SD2Z User Guide
Rev. 0 | Page 4 of 21
EVALUATION BOARD HARDWARE
The EV-ADF4372SD2Z requires the SDP-S platform that uses
the EVAL-SDP-CS1Z. The SDP-B is not recommended.
The EV-ADF4372SD2Z schematics are shown in Figure 9,
Figure 10, Figure 11, and Figure 12. The silkscreens for the
evaluation board are shown in Figure 13 and Figure 14.
POWER SUPPLIES
The EV-ADF4372SD2Z board is powered by a 6 V power supply
connected to the VSUPPLY SMA, or the red banana plug, P2.
Connect GND to the black banana plug, P4.
The power supply circuitry has two LT3045, high performance, low
noise, and low dropout (LDO) regulators.
One LT3045 is used to generate 5 V to drive the VCO supply pins.
The remaining supplies are powered from the other LT3045, which
is set to 3.3 V voltage.
Use Switch S1 to switch the 6 V to the EV-ADF4372SD2Z on
and off.
RF OUTPUT
The EV-ADF4372SD2Z has three pairs of SMA, 3.5 mm output
connectors: RF8P/RF8N, RFAUX8P/RFAUX8N, and
RF16P/RF16N (differential outputs). Because these ports are
sensitive to impedance mismatch, connect the radio frequency
(RF) outputs to equal load impedances.
If only one port of a differential pair is used, terminate the
complementary port with an equal load terminator (in general,
a 50 Ω terminator).
LOOP FILTER
The loop filter schematic is included in the board schematic in
Figure 9. Figure 2 shows the loop filter component placement. The
loop filter on the evaluation board is optimized for fractional mode
performance with a phase frequency detector (PFD) frequency of
100 MHz and 1.8 mA charge pump current. The values of the loop
filter components are as follows:
• Resistors: RCPOUT = 91 Ω, R2 = 400 Ω, R4 = 200 Ω,
R15 = 0 Ω
• Capacitors: C20 = 220 pF, C19 = 0.018 μF, C23 = 330 pF
C22 C20
R15
RCPOUT
RVTUNE
C12 C1T C1
C9C8
C3
R2
R4 C23
C19
20393-002
Figure 2. Loop Filter Component Placement
The lowest rms jitter is achieved in integer mode by using a high
PFD frequency. This jitter can be tested by using the same filter
with a PFD frequency of 200 MHz (enabling the doubler) and
2.4 mA charge pump current. Additional optimization is still
possible depending on target frequency and integration limits.
In general, narrower loop filter bandwidths have lower spurious
signals. Wide loop filters in Integer N mode can achieve <50 fs
jitter with very clean reference frequency input (REFIN) signals.
ADDITIONAL OPTIMIZATION ON LOOP FILTER
The PLL loop bandwidth can be optimized for different
parameters like reference spurs or VCO noise, depending on
the system requirements.
Reducing Σ-Δ Modulator (SDM) Noise
In fractional mode, SDM noise becomes apparent and starts to
contribute to overall phase noise. This noise can be reduced to
insignificant levels by using a series resistor between the CPOUT
pin and the loop filter. Place this resistor close to the CPOUT pin.
Select a reasonable resistor value that does not affect the loop
bandwidth and phase margin of the designed loop filter. In most
cases, a 91 Ω resistor value produces the best results. This resistor
is not required in Integer N mode (SDM not enabled) or when a
narrow-band loop filter (SDM noise attenuated) is used. This
resistor is labeled as RCPOUT in schematics.
Optimizing Spurious Signals
The loop filter is placed at the secondary side of the EV-
ADF4372SD2Z to create a more compact layout and so that the
board is more tolerant to external signals. Using a capacitor
on the same side with the ADF4372 (the primary side) results in
higher isolation on internally generated spurious signals. For this
purpose, a small valued capacitor (C26 = 10 pF) is placed close
to the VTUNE pin on the primary side.
REFERENCE SOURCE
The EV-ADF4372SD2Z board is supplied with a low noise
100 MHz crystal oscillator (XO) from Crystek (CCHD-575-50-
100.000).
To us e an external single-ended REFIN, connect a low
noise reference source to the REFP SMA connector. Remove
Resistor R19 (0 Ω) and Resistor R20 (0 Ω) to remove power
from the crystal and break the connection to the REFP input.
DEFAULT CONFIGURATION
All components necessary for local oscillator (LO) generation are
inserted on the EV-ADF4372SD2Z board. The EV-ADF4372SD2Z
board is shipped with a 100 MHz XO, the ADF4372 synthesizer
with an integrated VCO, and a 180 kHz loop filter (charge
pump current (ICP) = 1.8 mA).
DOUBLER OUTPUT
The ADF4372 contains a frequency doubler to double the 4 GHz
to 8 GHz VCO signal on RF16P and RF16N.
EV-ADF4372SD2Z User Guide UG-1548
Rev. 0 | Page 5 of 21
SPECTRUM
ANALYZER
PC
XO
ADF4372
LOOP FILTER
EXTERNAL
POWER SWI T CH
SDP- S BOARD
REFP
RF16N
RF8N
V
SUPPLY
REFERENCE
(OPTIONAL)
SIGNAL GENERATOR
(UNDERNEATH BO ARD)
RF8P
RF16P
POWER
SUPPLY
+6V
GND
RFAUX8P
RFAUX8N
50Ω
TERMINATION
20393-003
Figure 3. Evaluation Board Setup Diagram
UG-1548 EV-ADF4372SD2Z User Guide
Rev. 0 | Page 6 of 21
EVALUATION BOARD SOFTWARE
The ACE software is the main platform that is used to control
the EV-ADF4372SD2Z. The ADF4372 plugin includes user
interfaces that relate to the ADF4372 and allow evaluation of
the device. Use the following steps to open the main control
window for ADF4372:
1. Launch the ACE application. With the SDP-S board
connected to the EV-ADF4372SD2Z, the attached hardware
appears in the graphical user interface (GUI) as shown in
Figure 4.
2. Double click the ADF4372 Board icon, and the tab shown
in Figure 5 appears.
3. Double click the ADF4372 icon that appears on the
ADF4372 Board tab to open the main control window
shown in Figure 7.
20393-004
Figure 4. ACE Start Page, Attached Hardware (ADF4372 Evaluation Board)
EV-ADF4372SD2Z User Guide UG-1548
Rev. 0 | Page 7 of 21
Figure 5. ACE Board Page, Device Selection
MAIN CONTROLS
The main controls are available in the high level register
map shown in Figure 7. To modify registers, perform the
following steps:
1. Click Write All Registers / Initialize to load all registers
and initialize the device.
2. Modify the registers as desired.
3. Click Apply Changes to load the modified settings to the
device. This action loads the updated registers only. All
registers can be reloaded using the Write All Registers /
Initialize button.
OUTPUT CONTROLS
For the main, auxiliary, and doubler outputs, the optimal
harmonic performance is achieved by using the automatic filter
outputs. If desired, disable the automatic filter and change the
filter settings manually.
The settings are available in the RF16 section (shown in Figure 6).
The output settings include the Filter Mode box that can be set to
automatic or manual, the x2 Bias box that varies from the lowest
setting 0 to the highest of 3, and the x2 Filter box that varies from 0
to 7.
The bias and filter settings in Table 1 are recommended for
doubler output.
Table 1. Bias and Filter Settings for Doubler Output
Frequency (GHz)
Bias
Filter
≤8.4 3 7
>8.4 to ≤9.4 3 6
>9.4 to ≤10 3 5
>10 to ≤11.5 3 4
>11.5 to ≤12.2 3 3
>12.2 to ≤13.7 3 2
>13.7 to ≤14.5 3 1
>14.5 3 0
The recommended settings for doubler frequencies greater than
14.5 GHz are shown in Figure 6.
EV-ADF4372SD2Z User Guide UG-1548
Rev. 0 | Page 9 of 21
EVALUATION AND TEST
To evaluate and test the performance of the ADF4372, prepare the
hardware and software setup as explained in the Evaluation Board
Hardware section and the Evaluation Board Software section.
Run the software and set the VCO Fundamental Output box to
5 GHz (see Figure 7). Measure the output spectrum and single
sideband phase noise on a spectrum analyzer. Figure 8 shows a
phase noise plot of the SMA RF8P pin equal to 5 GHz.
Figure 8. Single Sideband Phase Noise
UG-1548 EV-ADF4372SD2Z User Guide
Rev. 0 | Page 10 of 21
EVALUATION BOARD SCHEMATICS AND ARTWORK
VBAT33
SMA-18G SMA-18G
LOOP FILTER
PLACE ON BOTTOM SI DE OF PCB
50R
50R
AS POSSIBLE TO RCPOUT PIN.
SMA-18G
VALUES TBD
SHI E LD V TUNE AND CP OUT
POSSIBLE TO VT UNE PIN.
8 TO 16GHZ
50R
PLACE C23 AND R4 AS CLOSE AS LOOP FILTER
SMA-18G
50R
SMA-18G
C3 VCCVCO, C17 VCC REF, WERE SEEN TO BE THE MOST I MPO RTANT CAPS FROM PREVIO US MEASUREMENTS
60MHZ TO 16GHZ / 1GHZ T O 16GHZ
ATC400Z SERIES
50R
VALUE TBD
SMA-18G
50R
SHIELD SIGNALS WITH VIAS
PLACE RCPOUT RESISTOR AS CLOSE
10pF
1UF
TBD0603
10pF
10pF
10pF
32K243-40ML5
7.4nH
32K243-40ML5
ADF4372DNI
1000PF
10pF
10pF
7.4nH
10pF
0.018UF 400
0
DNI
0
7.4nH
DNI
32K243-40ML5
32K243-40ML5
200
330pF
91
100MHZ
32K243-40ML5
10pF
7.4nH
10pF
0
51
DNI
51
1000pF
100
DNI
1000pF
32K243-40ML5
1UF
1UF
0.01UF
1UF
0.01UF
1UF
220pF
1UF
1UF
0
C26
R19
R20
RF16N
C20
C22
R15
C12
C9
C17
C16
Y1
C24
R4
C15
U1R3
C30
L3
C32
C33
L4
C35
RFAUX8P
RFAUX8N
C19 R2
RCPOUT
C23
C8
RF16P
RF8NRF8P
C29
C28
REFP
C42
R10
R27
C41
C39
R8
C3
C1
C11
C10
L2L1
VCC_VCAL
VTUNE
RF8N
CSB
SDIO
SCLK
VCC_VCO
VCO_LDO
VDD_X1
MUXOUT
VCO_LDO_3V
CE
TEST
RF16N
RF16P
CPOUT
VDD_X1
RF8P
VDD_X1
VDD_PFD
VDD_X4
VCC_REF
VCC_MUX
CPOUT
VDD_X1
VCC_3V
VP
VTUNE
VCC_3V
VDD_LS
VDD_NDIV
VCC_X2
RF8_P RF8_N
VDD_X1
RFAUX8P
RFAUX8N
VCC_X1
VCC_X4
3 2
1
4
3
1 2
5
15
17
47
46
31
32
14
21
16
7
4
6
45
29
38
830
40
34
35
22
23
26
27
18
19 43
44
3
PAD
11
10
41
48
42
37
36
28
25
24
20
13
12
9
1
33
2
39
1
3 2
3 2
1
3 2
1
1
1
5 4 3 2
1
GND
GND
GND
GND
GND
GND
GND
GND
OUT VDD
GNDNC
GND
GND
GND
TEST
RFAUX8N
RFAUX8P
PAD
GND
VDD_VP
VDD_PFD
VCC_REF
REFN
REFP
GND
MUXOUT
CE
VCC_LDO_3V
GND
GND
SCLK
SDIO
CS
VDD_LS
VDD_NDIV
VCC_3V
VCC_MUX
GND
RF16N
RF16P
GND
GND
VCC_X2
GND
RF8N
RF8P
VDD_X1
VCC_X1
VDD_X4
VCC_X4
GND
GND
NC
NC
GND
VCC_LDO
VCC_VCO
VCC_REG_OUT
VTUNE
VCC_VCAL
RS_SW
CPOUT
GND
GND
IN
GND
IN
GND
IN
GND
IN
GND
32
3 2
GND
GND
GND
GND
GND
GND
GND
GND
IN
GND
IN
GND
IN
GND
IN
IN
IN
GNDGND
IN
GND
GND
GND
IN
IN
IN
IN
IN
IN
GND
IN
IN
IN
IN
GNDGND
ININ
IN
IN
GND
IN
IN
GND
IN
IN
20393-009
Figure 9. Evaluation Board Schematic, ADF4372 Connections and Loop Filter
EV-ADF4372SD2Z User Guide UG-1548
Rev. 0 | Page 11 of 21
SHIELD SIG NALS W I T H VI AS AL LTHE W AY
PLACE VTUNE,CPOUT & SW
RESISTORS CLO SE T O DUT PINS
TO THE DUT PINS.
ABO VE T HE RET URN (G ND) TRACE
PLACE PIN1/2 INPUT T RACE DIRECTL Y
C14/REGULAT OR I NPUT TRA CE -
571-0500
BLK
RED
0
22UF
0
0
571-0100
10UF
0
10UF
DNI
49.9K
0LT3045EDD#PBF
0
0
0
DNI
4.7UF
R16 R17
R1
R14
TP4
TP3
R6
R13
C21
U2
C18
C13
P2
P4
VTUNE
J1 R32
J4 R7
RVTUNE
ZD1
VSUPPLY
S1
CV37
VSUPPLY
VCO_LDO
MUXOUT
5.5V
VCC_VCO TEST
VTUNE
1
1
7
64
9
10 2
1
5
PAD
8 3
2
1
2
1
1
1
31
N P
GND
GND
GND
GND
GND
GND
OUT
OUTS
SET
PGFB ILIM
PG
EN/UV
IN
IN
GND
GND
OUT
OUT
GND
GND
GND
GND
IN
GND
GND
GND
31
3 245
3 2
45
20393-010
Figure 10. Evaluation Board Schematic, 5 V LDO Regulator
UG-1548 EV-ADF4372SD2Z User Guide
Rev. 0 | Page 12 of 21
ABO VE T HE RET URN (G ND) TRACE
PLACE PIN1/2 INPUT T RACE DIRECTL Y
C14/REGULAT OR I NPUT TRA CE -
O/P'S NEED TO SHO RT TOG ETHER.
RLV3 WILL BE USED I F THE REG
O/P'S NEED TO SHO RT TOG ETHER.
O/P'S NEED TO SHO RT TOG ETHER.
RLV2 WILL BE USED I F THE REG
RLV1 WILL BE USED I F THE REG
4.7UF
0.01UF
0.01UF 80OHM AT 100MHZ
0
10UF
33.2K
10UF 10UF
0
10UF
0
LT3045EDD#PBF
RED
R18
C25
TP5
C7
C4 C6
C14
R11
R9
C5
C2
E1 U3
R12
VCC_X1
VDD_X4
VDD_X1
VCC_X2
VCO_LDO_3V
VP
VDD_PFD
VCC_REF
VCC_X4
VDD_NDIV
VDD_LS
5.5V
VCC_VCAL
VCC_MUX
VCC_3V
1
1 2
7
64
9
10 2
1
5
PAD
8 3
OUT
OUT
OUT
OUT
OUT
GND
GND
GND
GND
GND
GND
GND
GND
GND
OUT
OUTS
SET
PGFB ILIM
PG
EN/UV
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
20393-011
Figure 11. Evaluation Board Schematic, 3.3 V LDO Regulator
EV-ADF4372SD2Z User Guide UG-1548
Rev. 0 | Page 13 of 21
FX8-120S-SV(21)
DNI
TBD0603
1.5K
DNI
100K
100K
0
1.5K
1.5K
1.5K
1.5K
1.5K
0
DNI
YEL
WHT
24LC32A-I/MS
0
DNI
DNI
R46
CSB
R43
R42
R45
SDIO
R44
TP1
SCLK
MUX
LE2
TP2
P1
R47
R30
R229
R74
R79 R78
U6
R84
VIO_+3-3V
MUXOUT
CE
TEST
SDIO
SCLK
SCL_0 SDA_0
CSB
1
1
1
1
1
1
1
116
65
1
5
6259
7249 7348
87
89
30
29 92
90
32 88
31 91
38
37 85
39
84
83
34
33
82
64
35
41 80
42 79
57
60
100
21 99
26 95
27
7114
8113
9112
10 111
110
12
13 108
14 107
15 106
16 105
18 103
19 102
20 101
22
94
24 97
25 96
120
119
70
68
67
6655
54
53
51
50
2
7447
7645 7744 7843
118
117
115
109
104
98
93
86
81
75
69
6358
52
46
40
36
28
23
17
11
6
4
3
56
71
61
7
4
8
5
6
3
2
1
GND
GND GND GND
VSS
VCC
WP
A2
A1
A0
SCL SDA
IN
IN
GND
IO
IN
IN
IO
SPI_SEL_A_N
CLKOUT
NC
NC
GND
GND
VIO
GND
PAR_D22
PAR_D20
PAR_D18
PAR_D16
PAR_D15
GND
PAR_D12
PAR_D10
PAR_D8
PAR_D6
GND
PAR_D4
PAR_D2
PAR_D0
PAR_WR_N
PAR_INT
GND
PAR_A2
PAR_A0
PAR_FS2
PAR_CLK
GND
SPORT_RSCLK
SPORT_DR0
SPORT_RFS
SPORT_TFS
SPORT_DT0
SPORT_TSCLK
GND
SPI_MOSI
SPI_MISO
SPI_CLK
GND
SDA_0
SCL_0
GPIO1
GPIO3
GPIO5
GND
GPIO7
TMR_B
TMR_D
NC
GND
NC
NC
NC
WAKE_N
SLEEP_N
GND
UART_TX
BMODE1RESET_IN_N
UART_RX
GND
RESET_OUT_N
EEPROM_A0
NC
NC
NC
GND
NC
NC
TMR_C
TMR_A
GPIO6
GND
GPIO4
GPIO2
GPIO0
SCL_1
SDA_1
GND
SPI_SEL1/SPI_SS_N
SPI_SEL_C_N
SPI_SEL_B_N
GND
SERIAL_INT
SPI_D3
SPI_D2
SPORT_DT1
SPORT_DR1
SPORT_TDV1
SPORT_TDV0
GND
PAR_FS1
PAR_FS3
PAR_A1
PAR_A3
GND
PAR_CS_N
PAR_RD_N
PAR_D1
PAR_D3
PAR_D5
GND
PAR_D7
PAR_D9
PAR_D11
PAR_D13
PAR_D14
GND
PAR_D17
PAR_D19
PAR_D21
PAR_D23
GND
USB_VBUS
GND
GND
NC
VIN
20393-012
Figure 12. Evaluation Board Schematic, Board Connector
UG-1548 EV-ADF4372SD2Z User Guide
Rev. 0 | Page 20 of 21
ORDERING INFORMATION
BILL OF MATERIALS
Table 2.
Reference
Designator Description Value Manufacturer Part Number
RFAUX8N,
RFA U X 8P,
RF8N, R F 8 P,
RF16N, RF16P
Printed circuit boards (PCBs), SMA, right angle
jack connectors
32K243-40ML5 Rosenberger 32K243-40ML5
C1, C3, C8, C9,
C12, C17, C24
Capacitors, ceramic, X6S 1 μF TDK C1005X6S1C105K050BC
C10, C11, C28,
C29, C30, C35
Ceramic capacitors, C0G (NP0), general-purpose 10 pF Murata GRM0335C1E100JA01D
C4, C6, C7, C13,
C14, C21
Ceramic capacitors, X5R, general-purpose 10 μF Murata GRM21BR61C106KE15L
C2, C5, C15, C16 Ceramic capacitors, X7R, general-purpose 0.01 μF Murata GRM155R71E103KA01D
C18, C25 Ceramic capacitors, X5R, general-purpose 4.7 μF Murata GRM21BR61E475KA12L
C19 Ceramic capacitor, X7R 0603 0.018 μF AVX 06033C183JAT2A
C20
Chip capacitor, C0G, 0603
220 pF
TDK
C1608C0G1H221J
C23 Capacitor, ceramic, NP0 330 pF TDK CGJ3E3C0G2D331J080AA
C26 Ceramic capacitors, C0G (NP0), general-purpose 10pF Murata GJM1555C1H100GB01D
C32, C33 Multilayer ceramic capacitors (MLCCs), NP0, RF
and microwave
10 pF American
Technical
Ceramics
400Z100FT16T
C39, C41, C42 Ceramic capacitors, C0G (NP0), general-purpose 1000 pF Murata GRM1555C1H102JA01
CSB, LE2, MUX,
SCLK, SDIO,
TP2
PCB test point connectors Yellow Components
Corporation
TP-104-01-04
CV37 Tantalum solid electrolytic ceramic 22 μF AVX TCJC226M025R0100
E1
Chip ferrite bead
80 Ω at 100 MHz
Murata
BLM15PX800SN1D
J1, J4, R E F P,
VSUPPLY,
VTUNE
PCBs, coaxial, SMA, end launch connectors 142-0701-801 Cinch Connectivity
Solutions
142-0701-801
J3 PCB, SMA, right angle jack connector 02K243-40M Rosenberger 02K243-40M
L1, L2, L3, L4 Chip inductors 7.4 nH Coilcraft 0302CS-7N4XJLU
P1 PCB, vertical type receptacle, surface-mount device
(SMD) connector
FX8-120S-SV(21) Hirose FX8-120S-SV(21)
P2 PCB, single socket connector Red Deltron 571-0500
P4 PCB, single socket connector Black Deltron 571-0100
R1, R7, R9, R11,
R14, R16, R17,
R18, R19, R20,
R32
Thick film, chip resistors 0 Ω Multicomp MC00625W040210R
R12 Thick film, chip resistor 33.2 kΩ Vishay CRCW040233K2FKED
R15, R44 Film, SMD resistors, 0603 0 Ω Multicomp MC0603WG00000T5E-TC
R2 Precision, thin film, chip resistor 400 Ω Vishay PAT0603E4000BST1
R27
High frequency, thin film, chip resistor
100 Ω
Vishay
FC0402E1000BST1
R4 Thick film, chip resistor 200 Ω Multicomp MC 0.063W 0603 1%
200R
R42, R43, R45,
R46, R84
Thick film, chip resistors 1.5 kΩ Multicomp MC 0.063W 0603 1% 1K5
R6 Antisurge, high power, thick film, chip resistor 49.9 kΩ Vishay RCS040249K9FKED
R74, R79 Thick film, chip resistors 100 kΩ Multicomp MC 0.063W 0603 1%
100K
RCPOUT Thick film, chip resistor 91 Ω Yageo RC0603FR-0791RL
S1 Single-pole, single-throw, momentary switch TT11AGPC104 TE Connectivity TT11AGPC104
EV-ADF4372SD2Z User Guide UG-1548
Rev. 0 | Page 21 of 21
Reference
Designator Description Value Manufacturer Part Number
TP3, TP5 PCB test point connectors Red Keystone
Electronics
5000
TP4 PCB test point connector Black Keystone
Electronics
5006
U1 Microwave, wideband synthesizer with
integrated VCO
ADF4372BCCZ Analog Devices, Inc. ADF4372BCCZ
U2, U3 20 V, 500 mA, ultralow noise, ultrahigh power
supply rejection ratio (PSRR), linear regulators
LT3045EDD#PBF Analog Devices, Inc. LT3045EDD#PBF
U6 32 kB, serial electronically erasable
programmable read only memory (EEPROM)
24LC32A-I/MS Microchip
Technology
24LC32A-I/MS
Y1 Ultralow, phase noise XO, high density,
complementary metal-oxide semiconductor
(HCMOS)
100 MHz Crystek CCHD-575-50-100.000
ZD1 BZX84C 6.8 V, Zener, SOT-23 diode BZX84-C6V8 Philips BZX84-C6V8
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This
Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI ”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be
considered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMI
NATION. ADI may terminate this Agreement at any time upon giving written notice
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF
THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE
AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby
submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.
©2019 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG20393-0-4/19(0)
