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LOW POWER LOW OFFSET VOLTAGE QUAD COMPARATORS
Check for Samples: LM139AQML,LM139QML
1FEATURES
2• Available With Radiation Guarantee • Differential Input Voltage Range Equal to the
Power Supply Voltage
– Total Ionizing Dose 100 krad(Si) • Low Output Saturation Voltage: 250 mV at 4
– ELDRS Free 100 krad(Si) mA
• Wide Supply Voltage Range • Output Voltage Compatible with TTL, DTL,
• LM139/139A Series 2 to 36 VDC or ±1 to ±18 VDC ECL, MOS and CMOS Logic Systems
• Very Low Supply Current Drain (0.8 mA) —
Independent of Supply Voltage ADVANTAGES
• Low Input Biasing Current: 25 nA • High Precision Comparators
• Low Input Offset Current: ±5 nA • Reduced VOS Drift Over Temperature
• Offset Voltage: ±1 mV • Eliminates Need for Dual Supplies
• Input Common-mode Voltage Range Includes • Allows Sensing Near GND
GND • Compatible with all Forms of Logic
• Power Drain Suitable for Battery Operation
DESCRIPTION
The LM139 series consists of four independent precision voltage comparators with an offset voltage specification
as low as 2 mV max for all four comparators. These were designed specifically to operate from a single power
supply over a wide range of voltages. Operation from split power supplies is also possible and the low power
supply current drain is independent of the magnitude of the power supply voltage. These comparators also have
a unique characteristic in that the input common-mode voltage range includes ground, even though operated
from a single power supply voltage.
Application areas include limit comparators, simple analog to digital converters; pulse, squarewave and time
delay generators; wide range VCO; MOS clock timers; multivibrators and high voltage digital logic gates. The
LM139 series was designed to directly interface with TTL and CMOS. When operated from both plus and minus
power supplies, they will directly interface with MOS logic— where the low power drain of the LM139/LM139A is
a distinct advantage over standard comparators.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2005–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
3
OUT1
2
OUT2
1
N/C
20
OUT3
19
OUT4
9 10 11 12 13
IN-2 IN+2 N/C IN-3 IN+3
18 GND
17 N/C
16 IN+4
15 N/C
14 IN-4
V+ 4
N/C 5
IN-1 6
N/C 7
IN+1 8
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Connection Diagrams
Dual-In-Line Package
See Package Number J(R-GDIP-14)
See Package Number NAD0014B, NAC0014A
See Package Number NAJ002A
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Absolute Maximum Ratings(1)
LM139 / LM139A
Supply Voltage, V+36 VDC or ±18 VDC
Differential Input Voltage(2) 36 VDC
Input Voltage −0.3 VDC to +36 VDC
Input Current (VIN <−0.3 VDC)(3) 50 mA
Power Dissipation(4)(5)
LCCC 1250 mW
CDIP 1200 mW
CLGA (NAD) 680 mW
CLGA (NAC) 680 mW
Sink Current (approx)(6) 20mA
Output Short-Circuit to GND(7) Continuous
Storage Temperature Range -65°C ≤TA≤+150°C
Maximum Junction Temperature (TJ) +150°C
Lead Temperature (Soldering, 10 seconds) 300°C
Operating Temperature Range -55°C ≤TA≤+125°C
Thermal LCCC (Still Air) 100°C/W
Resistance LCCC (500LF / Min Air flow) 73°C/W
CDIP (Still Air) 103°C/W
CDIP (500LF / Min Air flow) 65°C/W
θJA CLGA (NAD) (Still Air) 183°C/W
CLGA (NAD) (500LF / Min Air flow) 120°C/W
CLGA (NAC) (Still Air) 183°C/W
CLGA (NAC) (500LF / Min Air flow) 120°C/W
LCCC 28°C/W
CDIP 23°C/W
θJC CLGA (NAD) 23°C/W
CLGA (NAC) 23°C/W
Package Weight LCCC 470mg
(typical) CDIP 2,190mg
CLGA (NAD) 460mg
CLGA (NAC) 410mg
ESD rating(8) 600V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not guaranteed specific performance limits. For guaranteed specifications and test conditions, see,
the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics
may degrade when the device is not operated under the listed test conditions.
(2) Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode
range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3 VDC (or 0.3 VDCbelow
the magnitude of the negative power supply, if used) (at 25°C).
(3) This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of
the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is
also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go
to the V+voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive
and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than −0.3 VDC (at
25°)C.
(4) The low bias dissipation and the ON-OFF characteristics of the outputs keeps the chip dissipation very small (PD≤100mW), provided
the output transistors are allowed to saturate.
(5) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature),
θJA (Package junction to ambient thermal resistance), and TA(ambient temperature). The maximum allowable power dissipation at any
temperature is PDmax = (TJmax — TA) / θJA or the number given in the Absolute Maximum Ratings, whichever is lower.
(6) SMD 5962–8773901 only
(7) Short circuits from the output to V+can cause excessive heating and eventual destruction. When considering short circuits to ground,
the maximum output current is approximately 20 mA independent of the magnitude of V+.
(8) Human Body model, 1.5 KΩin series with 100 pF
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Recommended Operating Conditions
Supply Voltage 5.0 VDC to +30 VDC
Ambient Operating Temperature Range −55°C ≤TA≤+125°C
Quality Conformance Inspection
Mil-Std-883, Method 5005 — Group A
Subgroup Description Temp (°C)
1 Static tests at +25
2 Static tests at +125
3 Static tests at -55
4 Dynamic tests at +25
5 Dynamic tests at +125
6 Dynamic tests at -55
7 Functional tests at +25
8A Functional tests at +125
8B Functional tests at -55
9 Switching tests at +25
10 Switching tests at +125
11 Switching tests at -55
LM133 883 Electrical Characteristics DC Parameters
The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V
Symbol Parameters Conditions Sub-
Notes Min Max Unit groups
ICC Supply Current RL= Infinity 2.0 mA 1, 2, 3
Supply Current +V = 30V, RL= Infinity 2.0 mA 1, 2, 3
VIO Input Offset Voltage +V = 30V -5.0 5.0 mV 1
-9.0 9.0 mV 2, 3
+V = 30V, VCM = 28.5V -5.0 5.0 mV 1
+V = 30V, VCM = 28.0V -9.0 9.0 mV 2, 3
-5.0 5.0 mV 1
-9.0 9.0 mV 2, 3
CMRR Common Mode Rejection Ratio +V = 30V, VCM = 0V to 28.5V 60 dB 1
PSRR Power Supply Rejection Ratio +V = 5V to 30V 60 dB 1
± IBias Input Bias Current VO= 1.5V See(1) -100 -1.0 nA 1
See(1) -300 -1.0 nA 2, 3
IIO Input Offset Current VO= 1.5V -25 25 nA 1
-100 100 nA 2, 3
ICEX Output Leakage Current +V = 30V, VO= 30V 1.0 µA 1, 2, 3
ISink Output Sink Current VO= 1.5V 6.0 mA 1
VSat Saturation Voltage ISink = 4mA 400 mV 1
700 mV 2, 3
AVVoltage Gain +V = 15V, RL≥15ΩK, VI= 1V to 50 V/mV 1
11V
(1) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the reference or input lines.
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LM133 883 Electrical Characteristics DC Parameters (continued)
The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V
Symbol Parameters Conditions Sub-
Notes Min Max Unit groups
VCM Common Mode Voltage Range +V = 30V V+-
See(2) 0 V 1
(1.5)
V+-
See(2) 0 V 2, 3
(2.0)
VDiff Differential Input Voltage +V = 30V, -V = 0V, +VI= 36V, -VI=See(3) 500 nA 1, 2, 3
0V
+V = 30V, -V = 0V, +VI= 0V, -VI=See(3) 500 nA 1, 2, 3
36V
(2) Parameter guaranteed by VIO tests
(3) The value for VDiff is not data logged during Read and Record.
LM139 883 Electrical Characteristics AC Parameters
The following conditions apply, unless otherwise specified. +V = 5V
Symbol Parameters Conditions Sub-
Notes Min Max Unit groups
tRLH Response Time VOD = 5mV 5.0 µS 9
VOD = 50mV 0.8 µS 9
tRHL Response Time VOD = 5mV 2.5 µS 9
VOD = 50mV 0.8 µS 9
LM139A SMD 5962–8773901 Electrical Characteristics DC Parameters
The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V
Symbol Parameter Conditions Sub-
Notes Min Max Unit groups
ICC Supply Current +V = 30V, RL= Infinity 3.0 mA 1, 2, 3
RL= Infinity 3.0 mA 1, 2, 3
ICEX Output Leakage Current +V = 30V, -VI= 0V, +VI≥1V, VO= 0.5 µA 1
30V 1.0 µA 2, 3
VSat Saturation Voltage ISink ≤4mA, -VI= 1V, +VI= 0V 400 mV 1
700 mV 2, 3
ISink Output Sink Current VO≥1.5V, -VI= 1V, +VI= 0V 6.0 mA 1
VIO Input Offset Voltage RS= 0Ω-2.0 2.0 mV 1
-4.0 4.0 mV 2, 3
+V = 30V, RS= 0Ω-2.0 2.0 mV 1
-4.0 4.0 mV 2, 3
+V = 30V, VCM = 28V, VO= 1.4V, -2.0 2.0 mV 1
RS= 0Ω-4.0 4.0 mV 2, 3
±IIB Input Bias Current VO= 1.5V See(1) -100 -1.0 nA 1
See(1) -300 -1.0 nA 2, 3
IIO Input Offset Current VO= 1.5V -25 25 nA 1
-100 100 nA 2, 3
PSRR Power Supply Rejection Ratio +V = 5V to 30V 70 dB 1, 2, 3
CMRR Common Mode Rejection Ratio +V = 30V, VCM = 0V to 28V, RL≥70 dB 1, 2, 3
15KΩ
AVVoltage Gain +V = 15V, RL≥15KΩ, VO= 1V to 50 V/mV 4
11V 25 V/mV 5, 6
(1) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the reference or input lines.
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LM139A SMD 5962–8773901 Electrical Characteristics DC Parameters (continued)
The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V
Symbol Parameter Conditions Sub-
Notes Min Max Unit groups
VCM Common Mode Voltage Range +V = 30V V+-
See(2) 0 V 1, 2, 3
(2.0)
+V = 5V V+-
See(2) 0 V 1, 2, 3
(2.0)
(2) Parameter guaranteed by VIO tests
LM139A SMD 5962–8773901 Electrical Characteristics AC Parameters
The following conditions apply, unless otherwise specified. +V = 5V
Symbol Parameters Conditions Sub-
Notes Min Max Unit groups
tRLH Response Time VOD = 5mV, RL= 5.1KΩ5.0 µS 9
tRHL Response Time VOD = 5mV, RL= 5.1KΩ2.5 µS 9
LM139A 883, QMLV & RH, SMD 5962–9673801 Electrical Characteristics DC Parameters(1)(2)
The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V
Symbol Parameters Conditions Sub-
Notes Min Max Unit groups
ICC Supply Current RL= Infinity 2.0 mA 1, 2, 3
+V = 30V, RL= Infinity 2.0 mA 1, 2, 3
ICEX Output Leakage Current +V = 30V, VO= 30V 1.0 µA 1, 2, 3
VSat Saturation Voltage ISink = 4mA 400 mV 1
700 mV 2, 3
ISink Output Sink Current VO= 1.5V 6.0 mA 1
VIO Input Offset Voltage -2.0 2.0 mV 1
-4.0 4.0 mV 2, 3
+V = 30V -2.0 2.0 mV 1
-4.0 4.0 mV 2, 3
+V = 30V, VCM = 28.5V, -2.0 2.0 mV 1
VO= 1.5V
+V = 30V, VCM = 28.0V, -4.0 4.0 mV 2, 3
VO= 1.5V
± IBias Input Bias Current VO= 1.5V See(3) -100 -1.0 nA 1
See(3) -300 -1.0 nA 2, 3
IIO Input Offset Current VO= 1.5V -25 25 nA 1
-100 100 nA 2, 3
PSRR Power Supply Rejection Ratio +V = 5V to 30V 60 dB 1
CMRR Common Mode Rejection Ratio +V = 30V, VCM = 0V to 28.5V 60 dB 1
AVVoltage Gain +V = 15V, RL≥15KΩ, VO= 1V to 50 V/mV 1
11V
(1) Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the “Post
Radiation Limits” table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect.
Radiation end point limits for the noted parameters are guaranteed only for the conditions as specified in Mil-Std-883, Method 1019,
Condition A.
(2) Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019, condition D, MIL-STD-883, with no
enhanced low dose rate sensitivity (ELDRS) effect. Pre and post irradiation limits are identical to those listed under AC and DC electrical
characteristics, except as listed in the “Post Radiation Limits” table. Radiation end point limits for the noted parameters are guaranteed
for only the conditions as specified in MIL-STD-883, Method 1019, condition D.
(3) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the reference or input lines.
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LM139A 883, QMLV & RH, SMD 5962–9673801 Electrical Characteristics DC
Parameters(1)(2) (continued)
The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V
Symbol Parameters Conditions Sub-
Notes Min Max Unit groups
VCM Common Mode Voltage Range +V = 30V See(4) V+-
0 V 1
See(5) (1.5)
See(4) V+-
0 V 2, 3
See(5) (2.0)
VDiff Differential Input Voltage +V = 30V, -V =0V, +VI= 36V, -VI=(6) 500 nA 1, 2, 3
0V
+V = 30V, -V = 0V, +VI= 0V, -VI=(6) 500 nA 1, 2, 3
36V
(4) The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end
of the common-mode voltage range is V+−1.5V for Subgroup 1, or V+−2.0V for Subgroup 2 & 3. Either or both inputs can go to +30
VDC without damage, independent of the magnitude of V+.
(5) Parameter guaranteed by VIO tests
(6) The value for VDiff is not data logged during Read and Record.
LM139A 883, QMLV & RH, SMD 5962–9673801 Electrical Characteristics AC Parameters(1)(2)
The following conditions apply, unless otherwise specified. +V = 5V
Symbol Parameters Conditions Sub-
Notes Min Max Unit groups
tRLH Response Time VOD = 5mV 5.0 µS 4
VOD = 50mV 0.8 µS 4
tRHL Response Time VOD = 5mV 2.5 µS 4
VOD = 50mV 0.8 µS 4
(1) Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the “Post
Radiation Limits” table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect.
Radiation end point limits for the noted parameters are guaranteed only for the conditions as specified in Mil-Std-883, Method 1019,
Condition A.
(2) Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019, condition D, MIL-STD-883, with no
enhanced low dose rate sensitivity (ELDRS) effect. Pre and post irradiation limits are identical to those listed under AC and DC electrical
characteristics, except as listed in the “Post Radiation Limits” table. Radiation end point limits for the noted parameters are guaranteed
for only the conditions as specified in MIL-STD-883, Method 1019, condition D.
LM139A 883, QMLV & RH, SMD 5962–9673801 Electrical Characteristics DC Parameters Delta
Values
The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V
Deltas required for S-Level, MLS (as specified on Internal Processing instructions (IPI)), and QMLV product at Group B,
Subgroup 5.
Symbol Parameters Conditions Sub-
Notes Min Max Unit groups
VIO Input Offset Voltage -1.0 1.0 mV 1
± IBias Input Bias Current VO= 1.5V See(1) -15 15 nA 1
IIO Input Offset Current VO= 1.5V -10 +10 nA 1
(1) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the reference or input lines.
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LM139A 883, QMLV & RH, SMD 5962–9673801 Electrical Characteristics DC/AC
Parameters 50K Post Rad Limits +25°C(1)
The following conditions apply, unless otherwise specified.
DC: +V = 5V, VCM = 0V
AC: +V = 5V
Symbol Parameters Conditions Sub-
Notes Min Max Unit groups
VIO Input Offset Voltage +V = 5V, VCM = 0 -2.5 2.5 mV 1
+V = 30V, VCM = 0 -2.5 2.5 mV 1
+V = 30V, VCM = 28.5V, -2.5 2.5 mV 1
VO= 1.5V
± IBias Input Bias Current VO= 1.5V See(2) -110 -1.0 nA 1
tRLH Response Time VOD (Overdrive) = 50mV 0.9 µS 4
(1) Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the “Post
Radiation Limits” table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect.
Radiation end point limits for the noted parameters are guaranteed only for the conditions as specified in Mil-Std-883, Method 1019,
Condition A.
(2) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the reference or input lines.
LM139A 883, QMLV & RH, SMD 5962–9673801 Electrical Characteristics DC/AC
Parameters 100K Post Rad Limits +25°(1)(2)
The following conditions apply, unless otherwise specified.
DC: +V = 5V, VCM = 0V
AC: +V = 5V
Symbol Parameters Conditions Sub-
Notes Min Max Unit groups
VIO Input Offset Voltage +V = 5V, VCM = 0 -4.0 4.0 mV 1
+V = 30V, VCM = 0 -4.0 4.0 mV 1
+V = 30V, VCM = 28.5V, -4.0 4.0 mV 1
VO= 1.5V
± IBias Input Bias Current VO= 1.5V See(3) -110 -1.0 nA 1
tRLH Response Time VOD (Overdrive) = 50mV 1.0 µS 4
(1) Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the “Post
Radiation Limits” table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect.
Radiation end point limits for the noted parameters are guaranteed only for the conditions as specified in Mil-Std-883, Method 1019,
Condition A.
(2) Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019, condition D, MIL-STD-883, with no
enhanced low dose rate sensitivity (ELDRS) effect. Pre and post irradiation limits are identical to those listed under AC and DC electrical
characteristics, except as listed in the “Post Radiation Limits” table. Radiation end point limits for the noted parameters are guaranteed
for only the conditions as specified in MIL-STD-883, Method 1019, condition D.
(3) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the reference or input lines.
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TYPICAL PERFORMANCE CHARACTERISTICS
LM139, LM139A
Supply Current Input Current
Figure 1. Figure 2.
Response Time for Various Input Overdrives
Output Saturation Voltage —Negative Transition
Figure 3. Figure 4.
Response Time for Various Input Overdrives
—Positive Transition
Figure 5.
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APPLICATION HINTS
The LM139 series are high gain, wide bandwidth devices which, like most comparators, can easily oscillate if the
output lead is inadvertently allowed to capacitively couple to the inputs via stray capacitance. This shows up only
during the output voltage transition intervals as the comparator changes states. Power supply bypassing is not
required to solve this problem. Standard PC board layout is helpful as it reduces stray input-output coupling.
Reducing this input resistors to < 10 kΩreduces the feedback signal levels and finally, adding even a small
amount (1 to 10 mV) of positive feedback (hysteresis) causes such a rapid transition that oscillations due to stray
feedback are not possible. Simply socketing the IC and attaching resistors to the pins will cause input-output
oscillations during the small transition intervals unless hysteresis is used. If the input signal is a pulse waveform,
with relatively fast rise and fall times, hysteresis is not required.
All pins of any unused comparators should be tied to the negative supply.
The bias network of the LM139 series establishes a drain current which is independent of the magnitude of the
power supply voltage over the range of from 2 VDC to 30 VDC.
It is usually unnecessary to use a bypass capacitor across the power supply line.
The differential input voltage may be larger than V+without damaging the device. Protection should be provided
to prevent the input voltages from going negative more than −0.3 VDC (at 25°C). An input clamp diode can be
used as shown in the Typical Applications section.
The output of the LM139 series is the uncommitted collector of a grounded-emitter NPN output transistor. Many
collectors can be tied together to provide an output OR'ing function. An output pull-up resistor can be connected
to any available power supply voltage within the permitted supply voltage range and there is no restriction on this
voltage due to the magnitude of the voltage which is applied to the V+terminal of the LM139A package. The
output can also be used as a simple SPST switch to ground (when a pull-up resistor is not used). The amount of
current which the output device can sink is limited by the drive available (which is independent of V+) and the β
of this device. When the maximum current limit is reached (approximately 16 mA), the output transistor will come
out of saturation and the output voltage will rise very rapidly. The output saturation voltage is limited by the
approximately 60ΩRSAT of the output transistor. The low offset voltage of the output transistor (1 mV) allows the
output to clamp essentially to ground level for small load currents.
Typical Applications
(V+= 5.0 VDC)
Figure 6. Basic Comparator Figure 7. Driving CMOS
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(V+= 5.0 VDC)
Figure 8. Driving TTL Figure 9. AND Gate
Figure 10. OR Gate
Typical Applications
(V+= 15 VDC)
Figure 11. One-Shot Multivibrator
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(V+= 15 VDC)
Figure 17. Time Delay Generator
Figure 18. Non-Inverting Comparator with Figure 19. Inverting Comparator with Hysteresis
Hysteresis
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(V+= 15 VDC)
Figure 20. Squarewave Oscillator Figure 21. Basic Comparator
Figure 22. Limit Comparator Figure 23. Comparing Input Voltages of Opposite
Polarity
* Or open-collector logic gate without pull-up resistor
Figure 24. Output Strobing
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(V+= 15 VDC)
Figure 25. Crystal Controlled Oscillator
V+= +30 VDC
250 mVDC ≤VC≤+50 VDC
700 Hz ≤fO≤100 kHz
Figure 26. Two-Decade High-Frequency VCO
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Figure 27. Transducer Amplifier Figure 28. Zero Crossing Detector (Single Power
Supply)
Split-Supply Applications
(V+= +15 VDC and V−=−15 VDC)
Figure 29. MOS Clock Driver
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www.ti.com
SNOSAH8F –FEBRUARY 2005–REVISED FEBRUARY 2011
(V+= +15 VDC and V−=−15 VDC)
Figure 30. Zero Crossing Detector Figure 31. Comparator With a Negative Reference
Schematic Diagram
Revision History
Date Released Revision Section Changes
02/08/05 A New Release to corporate format 3 MDS datasheets converted into one Corp.
datasheet format. MNLM139A-X-RH rev 4B0,
MDLM139A-X rev 0C1, MNLM139–X rev 1A1. MDS
datasheets will be archived.
06/28/06 B Features, Rad Hard Electrical Section and Added Available with Radiation Guarantee, Low Dose
Notes NSID's to table 5962R9673802VCA
LM139AJRLQMLV, 5962R9673802VDA
LM139AWRLQMLV, 5962R9673802VXA
LM139AWGRLQMLV, and reference to Note. Archive
Revision A.
02/13/08 C Features, LM139A 883, QMLV & RH, SMD Added TID & Eldrs reference, Note - Condition A.
5962–9673801 Electrical Characteristics, Changed VCM parameter - pg 8, Title from Drift
Notes Values to Delta Values. Revision B will be Archived.
10/15/2010 D Data Sheet Title Changed the data sheet title from
LM139A/LM139QML to LM139AQML/LM139QML,
removed EOL NSID's. Added Bare Die NSID's.
Revision C will be Archived
Copyright © 2005–2011, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: LM139AQML LM139QML
PACKAGE OPTION ADDENDUM
www.ti.com 10-Feb-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Top-Side Markings
(4)
Samples
5962-8773901XA ACTIVE CLGA NAC 14 42 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AWG
-SMD Q
5962-87739
01XA ACO
01XA >T
5962-9673801VDA ACTIVE CLGA NAD 14 19 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AW-
QMLV Q
5962-96738
01VDA ACO
01VDA >T
5962-9673801VXA ACTIVE CLGA NAC 14 42 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AWG-
QMLV Q
5962-96738
01VXA ACO
01VXA >T
5962R9673801V9A ACTIVE DIESALE Y 0 40 Green (RoHS
& no Sb/Br) Call TI Level-1-NA-UNLIM -55 to 125
5962R9673801VCA ACTIVE CDIP J 14 25 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AJRQMLV
5962R9673801VCA Q
5962R9673801VDA ACTIVE CLGA NAD 14 19 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AWR
QMLV Q
5962R96738
01VDA ACO
01VDA >T
5962R9673801VXA ACTIVE CLGA NAC 14 42 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AWGR
QMLV Q
5962R96738
01VXA ACO
01VXA >T
5962R9673802VCA ACTIVE CDIP J 14 25 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AJRLQMLV
5962R9673802VCA Q
5962R9673802VDA ACTIVE CLGA NAD 14 19 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AWRL
QMLV Q
5962R96738
02VDA ACO
02VDA >T
PACKAGE OPTION ADDENDUM
www.ti.com 10-Feb-2013
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Top-Side Markings
(4)
Samples
5962R9673802VXA ACTIVE CLGA NAC 14 42 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AWGRL
QMLV Q
5962R96738
02VXA ACO
02VXA >T
LM139 MDR ACTIVE DIESALE Y 0 40 Green (RoHS
& no Sb/Br) Call TI Level-1-NA-UNLIM -55 to 125
LM139AE/883 ACTIVE LCCC NAJ 20 50 TBD POST-PLATE Level-1-NA-UNLIM -55 to 125 LM139AE
/883 Q ACO
/883 Q >T
LM139AJ/883 ACTIVE CDIP J 14 25 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AJ/883 Q
LM139AJRLQMLV ACTIVE CDIP J 14 25 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AJRLQMLV
5962R9673802VCA Q
LM139AJRQMLV ACTIVE CDIP J 14 25 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AJRQMLV
5962R9673801VCA Q
LM139AW-QMLV ACTIVE CLGA NAD 14 19 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AW-
QMLV Q
5962-96738
01VDA ACO
01VDA >T
LM139AW-SMD ACTIVE CLGA NAD 14 19 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AW
-SMD Q
5962-87739
01DA ACO
01DA >T
LM139AW/883 ACTIVE CLGA NAD 14 19 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AW
/883 Q ACO
/883 Q >T
LM139AWG-QMLV ACTIVE CLGA NAC 14 42 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AWG-
QMLV Q
5962-96738
01VXA ACO
01VXA >T
LM139AWG-SMD ACTIVE CLGA NAC 14 42 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AWG
-SMD Q
5962-87739
01XA ACO
01XA >T
PACKAGE OPTION ADDENDUM
www.ti.com 10-Feb-2013
Addendum-Page 3
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Top-Side Markings
(4)
Samples
LM139AWG/883 ACTIVE CLGA NAC 14 42 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AWG
/883 Q ACO
/883 Q >T
LM139AWGRLQMLV ACTIVE CLGA NAC 14 42 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AWGRL
QMLV Q
5962R96738
02VXA ACO
02VXA >T
LM139AWGRQMLV ACTIVE CLGA NAC 14 42 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AWGR
QMLV Q
5962R96738
01VXA ACO
01VXA >T
LM139AWRLQMLV ACTIVE CLGA NAD 14 19 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AWRL
QMLV Q
5962R96738
02VDA ACO
02VDA >T
LM139AWRQMLV ACTIVE CLGA NAD 14 19 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139AWR
QMLV Q
5962R96738
01VDA ACO
01VDA >T
LM139E/883 ACTIVE LCCC NAJ 20 50 TBD POST-PLATE Level-1-NA-UNLIM -55 to 125 LM139E
/883 Q ACO
/883 Q >T
LM139J/883 ACTIVE CDIP J 14 25 TBD A42 SNPB Level-1-NA-UNLIM -55 to 125 LM139J/883 Q
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
PACKAGE OPTION ADDENDUM
www.ti.com 10-Feb-2013
Addendum-Page 4
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) Only one of markings shown within the brackets will appear on the physical device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM139AQML, LM139AQML-SP :
•Military: LM139AQML
•Space: LM139AQML-SP
NOTE: Qualified Version Definitions:
•Military - QML certified for Military and Defense Applications
•Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
MECHANICAL DATA
NAJ0020A
www.ti.com
E20A (Rev F)
MECHANICAL DATA
NAC0014A
www.ti.com
WG14A (RevF)
MECHANICAL DATA
NAD0014B
www.ti.com
W14B (Rev P)
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