L4973V3.3 - L4973V5.1
L4973D3.3 - L4973D5.1
3.5A STEP DOWN SWITCHING REGULATOR
UPTO3.5ASTEPDOWNCONVERTER
OPERATING INPUT VOLTAGE FROM 8V TO
55V
3.3V AND 5.1V (±1%) FIXED OUTPUT, AND
ADJUSTABLEOUTPUTSFROM:
0V TO 50V (3.3V type)
5.1VTO 50V (5.1 type)
FREQUENCYADJUSTABLEUP TO300KHz
VOLTAGEFEED FORWARD
ZERO LOAD CURRENT OPERATION (min
1mA)
INTERNAL CURRENT LIMITING (PULSE BY
PULSEAND HICCUPMODE)
PRECISE 5.1V (1.5%) REFERENCE VOLT-
AGE EXTERNALLY AVAILABLE
INPUT/OUTPUT SYNCHRONIZATION FUNC-
TION
INHIBIT FOR ZERO CURRENT CONSUMP-
TION (100µA Typ. at VCC = 24V)
PROTECTION AGAINST FEEDBACK DIS-
CONNECTION
THERMAL SHUTDOWN
OUTPUTOVERVOLTAGEPROTECTION
SOFTSTART FUNCTION
DESCRIPTION
The L4973 is a step down monolithic power
switching regulator delivering 3.5A at fixed volt-
ages of 3.3V or 5.1V and using a simple external
divideroutput adjustablevoltageup to 50V.
Realized in BCD mixed technology, the device
April 2000
L4973
VCC (8V to 55V)
CIN C2
ROSC
COSC D1
L1
COUT
VO(3.3V or 5.1V)
CBOOT
4,5,6,
13,14,15
7
9
8
1
11 3
10
D97IN554A
17
RCOMP
CCOMP
CSS
2
16
12
TYPICAL APPLICATION CIRCUIT (POWERDIP)
POWERDIP (12+3+3) SO20(12+4+4)
ORDERING NUMBERS:
L4973V3.3 (Powerdip)
L4973D3.3 (SO20)
L4973V5.1 (Powerdip)
L4973D5.1 (SO20)
MULTIPOWER BCD TECHNOLOGY
1/16
uses an internal power D-MOS transistor (with a
typical Rdson of 0.15ohm) to obtain very high effi-
ciencyand very fast switching times.
Switching frequencyup to 300KHz are achievable
(the maximum power dissipation of the packages
mustbe observed).
A wide input voltage range between 8V to 55V
and output voltages regulated from 3.3V to 40V
cover the majority of the today applications.
Features of this new generation of DC-DC con-
verterincludes pulse by pulse current limit, hiccup
mode for output short circuit protection, voltage
feed forward regulation, soft start, input/output
synchronization, protection against feedback loop
disconnection, inhibit for zero current consump-
tionand thermalshutdown.
Packagesavailable are in plasticdual in line,DIP-
18 (12+3+3) for standard assembly, and SO20
(12+4+4)for SMD assembly.
PIN CONNECTIONS (Top view)
OSC
OUT
OUT
GND
GND
VCC
GND
VCC
BOOT
1
3
2
4
5
6
7
8
9 INH
VFB
COMP
GND
GND
GND
V5.1
SS
SYNC18
17
16
15
14
12
13
11
10
D94IN162A
POWERDIP (12+3+3)
OSC
OUT
OUT
GND
GND
GND
GND
VCC
VCC
VFB
COMP
GND
GND
GND
GND
V5.1
SS
SYNC1
3
2
4
5
6
7
8
9
18
17
16
15
14
12
13
11
19
10
20
BOOT INH
D94IN163A
SO20 (12+4+4)
VREF
GOOD 5.1V
COMP
VFB
SYNC
BOOT
DRIVER
HICCUP CURRENT
LIMITING
INTERNAL
REFERENCE
SS
INH
ZERO CURRENT
INHIBIT
D94IN161B
+
-
3.3V
V5.1
E/A
SOFT
START
5.1V
3.3V
THERMAL
SHUTDOWN
INTERNAL
SUPPLY 5.1V
-
+PWM
CURRENT
LIMITING
R
S
Q
Q
CBOOT
CHARGE
OSCILLATOR
OUTOUTGNDOSC
VCC VCC
17(19)
11(12)
12(13)
18(20)
1(1) 2(2) 3(3)
9(10)
8(9)7(8)16(18)10(11)
4,5,6,13,14,15
(4,5,6,7,14,15,16,17)
Pin x = Powerdip
Pin (x) = S020
BLOCKDIAGRAM
L4973V3.3 - L4973V5.1 - L4973D3.3 - L4973D5.1
2/16
PIN FUNCTIONS
Powerdip SO20 NAME DESCRIPTION
11 12 COMP E/A output to be used for frequency compensation
10 11 INH A logic signal (active high) disables the device (sleep mode operation).
If not used it must be connected to GND; if floatingthe device is disabled.
9 10 BOOT A capacitor connected between this pin and the output allows to drive the
internal D-MOS.
18 20 SYNC Input/Output synchronization.
7,8 8,9 Vcc Unregulated DC input voltage
2,3 2,3 OUT Stepdown regulator output.
12 13 VFB Stepdown feedback input. Connecting the output directly to this pin results
in an output voltage of 3.3V for the L4973V3.3 and 5.1V. An external
resistive divider is required for higher output voltages. For output voltage
less than 3.3V, seenote ** and Figure 32.
16 18 V5.1 Reference voltage externally available.
4,5,6
13,14,15 4,5,6,7
14,15,16,17 GND Signal ground
1 1 OSC An external resistor connected between the unregulated inputvoltage and
Pin 1 and a capacitor connected from Pin 1 to ground fixes the switching
frequency. (Linefeed forward is automatically obtained)
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
DIP-18 S0-20
V7,V8V9,V8Input voltage 58 V
V2,V3V2,V3Output DC voltage
Output peak voltage at t = 0.1µs f=200KHz -1
-5 V
V
I2,I3I2,I3Maximum output current int. limit.
V9-V8V10-V814 V
V9V10 Bootstrap voltage 70 V
V11 V12 Analogs input voltage (VCC = 24V) 12 V
V17 V19 Analogs input voltage (VCC = 24V) 13 V
V12 V13 (VCC = 20V) 6
-0.3 V
V
V18 V20 (VCC = 20V) 5.5
-0.3 V
V
V10 V11 Inhibit Vcc
-0.3 V
V
Ptot Power dissipation a Tpins ≤90°C
(Tamb =70°C no copper area)
(Tamb =70°C 4cm copper area on PCB)
DIP
12+3+3 5
1.3
2
W
W
W
Power dissipation a Tpins =90°C SO20 4 W
TJ,TSTG Junction and storagetemperature -40 to 150 °C
THERMAL DATA
Symbol Parameter Powerdip SO20 Unit
Rth(j-pin) Thermal Resistance Junction to pin Max. 12 15 °C/W
Rth(j-amb) Thermal Resistance to Ambient Max. 60 (*) 80 (*) °C/W
(*) Package mounted on board.
L4973V3 - L4973V5 - L4973D3 - L4973D5
3/16
ELECTRICAL CHARACTERISTICS ( Refer to the testcircuit,VCC = 24V; Tj=25
°
C, COSC = 2.7nF;
ROSC = 20KΩ; unlessotherwise specified)•= specificationsreferred to TJfrom0 to 125°C.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
DYNAMIC CHARACTERISTICS
Input VoltageRange (*) VO=V
REF to 40V; IO=3.5A •855V
Output Voltage
L4973V5.1 IO= 1A 5.05 5.1 5.15 V
IO=0.5Ato3.5A 5.00 5.1 5.20 V
VCC = 8V to 55V •4.95 5.1 5.25 V
Output Voltage
L4973V3.3 IO= 1A 3.326 3.36 3.393 V
IO=0.5Ato3.5A 3.292 3.36 3.427 V
VCC = 8V to 40V •3.26 3.36 3.46 V
RDSON VCC = 10.5V 0.15 0.22 Ω
IO=3.5A •0.35 Ω
Maximum LimitingCurrent VCC = 8V to 55V •4 4.5 5.5 A
ηEfficiency VO= 5.1V; IO=3.5A 90 %
VO= 3.3V; IO=3.5A 85 %
Switching Frequency •90 100 110 KHz
Supply VoltageRipple
Rejection Vi=VCC +2VRMS
VO=V
ref;IO=1A; fripple = 100Hz 60 dB
∆fsw Switching Frequency Stability
vs, Supply Voltage VCC = 8V to 55V 2 5 %
REFERENCESECTION
Reference Voltage 5.025 5.1 5.175 V
Iref = 0 to 20mA;
VCC = 8 to 55V •4.950 5.1 5.250 V
Line Regulation Iref = 0mA;
VCC = 8 to 55V 510mV
Load Regulation Vref = 0 to 5mA;
VCC = 0 to 20mA 2
610
25 mV
mV
Short Circuit Current 30 65 100 mA
SOFT START
Soft Start Charge Current 30 45 60 µA
Soft Start Discharge Current 15 22 30 µA
INHIBIT High Level Voltage •3.0 V
Low Level Voltage •0.8 V
Isource High Level VINH =3V •10 16 50 µA
Isource Low Level VINH = 0.8V •10 15 50 µA
DC CHARACTERISTICS
Total Operating Quiescent
Current Duty Cycle = 50% 4 6 mA
Quiescent Current Duty Cycle = 0 2.7 4 mA
Total stand-by quiescent
current VCC = 24V; VINH = 5V 100 200 µA
VCC = 55V; VINH = 5V 150 300 µA
ERROR AMPLIFIER
High Level Output Voltage 11.0 V
Low Level Output Voltage 0.65 V
Source Bias Current 1 2 3 µA
Source Output Current 200 300 600 µA
L4973V3.3 - L4973V5.1 - L4973D3.3 - L4973D5.1
4/16
Sink Output Current 200 300 µA
Supply VoltageRipple
Rejection VCOMP = VFB
CREF =4.7µF 1-5mA load
current
60 80 dB
DC Open Loop Gain RL= ∞50 60 dB
Transconductance Icomp = -0.1 to 0.1mA;
Vcomp =6V 2.5 mS
OSCILLATORSECTION
Ramp valley 0.78 0.85 0.92 V
Ramp peak VCC = 8V 1.9 2.1 2.3 V
VCC = 55V 9 9.6 10.2 V
Maximum Duty Cycle 95 97 %
Maximum Frequency Duty Cycle = 0%; ROSC =
13KΩ;C
OSC = 820pF; 500 KHz
SYNC FUNCTION
High Input Voltage VCC = 8V to 55V 3.5 V
Low Input Voltage VCC = 8V to 55V 0.9 V
Slave Sink Current 0.15 0.25 0.45 mA
Master Output Amplitude Isource = 3mA 4 4.5 V
Output Pulse Width no load, Vsync = 4.5V 0.20 0.35 µs
(*) Pulse testingwitha low duty cycle.
(**) The maximum power dissipation of thepackage must be observed.
ELECTRICAL CHARACTERISTICS (continued)
L4973
VCC
C1 C2
R2
C7
C3 C4 C5
C6
R1 D1
L1
3
x
C0 C12
R3
R4
VO
C8
4,5,6
13,14,15
7,8
9
1
17
1611 2,3
12
D97IN515B
(DIP18)
10
C1=1000µF/63V
C2=220nF/63V
C3=470nF
C4=1µF/50V
C5=220pF
C6=22nF
C7=2.7nF
C8=220nF/63V
C0=100µF/40V(C9,C10,C11)
C12=Optional (220nF)
L1=150µHK
OOLµ77310 - 40 Turns - 0.9mm
R1=9.1K
R2=20K
D1=GI SB560
VO(V) R3(KΩ) R4(KΩ)
3.3
5.1
12
15
18
24
0
2.7
12
16
20
30
4.7
4.7
4.7
4.7
4.7
L4973 V3.3 VO(V) R3(KΩ) R4(KΩ)
5.1
12
15
18
24
0
6.2
9.1
12
18
4.7
4.7
4.7
4.7
L4973 V5.1
Figure 1. EvaluationBoard Circuit
L4973V3 - L4973V5 - L4973D3 - L4973D5
5/16
Output Voltage Output
Ripple Efficiency Line Regulator
Io= 3.5A VCC = 8 to 50V Load Regulator
VCC =35V IO= 1 to 3.5A
3.3V 20mV 81.5 (%) 3mV 6mV
5.1V 20mV 86.7 (%) 3mV 6mV
12V 30mV 93.5 (%) 3mV (VCC =15 to 50V) 4mV
TypicalPerformance(Using EvaluationBoard) fsw = 100kHz
Figure1a: EvaluationBoard (Components Side)
Figure1b: Evaluation Board (SolderSide)
L4973V3.3 - L4973V5.1 - L4973D3.3 - L4973D5.1
6/16
L4973V3.3
VCC
C1 C2
R2
C7
C3 C4 C5
C6
R1 D1
L1
3x
C0 C12
Vo
C8
4,5,6
13,14,15
7,8 10 18 9
1
17
16
INH SYNC
11 2,3
12
D97IN664A
Figure1d: Application Circuit (see fig. 1 part list)
L4973V5.1
VCC
C1 C2
R2
C7
C3 C4 C5
C6
R1 D1
L1
3
x
C0 C12
Vo
C8
4,5,6
13,14,15
7,8 10 18 9
1
17
16
INH SYNC
11 2,3
12
D97IN665A
Figure1c: ApplicationCircuit (see fig. 1 part list)
0 1020304050V
CC(V)
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Ibias
(mA)
Tamb=25°
C
0% DC
D97IN633A
100KHz-R2=20K
C7=2.7nF
200KHz-R2=22K
C7=1.2nF
0Hz
Figure2: QuiescentDrain Currentvs. Input
Voltage(0% Duty Cycle)
-50 0 50 100 Tj(°C)
2.5
3.0
3.5
4.0
Ibias
(mA)
D97IN634
100KHz-R2=20K
C7=2.7nF
200KHz-R2=22K
C7=1.2nF
0Hz
0% DC
VCC = 35V
Figure 3: QuiescentDrain Current vs. Junction
Temperature
L4973V3 - L4973V5 - L4973D3 - L4973D5
7/16
0 1020304050V
CC(V)
50
100
150
Ibias
(µA)
D97IN635A
25°C
125°C
Vinh =5V
Figure4: Stand by Drain Current vs. input
Voltage
-40 0 40 80 Tj(°C)-20 20 60 100
5.0
5.05
5.1
5.15
VREF
(V)
D97IN637
Vcc=35V
Pin 16
Figure 5: ReferenceVoltage vs. Junction
Temperature(Pin 16)
0 1020304050V
CC(V)
5.0
5.05
5.1
5.15
VREF
(V)
D97IN636A
Tj=25°
C
Pin 16
Figure6: ReferenceVoltage vs. Input Voltage
(Pin 16)
0 1020304050I
REF(mA)
4.9
5.0
5.1
5.2
VREF
(V)
D97IN638
Tj=25°C
Vcc=10V
Vcc=40V
Figure 7: ReferenceVoltage vs. ReferenceInput
Current
0 15 Vinh(V)105
-50
0
50
100
Iinh
(µA)
D97IN651
Tj=0°C
Tj=25°C
Tj=125°C
Vcc=35V
Pin 10
Figure8: Inhibit Currentvs. Inhibit Voltage
(Pin 10)
0 1020304050V
CC(V)
5.06
5.08
5.1
5.12
VO
(V)
D97IN639A
Tj=25°C
Tj=125°C
IO=1A
Figure 9: Line Regulation (see fig. 1)
L4973V3.3 - L4973V5.1 - L4973D3.3 - L4973D5.1
8/16
0123I
O
(A)
5.0
5.05
5.1
5.15
VO
(V)
D97IN640
Tj=25°C
Tj=125°C
VCC = 35V
Figure10: LoadRegulation(seefig.1c)
0 1020304050V
CC(V)
3.3
3.31
3.32
3.34
VO
(V)
3.33
3.35
D97IN660A
Tj=25°C
Tj=125°C
IO=1A
Figure 11: LineRegulation(seefig.1d)
0123I
O
(A)
3.3
3.31
3.33
3.35
VO
(V)
3.32
3.34
D97IN661
Tj=25°C
Tj=125°C
VCC = 35V
Figure12: Load Regulation (see fig. 1d)
0 20 40 60 80 R2(KΩ)
5
10
20
50
100
200
500
fsw
(KHz)
D97IN630
0.82nF
1.2nF
2.2nF
3.3nF 4.7nF
5.6nF
Tamb=25°C
Figure 13: Switching Frequency vs.R2 and C7
(fig. 1)
0 1020304050V
CC(V)
90
95
100
105
fsw
(KHz)
D97IN631
Tamb=25°C
Figure14: SwitchingFrequencyvs. Input Voltage
-50 0 50 100 Tj(°C)
90
95
100
105
fsw
(KHz)
D97IN632
Figure 15: Switching Frequency vs. Junction
temperature(see fig.1)
L4973V3 - L4973V5 - L4973D3 - L4973D5
9/16
0123I
O
(A)
0
0.2
0.4
0.6
∆V
(V)
D97IN643
Tj=0°C
Tj=125°C
Tj=25°C
Figure16: DropoutVoltage Between pin 7,8 and
2,3
0102030 V
O
(V)40
86
88
90
92
η
(%)
94
96
98
D97IN641
200KHz
100KHz
IO=
3A
VCC = 50V
Figure 17: Efficiencyvs. OutputVoltage
(see fig.1)
0 101520 V
O
(V)30525
86
88
90
92
η
(%)
94
96
98
D97IN642
200KHz
100KHz
IO=
3A
VCC = 35V
Figure18: Efficiencyvs. OutputVoltage
(DiodeSTPS745D)
0123I
O
(A)
80
85
90
95
η
(%)
D97IN645
Vcc=12V
Vcc=24V
Vcc=48V
VO=5.1V
fsw = 100KHz
Figure 19: Efficiencyvs. OutputCurrent
( see fig.1c)
0123I
O
(A)
75
80
85
90
η
(%)
D97IN646
Vcc=12V
Vcc=24V
Vcc=48V
VO= 5.1V
fsw = 200KHz
Figure20: Efficiencyvs. OutputCurrent
(see fig.1c)
0123I
O
(A)
75
80
85
90
η
(%)
D97IN644
Vcc=12V
Vcc=24V
Vcc=48V
VO= 3.3V
fsw = 100KHz
Figure 21: Efficiencyvs. OutputCurrent
(see fig.1d)
L4973V3.3 - L4973V5.1 - L4973D3.3 - L4973D5.1
10/16
0123I
O
(A)0.5 1.5 2.5 3.5
70
75
85
η
(%)
80
90
D97IN662
Vcc=48V
Vcc=12V
Vcc=24V
VO=3.3V
fsw = 200KHz
Figure22: Efficiencyvs. Output Current
(seefig.1d)
0 10 30 40 Vcc(V)20 50
0
0.5
1.0
1.5
Pdiss
(W)
D97IN647A
IO=3.5A
IO=3A
IO=2A
IO=2.5A
VO=
5.1V
fsw = 100KHz
Figure 23: Power dissipation vs. Input Voltage
(Device only) (see fig.1c)
0 5 15 20 VO(V)10 25 30
0
0.5
1.0
1.5
Pdiss
(W)
2.0
2.5
3.0
D97IN648
IO=3.5A
IO=3A
IO=1A
IO=2A
IO=2.5A
VCC =
35V
fsw = 100KHz
Figure24: Powerdissipationvs. OutputVoltage
(Deviceonly)
-40 -20 60 80 Tj(°C)0 12020 40 100
4.2
4.4
4.6
4.8
Ilim
(A)
5
5.2
D97IN652
Vcc=35
Figure 25: Pulse by Pulse Limiting Current vs.
Junction Temperature
1
2
I
O
(A)
3
2
1V
O
(mV)
100
0
-100
D97IN649
T
T
200µs/DIV
VCC = 35V
fsw = 100KHz
Figure26: LoadTransient
2
1
D97IN650
VCC
(V)
30
20
10 VO
(mV)
100
0
-100
1ms/DIV
IO= 1A
fsw = 100KHz
Figure 27: Line Transient
L4973V3 - L4973V5 - L4973D3 - L4973D5
11/16
Figure28: SourceCurrent Rise and Fall Time,
pin 2, 3 (Seefig1)
25 30 35 40 Vi(V)5045
0
50
100
150
Lomax
(µH)
200
250
300
D97IN653
Css=100nF
Css=220nF
Css=470nF
Css=680nF
Css=820nF
Css=1µF
fsw = 100KHz
Figure 29: Soft Start Capacitor Selectionvs.
Inductorand VCC max(ref. AN938)
15 20 25 30 Vi(V)4035 45 50
0
50
100
150
Lomax
(µH)
D97IN654
Css=22nF
Css=33nF
Css=47nF
Css=56nF
Css=68nF
fsw = 200KHz
Figure30:Soft Start Capacitor Selectionvs. In-
ductorand VCC max (ref. AN938)
10 103105107f(Hz)102104106108
-200
-150
-100
-50
GAIN
(dB)
0
50
Phase
0
45
90
135
D97IN663
GAIN
Phase
Figure 31: Open Loop Frequencyand Phase of
Erroramplifier
L4973V3.3
VCC
C1 C2
R2
C7
C3 C4
C5
C6
R1 D1
L1
3
x
C0
Vo
C8
4,5,6
13,14,15
7,8 10 18 9
1
17
INH SYNC
11
2,3
1216
R3
D97IN666A
R5
VPR5R3
1 3.6K 4.7K
1.5 2K 2K
2 4.7K 3.6K
2.5 7.5K 3.6K
3 5.1K 1K
VO=3.36-1.74•R3
R5
Figure 32: 3.5A at VO< 3.3V(see part list fig. 1)
L4973V3.3 - L4973V5.1 - L4973D3.3 - L4973D5.1
12/16
L1 KoolMm 77120- 24 Turns-
0.9mm
D1 STPS1025
L4973V3.3
VCC
12V±5%
C1
560uF-25V
HFQ
Panasonic
C2
220nF
R2
22k
C7
1.2nF
C3
33nF
C4
1uF
C5
220pF
C6
22nF
R1
9k1 D1
L1
C9
470uF-25V
HFQ
Panasonic
Vo=3.33V
Io=3.5A
C8
220nF
4,5,6
13,14,15
7,8 10 18 9
1
17
16
INH SYNC
11
2,3
12
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 Io(A)
80
82
84
86
88
90
92
η
(%)
D97IN668A
Figure33: 12V to 3.3V High PerformanceBuck Converter (fsw = 200kHz)
L4973 L4973
18 18
VCC2
D97IN669
17,8
VCC1
1
7,8
4,5,6
13,14,15 4,5,6
13,14,15
L4973 L4973
18 18
VCC
17,8
1
7,8
4,5,6
13,14,15 4,5,6
13,14,15
Figure34: SynchronizationExample
L4973
VCC
C1 C2
R2
C7
C3 C4 C5
C6
R1 D1
L1
C9 C10
Vo1
C8
4,5,6
13,14,15
7,8 10 18 9
1
17
16
INH SYNC
11 2,3
12
C11
Vo2
n1
n2
D2
D97IN667A
VO2 =V
O1 n1+n2
n
1
P
O2 < 20%PO1
Figure35: Multioutputnot Isolated(Pin out referred to DIP12+3+3)
L4973V3 - L4973V5 - L4973D3 - L4973D5
13/16
Powerdip 18
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
a1 0.51 0.020
B 0.85 1.40 0.033 0.055
b 0.50 0.020
b1 0.38 0.50 0.015 0.020
D 24.80 0.976
E 8.80 0.346
e 2.54 0.100
e3 20.32 0.800
F 7.10 0.280
I 5.10 0.201
L 3.30 0.130
Z 2.54 0.100
OUTLINE AND
MECHANICAL DATA
L4973V3.3 - L4973V5.1 - L4973D3.3 - L4973D5.1
14/16
110
1120
A
e
B
D
E
L
KH
A1 C
SO20MEC
hx45°
SO20
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.35 2.65 0.093 0.104
A1 0.1 0.3 0.004 0.012
B 0.33 0.51 0.013 0.020
C 0.23 0.32 0.009
0.013
D 12.6 13 0.496 0.512
E 7.4 7.6 0.291 0.299
e 1.27 0.050
H 10 10.65 0.394 0.419
h 0.25 0.75 0.010 0.030
L 0.4 1.27 0.016 0.050
K0°(min.)8°(max.)
OUTLINE AND
MECHANICAL DATA
L4973V3 - L4973V5 - L4973D3 - L4973D5
15/16
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
2000 STMicroelectronics– Printed in Italy – All Rights Reserved
STMicroelectronicsGROUP OF COMPANIES
Australia- Brazil - China - Finland- France - Germany -Hong Kong - India - Italy- Japan - Malaysia - Malta- Morocco -
Singapore - Spain- Sweden- Switzerland - UnitedKingdom - U.S.A.
http://www.st.com
L4973V3.3 - L4973V5.1 - L4973D3.3 - L4973D5.1
16/16
