Fast Responding,
45 dB Range,
0.5 GHz to 43.5 GHz Envelope Detector
Data Sheet
ADL6010
Rev. E Document Feedback
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FEATURES
Schottky diode detector with linearization
Broadband 50 Ω input impedance
Accurate response from 0.5 GHz to 43.5 GHz with minimal
slope variation
Input range of −30 dBm to +15 dBm, referred to 50 Ω
Excellent temperature stability
2.1 V/VPEAK (output voltage per input peak voltage) slope at
10 GHz
Fast envelope bandwidth: 40 MHz
Fast output rise time: 4 ns
Low power consumption: 1.6 mA at 5.0 V
2 mm × 2 mm, 6-lead LFCSP package
APPLICATIONS
Microwave point to point links
Microwave instrumentation
Radar-based measurement systems
FUNCTIONAL BLOCK DIAGRAM
11617-001
4
5
6
3
2
1
LINEARIZER
RFCM
ADL6010
RFIN
RFCM
VPOS
VOUT
COMM
Figure 1.
GENERAL DESCRIPTION
The ADL6010 is a versatile, broadband envelope detector
covering the microwave spectrum. It provides state-of-the-
art accuracy with very low power consumption (8 mW) in a
simple, easy to use 6-lead format. The output is a baseband
voltage proportional to the instantaneous amplitude of the
radio frequency (RF) input signal. It exhibits minimal slope
variation of the RF input to envelope output transfer function
from 0.5 GHz to 43.5 GHz.
The detector cell uses a proprietary eight Schottky diode array
followed by a novel linearizer circuit that creates a linear voltmeter
with an overall scaling factor (or transfer gain) of nominally ×2.2
relative to the voltage amplitude of the input.
Although the ADL6010 is not inherently a power responding
device, it remains convenient to specify the input in this way.
Thus, the permissible input power, relative to a 50 Ω source
input impedance, ranges from −30 dBm to +15 dBm. The
corresponding input voltage amplitudes of 11.2 mV to 1.8 V
generate quasi-dc outputs from about 25 mV to 4 V above
common (COMM). A subtle aspect of the balanced detector
topology is that no even-order distortion, caused by nonlinear
source loading, occurs at the input. This is an important benefit
in applications where a low ratio coupler is used to extract a
signal sample and is a significant improvement over traditional
diode detectors.
The power equivalent of a fluctuating RF input amplitude can
be extracted by the addition of an rms-to-dc converter IC.
Alternatively, the baseband output can be applied to a suitably
fast analog-to-digital converter (ADC) and the rms value (and
other signal metrics, such as peak to average ratio) calculated in
the digital domain.
The output response accuracy is insensitive to variation in the
supply voltage, which can range from 4.75 V to 5.25 V. The
ultralow power dissipation contributes to its long-term stability.
The ADL6010ACPZN is specified for operation from −40°C to
+85°C, and the ADL6010SCPZN is specified for operation from
−55°C to +125°C. Both are available in a 6-lead, 2 mm × 2 mm
LFCSP package.
ADL6010 Data Sheet
Rev. E | Page 2 of 23
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ...................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications .................................................................................... 3
Absolute Maximum Ratings ........................................................... 7
ESD Caution.................................................................................. 7
Pin Configurations and Function Descriptions ........................... 8
Typical Performance Characteristics ............................................. 9
Measurement Setups ...................................................................... 15
Theory of Operation ...................................................................... 16
Basic Connections ...................................................................... 17
PCB Layout Recommendations ............................................... 17
System Calibration and Error Calculation ............................. 17
Effect of a Capacitive Load on Rise Time and Fall Time ...... 19
Evaluation Board ............................................................................ 20
Evaluation Board Assembly Drawings .................................... 21
Outline Dimensions ....................................................................... 22
Ordering Guide .......................................................................... 23
REVISION HISTORY
4/2020—Rev. D to Rev. E
Added 6-Pad Bare Die [CHIP] ....................................... Universal
Added Figure 3; Renumbered Sequentially .................................. 8
Added Figure 4 and Figure 5 .......................................................... 9
Added Figure 49 ............................................................................. 22
Updated Outline Dimensions ....................................................... 22
Changes to Ordering Guide .......................................................... 23
9/2019—Rev. C to Rev. D
Changes to Ordering Guide .......................................................... 22
2/2019—Rev. B to Rev. C
Changes to General Description Section ....................................... 1
Changes to Ordering Guide .......................................................... 22
Updated Outline Dimensions ...................................................... 22
6/2017—Rev. A to Rev. B
Changes to Typical Performance Characteristics Section ........... 9
Updated Outline Dimensions ...................................................... 22
Changes to Ordering Guide .......................................................... 22
9/2014—Rev. 0 to Rev. A
Deleted Figure 3 and Figure 6; Renumbered Sequentially .......... 9
Deleted Figure 39 and Changes to Theory of Operation Section .. 16
7/2014—Revision 0: Initial Version
Data Sheet ADL6010
Rev. E | Page 3 of 23
SPECIFICATIONS
VPOS = 5.0 V, TA = 25°C, 50 Ω source input impedance, single-ended input drive, unless otherwise stated.
Table 1.
Parameter Test Conditions/Comments Min Typ1 Max Unit
RF INPUT INTERFACE RFIN pin
Operating Frequency 0.5 43.5 GHz
Nominal Input Impedance Single-ended input drive, see the Theory of Operation section 50 Ω
FREQUENCY = 500 MHz Input RFIN to output VOUT
Detection Range
±1 dB Error Continuous wave (CW) input 44 dB
Maximum Input Level, ±1 dB Three point calibration at −26 dBm, −14 dBm, and +5 dBm 16 dBm
Minimum Input Level, ±1 dB Three point calibration at −26 dBm, −14 dBm, and +5 dBm −28 dBm
Deviation vs. Temperature Deviation from output at 25°C
−40°C < TA < +85°C, input power (PIN) = +10 dBm +0.2/−0.1 dB
−55°C < TA < +125°C, PIN = +10 dBm +0.3/−0.2 dB
−40°C < TA < +85°C, PIN = −10 dBm +0.7/−0.6 dB
−55°C < TA < +125°C, PIN = −10 dBm +0.9/−1.2 dB
Slope Calibration at −14 dBm and +5 dBm 2.2 V/ VPEAK
Intercept Calibration at −14 dBm and +5 dBm 0.3 V
Output Voltage
PIN = +10 dBm 2.2 V
PIN = −10 dBm 0.19 V
FREQUENCY = 1 GHz Input RFIN to output VOUT
Detection Range
±1 dB Error CW input 45 dB
Maximum Input Level, ±1 dB Three point calibration at −25 dBm, −10 dBm, and +8 dBm 15 dBm
Minimum Input Level, ±1 dB Three point calibration at −25 dBm, −10 dBm, and +8 dBm −30 dBm
Deviation vs. Temperature Deviation from output at 25°C
−40°C < TA < +85°C, PIN = +10 dBm +0.1/−0.1 dB
−55°C < TA < +125°C, PIN = +10 dBm +0.2/−0.2 dB
−55°C < TA < +125°C, PIN = −10 dBm +0.3/−0.3 dB
−40°C < TA < +85°C, PIN = −10 dBm +0.4/−0.6 dB
Slope Calibration at −10 dBm and +8 dBm 2.2 V/VPEAK
Intercept Calibration at −10 dBm and +8 dBm 0.5 V
Output Voltage
PIN = +10 dBm 2.25 V
PIN = −10 dBm 0.22 V
FREQUENCY = 5 GHz Input RFIN to output VOUT
Detection Range
±1 dB Error CW input 46 dB
Maximum Input Level, ±1 dB Three point calibration at −25 dBm, −10 dBm, and +8 dBm 16 dBm
Minimum Input Level, ±1 dB Three point calibration at −25 dBm, −10 dBm, and +8 dBm −30 dBm
Deviation vs. Temperature Deviation from output at 25°C
−40°C < TA < +85°C, PIN = +10 dBm +0.2/−0.1 dB
−55°C < TA < +125°C, PIN = +10 dBm +0.3/−0.2 dB
−40°C < TA < +85°C, PIN = −10 dBm +0.2/−0.2 dB
−55°C < TA < +125°C, PIN = −10 dBm +0.3/−0.4 dB
Slope Calibration at −10 dBm and +8 dBm 2.1 V/VPEAK
Intercept Calibration at −10 dBm and +8 dBm 0.5 V
Output Voltage
PIN = +10 dBm 2.2 V
P
IN
= −10 dBm
0.22
V
ADL6010 Data Sheet
Rev. E | Page 4 of 23
Parameter Test Conditions/Comments Min Typ1 Max Unit
FREQUENCY = 10 GHz Input RFIN to output VOUT
Detection Range
±1 dB Error CW input 46 dB
Maximum Input Level, ±1 dB Three point calibration at −28 dBm, −10 dBm, and +10 dBm 16 dBm
Minimum Input Level, ±1 dB Three point calibration at −28 dBm, −10 dBm, and +10 dBm −30 dBm
Deviation vs. Temperature Deviation from output at 25°C
−40°C < TA < +85°C, PIN = 10 dBm +0.2/−0.1 dB
−55°C < TA < +125°C, PIN = 10 dBm +0.4/−0.2 dB
−40°C < TA < +85°C, PIN = −10 dBm +0.2/−0.2 dB
−55°C < TA < +125°C, PIN = −10 dBm +0.4/−0.4 dB
Slope Calibration at −10 dBm and +10 dBm 2.1 V/VPEAK
Intercept Calibration at −10 dBm and +10 dBm 0.6 V
Output Voltage
PIN = +10 dBm 2.1 V
PIN = −10 dBm 0.22 V
FREQUENCY = 15 GHz Input RFIN to output VOUT
Detection Range
±1 dB Error CW input 47 dB
Maximum Input Level, ±1 dB Three point calibration at −28 dBm, −10 dBm, and +10 dBm 16 dBm
Minimum Input Level, ±1 dB Three point calibration at −28 dBm, −10 dBm, and +10 dBm −30 dBm
Deviation vs. Temperature Deviation from output at 25°C
−40°C < TA < +85°C, PIN = +10 dBm +0.2/−0.2 dB
−55°C < TA < +125°C, PIN = +10 dBm +0.3/−0.3 dB
−40°C < TA < +85°C, PIN = −10 dBm +0.2/−0.3 dB
−55°C < TA < +125°C, PIN = −10 dBm +0.3/−0.6 dB
Slope Calibration at −10 dBm and +10 dBm 2.1 V/VPEAK
Intercept Calibration at −10 dBm and +10 dBm 0.6 V
Output Voltage
PIN = +10 dBm 2.1 V
PIN = −10 dBm 0.22 V
FREQUENCY = 20 GHz Input RFIN to output VOUT
Detection Range
±1 dB Error CW input 46 dB
Maximum Input Level, ±1 dB Three point calibration at −28 dBm, −10 dBm, and +8 dBm 15 dBm
Minimum Input Level, ±1 dB Three point calibration at −28 dBm, −10 dBm, and +8 dBm −30 dBm
Deviation vs. Temperature Deviation from output at 25°C
−40°C < TA < +85°C, PIN = +10 dBm +0.2/−0.2 dB
−55°C < TA < +125°C, PIN = +10 dBm +0.3/−0.4 dB
−40°C < T
A
< +85°C, P
IN
= −10 dBm
+0.2/−0.3
dB
−55°C < TA < +125°C, PIN = −10 dBm +0.3/−0.6 dB
Slope Calibration at −10 dBm and +8 dBm 2.2 V/VPEAK
Intercept Calibration at −10 dBm and +8 dBm 0.55 V
Output Voltage
PIN = +10 dBm 2.3 V
PIN = −10 dBm 0.246 V
Data Sheet ADL6010
Rev. E | Page 5 of 23
Parameter Test Conditions/Comments Min Typ1 Max Unit
FREQUENCY = 25 GHz Input RFIN to output VOUT
Detection Range
±1 dB Error CW input 46 dB
Maximum Input Level, ±1 dB Three point calibration at −28 dBm, −10 dBm, and +8 dBm 15 dBm
Minimum Input Level, ±1 dB Three point calibration at −28 dBm, −10 dBm, and +8 dBm −30 dBm
Deviation vs. Temperature Deviation from output at 25°C
−40°C < TA < +85°C, PIN = +10 dBm +0.2/−0.2 dB
−55°C < TA < +125°C, PIN = +10 dBm +0.3/−0.4 dB
−40°C < TA < +85°C, PIN = −10 dBm +0.2/−0.4 dB
−55°C < TA < +125°C, PIN = −10 dBm +0.3/−0.7 dB
Slope Calibration at −14 dBm and +10 dBm 2.3 V/VPEAK
Intercept Calibration at −14 dBm and +10 dBm 0.55 V
Output Voltage
PIN = +10 dBm 2.36 V
PIN = −10 dBm 0.242 V
FREQUENCY = 30 GHz Input RFIN to output VOUT
Detection Range
±1 dB Error CW input 45 dB
Maximum Input Level, ±1 dB Three point calibration at −26 dBm, 0 dBm, and +10 dBm 16 dBm
Minimum Input Level, ±1 dB Three point calibration at −26 dBm, 0 dBm, and +10 dBm −29 dBm
Deviation vs. Temperature Deviation from output at 25°C
−40°C < TA < +85°C, PIN = +10 dBm +0.3/−0.2 dB
−55°C < TA < +125°C, PIN = +10 dBm +0.4/−0.4 dB
−40°C < TA < +85°C, PIN = −10 dBm +0.5/−0.5 dB
−55°C < TA < +125°C, PIN = −10 dBm +0.6/−0.8 dB
Slope Calibration at 0 dBm and +10 dBm 2.3 V/VPEAK
Intercept Calibration at 0 dBm and +10 dBm 0.6 V
Output Voltage
PIN = +10 dBm 2.2 V
PIN = −10 dBm 0.21 V
FREQUENCY = 35 GHz Input RFIN to output VOUT
Detection Range
±1 dB Error CW input 44 dB
Maximum Input Level, ±1 dB Three point calibration at −25 dBm, 0 dBm, and +10 dBm 15 dBm
Minimum Input Level, ±1 dB Three point calibration at −25 dBm, 0 dBm, and +10 dBm −29 dBm
Deviation vs. Temperature Deviation from output at 25°C
−40°C < TA < +85°C, PIN = +10 dBm +0.4/−0.4 dB
−55°C < TA < +125°C, PIN = +10 dBm +0.5/−0.6 dB
−40°C < TA < +85°C, PIN = −10 dBm +0.5/−0.5 dB
−55°C < TA < +125°C, PIN = −10 dBm +0.6/−1.6 dB
Slope Calibration at 0 dBm and 10 dBm 2.4 V/VPEAK
Intercept Calibration at 0 dBm and 10 dBm 0.6 V
Output Voltage
PIN = +10 dBm 2.3 V
PIN = −10 dBm 0.198 V
ADL6010 Data Sheet
Rev. E | Page 6 of 23
Parameter Test Conditions/Comments Min Typ1 Max Unit
FREQUENCY = 40 GHz Input RFIN to output VOUT
Detection Range
±1 dB Error CW input 42 dB
Maximum Input Level, ±1 dB Three point calibration at −20 dBm, 0 dBm, and +10 dBm 17 dBm
Minimum Input Level, ±1 dB Three point calibration at −20 dBm, 0 dBm, and +10 dBm −25 dBm
Deviation vs. Temperature Deviation from output at 25°C
−40°C < TA < +85°C, PIN = +10 dBm +0.2/−0.2 dB
−55°C < TA < +125°C, PIN = +10 dBm +0.3/−0.3 dB
−40°C < TA < +85°C, PIN = −10 dBm +0.5/−0.5 dB
−55°C < TA < +125°C, PIN = −10 dBm +0.6/−0.9 dB
Slope Calibration at 0 dBm and 10 dBm 1.7 V/VPEAK
Intercept Calibration at 0 dBm and 10 dBm 0.4 V
Output Voltage
PIN = +10 dBm 1.64 V
PIN = −10 dBm 0.135 V
FREQUENCY = 43.5 GHz Input RFIN to output VOUT
Detection Range
±1 dB Error CW input 41 dB
Maximum Input Level, ±1 dB Three point calibration at −20 dBm, 0 dBm, and +10 dBm 17 dBm
Minimum Input Level, ±1 dB Three point calibration at −20 dBm, 0 dBm, and +10 dBm −24 dBm
Deviation vs. Temperature Deviation from output at 25°C
−40°C < TA < +85°C, PIN = +10 dBm +0.6/−0.4 dB
−55°C < TA < +125°C, PIN = +10 dBm +0.7/−0.7 dB
−40°C < TA < +85°C, PIN = −10 dBm +0.7/−0.5 dB
−55°C < TA < +125°C, PIN = −10 dBm +0.8/−1.1 dB
Slope Calibration at 0 dBm and 10 dBm 1.6 V/VPEAK
Intercept Calibration at 0 dBm and 10 dBm 0.35 V
Output Voltage
PIN = +10 dBm 1.46 V
PIN = −10 dBm 0.118 V
OUTPUT INTERFACE Pin VOUT
DC Output Resistance <5 Ω
Output Offset PIN = off 4 mV
Maximum Output Voltage TA = 25°C, VPOS = 5.0 V, PIN = 19 dBm 4.3 V
Available Output Current Sourcing/sinking 5/0.3 mA
Rise Time PIN = off to 0 dBm, 10% to 90%, CLOAD = 10 pF ,RSERIES = 100 Ω 4 ns
Fall Time PIN = off to 0 dBm, 10% to 90%, CLOAD = 10 pF, RSERIES = 100 Ω 50 ns
Envelope Bandwidth 3 dB bandwidth 40 MHz
POWER SUPPLIES Pin VPOS
Supply Voltage 4.75 5.0 5.25 V
Quiescent Current TA = 25°C, no signal at RFIN, VPOS = 5.0 V 1.6 mA
−40°C < TA < +85°C 2.0 mA
−55°C < TA < +125°C 2.2 mA
1 Slashes in the typical (typ) column indicate a range. For example, −0.2/+0.1 means −0.2 to +0.1.
Data Sheet ADL6010
Rev. E | Page 7 of 23
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage, VPOS 5.5 V
Input RF Power1 20 dBm
Equivalent Voltage, Sine Wave Input 3.16 V
Internal Power Dissipation 20 mW
θJC2 16.4°C/W
θJA2 82.9°C/W
ΨJT2 0.6°C/W
ΨJB2 49.3°C/W
Maximum Junction Temperature 150°C
Operating Temperature Range
ADL6010ACPZN-R7 −40°C < TA < +85°C
ADL6010SCPZN-R7 −55°C < TA < +125°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering 60 sec) 300°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the
operational section of this specification is not implied.
Operation beyond the maximum operating conditions for
extended periods may affect product reliability.
ESD CAUTION
1 Driven from a 50 Ω source.
2 No airflow when the exposed pad soldered to a 4-layer JEDEC board.
ADL6010 Data Sheet
Rev. E | Page 8 of 23
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NOTES
1. EXPOSED PAD. THE EXPOSED PAD (EPAD) ON THE UNDE RS IDE O F T HE DE V ICE
ISALS O INT E RNAL LY CONNECT E D TO GROUND AND REQUIRES GO OD THE RM A L
AND EL ECTRI CAL CONNE CTI O N TO THE GROUND OF THE PRINTE D CIRCUI T BOAR
CONNECT ALL GROUND P INS TO A LOW IM P E DANCE GRO UND PLANE
TOGETHER WITH THE EPAD.
6COMM
4VPOS
5VOUT
1
RFCM 3
RFCM
2
RFIN
ADL6010
TOP VIEW
(No t t o Scal e)
Figure 2. 6-Lead LFCSP Pin Configuration
11617-050
ADL6010
TOP VIEW
(CIRCUI T SIDE)
(Not to Scal e)
4
6
1
5
RFCM
RFCM
RFIN
2
3
COMM
VOUT
VPOS
Figure 3. 6-Pad Bare Die Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 COMM Device Ground. Connect COMM to the system ground using a low impedance ground plane together with the
exposed pad (EPAD).
2 VOUT Output Voltage. The output from the VOUT pin is proportional to the envelope value at the RFIN pin.
3 VPOS Supply Voltage. The operational range is from 4.75 V to 5.25 V. Decouple the power supply using the suggested
capacitor values of 100 pF and 0.1 µF and locate these capacitors as close as possible to the VPOS pin.
4, 6 RFCM Device Grounds. Connect the RFCM pins to the system ground using a low impedance ground plane together
with the exposed pad (EPAD).
5 RFIN Signal Input. The RFIN pin is ac-coupled and has an RF input impedance of approximately 50 Ω.
EPAD1 Exposed Pad. The exposed pad (EPAD) on the underside of the device is also internally connected to ground and
requires good thermal and electrical connection to the ground of the printed circuit board (PCB). Connect all
ground pins to a low impedance ground plane together with the EPAD.
1 Not applicable for the 6-pad bare die.
Data Sheet ADL6010
Rev. E | Page 9 of 23
TYPICAL PERFORMANCE CHARACTERISTICS
VPOS = 5.0 V, CLOAD = open, TA = 25°C, unless otherwise specified. Error referred to slope and intercept at indicated calibration points.
Single-ended input drive, input RF signal is a continuous sine wave, unless otherwise noted.
2010 150–10–20–30 5–5–15–25–35–40
10
1
0.1
0.01
0.001
PIN (dBm)
OUTPUT VOLTAGE (V)
40.0GHz
43.5GHz
0.5GHz
1.0GHz
5.0GHz
10.0GHz
15.0GHz
20.0GHz
25.0GHz
30.0GHz
35.0GHz
11617-003
Figure 4. Typical Output Voltage (VOUT) vs. RF Input Power (PIN) at Various
Frequencies (0.5 GHz to 43.5 GHz) at 25°C
4035302520151050.5
10
0
–10
–20
–30
–40
–50
FRE Q UE NCY ( GHz)
OUTPUT VOLTAGE (dBV)
P
IN
= –30dBm
P
IN
= –20dBm
P
IN
= –10dBm
P
IN
= 0dBm
P
IN
= +10d Bm
11617-006
Figure 5. Output Voltage (VOUT) Flatness vs. Frequency for Five RF Input Power
Values (PIN)
155–5–15–25–35 20100–10–20–30–40 PIN (dBm)
11617-004
5
4
3
2
1
0
OUTPUT VOLTAGE (V)
VPOS = 4.75V
VPOS = 5.00V
VPOS = 5.25V
Figure 6. Output Voltage (VOUT) vs. RF Input Power (PIN) for
Various Supply Voltages
40353025201510
5
0.5
0
–5
–10
–15
–20
FREQUENCY (GHz)
S11 (dB)
11617-007
Figure 7. Input Return Loss (S11) vs. Input Frequency with
Input Connector and PCB Trace Embedded
15
5–5–15
–25 20100–10
–20–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
PIN (dBm)
ERRO R ( dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
CALIBRATIONAT
–26dBm, –14dBm, AND + 5dBm
11617-009
Figure 8. Conformance Error and Output Voltage (VOUT) vs.
RF Input Power (PIN) for Various Temperatures at 0.5 GHz
15
5–5–15–25–35
20100–10–20–30–40
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
SUPPLY CURRENT ( mA)
PIN (dBm)
–55°C
–40°C
+25°C
+85°C
+125°C
11617-005
Figure 9. Supply Current vs. RF Input Power (PIN) for Various Temperatures
ADL6010 Data Sheet
Rev. E | Page 10 of 23
–8
–7
–6
–5
–4
–3
–2
–1
0
1
0.1 110 100
NORM ALIZED G AIN (dB)
FREQUENCY (MHz)
11617-008
Figure 10. Envelope Bandwidth of VOUT vs. Frequency at PIN = −10 dBm and
Modulation Depth = 10% (See Figure 39 in the Measurement Setups Section)
20
100–10–20–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
15
5–5–15–25 PIN (dBm)
ERROR (dB)
OUTPUT VOLTAGE (V)
CALIBRATIONAT –26dBm, –14dBm, AND +5dBm
–55°C
–40°C
+25°C
+85°C
+125°C
11617-012
Figure 11. Distribution of Conformance Error with Respect to Output Voltage
(VOUT) at 25°C vs. RF Input Power (PIN) for Various Temperatures at 0.5 GHz
155–5–15–25 20100–10–20–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
CALIBRATIONAT –25dBm, –10dBm, AND +8dBm
11617-010
Figure 12. Conformance Error and Output Voltage (VOUT) vs.
RF Input Power (PIN) for Various Temperatures at 1 GHz
155–5–15–25 20100–10–20–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
CALIBRATIONAT –25dBm, –10dBm, AND +8dBm
11617-011
Figure 13. Conformance Error and Output Voltage (VOUT) vs.
RF Input Power (PIN) for Various Temperatures at 5 GHz
15
5–5–15–25 2010
0–10–20–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
CALIBRATIONAT –28dBm, –10dBm, AND +10dBm
11617-015
Figure 14. Conformance Error and Output Voltage (VOUT) vs.
RF Input Power (PIN) for Various Temperatures at 10 GHz
20100–10–20–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
155–5–15–25 PIN (dBm)
ERROR (dB)
OUTPUT VOLTAGE (V)
CALIBRATIONAT –25dBm, –10dBm, AND + 8dBm
–55°C
–40°C
+25°C
+85°C
+125°C
11617-013
Figure 15. Distribution of Conformance Error with Respect to Output Voltage
(VOUT) at 25°C vs. RF Input Power (PIN) for Various Temperatures at 1 GHz
Data Sheet ADL6010
Rev. E | Page 11 of 23
20100–10–20–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
155–5–15–25 PIN (dBm)
ERROR (dB)
OUTPUT VOLTAGE (V)
CALIBRATIONAT –25dBm, –10dBm, AND + 8dBm
–55°C
–40°C
+25°C
+85°C
+125°C
11617-014
Figure 16. Distribution of Conformance Error with Respect to Output Voltage
(VOUT) at 25°C vs. RF Input Power (PIN) for Various Temperatures at 5 GHz
2010 150 5–5–10–15–20–25–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
CALIBRATIONAT –28dBm, –10dBm, AND +10dBm
11617-018
Figure 17. Distribution of Conformance Error with Respect to Output Voltage
(VOUT) at 25°C vs. RF Input Power (PIN) for Various Temperatures at 10 GHz
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
11617-016
155–5–15–25 20100–10–20–30
CALIBRATIONAT –28dBm, –10dBm, AND +10dBm
Figure 18. Conformance Error and Output Voltage (VOUT) vs.
RF Input Power (PIN) for Various Temperatures at 15 GHz
155–5–15–25 20100–10–20–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
CALIBRATIONAT –28dBm, –10dBm, AND +8dBm
11617-017
Figure 19. Conformance Error and Output Voltage (VOUT) vs.
RF Input Power (PIN) for Various Temperatures at 20 GHz
155–5–15–25 20100–10–20–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
CALIBRATIONAT –28dBm, –10dBm, AND +8dBm
11617-021
Figure 20. Conformance Error and Output Voltage (VOUT) vs.
RF Input Power (PIN) for Various Temperatures at 25 GHz
2010 150 5–5–10–15–20–25–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
CALIBRATIONAT –28dBm, –10dBm, AND +10dBm
11617-019
Figure 21. Distribution of Conformance Error with Respect to Output Voltage
(VOUT) at 25°C vs. RF Input Power (PIN) for Various Temperatures at 15 GHz
ADL6010 Data Sheet
Rev. E | Page 12 of 23
2010 15
0 5–5
–10–15–20
–25–30
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
CALIBRATIONAT –28dBm, –10dBm, AND +8dBm
11617-020
4
Figure 22. Distribution of Conformance Error with Respect to Output Voltage
(VOUT) at 25°C vs. RF Input Power (PIN) for Various Temperatures at 20 GHz
2010 150 5–5–10–15–20–25–30
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
CALIBRATIONAT –28dBm, –10dBm, AND +8dBm
11617-024
4
Figure 23. Distribution of Conformance Error with Respect to Output Voltage
(VOUT) at 25°C vs. RF Input Power (PIN) for Various Temperatures at 25 GHz
155–5–15–25 20100–10–20–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
CALIBRATIONAT –26dBm, 0dBm, AND +10dBm
11617-022
Figure 24. Conformance Error and Output Voltage (VOUT) vs.
RF Input Power (PIN) for Various Temperatures at 30 GHz
155–5–15–25 20100–10–20–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
CALIBRATIONAT –25dBm, 0dBm, AND +10dBm
11617-023
Figure 25. Conformance Error and Output Voltage (VOUT) vs.
RF Input Power (PIN) for Various Temperatures at 35 GHz
155–5–15
–25 20100–10–20–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
CALIBRATIONAT –20dBm, 0dBm, AND +10dBm
11617-027
Figure 26. Conformance Error and Output Voltage (VOUT) vs.
RF Input Power (PIN) for Various Temperatures at 40 GHz
20100–10–20–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
155–5–15–25 PIN (dBm)
ERROR (dB)
OUTPUT VOLTAGE (V)
11617-025
CALIBRATIONAT –26dBm, 0dBm, AND +10d Bm
–55°C
–40°C
+25°C
+85°C
+125°C
Figure 27. Distribution of Conformance Error with Respect to Output Voltage
(VOUT) at 25°C vs. RF Input Power (PIN) for Various Temperatures at 30 GHz
Data Sheet ADL6010
Rev. E | Page 13 of 23
20100–10–20–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
155–5–15–25 PIN (dBm)
ERROR (dB)
OUTPUT VOLTAGE (V)
11617-026
–55°C
–40°C
+25°C
+85°C
+125°C
CALIBRATIONAT –25dBm, 0dBm, AND +10d Bm
Figure 28. Distribution of Conformance Error with Respect to Output Voltage
(VOUT) at 25°C vs. RF Input Power (PIN) for Various Temperatures at 35 GHz
155–5–15–25 2010
0–10–20–30
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
CALIBRATIONAT –20dBm, 0dBm, AND +10dBm
11617-030
Figure 29. Conformance Error and Output Voltage (VOUT) vs.
RF Input Power (PIN) for Various Temperatures at 43.5 GHz
1412108642
5000
4000
3000
2000
1000
0
OFF SET (mV)
COUNT
REPRESENTS MORE THAN 11,000 PARTS
11617-028
Figure 30. Distribution of VOUT Offset with No Applied PIN at 25°C
1.981.921.861.801.741.681.62
5000
4000
3000
2000
1000
0
OUTPUT VOLTAGE (V)
COUNT
11617-029
REPRESENTS MORE THAN
11,000 PARTS
Figure 31. Output Voltage (VOUT) Distribution, PIN = 9 dBm at 12 GHz, 25°C
1.921.841.761.681.601.52
3500
3000
2500
2000
1500
1000
500
0
QUI E S CE NT CURRENT (mA)
COUNT
REPRESENTS MORE THAN 11,000 PARTS
11617-031
Figure 32. Distribution of Quiescent Current at 25°C
0.280.270.260.250.240.230.22
5000
4000
3000
2000
1000
0
OUTPUT VOLTAGE (V)
COUNT
REPRESENTS MORE
THAN 11,000 PARTS
11617-032
Figure 33. Output Voltage (VOUT) Distribution, PIN = −9 dBm at 12 GHz, 25°C
ADL6010 Data Sheet
Rev. E | Page 14 of 23
0
0.5
1.0
1.5
2.0
2.5
3.0
00.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10
OUTPUT VOLTAGE (V)
TIME (µs)
1GHz BURST REFERENCE
+10dBm
0dBm
–10dBm
–20dBm
11617-034
Figure 34. RF Burst Input Response, Rising Edge (see Figure 37 in the
Measurement Setups Section)
–30
–25
–20
–15
–10
–5
0
5
10
–0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
00.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
SUPPLY VOLTAGE (V)
OUTPUT VOLTAGE (V)
TIME (µs)
–20dBm
–10dBm
0dBm
+10dBm
VPOS PULSE
11617-033
Figure 35. VPOS Turn-On Pulse Response (see Figure 38 in the Measurement
Setups Section)
0
0.5
1.0
1.5
2.0
2.5
3.0
0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 1.301.25
OUTPUT VOLTAGE (V)
TIME (µs)
1GHz BURST REFERENCE
+10dBm
0dBm
–10dBm
–20dBm
11617-035
Figure 36. RF Burst Input Response, Falling Edge (see Figure 37 in the
Measurement Setups Section)
Data Sheet ADL6010
Rev. E | Page 15 of 23
MEASUREMENT SETUPS
ROHDE & S CHWARZ
SIGNAL GENERATOR
SMR 40
ADL6010
EVALUATION
BOARD
PULSE IN
RF OUT RFIN
VPOS
1MΩ
TRIGGER
VOUT
HP E3631A
POWER
SUPPLY
AGI LENT 33522A
FUNCTION/ARBITRARY
WAV E FORM GENERATO R
CH2
CH1
TEKTRONIX
DIGITAL PHOSPHOR
OSCILLOSCOPE
TDS5104
11617-036
Figure 37. Hardware Configuration for Output Response to RF Burst Input
Measurements
AD8017
ON UG -128
EVALUATION
BOARD
+2
11617-038
ROHDE & S CHWARZ
SIGNAL GENERATOR
SMR 40
ADL6010
EVALUATION
BOARD
PULSE IN
RF OUT RFIN
1MΩ
TRIGGER
VOUT
AGI LENT 33522A
FUNCTION/ARBITRARY
WAV E FORM GENERATO R
CH2
CH1
TEKTRONIX
DIGITAL PHOSPHOR
OSCILLOSCOPE
TDS5104
VPOS
Figure 38. Hardware Configuration for Output Response to Power Supply
Gating Measurements
RF
SOURCE
(CARRIER)
RF
SOURCE
(MODULATION)
ADL5390
(RF VECTOR
MULTIPLIER)
DC CONTROL
ADL5545
(RF GAIN
BLOCK)
DIRECTIONAL
COUPLER
SPECTRUM
ANALYZER
REF
–10dB
RFIN
ADL6010
EVALUATION
BOARD
VOUT
TEKTRONIX
DIGITAL PHOSPHOR
OSCILLOSCOPE
TDS5104
FET PROBE
(2pF,1MΩ)
11617-037
Figure 39. Hardware Configuration for Envelope Output Response
Measurement
ADL6010 Data Sheet
Rev. E | Page 16 of 23
THEORY OF OPERATION
The ADL6010 uses eight Schottky diodes in a novel two path
detector topology. One path responds during the positive half
cycles of the input, and the second responds during the negative
half cycles of the input, thus achieving full wave rectification. This
arrangement presents a constant input impedance throughout
the full RF cycle, thereby preventing the reflection of even-
order distortion components back toward the source, which is a
well-known limitation of the widely used traditional single
Schottky diode detectors.
Eight diodes are arranged on the chip in such a way as to minimize
the effect of chip stresses and temperature variations. They are
biased by small keep alive currents chosen in a trade-off between
the inherently low sensitivity of a diode detector and the need to
preserve envelope bandwidth. Thus, the corner frequency of the
front-end low-pass filtering is a weak function of the input
level. At low input levels, the −3 dB corner frequency is at
approximately 0.5 GHz. The overall envelope bandwidth is
limited mainly by the subsequent linearizing and output
circuitry.
At small input levels, all Schottky diode detectors exhibit an
extremely weak response which approximates a square law
characteristic (having zero slope at the origin). For large inputs,
the response approaches a linear transfer function. In the
ADL6010, this nonlinearity and variations in the response are
corrected using proprietary circuitry having an equally shaped
but inverse amplitude function, resulting in an overall envelope
response that is linear across the whole span of input levels.
The composite signal is buffered and presented at the output
pin (VOUT). The transfer function relating the instantaneous
RF voltage amplitude to the quasi-dc output is a scalar constant
of a little over ×2. This scalar constant is mainly determined by
ratios of resistors, which are independent of temperature and
process variations. Errors associated with the minuscule voltages
generated by the Schottky front-end under low level conditions,
and other errors in the nonlinear signal processing circuitry, are
minimized by laser trimming, permitting accurate measurement
of RF input voltages down to the millivolts level. An aspect of
the linear in volts response is that the minimum VOUT is limited by
the ability of the output stage to reach down to absolute zero (the
potential on the COMM pin) when using a single positive supply.
DC voltages at the input are blocked by an on-chip capacitor.
The two ground pins (RFCM) on either side of RFIN (Pin 5)
form part of an RF coplanar waveguide (CPW) launch into
the detector. The RFCM pins must be connected to the signal
ground. Give careful attention to the design of the PCB in this
area.
The envelope voltage gain of the ADL6010 is nominally
×2.2 V/VPEAK from 1 GHz to 35 GHz. This factor becomes
3.2 V/V when the input signal is specified as the rms voltage of
a CW carrier. For example, a steady −30 dBm input generates a
dc output voltage of 22.5 mV, at which level the output buffer is
able to track the envelope. In fact, the sensitivity at ambient
temperatures typically extends below −30 dBm. However, over
the specified temperature range, the measurement error tends
to increase at the bottom of the specified range.
For large inputs, the voltage headroom in the signal processing
stages limits the measurement range. Using a 5 V supply, the
maximum signal is approximately 3.6 V p-p, corresponding to a
power of 15 dBm, referenced to 50 Ω. Therefore, the ADL6010
achieves a 45 dB dynamic range of high accuracy measurement.
Note that, above 43.5 GHz, accuracy is limited by the package,
PCB, and instrumentation. The RF input interface provides a
broadband (flat) 50 Ω termination without the need for
external components. Although the input return loss inevitably
degrades at very high frequencies, the slope of the transfer
function holds near 2.2 V/VPEAK up to 35 GHz, owing to the
voltage responding behavior of the ADL6010.
Data Sheet ADL6010
Rev. E | Page 17 of 23
BASIC CONNECTIONS
The basic connections are shown in Figure 40. A dc supply of
nominally 5 V is required. The bypass capacitors (C1 and C2)
provide supply decoupling for the output buffer. Place these
capacitors as close as possible to the VPOS pin. The exposed
pad is internally connected to the IC ground and must be
soldered down to a low impedance ground on the PCB. A filter
capacitor (CLOAD) and series resistor (R1) may be inserted to
form a low-pass filter for the output envelope. Small CLOAD
values allow a quicker response to an RF burst waveform, and
high CLOAD values provide signal averaging and noise reduction.
RFIN
RFCM
VOUT
COMM
C
LOAD
(SEE TEXT)
R1
100Ω
11617-040
VPOS
C1
100pF
C2
0.1µF
4
5
6
3
2
1
LINEARIZER
ADL6010
Figure 40. Basic Connections
PCB LAYOUT RECOMMENDATIONS
Parasitic elements of the PCB such as coupling and radiation
limit accuracy at very high frequencies. Ensure faithful power
transmission from the connector to the internal circuit of the
ADL6010. Microstrip and CPW are popular forms of
transmission lines because of their ease of fabrication and low
cost. In the ADL6010 evaluation board, a grounded CPW
(GCPW) minimizes radiation effects and provides the maximum
bandwidth by using two rows of grounding vias on both sides
of the signal trace.
Figure 41 shows the PCB layout of the ADL6010 evaluation
board in detail. Minimize air gaps between the vias to ensure
reliable transmission. Because a certain minimum distance
between two adjacent grounding vias in a single row is needed,
adding a second row of grounding vias on both sides of the
GCPW is recommended. In this way, a much smaller
equivalent air gap between grounding vias is achieved, and
better transmission is accomplished.
GND VIAS
RFIN
PAD
11617-041
Figure 41. ADL6010 Evaluation Board
SYSTEM CALIBRATION AND ERROR CALCULATION
The measured transfer function of the ADL6010 at 10 GHz is
shown in Figure 42. This plots both the conformance error and
the output voltage vs. the input level at +25°C, +85°C, +125°C,
−40°C, and −55°C. Over the input level range from −30 dBm to
+15 dBm, the output voltage varies from approximately 20 mV
to 4.3 V.
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
11617-042
155–5–15–25 20100
–10–20–30
CALIBRATIONAT –20dBm AND +5dBm
Figure 42. Conformance Error and Output Voltage vs. RF Input Power (PIN) for
Various Temperatures (−55°C, −40°C, +25°C, +85°C, and +125°C) at 10 GHz
Using Two Point Calibration
To achieve the highest measurement accuracy, perform
calibration at the board level, as the IC scaling varies from
device to device.
Calibration begins by applying two or more known signal
levels, VIN1 and VIN2, within the operating range of the IC, and
noting the corresponding outputs, VOUT1 and VOUT2. From these
measurements, the slope and intercept of the scaling is extracted.
For a two point calibration, the calculations are as follows:
Slope = (VOUT2 − VOUT1)/(VIN2 − VIN1)
Intercept = VOUT1 − (Slope × VIN1)
where:
Each VIN is the equivalent peak input voltage to RFIN, at a 50 Ω
input impedance.
Once the slope and intercept are calculated and stored, use the
following simple equations to calculate the unknown input power:
VIN_CALCULATED = (VOUT (MEASURED) − Intercept)/Slope
PIN_CALCULATED (dBm) = 10log10(1000 × (VIN_CALCULATED/√2)2/50)
The conformance error is
Error (dB) = PIN_CALCULATED (dBm) − PIN_IDEAL (dBm)
Figure 42 includes a plot of this error at −55°C, −40°C, +25°C,
+85°C, and +125°C when using a two point calibration with
inputs at +5 dBm and –20 dBm. The relative error at these two
calibration points is equal to 0 dB by definition.
ADL6010 Data Sheet
Rev. E | Page 18 of 23
Multipoint calibration can be used to further improve accuracy
and extend the dynamic range. The transfer function is now
broken into segments, with each having its own slope and
intercept. Thus, Figure 43 shows the error plot of the same test
device with calibration input points of −28 dBm, −10 dBm, and
+10 dBm. The three point, dual slope calibration results in
tighter error bounds over the high end of the range and extends
the lower measurement range to −30 dBm for ±1 dB error.
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
11617-043
15
5–5–15–25 2010
0–10–20–30
CALIBRATIONAT –28dBm, –10dBm, AND +10dBm
Figure 43. Conformance Error and Output Voltage vs. RF Input Power (PIN)
and Temperature (−55°C, −40°C, +25°C, +85°C, +125°C) at 10 GHz
Using Three Point Calibration
For the device shown in Figure 43, the change in error with
temperature is very small over the upper 25 dB of the
measurement range, being ±0.4 dB, and widens at lower power
levels, reaching ±0.9 dB over the −10 dBm to −20 dBm segment.
High volume production samples may perform better.
For comparison, the three point calibration of a second device
is shown in Figure 44 using the same frequency and calibration
points. This sample has greater dynamic range, and the
temperature dependence of error at lower power levels is
inverted relative to the first device.
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–55°C
–40°C
+25°C
+85°C
+125°C
11617-044
155–5–15–25 20100–10–20–30
CALIBRATIONAT –28dBm, –10dBm, AND +10dBm
Figure 44. 10 GHz Conformance Error and Output Voltage vs. RF Input Power
(PIN) for Second Device at +25°C, −40°C, −55°C, +85°C, and +125°C
Figure 45 shows the conformance error at 10 GHz for four
devices at +25°C, −40°C, and +85°C using a three point
calibration at input levels of −28 dBm, −10 dBm, and +10 dBm.
The error plots at each temperature were calculated with
respect to the slope and intercept values extracted from the
25°C line in each case. This calculation is consistent with a typical
production scenario where calibration at only one temperature
is used. Figure 45 illustrates the various error scenarios possible
at low input levels. The dynamic range of the three point
calibrated devices extends to −30 dBm for ±1.0 dB error at
25°C.
4
3
2
1
0
–1
–2
–3
–4
10
1
0.1
0.01
0.001
P
IN
(d Bm)
ERROR (dB)
OUTPUT VOLTAGE (V)
–40°C
+25°C
+85°C
11617-045
155–5–15–25 20100–10–20–30
CALIBRATIONAT –28dBm, –10dBm, AND +10dBm
Figure 45. 10 GHz Conformance Error and Output Voltage vs. RF Input Power
(PIN) at +25°C, +85°C, and −40°C for Multiple Devices
Data Sheet ADL6010
Rev. E | Page 19 of 23
EFFECT OF A CAPACITIVE LOAD ON RISE TIME
AND FALL TIME
The ADL6010 can measure both the instantaneous envelope
power and the average power of an RF signal. When VOUT is
unloaded, the output follows the envelope of the input tracking
bandwidths up to 40 MHz. By adding a simple RC circuit to the
basic connections circuit as shown in Figure 40, the output
signal can be averaged using single pole filtering.
In applications where the response bandwidth is fairly low,
place a large shunt capacitor, CLOAD, directly on the VOUT pin.
Figure 46 shows how rise time and fall time depend on CLOAD
when the ADL6010 is driven by a square wave modulated RF
input at a carrier frequency of 1 GHz.
0.001
0.01
0.1
1
10
100
1000
0.01 0.1 110 100 1000
RISING TIME/FALLING TIME (µs)
CLOAD (nF)
FALL TIME (µs)
90% TO 10%
RISE TIME (µs)
10% TO 90%
11617-046
Figure 46. Rising Time/Falling Time vs. CLOAD for a 1 GHz Modulated Pulsed
Waveform with PIN = 0 dBm
ADL6010 Data Sheet
Rev. E | Page 20 of 23
EVALUATION BOARD
The ADL6010-EVALZ is a fully populated, 4-layer, Rogers
4003-based evaluation board. For normal operation, it only
requires a 5 V supply connected to VPOS and GND. The RF
input signal is accepted at a high performance 2.92 mm
connector (RFIN). The output voltage is available on the SMA
connector (VOUT) or on the test loop (V_OUT). Configuration
options for the evaluation board are listed in Table 4.
RFIN
RFCM
RFIN
RFCM
PAD
VPOS
VOUT
COMM
VOUT
C1
DNI
C2
DNI
R1
100Ω
GND
11617-047
VPOS
C4
100pF
C3
0.1µF
R2
100Ω
4
5
3
2
1
ADL6010
6
V_OUT
Figure 47. ADL6010 Evaluation Board Schematic
Table 4. Evaluation Board Configuration Options
Component Function/Comments Default Value
R1, R2 Output interfaces. Use a 100 Ω series resistor when driving highly capacitive loads. R2 can be
replaced with a 0 Ω resistor.
R1 = 100 Ω (0402 size),
R2 = 100 Ω (0402 size)
C1, C2 Output load capacitors. Capacitive load at the output that provides the option of tailoring the
RF burst response time. The pads of the capacitors are left open by default.
C1, C2 = open
C3, C4 Bypass capacitors. The capacitors provide supply ac decoupling by forming a return path for the
ac signal and reducing the noise reaching the input circuitry. The typical value is 0.1 µF.
C3 = 0.1 µF (0402 size),
C4 = 100 pF (0402 size)
RFIN RF input. Southwest Microwave 2.92 mm connector is used for input interface. To prevent the
potential damage of the connectors, 2.92 mm (K type) cables are recommended.
ADL6010 Data Sheet
Rev. E | Page 22 of 23
OUTLINE DIMENSIONS
1.70
1.60
1.50
0.425
0.350
0.275
TOP VIEW
SIDE VIEW
6
1
4
3
0.35
0.30
0.25
BOTTOM VIEW
0.60
0.55
0.50
1.10
1.00
0.90
0.20 REF
0.05 M AX
2.10
2.00 SQ
1.90 0. 65 BS C
EXPOSED
PAD
FO R P ROPE R CONNECT IO N O F
THE EXPOSED PAD, REFER TO
THE P IN CO NFIGURAT ION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
02-04-2019-B
PKG-004062
SEATING
PLANE
PIN 1
INDIC ATORAR EAOPTIO NS
(SEEDETAIL A)
PIN 1
INDICATOR
AREA
COPLANARITY
0.08
0.15 M I N
DETAIL A
(JEDEC 95)
Figure 50. 6-Lead Lead Frame Chip Scale Package [LFCSP]
2.00 mm × 2.00 mm Body and 0.55 mm Package Height
(CP-6-7)
Dimensions shown in millimeters
04-14-2020-A
1.230
0.630
0.155
0.196
0.124
0.185
0.061
0.305
SIDE VIEW
0.185
0.122
0.066 ×0.137
(Pads 1, 4, 6)
0.066 ×0.157
TOP VIEW
(CIRCUIT SI DE)
0.846
0.6200.107
0.089
0.086
0.066 ×0.066
0.069 ×0.066
Figure 51. 6-Pad Bare Die [CHIP]
(C-6-14)
Dimensions shown in millimeters
Data Sheet ADL6010
Rev. E | Page 23 of 23
ORDERING GUIDE
Model1 Temperature Range Package Description
Package
Option
Ordering
Quantity
Marking
Code
ADL6010ACPZN −40°C to +85°C 6-Lead Lead Frame Chip Scale Package [LFCSP] CP-6-7 1 C1
ADL6010ACPZN-R2 −40°C to +85°C 6-Lead Lead Frame Chip Scale Package [LFCSP] CP-6-7 250 C1
ADL6010ACPZN-R7 −40°C to +85°C 6-Lead Lead Frame Chip Scale Package [LFCSP] CP-6-7 3000 C1
ADL6010SCPZN −55°C to +125°C 6-Lead Lead Frame Chip Scale Package [LFCSP] CP-6-7 1 Q23
ADL6010SCPZN-R2 −55°C to +125°C 6-Lead Lead Frame Chip Scale Package [LFCSP] CP-6-7 250 Q23
ADL6010SCPZN-R7 −55°C to +125°C 6-Lead Lead Frame Chip Scale Package [LFCSP] CP-6-7 3000 Q23
ADL6010-CHIPS −40°C to +85°C 6-Pad Bare Die [CHIP] CP-6-14 50
ADL6010-EVALZ Evaluation Board 1
1 Z = RoHS Compliant Part.
©2014–2020 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D11617-4/20(E)
