UC2842A/3A/4A/5A
UC3842A/3A/4A/5A
March 1999
HIGH PERFORMANCE CURRENT MOD E PWM CONTRO LLER
.TRIMMED OSCILLATOR DISCHARGE CUR-
RENT
.CURRENT MODE OP ER A TION TO 500kHz
.AUTOMATIC FEED FORWARD COMPENSA-
TION
.LATCHING PWM FOR CYCLE-BY-CYCLE
CURRENT LIMITING
.INTERNALLY TRIMMED REFERENCE WITH
UNDERVOLTAGE LOCKOUT
.HIGH CURRENT TOTE M P OLE OU TPUT
.UNDERVOL TAGE LOCKOUT WITH HYSTE R-
ESIS
.LOW START- UP CURRE NT ( < 0.5m A )
.DOUBLE PULSE SUPPRESSION
DESCRIPTION
The UC384xA family of control ICs provides the nec-
essary features to implement off-line or DC to DC
fixe d freq uency c urren t m ode co ntrol s chemes with
a minimal external parts count. Internally imple-
men ted cir cuits i nclude a trimm ed oscil lator fo r pre-
cise DUTY CYCLE CONTROL under voltage lock-
out featuring start-up current less than 0.5mA, a pre-
cision reference trimmed for accuracy at the error
amp input, logic to insure la tche d operation, a PWM
comparator which also provides current limit control,
and a tot em pole output stage designed to source
or sink high peak current. The output stage, suitable
for driving N-Channel MOSFETs, is low in the off-
state.
Differenc es between members of this family are the
under-voltage lockout thres holds and maximum duty
cycle ranges. The UC3842A and UC3844A have
UVLO thresholds of 16V (on) and 10V (off), ideally
suited off-line applications The corresponding thresh-
olds for the UC3843A and UC3845A are 8.5 V and
7.9V. The UC3842A and UC3843A can operate to
duty cycles approaching 100%. A range of the zero to
< 50 % is obtained by the UC3844A and UC3845A by
the addition of an internal toggle flip flop which blanks
the output off every other clock c ycle.
BLOCK DIAGRAM (toggle flip flop used only in UC3844A and UC3845A)
UVLO
S/R 5V
REF
34V
INTERNAL
BIAS
VREF GOOD
LOGIC
2.50V
T
S
R
OSC
R1V
CURRENT
SENSE
COMPARATOR
2R
+
-PWM
LATCH
7
5
4
2
1
3
8
6
ERROR AMP.
Vi
GROUND
RT/CT
VFB
COMP
CURRENT
SENSE
VREF
5V 50mA
OUTPUT
D95IN331
Minidip
®
SO8
UC3842A
1/15
*All voltages are with respect to pin 5, all current s are pos iti ve into the specified terminal.
PIN CONNECTION (top view)
COMP
V
FB
I
SENSE
R
T
/C
T
GROUND
OUTPUT
Vi
V
REF
1
3
2
4
6
5
7
8
D95IN332
Minidip/SO8
ORDERING NUMBERS
SO8 Minidip
UC2842AD1; UC3842AD1
UC2843AD1; UC3843AD1
UC2844AD1; UC3844AD1
UC2845AD1; UC3845AD1
UC2842AN; UC3842AN
UC2843AN; UC3843AN
UC2844AN; UC3844AN
UC2845AN; UC3845AN
ABSOL UTE M AXIMUM RA TINGS
Symbol Parameter Value Unit
ViSupply Voltage (low impedance source) 30 V
ViSupply Voltage (Ii < 30mA) Self Limiting
IOOutp ut Cur re nt ±1A
EOOutput Energy (capacitive load) 5 µJ
Analog Inputs (pins 2, 3) – 0.3 to 5.5 V
Error Amplifier Output Sink Current 10 mA
Ptot Power Dissipation at Tamb ≤ 25 °C (Minidip) 1.25 W
Ptot Power Dissipation at Tamb ≤ 25 °C (SO8) 800 mW
Tstg Storage Temperature Range – 65 to 150 °C
TJJunction Operating Temperature – 40 to 150 °C
TLLead Temperature (soldering 10s) 300 °C
PIN F U NCTIONS
No Function Description
1 COMP This pin is the Error Amplifier output and is m ade available for loop compensation.
2V
FB This is the inverting input of the Error Amplifier. It is normally connected to the switching
power supply output through a resistor divider.
3I
SENSE A voltage proportional to inductor current is connected to this input. The PWM uses this
information to terminate the output switch conduction.
4R
T
/CTThe oscillator frequency and maximum Output duty cycle are programmed by connecting
resistor RT to Vref and cpacitor CT to ground. Operation to 500kHz is possible.
5 GROUND This pin is the combined control circuitry and power ground.
6 OUTPUT This output directly drives the gate of a power MOSFET. Peak currents up to 1A are sourced
and sunk by this pin.
7V
CC This pin is the positive supply of the control IC.
8V
ref This is the reference output. It provides charging current for capacitor C T through resistor RT.
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
2/15
ELECT RICAL C HARACTE RISTIC S ( [note 1] Unles s otherwi se stated, these spec ifications app ly for
-25 < Tamb < 85°C for UC284XA ; 0 < Tamb < 70°C for UC384XA; Vi = 15V (not e 5) ; R T = 10K; CT = 3.3nF)
Symbol Parameter Test Conditions UC284XA UC384XA Unit
Min. Typ. Max. Min. Typ. Max.
REFERENCE SECTION
VREF Output Voltage Tj = 25°C Io = 1mA 4.95 5.00 5.05 4.90 5.00 5.10 V
∆VREF Line Regulation 12V ≤ Vi ≤ 25V 220 220mV
∆
V
REF Load Regulation 1 ≤ Io ≤ 20mA 325 325mV
∆
V
REF/∆TTemperature Stability (Note 2) 0.2 0.2 mV/°C
Total Output Variation Line, Load, Temperature 4.9 5.1 4.82 5.18 V
eNOutput Noise Voltage 10Hz ≤ f ≤ 10KH z Tj = 25°C
(note 2) 50 50 µV
Long Term Stability Tamb = 125°C, 1000Hrs
(note 2) 525 525mV
I
SC Output Short Circuit -30 -100 -180 -30 -100 -180 mA
OSCILLATOR SECTION
fOSC Frequency Tj = 25°C47 52 57 47 52 57 KHz
∆fOSC/∆VFrequen cy Cha nge wit h V olt. VCC = 12V to 25V – 0.2 1 – 0.2 1 %
∆fOSC/∆TFrequency Change with Temp. TA = Tlow to T high –5––5–%
V
OSC Oscillator Voltage Swing (peak to peak) – 1.6 – – 1.6 – V
Idischg Discharge Current (VOSC =2V) TJ = 25°C 7.8 8.3 8.8 7.8 8.3 8.8 mA
ERROR AMP SECTION
V2Input Voltage VPIN1 = 2.5V 2.45 2.50 2.55 2.42 2.50 2.58 V
IbInput Bias C urrent VFB = 5V -0.1 -1 -0.1 -2 µA
AVOL 2V ≤ Vo ≤ 4V 65 90 65 90 dB
BW Unity Gain Bandwidth TJ = 25°C 0.7 1 0.7 1 MHz
PSRR Power Supply Rejec. Ratio 12V ≤ Vi ≤ 25V 60 70 60 70 dB
IoOutput Sink Current VPIN2 = 2.7V VPIN1 = 1.1V 2 12 2 12 m A
IoOutput Source Current VPIN2 = 2.3V VPIN1 = 5V -0.5 -1 -0.5 -1 m A
VOUT High VPIN2 = 2.3V;
RL = 15KΩ to Ground 5 6.2 5 6.2 V
VOUT Low VPIN2 = 2.7V;
RL = 15KΩ to Pin 8 0.8 1.1 0.8 1.1 V
CURRENT SENSE SECTION
GVGain (note 3 & 4) 2.85 3 3.15 2.85 3 3.15 V/V
V3Maximum Input Signal VPIN1 = 5V (note 3) 0.9 1 1.1 0.9 1 1.1 V
SVR Supply Voltage Rejection 12 ≤ Vi ≤ 25V (note 3) 70 70 dB
IbInput Bias C urrent -2 -10 -2 -10 µA
Delay to Output 150 300 150 300 ns
THERMAL D ATA
Symbol Description Minidip SO8 Unit
Rth j- a mb Thermal Resistance Junction-ambient. max. 100 150 °C/W
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
3/15
Notes : 1. Max packa ge power d issipati on l imits must be respected; low duty cycle pul se t echniq ues are used during test mai ntain Tj as
close to Tamb as possib le.
2. These parameters , although guarant e ed, are not 100% test ed in product i on.
3. P aram eter m eas ured a t tri p poi nt of la tch wit h V PIN2 = 0.
4. Gain def ined as :
∆ VPIN1
A = ; 0 ≤ VPIN3 ≤ 0.8 V
∆ VPIN3
5. A dj ust Vi above the sta rt th reshold bef ore set ti ng at 15 V .
ELE CTRIC AL CH ARACT E RIS T ICS ( co nt inu ed)
Symbol Parameter Test Conditions UC284XA UC384XA Unit
Min. Typ. Max. Min. Typ. Max.
OUTPUT SECTION
VOL Output Low Level ISINK = 20mA 0.1 0.4 0.1 0.4 V
ISINK = 200mA 1.6 2.2 1.6 2.2 V
VOH Output High Level ISOURCE = 20mA 13 13.5 13 13.5 V
ISOURCE = 200mA 12 13.5 12 13.5 V
VOLS UVLO Saturation VCC = 6V; ISINK = 1mA 0.7 1.2 0.7 1.2 V
trRise Time Tj = 25°C CL = 1nF (2) 50 150 50 150 ns
tfFall Time Tj = 25°C CL = 1nF (2) 50 150 50 150 ns
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold X842A/4A 15 16 17 14.5 16 17.5 V
X843A/5A 7.8 8.4 9.0 7.8 8.4 9.0 V
Min Operating Voltage
After Turn-on X842A/4A 9 10 11 8.5 10 11.5 V
X843A/5A 7.0 7.6 8.2 7.0 7.6 8.2 V
PWM SECTION
Maximum Duty Cy cle X842A/3A 94 96 100 94 96 100 %
X844A/5A 474850474850 %
Minimum Duty Cycle 0 0 %
TOTAL STANDBY CURRENT
Ist Start-up Current Vi = 6.5V for UCX843A/45A 0.3 0.5 0.3 0.5 m A
Vi = 14V for UCX842A/44A 0.3 0.5 0.3 0.5 m A
IiOperating Supply Current VPIN2 = VPIN3 = 0V 12 17 12 17 m A
Viz Zener Voltage Ii = 25mA 30 36 30 36 V
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
4/15
Figure 1: Open L oop T e st Circui t.
R
T
A2N2222
4.7KΩ
1KΩ
ERROR AMP.
ADJUST
4.7KΩ5KΩ
I
SENSE
ADJUST
100KΩCOMP
V
FB
I
SENSE
R
T
/C
T
1
2
3
4
C
T
7
6
5
8
V
REF
V
i
OUTPUT
GROUND
0.1µF
0.1µF
V
REF
V
i
OUTPUT
GROUND
1W
1KΩ
D95IN343
High peak currents associated with capacitive loads
necessitate careful grounding techniques. Timing
and bypass capacitors should be connected close
to pi n 5 i n a single point ground. The t ra ns is tor and
5 KΩ potentiometer are used to sample the oscillator
wav ef or m a nd ap ply an adjustable ram p to pin 3.
300 1K 3K 10K 30K R
T
(Ω)
1K
10K
100K
1M
f
o
(Hz)
D96IN362
CT=470pF
1nF
2.2nF
4.7nF
Figure 2: Oscillator Frequency vs Timing Resis-
tance
300 1K 3K 10K 30K R
T
(Ω)
0
20
40
60
f
o
(Hz)
D96IN363
80
Figure 3: Maximum Duty Cycle vs Timing Resis-
tor
UC3842A
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
5/15
-55 -25 0 25 50 75 100 TA(˚C)
7.0
7.5
8.0
8.5
Idischg
(mA)
D95IN335
V
i
=15V
V
OSC
=2V
Figure 4: Oscillator Discharge Current vs. Tem-
perature.
10 100 1K 10K 100K 1M f(Hz)
-20
0
20
40
60
80
(dB)
180
150
120
90
60
30
φ
D95IN337
V
i
=15V
V
O
=2V to 4V
R
L
=100K
T
A
=25˚C
Gain
Phase
Figure 5: Error Amp Open-Loop Gain and
Phase vs. Frequenc y.
0246V
O
(V)
0.0
0.2
0.4
0.6
0.8
1.0
V
th
(V)
D95IN338
V
i
=15V
T
A
=-40˚C
T
A
=125˚C
T
A
=25˚C
Figu re 6: Current Sense Input T hreshold vs. Er-
ror Amp Output Volt age.
0 20406080100I
ref
(mA)
D95IN339
0
10
20
30
40
50
60
V
i
=15V
T
A
=-40˚C
T
A
=125˚C
T
A
=25˚C
Figure 7: Reference Voltage Change v s.
Source Current.
-55 -25 0 25 50 75 100 T
A
(˚C)
D95IN340
50
60
70
80
90
100
I
SC
(mA) V
i
=15V
R
L
≤0.1Ω
Figu re 8: Reference Short Circuit Current vs.
Temperature.
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
6/15
0 200 400 600 I
O
(mA)
0
1
2
3
-2
-1
V
sat
(V)
D95IN341
V
i
=15V
80µs Pulsed Load 120Hz Rate
T
A
=-40˚C
T
A
=25˚C
V
i
T
A
=-40˚C T
A
=25˚C
GND
Sink Saturation
(Load to V
i
)
Source Saturation
(Load to Ground)
Figure 9: Out put Saturation Voltage vs. Load
Current.
0 102030V
i
(V)
0
5
10
15
20
I
i
(mA)
UCX843/45
UCX842/44
R
T
=10K
C
T
=3.3nF
V
FB
=0V
I
Sense
=0V
T
A
=25˚C
D95IN342
Figure 10: Supply Curr ent vs. Supply Voltage.
Figure 11: Out put Waveform. Figure 12: Output Cross Conduction
5V REG
OSCILLATOR
PWM
CLOCK
8
4
5
6
R
T
C
T
GND
OUTPUT
7
V
i
I
D
CT
OUTPUT
LARGE R
T
/SMALL C
T
CT
OUTPUT
SMALL R
T
/LARGE C
T
D95IN344
Figure 13: Oscillator and Output Waveforms.
Vi =15 V
CL = 1.0nF
TA = 25°C
90%
10%
50ns/DIV
Vi =30V
CL = 15pF
TA = 25°C
VO
ICC
100ns/DIV
100mA/DIV
20V/DIV
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
7/15
Figure 14 : Error A m p C onf ig ura t ion.
Z
i
Z
f
1mA
2
1
V
FB
COMP
2.5V
D95IN345
+
-
Figure 15 : Under V ol t age Lo c ko ut .
UC3842A
UC3844A UC3843A
UC3845A
16V 8.4V
10V 7.6V
V
ON
V
OFF
V
i
ON/OFF COMMAND
TO REST OF IC
7
<0.5mA
<17mA
I
CC
V
CC
V
OFF
V
ON
Fig.15-UC3842A
Figure 16 : Curre nt Se ns e Cir c uit .
ERROR
AMPL. 2R
R1V
CURRENT
SENSE
COMPARATOR
1
CURRENT
SENSE
COMP
CR
S
R3
5
GND
I
S
D95IN347
Peak c ur re nt (i s) is det er m ine d by th e form u la
1.0 V
IS max ≈RS
A small RC fi lter ma y b e re quir ed to s uppres s sw it ch tran si ent s .
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
8/15
Figure 17 : Slop e Com pensation Techniques.
RS
R1
ISRSLOPE CT
RT
VREG 8
RT/CT
ISENSE
4
35
GND RS
R1
IS
RSLOPE CT
RT
VREG 8
RT/CT
ISENSE
4
35
GND
D95IN348
Figure 18 : Isolat ed M OS F E T Drive and Cu rr en t Tr an sfor m er Se ns ing .
7
6
COMP/LATCH
ISOLATION
BOUNDARY
D95IN349
5.0Vref
VCC
+
-
+
-
Q
S
R
+
-
3R
RSNS
C
Vin
Q1
NP
VGS Waveforms
+
0+
0
-- 50% DC 25% DC
Ipk = V(pin 1) -1.4
3RS
NS
NP
()
UC3842A UC3842A
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
9/15
Figure 19 : Latched Shutdown.
D95IN350
BIAS
+
-EA
R
+
OSC
2N
3905
2N
3903
1mA
R
R
2R
1
2
8
4
SCR must be selected for a holding current of less than 0.5mA at T
A(min)
.
The simple two transistor circuit can be used in place of the SCR as shown. All resistors are 10K.
5
D95IN351
+
-EA
R
i
+
1mA
R
d
R
2R
5
C
f
R
f
1
2
From V
O
2.5V
+
-EA
R
P
+
1mA
R
d
R
2R
5
C
f
R
f
1
2
From V
O
2.5V
Error Amp compensation circuit for stabilizing any current-mode topology except
for boost and flyback converters operating with continuous inductor current.
C
P
R
i
Error Amp compensation circuit for stabilizing current-mode boost and flyback
topologies operating with continuous inductor current.
Figure 20: Error Amplifier Compensation
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
10/15
D95IN353
+
-
+
R
A
1
7
f =
R
BIAS
OSC
C
6
V
REF
RR
B
+
-
+
-EA R
2R
R
S
Q
84
5
2
3
5K
5K
5K
NE555
8
4
2
1
5
TO ADDITIONAL
UCX84XAs
1.44
(R
A
+ 2R
B
)C D
max
= R
B
R
A
+ 2R
B
Figure 22: Ext ernal Duty Cycle Clamp and Multi Unit Synchronization.
D95IN352
+
-EA
+
R
2R
5
R
T
1
2
EXTERNAL
SYNC INPUT
The diode clamp is required if the Sync amplitude is large enough to cause
the bottom side of C
T
to go more than 300mV below ground
R
BIAS
OSC
C
T
0.01µF
47Ω
4
8
V
REF
R
Figure 21: Ext ernal Clock Synchronizat ion.
UCX84XAs
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
11/15
D95IN354
+
R
BIAS
OSC
C
R
+
-
+
-EA R
2R
R
S
Q
8
4
2
1
5
1mA
1V
+
-
5V
ref
1MΩ
Figure 23: Soft-Start Cir cuit
D95IN355
+
R
BIAS
OSC
C
R
+
-
+
-EA R
2R
R
S
Q
8
4
2
1
5
1mA
1V
+
-
5V
ref
R2
R1
V
Clamp
+
-
Comp/Latch
7
R
S
V
CC
Q1
V
in
7
6
5
BC109
V
CLAMP
=
·
R
1
R
1
+ R
2
where 0 <V
CLAMP
<1V I
pk(max)
= V
CLAMP
R
S
Figure 24: Soft -Star t and Error Amplifier Output Dut y Cycle Clamp.
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
12/15
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.75 0.069
a1 0.1 0.25 0.004 0.010
a2 1.65 0.065
a3 0.65 0.85 0.026 0.033
b 0.35 0.48 0.014 0.019
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.020
c1 45° (typ.)
D (1) 4.8 5.0 0.189 0.197
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 3.81 0.150
F (1) 3.8 4.0 0.15 0.157
L 0.4 1.27 0.016 0.050
M 0.6 0.024
S8° (max.)
(1) D and F do not include mold flash or protrusions. Mold flash or
potrusions shall not exceed 0.15mm (.006inch).
SO8
OUTLINE AND
MECHANICAL DATA
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
13/15
Minidip
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 3.32 0.131
a1 0.51 0.020
B 1.15 1.65 0.045 0.065
b 0.356 0.55 0.014 0.022
b1 0.204 0.304 0.008 0.012
D 10.92 0.430
E 7.95 9.75 0.313 0.384
e 2.54 0.100
e3 7.62 0.300
e4 7.62 0.300
F 6.6 0.260
I 5.08 0.200
L 3.18 3.81 0.125 0.150
Z 1.52 0.060
OUTLINE AND
MECHANICAL DATA
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
14/15
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the conse-
quences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this
publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMi-
croelectronics products are not authorized for use as critical components in life support devices or systems without express written
approval of STMicr oelectroni cs. The ST logo is a regis tered tra demark of STMi croelec tronics
© 1999 ST Microelec troni cs – Prin ted in Italy – All R ights Res erved
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UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
15/15
