General Description
The MAX8566 high-efficiency switching regulator deliv-
ers up to 10A load current at output voltages from 0.6V
to (0.87 x VIN). The IC operates from 2.3V to 3.6V input
supplies, making it ideal for point-of-load applications.
The total output-voltage set error is less than ±1% over
load, line, and temperature.
The MAX8566 operates in pulse-width-modulation
(PWM) mode with a 250kHz to 2.4MHz switching fre-
quency range that is programmable by an external
resistor. The IC can be synchronized to an external
clock in the same frequency range using the SYNC
input. The high operating frequency minimizes the size
of external components. Using low-RDS(ON) n-channel
MOSFETs for both high- and low-side switches main-
tains high efficiency at both heavy-load and high-
switching frequencies.
The MAX8566 employs a voltage-mode control archi-
tecture with a high-bandwidth (> 10MHz) error amplifi-
er. The voltage-mode control architecture makes
switching frequencies greater than 1MHz possible,
achieving all-ceramic-capacitor designs to minimize PC
board space. The error amplifier works with Type 3
compensation to fully utilize the bandwidth of the high-
frequency switching to obtain fast transient response.
Adjustable soft-start time provides flexibility to minimize
input startup inrush current. An open-drain, power-
good (PWRGD) signal goes high when the output
reaches 90% of its regulation point.
The MAX8566 provides a SYNCOUT output to synchro-
nize a second MAX8566 or a second regulator switch-
ing 180° out-of-phase with the first to reduce the input
ripple current, which consequently reduces the input-
capacitance requirements. The MAX8566 also pro-
vides an external reference input (REFIN) for
output-tracking applications.
The MAX8566 is available in a 32-pin, 5mm x 5mm TQFN
package. The MAX8566 and all the required external
components fit into a footprint of less than 0.80in2.
Applications
ASIC/CPU/DSP Core Voltages
POL Power Supplies
DDR Power Supplies
Base-Station Power Supplies
Fiber Power Supplies
Telecom Power Supplies
Network Power Supplies
Features
oInternal 8mΩ On-Resistance MOSFETs
o10A Output PWM Step-Down Regulator
o±1% Output Accuracy over Load, Line, and
Temperature
oOperates from 2.3V to 3.6V Input Supply
oAdjustable Output from 0.6V to (0.87 x VIN)
o250kHz to 2.4MHz Adjustable Frequency or SYNC
Input
oAllows All-Ceramic-Capacitor Design
oSYNCOUT Drives 2nd Regulator 180° Out-of-Phase
oPrebiased or Monotonic Soft-Start
oProgrammable Soft-Start Time
oOutput Tracking or Sequencing
oSourcing and Sinking Output Current
oPower-Good Output
o32-Lead TQFN Package
oREFIN for DDR-Termination Application
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
________________________________________________________________
Maxim Integrated Products
1
MAX8566ETJ+
STEP-DOWN REGULATOR
TQFN 5mm x 5mm
SS
REFIN
EN
SYNC
FREQ
SYNCOUT
GND
FB
V
DD
LSS
IN
IN
IN
IN
IN
PGND
PGND
PGND
PGND
PGND
LX
LX
LX
LX
LX
LX
LX
LX
BST
PWRGD
COMP
MODE
POWER-GOOD
OUTPUT
MONOTONIC SS
SELECTION
PROGRAMMABLE
FREQUENCY
SYNC INPUT
SYSTEM
ENABLE
SYNC OUTPUT 180°
REFIN FOR
TRACKING
INPUT
2.25V TO 3.6V
OUTPUT
UP TO 10A
L1
330nH/10A
C5
2 x 22µF
6.3V
COMPENSATION
Typical Operating Circuit
Ordering Information
19-3690; Rev 3; 3/11
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
Pin Configuration appears at end of data sheet.
PART TEMP RANGE PIN-PACKAGE
MAX8566ETJ+ -40°C to +85°C 32 TQFN-EP*
+
Denotes lead(Pb)-free/RoHS-compliant package.
*
EP = Exposed pad.
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VIN = VDD = VEN = 3.3V, VFB = 0.5V, VSYNC = 0V, TA= 0°C to +85°C, typical values are at TA= +25°C, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
EN/SS, EN, IN, SYNC, VDD,
LSS, PWRGD to GND ..........-0.3V to +4V (4.5V nonswitching)
SYNCOUT, SS, COMP, FB, REFIN,
FREQ to GND .........................................-0.3V to (VDD + 0.3V)
LX Current (Note 1) .................................................-12A to +12A
BST to LX .................................-0.3V to +4V (4.5V nonswitching)
PGND to GND .......................................................-0.3V to +0.3V
Continuous Power Dissipation (TA= +85°C)
TQFN (derate 33.3mW/°C above +70°C) ..................2666.7W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
PARAMETER CONDITIONS MIN TYP MAX UNITS
IN/VDD
IN and VDD Voltage Range 2.3 3.6 V
LSS Voltage Range 2.3 3.6 V
Quiescent current, VFB = 0.7V 0.7 2.2
IN Supply Current fS = 1MHz, no load 14 mA
Quiescent current, VFB = 0.7V 1.8 4
VDD Supply Current fS = 1MHz, VLSS = VDD 16 mA
TA = +25°C 50
Total Shutdown Current into IN
and VDD
VIN = VDD = VLSS = (VBST - VLX) =
3.6V, VEN = 0V TA = 0°C to +85°C 3 µA
VDD rising 2.0 2.2
VDD Undervoltage-Lockout
Threshold
LX starts/stops switching, 2µs
deglitch VDD falling 1.72 1.90 V
BST
TA = +25°C 10
Shutdown Supply Current VIN = VDD = VBST = 3.6V, VLX =
3.6V or 0V, VEN = 0V TA = 0°C to +85°C 0.05 µA
PWM COMPARATOR
Comparator Propagation Delay 10mV overdrive 20 ns
COMP
Clamp Voltage, High VIN = 2.3V to 3.6V, VFB = 0.7V 1.80 2.0 2.15 V
Slew Rate 0.75 1.4 V/µs
Shutdown Resistance From COMP to GND, VEN = 0V 30 100 Ω
ERROR AMPLIFIER
FB Regulation Voltage VCOMP = 1V to 2V, VDD = 2.5V and 3.3V 0.594 0.6 0.606 V
VDD = 2.3V to 2.6V 0 VDD -
1.65
Error-Amplifier Common-Mode
Input Range
VDD = 2.6V to 3.6V 0 VDD -
1.7
V
Error-Amplifier Maximum Output
Current 0.8 mA
Note 1: LX has internal clamp diodes to PGND and IN. Applications that forward bias these diodes should take care not to exceed
the IC’s package power-dissipation limits.
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VDD = VEN = 3.3V, VFB = 0.5V, VSYNC = 0V, TA= 0°C to +85°C, typical values are at TA= +25°C, unless otherwise noted.)
PARAMETER CONDITIONS MIN TYP MAX UNITS
FB Input Bias Current VFB = 0.7V, TA = +25°C 40 200 nA
REFIN Input Bias Current VREFIN = 0.6V, TA = +25°C 70 250 nA
VDD = 2.3V to 2.6V 0 VDD -
1.65
REFIN Common-Mode Range
VDD = 2.6V to 3.6V 0 VDD -
1.7
V
LX (ALL PINS COMBINED)
VIN = VBST - VLX = 3.3V 8 16
On-Resistance, High Side ILX = -2A VIN = VBST - VLX = 2.5V 12 20 mΩ
VIN = VLSS = 3.3V 8 16
On-Resistance, Low Side ILX = 2A VIN = VLSS = 2.5V 12 20 mΩ
Current-Limit Threshold VIN = 2.5V or 3.3V, high side 12 15 20 A
VLX = 3.6V 5 200
Leakage Current VIN = 3.6V, VEN = 0V,
TA = +25°C VLX = 0V -200 +5 µA
RFREQ = 50kΩ0.8 1 1.2
Switching Frequency VIN = 2.5V or 3.3V RFREQ = 23.3kΩ1.7 2 2.3 MHz
Minimum Off-Time VIN = 2.5V or 3.3V 50 75 ns
Maximum Duty Cycle RFREQ = 50kΩ, VIN = 2.5V or 3.3V 87 95 %
Minimum Duty Cycle RFREQ = 50kΩ, VIN = 2.5V or 3.3V 10 %
RMS LX Output Current 10 A
ENABLE/SOFT-START
EN Input Logic-Low Threshold 0.4 0.7 V
EN Input Logic-High Threshold 1.65 1.90 V
Monotonic start 30 45
MODE Input Threshold VDD = 2.3V to 3.6V No monotonic start 20
% of
VDD
EN, MODE Input Current VEN = VMODE = 0V or 3.6V, VDD = 3.6V, TA = +25°C 0.01 1 µA
Soft-Start Charging Current VSS = 0.3V 5 8 11 µA
SS Discharge Resistance 8kΩ
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VDD = VEN = 3.3V, VFB = 0.5V, VSYNC = 0V, TA= 0°C to +85°C, typical values are at TA= +25°C, unless otherwise noted.)
PARAMETER CONDITIONS MIN TYP MAX UNITS
SYNC
Capture Range VDD = 2.3V to 3.6V 0.25 2.40 MHz
tLO 100
Pulse Width VDD = 2.3V to 3.6V tHI 100 ns
VIH 0.4 0.95
Input Threshold VDD = 2.3V to 3.6V VIL 1 1.6 V
IIH -1 +10
Input Current VSYNC = 0V or 3.6V, VDD = 3.6V IIL, TA = +25°C -1 +0.01 +1 µA
SYNCOUT
Frequency Range VDD = 2.3V to 3.6V 0.25 2.40 MHz
Phase Shift from SYNC or
Internal Oscillator Frequency = 1MHz 160 180 230 D eg r ees
VOH VDD -
0.4
VDD -
0.05
Output Voltage ISYNCOUT = ±1mA,
VDD = 2.3V to 3.6V
VOL 0.05 0.4
V
THERMAL SHUTDOWN
Thermal-Shutdown Threshold When LX stops switching +165 °C
Thermal-Shutdown Hysteresis 20 °C
POWER GOOD
Threshold Voltage VFB falling, 3mV hysteresis 86 90 93
% of
VREFIN
or 0.6V
Falling-Edge Deglitch 30 50 80 µs
Output Low Voltage IPWRGD = 4mA 0.15 0.3 V
Leakage Current VPWRGD = 3.6V, VFB = 0.9V, TA = +25°C 0.01 1 µA
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS
(VIN = VDD = VEN = 3.3V, VFB = 0.5V, VSYNC = 0V, TA= -40°C to +85°C, unless otherwise noted. Note 2)
PARAMETER CONDITIONS MIN TYP MAX UNITS
IN/VDD
IN and VDD Voltage Range 2.325 3.600 V
LSS Voltage Range 2.325 3.600 V
IN Supply Current Quiescent current, VFB = 0.7V 2.2 mA
VDD Supply Current Quiescent current, VFB = 0.7V 4 mA
VDD rising 2.2
VDD Undervoltage-Lockout
Threshold
LX starts/stops switching,
2µs rising/falling-edge delay VDD falling 1.72 V
COMP
Clamp Voltage, High VIN = 2.3V to 3.6V, VFB = 0.7V 1.80 2.18 V
Slew Rate 0.75 V/µs
Shutdown Resistance From COMP to GND, VEN = 0V 100 Ω
ERROR AMPLIFIER
FB Regulation Voltage VCOMP = 1V to 2V, VIN = 2.3V or 3.6V 0.591 0.609 V
VDD = 2.325V to 2.6V 0 VDD -
1.65
Error-Amplifier Common-Mode
Input Range VDD = 2.6V to 3.6V 0 VDD -
1.7
V
Error-Amplifier Maximum Output
Current 0.8 mA
VDD = 2.325V to 2.5V 0 VDD -
1.65
REFIN Common-Mode Range
VDD = 2.6V to 3.6V 0 VDD -
1.7
V
LX (ALL PINS COMBINED)
VIN = VBST - VLX = 3.3V 16
On-Resistance, High Side ILX = -2A VIN = VBST - VLX = 2.5V 20 mΩ
VIN = VLSS = 3.3V 15
On-Resistance, Low Side ILX = 2A VIN = VLSS = 2.5V 20 mΩ
Current-Limit Threshold VIN = 2.5V or 3.3V 12 20 A
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
6 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VDD = VEN = 3.3V, VFB = 0.5V, VSYNC = 0V, TA= -40°C to +85°C, unless otherwise noted. Note 2)
PARAMETER CONDITIONS MIN TYP MAX UNITS
RFREQ = 50kΩ0.8 1.2
Switching Frequency VIN = 2.5V or 3.3V RFREQ = 23.3kΩ1.7 2.3 MHz
Minimum Off-Time VIN = 2.5V or 3.3V 90 ns
Maximum Duty Cycle RFREQ = 50kΩ, VIN = 2.5V or 3.3V 87 %
RMS Output Current 10 A
ENABLE/SOFT-START
EN Input Logic-Low Threshold 0.7 V
EN Input Logic-High Threshold 1.65 V
Monotonic start 30 45
MODE Input Threshold VIN = 2.3V to 3.6V No monotonic start 20
% of
VDD
EN, MODE Input Current VEN or VMODE = 0V or 3.6V, VDD = 3.6V 1 µA
Soft-Start Charging Current VSS = 0.3V 5 12 µA
SYNC
Capture Range VIN = 2.3V to 3.6V 0.25 2.40 MHz
tLO 100
Pulse Width VIN = 2.3V to 3.6V tHI 100 ns
VIH 0.4
Input Threshold VIN = 2.3V to 3.6V VIL 1.6 V
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
_______________________________________________________________________________________ 7
Note 2: Specifications to -40°C are guaranteed by design and not production tested.
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VDD = VEN = 3.3V, VFB = 0.5V, VSYNC = 0V, TA= -40°C to +85°C, unless otherwise noted. Note 2)
PARAMETER CONDITIONS MIN TYP MAX UNITS
SYNCOUT
Frequency Range VDD = 2.3V to 3.6V 0.25 2.40 MHz
Phase Shift from SYNC or
Internal Oscillator Frequency = 1MHz 160 230 Degrees
VOH VDD -
0.4
Output Voltage ISYNCOUT = ±1mA,
VDD = 2.3V to 3.6V
VOL 0.4
V
POWER-GOOD
Threshold Voltage VFB falling, 3mV hysteresis 85 93 % of
VREF
Fal l i ng - E d g e D eg l i tch 30 80 µs
PWRGD Output Voltage IPWRGD = 4mA 0.3 V
Typical Operating Characteristics
(Typical values are at VIN = VDD = 3.3V, VOUT = 1.8V, RFREQ = 50kΩ, IOUT = 10A, and TA= +25°C.)
EFFICIENCY vs. LOAD CURRENT
VIN = VLSS = 3.3V
MAX8566 toc01
LOAD CURRENT (A)
EFFICIENCY (%)
101
65
70
75
80
85
90
95
100
60
0.1 100
VOUT = 2.5V
VOUT = 1.8V
EFFICIENCY vs. LOAD CURRENT
VIN = VLSS = 2.5V
MAX8566 toc02
LOAD CURRENT (A)
EFFICIENCY (%)
101
65
70
75
80
85
90
95
100
60
0.1 100
VOUT = 1.8V
VOUT = 1.5V
EFFICIENCY vs. LOAD CURRENT
VIN = 2.5V, VLSS = 3.3V
MAX8566 toc03
LOAD CURRENT (A)
EFFICIENCY (%)
101
65
70
75
80
85
90
95
100
60
0.1 100
VOUT = 1.8V
VOUT = 1.5V
VOUT = 0.8V
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
8 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(Typical values are at VIN = VDD = 3.3V, VOUT = 1.8V, RFREQ = 50kΩ, IOUT = 10A, and TA= +25°C.)
REFERENCE VOLTAGE vs. TEMPERATURE
MAX8566 toc04
TEMPERATURE (°C)
REFERENCE VOLTAGE (V)
80400
0.56
0.57
0.58
0.59
0.60
0.61
0.62
0.63
0.64
0.65
0.55
-40 120
0
0.5
1.5
1.0
2.0
2.5
-40 10-15 35 60 85
FREQUENCY vs. TEMPERATURE
MAX8566 toc05
TEMPERATURE (°C)
FREQUENCY (MHz)
RFREQ = 23.3kΩ
RFREQ = 50kΩ
RFREQ = 100kΩ
-0.40
-0.30
-0.35
-0.20
-0.25
-0.10
-0.15
-0.05
0.05
0
0.10
0 23415679810
LOAD REGULATION
MAX8566 toc06
LOAD CURRENT (A)
OUTPUT VOLTAGE CHANGE (%)
VOUT = 2.5V
VOUT = 1.8V
VOUT = 0.8V
0
2
1
4
3
6
5
7
9
8
10
0 1.0 1.50.5 2.0 2.5 3.0 3.5 4.0
SHUTDOWN SUPPLY CURRENT
vs. INPUT VOLTAGE
MAX8566 toc07
INPUT VOLTAGE (V)
SHUTDOWN SUPPLY CURRENT (µA)
VEN = 0V
10.0
11.0
10.5
12.0
11.5
13.0
12.5
13.5
14.5
14.0
15.0
0.5 0.9 1.1 1.30.7 1.5 1.7 1.9 2.32.1 2.5
MAXIMUM OUTPUT CURRENT
vs. OUTPUT VOLTAGE
MAX8566 toc08
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (A)
-80
-30
70
20
120
0426810
EXPOSED PADDLE TEMPERATURE
vs. LOAD CURRENT
MAX8566 toc09
LOAD CURRENT (A)
EXPOSED PADDLE TEMPERATURE (°C)
MAX8566 EV KIT PCB
200LFM
TA = +85°C
TA = +25°C
TA = -40°C
-0.5
-0.2
-0.3
-0.4
0
-0.1
0.4
0.3
0.2
0.1
0.5
2.25 2.50 2.75 3.00 3.25 3.50 3.75 4.00
LINE REGULATION
MAX8566 toc10
INPUT VOLTAGE (V)
OUTPUT VOLTAGE CHANGE (%)
ILOAD = 0A
ILOAD = 4.5A
ILOAD = 10A
6.0
7.0
6.5
8.0
7.5
8.5
9.0
9.5
10.0
2.25 2.65 2.852.45 3.05 3.25 3.45 3.65 3.85
OUTPUT SHORT-CIRCUIT CURRENT
vs. INPUT VOLTAGE
MAX8566 toc11
INPUT VOLTAGE (V)
OUTPUT SHORT-CIRCUIT CURRENT (A)
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
_______________________________________________________________________________________
9
IOUT
(2A/div)
VOUT
AC-COUPLED
(50mV/div)
5A
0
t = 10µs/div
LOAD TRANSIENT (0 TO 5A)
MAX8566 toc13
0A
IL
(2A/div)
VOUT
(10mV/div)
VLX
(2V/div)
12A
10A
3V
0V
t = 400ns/div
FULL-LOAD SWITCHING WAVEFORMS
MAX8566 toc14
0V
IIN
(5A/div)
VEN
(2V/div)
VOUT
(1V/div)
VPWRGD
(2V/div)
7A
(PEAK)
0A
3.3V
0V
1.8V
3V
0V
t = 400µs/div
STARTUP INTO 0.18Ω LOAD
(RLOAD = 0.18Ω)
MAX8566 toc15
0°
0dB
GAIN
(10dB/div)
PHASE
(45°/div)
1 10 100 1000
GAIN/PHASE OF THE VOLTAGE LOOP
MAX8566 toc12
FREQUENCY (kHz)
56°
147 kHz
Typical Operating Characteristics (continued)
(Typical values are at VIN = VDD = 3.3V, VOUT = 1.8V, RFREQ = 50kΩ, IOUT = 10A, and TA= +25°C.)
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
10 ______________________________________________________________________________________
0V
IIN
(5A/div)
VREFIN
(500mV/div)
VOUT
(1V/div)
VPWRGD
(2V/div)
6.5A
0A
0.6V
0V
1.8V
3V
0V
t = 400µs/div
SOFT-START WITH REFIN
MAX8566 toc16
0V
IIN
(AC-COUPLED)
(20mA/div)
IL1
(2A/div)
IL2
(2A/div)
VLX2
(5V/div)
VLX1
(5V/div)
3.3V
0A
0A
0V
3.3V
t = 400ns/div
SYNCHRONIZED OPERATION (NO LOAD)
MAX8566 toc17
0
200
100
300
600
700
500
400
800
0 23451 678910
SOFT-START TIME
vs. SOFT-START CAPACITANCE
MAX8566 toc18
CSS (µF)
SOFT-START TIME (ms)
t = 400µs/div
STARTUP INTO PREBIASED OUTPUT
(RLOAD = 0.18Ω)
MAX8566 toc19
0V
0.9V
IIN
(5A/div)
VEN
(12V/div)
VOUT
(1V/div) VPWRGD
(2V/div)
7.5A
(PEAK)
0A
3.3V
0V
1.8V
3V
0V
Typical Operating Characteristics (continued)
(Typical values are at VIN = VDD = 3.3V, VOUT = 1.8V, RFREQ = 50kΩ, IOUT = 10A, and TA= +25°C.)
MAX8566
Pin Description
PIN NAME FUNCTION
1 MODE
Monotonic Startup Enable/Disable. Connect MODE to GND or to the center tap of an external
resistor-divider to enable/disable monotonic startup mode.
2 COMP
Error-Amplifier Output. Connect the necessary compensation network from COMP to FB. COMP is
internally pulled to GND when the IC is in shutdown mode.
3 PWRGD
Power-Good Output. Open-drain output that is high impedance when VFB 90% of 0.6V. Otherwise,
PWRGD is internally pulled low. PWRGD is internally pulled low when the IC is in shutdown mode,
VDD is below the UVLO threshold, or the IC is in thermal shutdown.
4 BST
High-Side MOSFET Driver Supply. Bypass BST to LX with a 0.1µF capacitor. BST is connected to
LSS through an internal pMOS switch.
5–12 LX
Inductor Connection. All LX pins are internally connected together. Connect all LX pins to the
switched side of the inductor. LX is high impedance when the IC is in shutdown mode.
13–17 PGND
Power Ground. All PGND pins are internally connected. Connect all PGND pins externally to the
power ground plane.
18–22 IN
Input Power Supply. All IN pins are internally connected. Connect all IN pins externally to an input
supply from 2.3V to 3.6V. Bypass IN to PGND with 20µF of ceramic capacitance.
23 LSS Low-Side MOSFET-Driver Supply Voltage. Connect LSS to a 2.3V to 3.6V supply voltage.
24 VDD IC Supply Voltage Input. Connect VDD to IN through an external 2 resistor. Bypass VDD to GND
with a 4.7µF capacitor.
25 REFIN
External Reference Input. Connect to an external reference. FB regulates to the voltage at REFIN.
Connect REFIN to SS to use the internal reference.
26 SS
Soft-Start Input. Connect a capacitor from SS to GND to set the soft-start time. See the Soft-Start and
REFIN section.
27 EN
Enable Input. Active-high logic input to enable/disable the MAX8566. Connect EN to IN to enable
the IC. Connect EN to GND to disable the IC.
28 SYNC
Synchronization Input. Synchronize to an external clock with a frequency of 250kHz to 2.4MHz.
Leave SYNC unconnected to disable the synchronization function.
29 FREQ
Oscillator Frequency Selection. Connect a resistor from FREQ to GND to select the switching
frequency. See the Frequency Select (FREQ) section.
30 SYNCOUT
Oscillator Output. The SYNCOUT output is 180° out-of-phase from the internal oscillator or the
SYNC signal to facilitate running a second regulator 180° out-of-phase with the first to reduce input
ripple current.
31 GND Analog Circuit Ground
32 FB
Feedback Input. Connect FB to the center tap of an external resistor-divider from the output to GND
to set the output voltage.
— EP
Exposed Pad. Internally connected to GND. Connect to a large ground plane to maximize thermal
performance. Not indented as an electrical connection point.
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
______________________________________________________________________________________ 11
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
12 ______________________________________________________________________________________
SHUTDOWN
CONTROL
MAX8566
BST
EN
SS
REFIN
FB
COMP
IN
LX
PGND
LSS
MODE
SYNC
PWRGD
GND
LX
LSS
VDD
+
-
+
-
BIAS
GENERATOR
VOLTAGE
REFERENCE
SOFT-START THERMAL
SHUTDOWN
FREQ
SYNCOUT
OSCILLATOR
COMP LOW
DETECTOR
CONTROL
LOGIC
PWM
COMPARATOR
ERROR
AMPLIFIER
UVLO
CIRCUITRY CURRENT-LIMIT
COMPARATOR
ILIM THRESHOLD
N
P
N
N
FB
0.54V
SHDN
Figure 1. Functional Diagram
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
______________________________________________________________________________________ 13
Detailed Description
The MAX8566 high-efficiency, voltage-mode switching
regulator is capable of delivering up to 10A of output
current. The MAX8566 provides output voltages from
0.6V to (0.87 x VIN) from 2.3V to 3.6V input supplies,
making it ideal for on-board point-of-load applications.
The output voltage accuracy is better than ±1% over
load, line, and temperature.
The MAX8566 features a wide switching frequency
range, allowing the user to achieve all-ceramic-capaci-
tor designs and faster transient responses. The high
operating frequency minimizes the size of external
components. The MAX8566 also features a wide 2.3V
to 3.6V input voltage range, making it ideal for point-of-
load applications with both 3.3V and 2.5V input volt-
ages. The MAX8566 is available in a small (5mm x
5mm), 32-pin TQFN package. The SYNCOUT function
allows end users to operate two MAX8566s at the same
switching frequency with 180° out-of-phase operation
to minimize the input ripple current, consequently
reducing the input capacitance requirements. The
REFIN function makes the MAX8566 an ideal candidate
for DDR and tracking power supplies. Using internal
low-RDS(ON) (8mΩ) n-channel MOSFETs for both high-
and low-side switches maintains high efficiency at both
heavy-load and high-switching frequencies. In addition,
the MAX8566 features a low-side-driver supply input
(LSS) to boost the efficiency with a higher driver volt-
age (3.3V) for 2.5V input applications.
The MAX8566 employs the voltage-mode control archi-
tecture with a high bandwith (> 10MHz) error amplifier.
The voltage-mode control architecture allows above
2MHz switching, reducing board area. The op-amp
voltage error amplifier works with Type 3 compensation
to fully utilize the bandwidth of the high-frequency
switching to obtain fast transient response. Adjustable
soft-start time provides flexibilities to minimize input
startup inrush current. An open-drain power-good
(PWRGD) output goes high when VFB reaches 0.54V.
Principle of Operation
The controller logic block is the central processor that
determines the duty cycle of the high-side MOSFET
under different line, load, and temperature conditions.
Under normal operation, where the current limit and
temperature protection are not triggered, the controller
logic block takes the output from the PWM comparator
and generates the driver signals for both high-side and
low-side MOSFETs. The break-before-make logic and
the timing for charging the bootstrap capacitors are
calculated by the controller logic block. The error signal
from the voltage error amplifier is compared with the
ramp signal generated by the oscillator at the PWM
comparator and thus the required PWM signal is pro-
duced. The high-side switch is turned on at the begin-
ning of the oscillator cycle and turns off when the ramp
voltage exceeds the VCOMP signal or the current-limit
threshold is exceeded. The low-side switch is then
turned on for the remainder of the oscillator cycle.
Current Limit
The internal, high-side MOSFET has a typical 15A peak
current-limit threshold. When current flowing out of LX
exceeds this limit, the high-side MOSFET turns off and
the synchronous rectifier turns on. The synchronous
rectifier remains on until the inductor current falls below
the low-side current limit. This lowers the duty cycle
and causes the output voltage to droop until the current
limit is no longer exceeded.
The MAX8566 uses a hiccup mode to prevent over-
heating during short-circuit output conditions. The
device enters hiccup mode when VFB drops below
420mV and the current limit is reached. The IC turns off
for 3.4ms and then enters soft-start. If the short-circuit
condition remains after the soft-start time, the IC shuts
down for another 3.4ms. The IC repeats this behavior
until the short-circuit condition is removed.
Soft-Start and REFIN
The MAX8566 utilizes an adjustable soft-start function
to limit inrush current during startup. An 8µA (typ) cur-
rent source charges an external capacitor connected to
SS to increase the capacitor voltage in a controlled
manner. The soft-start time is adjusted by the value of
the external capacitor from SS to GND. The required
capacitance value is determined as:
where tSS is the required soft-start time in seconds.
The MAX8566 also features an external reference input
(REFIN). The IC regulates FB to the voltage applied to
REFIN. The internal soft-start is not available when
using an external reference. A method of soft-start
when using an external reference is shown in Figure 2.
Connect REFIN to SS to use the internal 0.6V reference.
CAt
V
SS
=×8
06
µ
.
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
14 ______________________________________________________________________________________
Undervoltage Lockout (UVLO)
The UVLO circuitry inhibits switching when VDD is
below 2V. Once VDD rises above 2V, UVLO clears and
the soft-start function activates. A 100mV hysteresis is
built in for glitch immunity.
Monotonic Startup Modes (MODE)
When starting up into a precharged output, the MAX8566
does not discharge the output prior to entering soft-start
(known as monotonic startup). Drive MODE to 1/3 of VDD
to enable monotonic startup mode. Connect MODE to
GND to disable monotonic startup mode.
High-Side MOSFET Driver Supply (BST)
The gate-drive voltage for the high-side, n-channel
switch is generated by a flying-capacitor boost circuit.
The capacitor between BST and LX is charged from the
VLSS supply while the low-side MOSFET is on. When
the low-side MOSFET is switched off, the stored voltage
of the capacitor is stacked above LX to provide the
necessary turn-on voltage for the high-side internal
MOSFET.
Frequency Select (FREQ)
The switching frequency is resistor programmable from
250kHz to 2.4MHz. Set the switching frequency of the
IC with a resistor from FREQ to GND (RFREQ). RFREQ is
calculated as:
where fSis the desired switching frequency in Hz.
SYNC Function (SYNC, SYNCOUT)
The MAX8566 features a SYNC function that allows the
switching frequency to be synchronized to any frequen-
cy between 250kHz to 2.4MHz. Drive SYNC with a
Rk
sf s
FREQ s
=×
⎛
⎝
⎜⎞
⎠
⎟
−
50
095
1005
Ω
..
µµ
IN
LSS
IN
IN
IN
IN
LX
BST
LX
LX
LX
LX
23
18
19
20
21
28
22
5
4
6
7
8
LX 10
SYNCOUT 30
26
LX 11
LX 12
PGND 17
PGND 16
PGND 15
PGND 14
PGND 13
32
2
9
24
3
VDD
PWRGD
27
1
25
29
31
EN
MODE
REFIN
SYNC
FREQ
GND
FB
COMP
SS
MAX8566
VIN
2.3V TO 3.6V
VOUT
1.8V AT 10A
POWER-GOOD
OUTPUT
C3
0.22µF
R7
16.9kΩ
C9
330pF
C10
22pF
C8
120pF
3300pF
C5
0.047µFL1
0.47µH
C4
1µF
R2
20kΩ
R17
20kΩ
R18
10kΩ
R5
24.9kΩ
R4
100Ω
R6
12.4kΩ
2kΩ
R3
50kΩ
R1
10Ω
C2
10µF
C6
22µF
C7
22µF
C11
0.022µF
C1
10µF
C24
OPEN
Figure 3. Typical Application Circuit
Figure 2. Soft-Start Implementation with External Reference
MAX8566
REFIN
C
R2
R1
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
______________________________________________________________________________________ 15
square wave at the desired synchronization frequency.
A rising edge on SYNC triggers the internal SYNC cir-
cuitry. The frequency of the input into SYNC must be
higher than the internal oscillator frequency set by
RFREQ. Leave SYNC disconnected to disable the func-
tion and operate on the internal oscillator.
The MAX8566 has a SYNCOUT output that generates a
clock signal that is 180° out-of-phase with its internal
oscillator, or the signal applied to SYNC. This allows for
another regulator to be synchronized 180° out-of-phase
to reduce the input ripple current.
Power-Good Output (PWRGD)
PWRGD is an open-drain output that goes high imped-
ance once the soft-start ramp has concluded, provided
VFB is above 0.54V. PWRGD pulls low when VFB is
below 0.54V for at least 50µs. PWRGD is low during
shutdown.
Low-Side MOSFET Driver Supply (LSS)
The MAX8566 provides an external input for the low-
side MOSFET driver supply (LSS). This allows for high-
er gate-drive voltages to maximize converter efficiency
at low input voltages.
Shutdown Mode
Drive EN to GND to shut down the IC and reduce qui-
escent current to 4µA. During shutdown, the output is
high impedance. Drive EN high to enable the
MAX8566.
Thermal Protection
Thermal-overload protection limits total power dissipa-
tion in the device. When the junction temperature
exceeds TJ = +165°C a thermal sensor forces the
device into shutdown, allowing the die to cool. The ther-
mal sensor turns the device on again after the junction
temperature cools by 20°C, causing a pulsed output
during continuous overload conditions. The soft-start
sequence begins after a thermal-shutdown condition.
Applications Information
VDD Decoupling
To decrease the noise effects due to the high switching
frequency and maximize the output accuracy of the
MAX8566, decouple VDD with a 4.7µF capacitor from
VDD to GND and a 2Ωresistor from VDD to VIN. Place
the capacitor as close to VDD as possible.
Inductor Design
Choose an inductor with the following equation:
where LIR is the ratio of the inductor ripple current to
average continuous current at the minimum duty cycle.
Choose the LIR between 20% to 40% for best perfor-
mance and stability.
Use a low-loss inductor with the lowest possible DC
resistance that fits in the allotted dimensions. Powered
iron ferrite core types are often the best choice for per-
formance. With any core material the core must be
large enough not to saturate at the peak inductor cur-
rent (IPEAK). Calculate IPEAK as follows:
Output Capacitor Selection
The key selection parameters for the output capacitor
are capacitance, ESR, ESL, and voltage rating require-
ments. These affect the overall stability, output ripple
voltage, and transient response of the DC-DC convert-
er. The output ripple occurs due to variations in the
charge stored in the output capacitor, the voltage drop
due to the capacitor’s ESR, and the voltage drop due to
the capacitor’s ESL. Calculate the output voltage ripple
due to the output capacitance, ESR, and ESL as:
VRIPPLE = VRIPPLE(C) + VRIPPLE(ESR) + VRIPPLE(ESL)
where the output ripple due to output capacitance,
ESR, and ESL are:
VI
Cf
VIE
RIPPLE C PP
OUT s
RIPPLE ESR P P
()
()
=××
=×
−
−
8
SSR
VI
tESL
or V
RIPPLE ESL PP
ON
RIPPLE ESL
()
()
=×
=
−
II
tESL whichever is greater
PP
OFF
−×,.
ILIR I
PEAK OUT MAX
=+
⎛
⎝
⎜⎞
⎠
⎟×12()
LVVV
fV LIRI
OUT IN OUT
sIN OUTMA
=×
()
×××
−
( XX)
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
16 ______________________________________________________________________________________
The peak inductor current (IP-P) is:
Use these equations for initial capacitor selection.
Determine final values by testing a prototype or an
evaluation circuit. A smaller ripple current results in less
output voltage ripple. Since the inductor ripple current
is a factor of the inductor value, the output voltage rip-
ple decreases with larger inductance. Use ceramic
capacitors for low ESR and low ESL at the switching
frequency of the converter. The low ESL of ceramic
capacitors makes ripple voltages negligible.
Load-transient response depends on the selected out-
put capacitance. During a load transient, the output
instantly changes by ESR x ILOAD. Before the controller
can respond, the output deviates further, depending on
the inductor and output capacitor values. After a short
time (see the
Typical Operating Characteristics
), the
controller responds by regulating the output voltage
back to its predetermined value. The controller
response time depends on the closed-loop bandwidth.
A higher bandwidth yields a faster response time, pre-
venting the output from deviating further from its regu-
lating value. See the
Compensation Design
section for
more details.
Input Capacitor Selection
The input capacitor reduces the current peaks drawn
from the input power supply and reduces switching
noise in the IC. The impedance of the input capacitor at
the switching frequency should be less than that of the
input source so high-frequency switching currents do
not pass through the input source but are instead
shunted through the input capacitor. High source
impedance requires high input capacitance. The input
capacitor must meet the ripple-current requirement
imposed by the switching currents. The RMS input rip-
ple current is given by:
where IRIPPLE is the input RMS ripple current.
Compensation Design
The power transfer function consists of one double pole
and one zero. The double pole is introduced by the out-
put filtering inductor, L, and the output filtering capaci-
tor, CO. The ESR of the output filtering capacitor
determines the zero. The double pole and zero fre-
quencies are given as follows:
where RLis equal to the sum of the output inductor’s
DCR and the internal switch resistance, RDS(ON). A
typical value for RDS(ON) is 8mΩ. ROis the output load
resistance, which is equal to the rated output voltage
divided by the rated output current. ESR is the total
equivalent series resistance of the output filtering
capacitor. If there is more than one output capacitor of
the same type in parallel, the value of the ESR in the
above equation is equal to that of the ESR of a single
output capacitor divided by the total number of output
capacitors.
The high switching frequency range of the MAX8566
allows the use of ceramic output capacitors. Since the
ESR of ceramic capacitors is typically very low, the fre-
quency of the associated transfer-function zero is high-
er than the unity-gain crossover frequency, fC, and the
zero cannot be used to compensate for the double pole
created by the output filtering inductor and capacitor.
The double pole produces a gain drop of 40dB and a
phase shift of 90 degrees per decade. The error ampli-
fier must compensate for this gain drop and phase shift
to achieve a stable high-bandwidth closed-loop sys-
tem. Therefore, use Type 3 compensation as shown in
Figure 4. Type 3 compensation possesses three poles
and two zeros with the first pole, fP1_EA, located at zero
frequency (DC). Locations of other poles and zeros of
the Type 3 compensation are given by:
The above equations are based on the assumptions
that C1>>C2, and R3>>R2, which are true in most
applications. Placement of these poles and zeros is
fRC
fRC
f
ZEA
ZEA
PEA
1
2
2
1
211
1
233
1
2
_
_
_
=××
=××
=×
π
π
πRRC
fRC
PEA
12
1
223
3
×
=××
_π
ff
LC R ESR
RR
f
PLC P LC
OO
OL
Z
12
1
2
__
_
==
×× × +
+
⎛
⎝
⎜⎞
⎠
⎟
π
EESR O
ESR C
=××
1
2π
II VVV
V
RIPPLE LOAD
OUT IN OUT
IN
=× ×
()
−
IVV
fL
V
V
PP IN OUT
s
OUT
IN
−
−
=××
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
______________________________________________________________________________________ 17
determined by the frequencies of the double pole and
ESR zero of the power transfer function. It is also a func-
tion of the desired closed-loop bandwidth. The following
section outlines the step-by-step design procedure to
calculate the required compensation components.
Begin by setting the desired output voltage. The output
voltage is set using a resistor-divider from the output to
GND with FB at the center tap (R3 and R4 in Figure 4).
Use 20kΩfor R4 and calculate R3 as:
The zero-cross frequency of the closed-loop, fC, should
be less than 20% of the switching frequency, fS.
Higher zero-cross frequency results in faster transient
response. It is recommended that the zero-cross fre-
quency of the closed loop should be chosen between
10% and 20% of the switching frequency. Once fCis
chosen, C1 is calculated from the following equation:
where VP-P is the ramp peak-to-peak voltage (1V typ).
Due to the underdamped nature of the output LC dou-
ble pole, set the two zero frequencies of the Type 3
compensation less than the LC double-pole frequency
to provide adequate phase boost. Set the two zero fre-
quencies to 80% of the LC double-pole frequency.
Hence:
Set the second compensation pole, fP2_EA, at fZ_ESR
yields:
Set the third compensation pole at 1/2 of the switching
frequency to gain some phase margin. Calculate R2 as
follows:
The above equations provide accurate compensation
when the zero-cross frequency is significantly higher
than the double-pole frequency. When the zero-cross
frequency is near the double-pole frequency, the actual
zero-cross frequency is higher than the calculated fre-
quency. In this case, lowering the value of R1 reduces
the zero-cross frequency. Also, set the third pole of the
Type 3 compensation close to the switching frequency
if the zero-cross frequency is above 200kHz to boost
the phase margin. Note that the value of R4 can be
altered to make the values of the compensation compo-
nents practical. The recommended range for R4 is
10kΩto 50kΩ.
PCB Layout Considerations
and Thermal Performance
The MAX8566EVKIT provides an optimal layout and
should be followed closely. For custom design, follow
these guidelines:
1) Place decoupling capacitors (VDD and SS) as close
to the IC as possible. Keep the power ground plane
(connected to PGND) and signal ground plane (con-
nected to GND) separate.
RCf
S
21
3
=××π
CC C ESR
R C C ESR
O
O
21
11
=××
××
−
CR
L C R ESR
RR
OO
LO
31
08 3
=×××× +
()
+.
RC
L C R ESR
RR
OO
LO
11
08 1
=×××× +
()
+.
C
V
V
fR
R
R
IN
PP
CL
O
1
1 5625
231
=
×
××× × +
⎛
⎝
⎜⎞
⎠
⎟
.
-
π
RR V
V
OUT
34 06 1=×
⎛
⎝
⎜⎞
⎠
⎟
−
.
LX
FB
R1
R4
R2
R3
C1
C3
C2
COMP
MAX8566
L
Figure 4. Type 3 Compensation Network
2) Connect input and output capacitors to the power
ground plane; connect all other capacitors to the sig-
nal ground plane.
3) Keep the high-current paths as short and wide as
possible. Keep the path of switching current short
and minimize the loop area formed by LX, the output
capacitors, and the input capacitors.
4) Connect IN, LX, and PGND separately to a large
copper area to help cool the IC to further improve
efficiency and long-term reliability.
5) Ensure all feedback connections are short and
direct. Place the feedback resistors and compensa-
tion components as close to the IC as possible.
6) Route high-speed switching nodes away from sensi-
tive analog areas (FB, COMP).
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
18 ______________________________________________________________________________________
FREQUENCY
THE FIRST AND
SECOND ZEROS
COMPENSATION
TRANSFER
FUNCTION
POWER-STAGE
TRANSFER FUNCTION
DOUBLE POLE
THE SECOND
POLE
THE THIRD
POLE
OPEN-LOOP
GAIN
GAIN
(dB)
Figure 5. Transfer Function for Type 3 Compensation
MAX8566
Chip Information
PROCESS: BiCMOS
1234567
10
11
12
13
14
15
16
31
30
29
28
27
26
+
25
MAX8566
THIN QFN
TOP VIEW
SS
REFIN
EN
SYNC
FREQ
SYNCOUT
GND *EP
32
*CONNECT EP TO GND.
FB
V
DD
LSS
IN
IN
IN
IN
IN
PGND
PGND
PGND
PGND
PGND
LX
LX
LX
9LX
LX
LX
8
24 23 22 21 20 19 18 17
LX
LX
BST
PWRGD
COMP
MODE
Pin Configuration
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
______________________________________________________________________________________ 19
Package Information
For the latest package outline information and land patterns,
go to www.maxim-ic.com/packages. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
32 TQFN-EP T3255+4 21-0140 90-0012
MAX8566
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 6/05 Initial release —
1 2/09 Made corrections to Ordering Information, Pin Description, Compensation Design section,
Pin Configuration, and Package Information
1, 11, 17,
19, 20, 21
2 12/10 Modified the Typical Application Circuit (Figure 3) to change the 2.4kΩ resistor to 2kΩ14
3 3/11 Corrected error in C1 equation and added descriptive verbiage 17
