Microsemi makes no warranty, representation, or guarantee regarding the information contained herein or the suitability of its products and services for any particular purpose, nor does Microsemi assume any liability
whatsoever arising out of the application or use of any product or circuit. The products sold hereunder and any other products sold by Microsemi have been subject to limited testing and should not be used in conjunction
with mission-critical equipment or applications. Any performance specifications are believed to be reliable but are not verified, and Buyer must conduct and complete all performance and other testing of the products, alone
and together with, or installed in, any end-products. Buyer shall not rely on any data and performance specifications or parameters provided by Microsemi. It is the Buyer’s responsibility to independently determine suitability
of any products and to test and verify the same. The information provided by Microsemi hereunder is provided “as is, where is” and with all faults, and the entire risk associated with such information is entirely with the Buyer.
Microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other IP rights, whether with regard to such information itself or anything described by such information. Information provided in
this document is proprietary to Microsemi, and Microsemi reserves the right to make any changes to the information in this document or to any products and services at any time without notice.
miClockBuffer ZL402xx Family
• Clock rates up to 750 MHz
• LVPECL, LVDS, CML, HCSL or LVCMOS inputs
with devices with internal or external input
termination available
• LVPECL or LVDS outputs
• Six fanout combinations—1:2, 1:4, 1:6, 1:8,
2:6, and 2:8
• Ultra-low additive jitter (as low as 39 fs RMS)
miClockBuffer ZL4023x/ZL4024x Family
• Up to three inputs/crystal input/inverted
mesa/high-speed crystal
• Up to 10 LVPECL/LVDS/HCSL or 10 LVCMOS
outputs
• Low skew and ultra-low additive jitter, as low as
25 fs RMS (12kHz to 20 mHz)
• miSmartbuffer ZL4023x/ZL4024x family also
adds a serial port interface and integer dividers
on the LVCMOS outputs
miSmartBuffer ZL4025x Family
• 4 flexible input clocks allow interfacing to a wide
variety of devices—crystal/XO, two differential/
CMOS, and one single-ended/CMOS
• Frequency conversion—each output has
independent divider
• Improve alignment and skew with per-output
skew adjustment, per-output enable/disable
and glitchless start/stop
• Easily interface—each output configurable as
LVDS, LVPECL, HCSL, 2x CMOS, or HSTL
Availability and Support
Microsemi miClockManagement products are
in volume production. To learn more about
Microsemi’s clock fanout buffers, visit https://
www.microsemi.com/products/timing-and-
synchronization/clock-fan-out-buffers.
Full information, including complete datasheets
and design manuals, is available to registered
MyMicrosemi customers.
Microsemi’s portfolio of miClockBuffer™ and miSmartBuffer™ clock fanout
buffers are synergistic with Microsemi's industry-leading timing portfolio—when
combined with miClockSynth™ synthesizers, they can create a simplified,
more reliable, and low-cost complete clock tree that replaces many on-board
multipliers, synthesizers, and oscillators.
Microsemi’s miClockBuffer ZL402xx family of buffers offers six fanout
combinations with LVPECL or LVDS output types and internal and external
terminations. The miClockBuffer and miSmartBuffer ZL4023x and ZL4024x
family of devices are offered in a variety of input and output configurations
including LVPECL, LVDS, HCSL, and LVCMOS. The portolio also includes the
miSmartBuffer ZL4025x family of devices, differentiated from traditional fanout
buffers by compelling features including dividers and configurable outputs.
Applications
• Clock signal fanout, format conversion, frequency division, and skew adjustment
in a wide variety of equipment types, including processors, NPUs, FPGAs, 10G
CDRs, high-speed ADCs and DACs, PCIe interface devices, Ethernet switches,
and PHYs
• Clock trees for optical, OTN, SONET, SDH, WDM, storage, networking, and
broadcast video applications
IEEE 1588/SyncE Clock Tree
miClockManagement Clock Fanout Buffer Product Preview
TXCO ZL40200
1:2 buffer
(SyncE
clock domain)
ZL40200
1:2 buffer
(1588
clock domain)
ZL40252
10 output buffer
(SyncE clock domain)
ZL40252
10 output buffer
(SyncE clock domain)
ZL40252
10 output buffer
(1588 clock domain)
ZL40252
10 output buffer
(1588 clock domain)
ZL40202
1:4 buffer
(SyncE clock domain)
ZL40202
1:4 buffer
(1588 clock domain)
ZL40200
1:2 buffer
(SyncE clock domain)
REF_CLK [0:7]
REF_CLK [8:15]
PTP_CLK [0:7]
PTP_CLK [8:15]
I2C_A
I2C_B
I2C_C
I2C_D
125 MHz
125 MHz
156.25 MHz
25 MHz
PTP_CLK [1:4]
25 MHz TX Ref
25 MHz RX Ref
25 MHz to FPGA
FPGA [0:1]
SYNC [0:3]
ZL40202
1:4 buffer
(1588 clock domain)
1 pps
156.25 MHz
125 MHz OR
GPOUT1
HPOUT8/9
HPOUT2/3
HPOUT6/7
HPOUT0/1
HPOUT4/5
ZL30702
DPLL0
(SyncE clock domain)
DPLL1
(1588 clock domain)
OSCI
REFIN0/1
REFIN2/3
REFIN4/5
REFIN6/7
REFIN9
REFIN8
1 pps
156.25 MHz
156.25 MHz
125 MHz OR
25 MHz
156.25 MHz
125 MHz
Benefits
• Reduces BOM cost and board space—enables designers to create larger
clock trees or simplify small clock trees, leading to significant cost savings
• Increased design efficiency—highly configurable outputs, multiple pin-
compatible variants, and multiple input and output configurations (up to eight
custom configurations can be created with the miSmartBuffer 25x family)
©2017 Microsemi Corporation. All rights reserved. Microsemi and the Microsemi logo are registered trademarks of Microsemi Corporation. All other trademarks
and service marks are the property of their respective owners.
Microsemi Corporation (Nasdaq: MSCC) offers a comprehensive portfolio of semiconductor and system solutions for aerospace
& defense, communications, data center and industrial markets. Products include high-performance and radiation-hardened
analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization
devices and precise time solutions, setting the world’s standard for time; voice processing devices; RF solutions; discrete
components; enterprise storage and communication solutions, security technologies and scalable anti-tamper products;
Ethernet solutions; Power-over-Ethernet ICs and midspans; as well as custom design capabilities and services. Microsemi is
headquartered in Aliso Viejo, California and has approximately 4,800 employees globally. Learn more at www.microsemi.com.
Microsemi Corporate Headquarters
One Enterprise, Aliso Viejo, CA 92656 USA
Within the USA: +1 (800) 713-4113
Outside the USA: +1 (949) 380-6100
Fax: +1 (949) 215-4996
Email: sales.support@microsemi.com
www.microsemi.com
miClockBuffer. 1.0. 05/17
miClockManagement Clock Fanout Buffer Product Preview
miClockBuffer: ZL40234
• 3-to-1 input multiplexer
• Four differential LVPECL/LVDS/HCSL outputs
• One LVCMOS output
• Ultra-low additive jitter: 25 fs (12 kHz to 20 MHz)
• Supports clock frequencies from 0 GHz to 1.6 GHz
• Supports 2.5 V or 3.3 V power supplies
• Embedded low drop out (LDO) voltage regulator
• Maximum output-to-output skew of 50 ps
• Device-controlled hardware control pins
miSmartBuffer: ZL40240
• 3-to-1 input multiplexer
• Ten 1.5 V/1.8 V/2.5 V/3.3 V LVCMOS outputs
• Supports frequencies from 0 MHz to 250 MHz
• Ultra-low additive jitter: 25 fs (12k Hz to 20 MHz)
• Ultra-low noise floor of –170 dBc/Hz
• Supports crystals from 8 MHz to 160 MHz
• Supports 2.5 V or 3.3 V power supplies
• Maximum output-to-output skew of 30 ps
• Input to output delay of 2 ns (typical)
• Device controlled through SPI or hardware control pins
miSmartBuffer: ZL40253
• Four flexible input clocks
• Precise output alignment circuitry controlled by GPIO pin or
register bit with per-output skew adjustment
• Per-output enable/disable and glitchless start/stop (stop high
or low)
• 10 output clocks, each with an internal divider configurable as
LVDS, LVPECL, HCSL, 2x CMOS, or HSTL
• Six flexible power supply banks for 1.5 V/1.8 V/2.5 V/3.3 V
• Create factory-preprogrammed devices with
miClockDesigner™ web tool
ic1
ic2
ic3
oc7
oc9
oc2
oc1
oc4
oc5
oc6
oc
10
oc8
oc3
ZL40253
DIV
DIV
DIV
DIV
DIV
DIV
DIV
DIV
DIV
DIV
EEPROM
Config
and
Status
GPIO/
Alarms
GPIO
Control
Interface
XTAL
Driver
SPI/I2C
ZL40234
HW Control Pins
Xout
Xin
in0_p/n
in1_p/n
XTAL
Driver
out0_p/n
out1_p/n
Bank
A
Bank
B
Div
1 to 8 out4
out2_p/n
out3_p/n
ZL40240
Control
Interface
SPI, Select, and
Enable/Disable
pins
Xout
Xin
in
0_p/n
in
1_p/n
XTAL
Driver
ou
t0
ou
t1
ou
t2
ou
t3
ou
t4
ou
t5
out6
ou
t7
ou
t8
ou
t9
