Intel® NetStructureTM ZT 8101
10/1 00 Et herne t Switch
Technical Product Specification
July 2004
Order Number: 273 837-004
2Intel
® NetStructureTM ZT 8101 10/100 Et her net Swi tch Tech nical Product Specif icati on
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Intel® NetStructureTM ZT 8101 10/100 Ethernet Switch Technic al Pr oduct Specific ati on 3
Contents
Contents
1 Product Over view..........................................................................................................................9
2 PROM Loader...............................................................................................................................11
3 Swi tc h Ma n a geme nt....................................................................................................................13
3.1 Serial Port...........................................................................................................................13
3.2 Te lne t Co n so le................. ....... ............ ....... ............ ....... ............ ....... ............ ....... ................13
3.3 Web Console ......................................................................................................................14
4 Layer 2 Switch Features .............................................................................................................15
4.1 Ethernet Port Configurations ..............................................................................................15
4.1.1 Auto-Negotiation and Force Mod e.........................................................................15
4.1.2 Flow Contr o l............. ....... ............ ....... ....... ............ ....... ............ ....... ....... ............ ....15
4.1.3 Port Security and MAC Address Learning.............................................................16
4.2 Port Mirroring......................................................................................................................16
4.3 Filtering...............................................................................................................................17
4.3.1 IP Ad dress Filtering ...............................................................................................17
4.4 Forwarding..........................................................................................................................17
4.5 Broadcast and Multicas t Storm Control .. ............................................................................18
4.6 Link Aggregation.................................................................................................................18
4.7 Class of Service Support ( CoS)............ ....... ............ ....... ....... .......... ....... ....... ....... ....... .......18
4.7.1 MAC Address Priority ............................................................................................19
4.7.2 Priority Tags...........................................................................................................19
4.7.3 Scheduling.............................................................................................................19
4.8 VLAN Support.....................................................................................................................20
4.8.1 Static Port-Based VLANs.......................................................................................21
4.8.2 Static IEEE 802.1Q VLANs....................................................................................21
4.8.3 Global GVRP Settings ...........................................................................................22
4.8.4 Ingress Checking...................................................................................................22
4.9 GMRP.................................................................................................................................22
4.10 Spannin g Tree Protocol (IEEE 802.1D)..... ....... ............ ....... ............ ....... ............ ....... .........23
4.10.1 Forwarding Data base (Layer 2 Address T able).....................................................23
4.10.2 Path Cost Issue .....................................................................................................23
5 Network Management .................................................................................................................25
5.1 Security...............................................................................................................................25
5.2 IP Interfaces........................................................................................................................25
5.2.1 System IP In terface ... ....... ............ ....... ............ ....... ............ ....... ............ ....... .........25
5.2.2 Additional IP Inter faces............................................. ................... ................. .........25
5.3 SNMP Ag ent.......................................................................................................................26
5.3.1 RFC 1213 (MIB-II) . . ...............................................................................................26
5.3.2 RFC 1493 (Bridge MIB) . ........................................................................................26
5.3.3 RFC 1643 (Ether- Like MIB) ............ .......... ....... ....... ....... ....... ....... ....... .......... ....... ..27
5.3.4 RFC 1757 (RMON)................................................................................................27
5.3.5 RFC 1724 (RIP MIB). .............................................................................................27
5.3.6 RFC 2096 (CIDR MIB)............. ....... ..... ..... .. ....... ..... .. ..... ..... ....... .. ..... .. .......... .. ..... ..27
5.3.7 RFC 2233 (Interface MIB Using SMIv2) ............ ....... .......... ....... .. ....... .......... ....... ..28
4Intel
® NetStructureTM ZT 8101 10/100 Ethernet Swit ch Technical Product Specifi cation
Contents
5.3.8 RFC 2674 (VL AN MIB)..........................................................................................28
5.3.9 Traps......................................................................................................................29
5.4 TFTP Clien t.... ............ ....... ....................... ....... ............ ....... ............ ....... ............ ....... ...........29
5.5 Ping.....................................................................................................................................29
6 Layer 3 Unicast Routing Protocols............................................................................................31
6.1 ARP Tabl e..........................................................................................................................31
6.2 Routing Table.....................................................................................................................31
6.3 Multi-Netting........................................................................................................................31
6.4 RIP v1 and RIP v2..............................................................................................................32
7 Layer 3 Multicast Routing Protocols.........................................................................................33
7.1 Router Ports........................................................................................................................33
7.2 Multicast Forwarding Rules................. ....... ............ ....... ....... ............ ....... ........... ........ ....... .33
7.2.1 Multicast Forwarding within a VLAN..... ....... ............ ....... ....... ............ ....... ............ .33
7.2.2 Multicast Forwarding between VLANs.............. ....... ............ ....... ....... ............ ....... .34
7.2.2.1 Software Forwarding..............................................................................34
7.3 IGMP Queries......... ....... ............ ....... ............ ....... ............ ....... ....... ............ ....... ............ ......35
7.4 IGMP Snooping ......... ........... ....... ............ ....... ........ ........... ....... ............ ....... ............ ....... ....36
7.5 IGMP Group Settings... .......................................................................................................37
7.6 DVMRP...............................................................................................................................37
7.7 P I M Dense Mode (PIM -DM) ...............................................................................................37
8 Miscel laneo us Switch Featu res .................................................................................................39
8.1 User Accounts....................................................................................................................39
8.2 General Switch Informati on..................... ....... ..... ..... ....... .. ..... ....... ..... .. ....... ..... ....... ..... .. ....39
8.3 S wi tch Diagnostics............................. . ....................... .........................................................39
8.3.1 System Memory Diagnostics.................................................................................40
8.3.2 Switch ASIC D iagnostics.. .....................................................................................40
8.4 History Log..........................................................................................................................40
8.5 Reset Configuration to Facto ry Default...............................................................................41
8.6 Firmware Upgrade..............................................................................................................41
8.6.1 Upgrade Runtime through TFTP .......................... ....... .......... ......... ....... .......... ......41
8.6.2 Upgrade Runtime through Zmodem..................... ....... .......... ......... ....... .......... ......42
8.6.2. 1 To upgrade the firmware using Zmod em...............................................42
9 Hardware......................................................................................................................................43
9.1 Design Summary................................................................................................................43
9.2 Physical Board....................................................................................................................43
9.3 Power..................................................................................................................................45
9.4 CompactPCI .......................................................................................................................46
9.5 Power Controller............................................................................................................ .....46
9.6 Regulators..........................................................................................................................46
9.7 Embedded Controller..... ....... ....... ..... ....... ....... .......... .. ....... ....... .......... .. ....... ....... ..... ....... ....46
9.8 Ethernet..............................................................................................................................46
9.9 Local I2C Bus and G PIO....................................................................................................47
9.10 GPIO...................................................................................................................................47
9.11 Rear Panel Connector. .. ....... ..... ....... ....... ....... ..... ....... ....... ..... ....... ....... ....... ..... ....... ....... ....47
9.12 Watchdog............................................................................................................................53
9.13 Clocks.................................................................................................................................53
9.14 Front Panel.........................................................................................................................53
Intel® NetStructureTM ZT 8101 10/100 Ethernet Switch Technic al Pr oduct Specific ati on 5
Contents
9.15 Hot Swap........ ........ ........... ....... ............ ....... ........ ........... ....... ............ ....... ............ ..............54
9.16 Boar d Statu s L ED..... ....... ............ ....... ............ ....... ....... ............ ....... ............ ....... ................54
9.17 Ethernet Channel LEDs......................................................................................................54
9.17 .1 Link/Activity L ED Mode.......... ............ ....... ....... ............ ....... ............ ....... ....... .........55
9.17.2 Link/Speed LE D Mode...........................................................................................55
10 Reliability and Serviceability......................................................................................................57
11 ASIC Tables..................................................................................................................................59
11.1 Fa st Fi l te r Pr o ce sso r... ....... ............ ....... ............ ....... ............ ....... ............ ....... ....... ..............59
11.2 MARL Table........................................................................................................................59
A IEEE St a nd a rds and Pr otocol Compl ia nce ...............................................................................61
B PIC MG Com plianc e .....................................................................................................................63
C Warr anty Inform a tion ..................................................................................................................65
C.1 Intel® NetStructure™ Com pute Boards & Platform Products Limited Warranty.................65
C.1.1 Returning a Defe ctive Pro duct (RMA)....................................................................65
C.1.2 For the Americas ...................................................................................................66
C.1.3 For EMEA..............................................................................................................66
C.1.4 For APAC...............................................................................................................66
D C ustome r Su pp ort .......................................................................................................................69
D.1 Technical Support and Return for Service Assistance .......................................................69
D.2 Sales Assistance ................................................................................................................69
E Specifications ..............................................................................................................................71
E.1 Power Requirements.............. ....... ............ ....... ....... ............ ....... ............ ....... ............ ....... ..71
E.2 Mechanical..........................................................................................................................71
E.3 Environmental.....................................................................................................................71
E.4 Certifications.......................................................................................................................71
E.5 North America (English Required) (FCC Class A)................ ..... ..... .. ..... ....... .. ..... ..... ....... ..72
E.6 Canada – Industry Canada (ICES-003 Class A) (English and French-translated below). .72
F Safety Warnings ..........................................................................................................................73
F.1 Mesures de sÉcuritÉ ...........................................................................................................73
F.2 SICHERHEITSHINWEISE..................................................................................................74
11.3 NORME DI SICUREZZA ....................................................................................................75
F.3 INSTRUCCI ONES DE S EG URIDAD.. ....... ....... ....... ...........................................................76
G S e rial Por t R e q uire m e n t s............................................................................................................77
G.1 Pin Assignments.................................................................................................................77
G.1.1 Building the Cable. ............ ....... ............ ....... ............ ....... ............ ....... .....................78
6Intel
® NetStructureTM ZT 8101 10/100 Ethernet Swit ch Technical Product Specifi cation
Contents
Figures
1 Two-Switch Configuration.............................................................................................................9
2 Switch Block Diagram.................................................................................................................43
3 Front Panel.................................................................................................................................44
4 Power Systems. ............ ....... ............ ....... ............ ....... ............ ....... ....... ............ ....... ....................45
5 Hot Swap LED......... ....... ............ ....... ............ ....... ............ ....... ........................ ....... ....................54
6 Male RJ-4 5 Connector................................................................................................................78
Tables
1 Ethernet Port Characteristics......................................................................................................15
2 Flow Control Ty pe Determinants................... .. ..... .. ..... ..... .. ..... .. ..... ..... ..... .... ..... .. ..... .. ..... ..... .. ....16
3 Hardware Priority Levels Per Port ..............................................................................................19
4 Conditions for Forwarding Tagged Frames................. ....... ....... ....... .......... .. ....... ....... .......... ......22
5 Path Cost....................................................................................................................................23
6 R FC 1213 (MIB-II)................................................................................................ . .....................26
7 R FC 1493 (Bridge MIB). .............................................................................................................26
8 RFC 1643 (Ether-Like MIB).......... ..... ....... ..... ....... .. .......... .. ....... ..... ....... ..... ....... .. ....... ..... ....... ....27
9 RFC 1757 (RMON).....................................................................................................................27
10 RFC 1724 (RIP MIB) .............. .............. . .....................................................................................27
11 RF C 2096 (CIDR MIB)........... ... .. .. ..... .. ... .. ..... .. ... .. .. ..... ... .. .. ..... .. ... .. .. ..... .......... .. .. ..... .. ... .. ..... ......27
12 RF C 2233 (Interface MIB Using SMI v2)........ .. ..... ..... ....... .. ..... .. ..... .. ..... ..... .. ..... .. ..... ..... ....... .. ....28
13 RF C 2674 (VLAN MIB).......... ..... .. ..... .. ..... ..... .. ..... .. ... .. ..... .. ..... .. ..... .. ..... ..... .. ..... .. ... .. .. ..... ..... ......28
14 Traps ..........................................................................................................................................29
15 Rules for Incoming Packets........................................................................................................33
16 Rules for Outgoing Packets........................................................................................................34
17 Forwarding Rules for Incoming Multicast Data...........................................................................34
18 Forwarding Rules for Multicast Data to Ano ther IP Interface .....................................................35
19 P acke t Sequence . ......................................................................................................................36
20 Histor y Log Messages. ...............................................................................................................40
21 V oltage and Current Needs........................................................................................................45
22 IO Devices and Address es.........................................................................................................47
23 GPIO Assignments.....................................................................................................................47
24 J1 Pin Out..................................................................................................................................47
25 B ackp lane Pin Descriptions........................................................................................................48
26 J2 Pi n Out......... ............ ....... ............ ....... ............ ....... ............ ....... ............ ....... ........... ................49
27 J3 Pi n Out......... ............ ....... ............ ....... ............ ....... ............ ....... ............ ....... ........... ................50
28 J4 Pi n Out......... ............ ....... ............ ....... ............ ....... ............ ....... ............ ....... ........... ................51
29 J5 Pi n Out......... ............ ....... ............ ....... ............ ....... ............ ....... ............ ....... ........... ................52
30 Front Pan el Items.......................................................................................................................53
31 Boar d Sta tu s L ED......... ............ ....... ............ ....... ....................... ....... ............ ....... ............ ...........54
32 LED Descr i p tions..... ....... ....... ............ ....... ............ ....... ........................ ....... ............ ....... .............55
33 Link/ Speed LE D Mode. ...............................................................................................................55
34 MARL Table................................................................................................................................59
35 I EEE Standards Support ............................................................................................................61
36 PICMG Compliance....................................................................................................................63
37 RJ-45 Pin Assig n me n ts..... ....... ....... ............ ....... ............ ....... ........... ........ ........... ....... ........ ........77
38 DB- 9 Pin Ass ign men ts.............. ....... ............ ....... ............ ....... ........... ........ ........... ....... ................77
Intel® NetStructureTM ZT 8101 10/100 Ethernet Switch Technic al Pr oduct Specific ati on 7
Contents
Revision History
Date Revision Description
June 2004 004 Added MTBF data.
May 2004 003 Removed reference to redundancy.
June 2003 002 Updates to Warranty, Customer Support and Certifications
sections.
December 2002 001 Initial release of this document.
8Intel
® NetStructureTM ZT 8101 10/ 100 Ethernet Swit ch Technical Product Specification
Contents
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Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 9
Product Over view
Product Overview 1
The Intel® NetStructure™ ZT 8101 10/100 Ethernet switch is a managed E thernet switch fabric
board, which is des igned to fit in a 6U, CompactPCI* f orm fact or and which conforms to the
PICMG* 2. 16 spec ifications .
The ZT 8101 switch is a 24-port 100Mbps Ethernet swi tch with two GbE . There are two GbE and
two 10/100Mbps uplin k ports on the front panel. Twenty-two 10/100Mbps Et hernet ports are
routed to the backplane to provide conne ctions to 19 node slots, two CMM sl ots, and a redundant
switch slot. The printed circuit board dimens ion is 233 mm (H) x 160 mm (D).
The diagram be low shows that two swit ches can be conne cted over the backplane to no de slots in a
dual s tar configuration as specified in PICMG 2.1 6.
Figure 1. Two-Switch Configuration
Internet
Back End
Sw itc h A
Sw itc h B
External
External
Switch
Node 3
Node 4
-------
--------
Node 19
Node 2
Node 1
CMM 1 C MM 2
CMM: Chassis Management Module
Chassis
Ethernet Link A
IPMB
RS232
RS232
Ethernet Link B
Switch
10 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Product Over view
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Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 11
PROM Loader
PROM Loader 2
After the system b o o t s, the first p r o g ram executed is th e PROM lo ader. The PRO M l o ader
performs the following tasks:
•Runs syste m memory diagnostics.
•Decompresses RUNTIME from FLASH to s ystem memory for ex ecution.
•Upgrade s firmware. Users can upgrade RUNTIME using the Zmodem protocol through the
RS-232 port. For instructions, see See “Firmware Upgrade” on page 41.
12 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
PROM Loader
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Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 13
Switch Management
Switch Management 3
The ZT 8101 switch has three methods for configuring switch paramet ers and viewing switch
status and statistics.
3.1 Serial Port
The switch has a serial port on the f ront panel to which you can attac h a te rminal or PC runn ing
termina l emulation s oftware such as HyperTerminal. The defa ult setti ngs for this ser ial port ar e:
•9600 bps
•Non-Parity
•8 data bits
•One s t op bi t
•Flo w control off
You can co nf igure the following values:
•Baud Rate: Pos sible baud-rate values are 9600, 38400, 115200.
•Idle Timeout : You can specify an idle timeout val u e, so that th e syste m automaticall y
term inates a user’s sess ion after a period of inactivity. Optio ns are Never, 2 minutes , 5
minut es, 10 minu tes, and 15 minutes. Never preve nts a ses sion from being terminated for
idleness.
Note: T he other options (fl ow control, pari ty, data bits, and stop bi ts) are not currently configurabl e.
The serial port requires a cable with a DB-9 terminal adapter and RJ-45 adapter. You can use the
Cis co ca ble kit (Order Number: ACS-DSBUASYN) or make your own. See Appendix G, “Ser ial
Port Requirements” for specificati ons.
The default user account has empty s trings for user name and password. As soon as you create a
user, you are prompted to log in as that user and the default account is no longer accessible.
3.2 Telnet Consol e
The switch’s embe dded Telnet server allows user s from remot e s ys tems, which ar e running a
Telnet application over TCP/IP, to log in to the switc h, configure i t, and view the status of and
sta tistic s from th e ports . The current impleme ntati on allows eight Tel net ses sions to be active at the
same time.
The Telnet Conso le interf ace ha s the same loo k and feel as the interface for the serial port.
14 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Swi tch Man a geme nt
3.3 Web Console
The switc h’s embedded We b serve r allows users from remote systems , which are running a Web
br owser, to log in to th e switch, c onfigure it, and view the status of and statist ics fro m the ports.
The current im plementation allows 5 HTTP sessio ns to be active at the sam e time.
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 15
Layer 2 Switch Features
Layer 2 Switch Features 4
This se ction describes the Layer 2 fea tures that the swi tch supp orts.
4.1 Ethernet Port Configurations
4.1.1 Auto-Negot iatio n and Force M ode
By default, the switc h is configured to use auto-negotiation to determine ea ch port’s speed and
duplex setting. The user can modify this a nd configure a port to use a specified configuration. The
Ethe rnet ports have the following charact eristics:
4.1.2 F low Control
All ports have a traffic limit becaus e they have a limite d buffer space to rec eive inc om ing frames .
Upon reac hing the limi t, a port either starts dropping packets or tri ggers flow c ontrol. The ZT 8101
switch uses the following methods for flow control:
•802.3x flow control: The switc h sends PAUSE frames which request remote ports to delay
sen ding packets for a period of time. Sending ports suspend furt her frame tra nsmissi on until
the s pecifi ed time period has elaps ed.
•802.3x compliant flow control: The switch does not send PAUSE frames, but it does respond
to them.
•Back pressu re: The swi tch fak e s a co llis io n and th e n tr an sm i ts a jam seq ue nce to en su r e al l
stations ar e notified of the “c ollision.” This cause s the sending ports to trigger their back-off
routines and reduce s the amount of traffic on the port.
The port type and dupl ex mode determi ne which typ e of flow control i s used. The following table
lists the port types and their flow control methods.
Table 1. Ethernet Port Characteristics
Ethernet Port Link Speed Duplex
Fast Ethernet 10/100 Mbps Half, Full
Gigabit Ethernet 1000 Mbps Full
16 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Layer 2 Switch Features
Note: By default, flo w control is off. If you en able it , it may affec t the multicast forwarding rate a nd
packe t priority sc heduling.
4.1. 3 Por t Secu ri ty an d MA C Add r ess Lear n in g
For security purposes, you can disable M AC address learning on one or more ports. When MAC
address learning is disabled, a port uses the first packet received as a permanent address and
accept s bro adc ast traffic and pa ck e ts o nl y for th at on e M A C addr ess. N ew ad d r esses ar e no t
learned.
The default value for each port is le arning enabled.
4.2 Port Mirroring
Port mirroring all ows the tr affic on a partic ular port to be monito red by s ending copies of the
packet s to a tar get port. You can the n attach a logic anal yzer or a RMON probe to the target port
and s tudy the tra ffic cross ing the source port in a complete ly unobtrusive manner. You can
configure only one p ort to be a tar get port, but you can se lect multiple ports to be mirrored to this
target port.
You can select which traffic i s mirrored. F or a give n mirrored port (or s ource port ), you can selec t
to mi rror only incoming traffic, only outgoing traffic, or bot h.
When m irroring ports, remember the following:
•For optimum performance, you should mirror three or fewer ports at any given ti me.
•The target port should be operating at the same or higher sp ee d than the sourc e port. If the
target port is operating at a lower speed than the source port, packets will be lost .
Table 2. Flow Co ntrol Type De te rm ina nts
Port Type Duplex Mode Flow Control
Fast Ethernet (10/100) Half Back pressure
Fast Ethernet (10/100) F ull 802.3x compliant
Gigab it Ethern et Full 80 2.3x flow control
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 17
Layer 2 Switch Features
4.3 Filtering
A f iltering databa se is used t o segmen t the network and control communication bet ween segments.
It ca n also filter packets off the network for intrusion control.
Each port on the switch is a unique collisi on dom ain, an d the s witch filters (discards) pac kets
whose destinatio n lies on the same port as wher e it originated. This keeps lo cal packets fro m
disrupting communic ations on other pa rts of the network.
The switch does some filtering automat ically:
•Dynamic filtering - The switch au tomaticall y learns and a g es MAC addresses an d their
lo cation on the network. Filtering oc cur s to keep local traffic confined to its se gment.
•Fil tering done by the Spanning Tree Protocol - STP filters packets based on topology, making
sure that signal loops don't occur.
•Filtering done for VLAN integrity - The switch filters packets from a member of a VLAN
(VLAN 2, for example) destined for a devic e on an other VLAN (VLAN 3).
You can also manual ly configure the switch to drop packets from specified IP addresse s.
4.3.1 IP Address Filtering
When filtering by IP address, you have three options. You can have the switch drop the packet
bas ed on whet her the IP addres s appears :
•as the source
•as th e destinati on
•in either the source or des tination
The ta ble ca n contai n 32 entries, and two ta ble entries are neede d to configure a bi-directional
filter.
4.4 Forwarding
The switch maintains a forwarding ta ble. This table cont ains t he re lationship between des tination
MAC or IP addresses and the Ethernet port or gateway router the destination resides on. This
informat ion is then used to for ward packe ts . This reduce s the traffic congestion on the network,
beca use packe ts , ins tea d of being transmitted to a ll ports, are transmitted to the destination port
only. For example, if Port 1 receives a packet destined for a station on Port 2, the switch transmits
that packet through Port 2 only, and transmits nothing through the other ports. This process is
referred to as “lea rning” the network to pology.
You can configu re forwardi ng r ules for the following:
•MAC address aging
•MAC address fo rwardi n g
•IP addr ess to a specified gatewa y
•IP ad d ress t o a specified MAC address
18 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Layer 2 Switch Features
4.5 Broadcast and Multica st Storm Control
You can specify thresholds f o r broadcast or multicas t t raffic that wi ll activate s t o r m contr o l. Whe n
the threshold is exceeded, the switch drops the broadcast or multicast traffic. When traffic levels
dr op below the threshold, the switch resumes forwardi ng the traffic again.
The thr esholds are a pplied to a ll Et hernet ports and cannot be set for indiv idua l ports . T he thre shold
spe cifies in thousands, the number of broadcast or multicast packets per sec ond a port can rece ive
before triggering a storm control respons e. The pos s ible ran ge is from 0 K to 255 K packets per
se cond. Th is thre shold can be configured to appl y to broadcast packets, to multicast packe ts , or to
both.
4.6 Link Aggregation
Link aggregation allows several ports to be grouped together so that they can ac t as a single port.
Thi s is don e to eith er incre ase the ba ndwidth of a netwo rk connec tion or to i ncre ase faul t tol eranc e.
The group has the f ollowing assignment s:
•Master port: Thi s port is t he Et hernet port with the lowest port numb er. All member ports are
configured to use its port settings and become me mber s of its VLAN.
•Anchor port: Thi s port is in charge of sendi ng control packets, s uch as spanning tree BPDUs,
and t he f looding of multi cast fra mes. When a link c hange eve nt oc curs in t he gr oup, the anchor
port may be re-el ec ted.
When a link aggregation group is delete d or disabled , the ports retai n their r eassigned port settings.
They do not recover their original port settings. For example, suppose that Port 1 be longs to
VLAN1 and Port 2 belongs to VLAN2. When yo u create a gro up with a startin g point of Port 1 an d
a width of 2, Port 2 will be added to VL AN1 and removed from VLAN2 automati cally. If you
d elete or disable the group later, th e P o r t 2 will still be ass igned to VLAN1.
Remem ber the following guidelines whe n crea ting a link aggrega tion group:
•Up to six groups can be established.
•A group can contain up to eight ports.
•Memb er ports of a group shou ld always be the sa me spe ed and confi gured in full duplex mode.
•You cannot c r eate a group that inc ludes 10/100 Eth erne t ports a nd 100/1000 Ethernet ports.
•STP will us e the port parameters of the master port in the calcula tion of port cost and in
determining t he state of the li nk aggregation group. The foll owing formula is used to calculat e
the pa th cost—group pat h cos t = (path cost of master por t) mi nus ( num ber of ports in the
group).
4.7 Class of S ervice Support (CoS)
MAC address priority is a Layer 2 Class of Service. It allows certa in fra mes, based on their MAC
address , to receive specia l handling. The following sections explain how this is done.
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 19
Layer 2 Switch Features
4.7.1 MAC Address Priority
The frames can be prioritized based on whether the MAC address appears in:
•the s ource only
•the destinati on only
•both the source and de stination
Frames that match the criteria are given a priority tag.
4.7.2 Priority Tags
The IEEE 802.1p specificat ion defines a priority tag that is used to classify the frame’s forward ing
priority. There are eight lev els of priority which range is from 0 – 7, with pr iority 7 as the highes t
priority.
The switch supports only four hardware priority levels per port, so the eight levels are m apped to
fo ur as li s t ed in th e ta bl e bel o w.
4.7.3 Scheduling
After a n Etherne t frame h as been prior itized, the swit ch forwar ds the Ethernet frame usin g th e stric t
priority-based schedul ing algorithm. With this policy, any packe ts res iding in a higher priority
queue are always transmitted first. Only when these queues are empty are packets in lower priority
queues tr ans mitted. This scheme can pot entially star ve pac k ets in lower-priority queues.
Note: If flow control is enabled, a small amount of low priority traffic may be forwarded before high
pri or ity traffic.
Table 3. Hard ware Priority Leve ls P er Po rt
Prio rity in Fram e s Prio rity Queue of A SIC
0 - 1 0
2 - 3 1
4 - 5 2
6 - 7 3
20 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Layer 2 Switch Features
4.8 VLAN Support
VLANs allow you to group some physic al ports as if they were on the same LAN. VLANs can be
created eithe r st atically or dynamicall y:
•Static VLAN— Thi s VLAN is manually confi gured on the switch.
•Dynamic VLAN—T his VLAN uses GVRP (GARP VLAN Registration Protocol) to enable
ports to dynamicall y join a VLAN group.
VLANs reduce traffic because traffic between VLANs is restricted. Bridges forward unicast,
multicast, and broadcast traffic only on LAN segments tha t serve the V LAN to which the traffic
belongs.
The switch supports two kinds of VLANs:
•Port bas ed VLAN—These VLANs are defined by the phys ical port connections to the s w itch
and are restricted to the numbe r of ports in the swi tch. They use untag ged fra mes.
•IEE E 802.1Q VLAN—Thes e VLANS are based on a packe t-tagg ing scheme. Packet s may be
tagg ed or u ntagge d. A tagge d packe t's me mbershi p in an 802. 1Q VLAN is dete rmine d by a tag
that is inserted in the packet header by the switch or an end node indicating the VLAN number
that the pac ket belongs to. Untagged packets are treated as if they were in a port based VLAN,
where a connection to one of the switch's physical ports dete rmines VLAN mem bership.
Physical ports can belong to only one VLAN as a n untagged port, but can belong t o m ore than
one 802.1Q VLAN as a tagged port. By defa ult, al l ports be long to a spec ial VLAN called
“default”. This default VLAN is a IEEE 802.1Q VLAN, which has the following unique
characteristics:
— The nam e and the type fields are read-only.
— It cannot be deleted.
— It can contain no VLAN members.
— I ts VID is 1, which cannot be cha nged.
All user-configured VLANs have the following cha r ac teristic s:
•The size of VLAN name fiel d is 32 byte s.
•I ngress che cking is set to on.
•Up to 32 static VLANs can be configured.
The switc h supports a m aximum of 255 VLANs (64 static, the rest dynam ic).
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 21
Layer 2 Switch Features
4.8.1 Static Port-Based VLANs
A port-based VL AN is th e ea si es t type to confi gure on th e swi tch because you need to specify only
th e f ollowing:
•VLAN name
•Member ports
The complexity of the VLAN conf iguration is totally hid den. The switch applies the following
rules when it creat es the VLAN:
•Tagged frames are dis carded. With port- based VLANs, frames are as s umed to be untagged, so
th at the VLAN members do n o t receiv e frames co ming from another VLAN.
•VLAN ID is assigned using an internal algorithm. The switch allocates the largest free VLAN
ID which is smaller than 4095 (for exa mple, 4094, 4093, 4092).
•Th e member por t’s P VID i s assi gned as the VLAN ID .
•A port can onl y belong to one port-based VLAN.
•Port -based VLANs are not incl uded in GVRP advertisement.
4.8.2 Static IEEE 802.1Q VLANs
A static IEEE 802.1Q VLAN is more complex tha n a port-based VLAN, but it is also m ore
flexible. Tagged ports can belong to more than one VLAN. You can assig n ports the following
attributes:
•Tagg ed Member Port: When a tagge d me mber port sends a packet, the port change s the
pa cke t he ader t o inc lu de t he 32 - bit tag ass oc iat ed wi th t he PVID (Port VLAN I d ent ifi er) . I f t he
por t is a ttach ed to a devi ce that is IE EE 802. 1Q VLAN compli ant, (VL AN-tag a ware) , the po rt
can be set to tagged.
•Untagged Mem ber Port: W h en an untagged member po r t recei v es a tagged packet, the port
stri ps the tag and changes the packet to an untagged packet. If the port is attached to a device
that is not IEEE 802.1Q VLAN compliant (VLAN-t ag unaware), th e port should be s et to
untagged.
•Forbidden Port: When configured as a forbidde n port, the port is des ignated as not being a
member of the VLAN and prevents pac kets tagged with the VLAN’s VID from entering the
port.
•Non-member: T his labe ls the port as not being a member of the VLAN.
You can a lso enable or disable the following per port for IEEE 802.1Q VLANs:
•GVRP
•In gre s s Che c k i ng
GVRP must be enabled globally on the swit ch before i ndividual port s can be enabled.
22 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Layer 2 Switch Features
4.8.3 Global GVRP Settings
The global GVRP flag d ete rmines whether GVRP (Group VLAN Reg is tration P rotocol) is enable d
on the switch so t hat the s witch can share VLAN information wit h other switc hes, and VLANs can
span multiple switches. When this flag is disabled, VLANs are confine d to the physical
connect ions of the switch. By defau lt, this flag is disabled.
GVRP uses the following settings, and they are not configurable:
•Join timer—200 ms
•Leave timer—600 ms
•Leav e all ti mer— 1 0 sec on d s
4.8.4 Ingress Checking
I ngress checking co nditions the forwa rding se rvice for an Ethe rnet port. It has two state s:
•Off: If an Ethernet port is configured with ingr es s checking off, all incom ing tagged frames
are forwarded, even when the receiving port is not a member of the destination VLAN of the
frame.
•On: If an Ethernet port is co nfig ured with ing ress che cking on, all incomi ng tagge d frames are
n ot f or w arded. If the VID in the ta gged fr ame belongs to the VLAN ID se t, the f r ame is
f orwarded; otherwise the frame is dropped.
The following table sum m arizes the conditions for forwarding tagged frames.
4.9 GMRP
GMRP (Group Mul ticast Regis tration Protoco l) allows ports to dynamically join multicast groups.
I t provides a mechanis m that allows bridges and end-s tations to dyna mi call y register (and
subsequently, de-registe r) gr oup membership information with the MAC bridge at tached t o the
sa me LAN segment . It al so provides a mechanism for that information to be di sseminated acro ss
all bridges in the bridged LANs that support extended filtering services. The operation of GMRP
r elies upon the services provided by GARP (Generic Attrib ute Regi st ration Protocol).
In Release II, the switch will have a global flag to configure the GMRP protocol status for the
switch , and its default value wil l be disabled. The global setting will need to be enabled befor e
individual por ts can be ena bled. Onc e ena bled, each individual port can be configured to
participate in GMRP or not.
The switch wil l have the following restrict ions on members:
•The maximum number of static entries will be 32.
•The maximum number of dynamic entries will be 64.
Table 4. Con di tions for Forwar di ng Ta gged Fram es
Tagged Frame with the VID in
the VLAN ID Set Ta gged Frame with the VID Not
in VLAN ID Set
Ingress Checking O n Forward Discard
Ingress Checking Off Forward Forward
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 23
Layer 2 Switch Features
4.10 Spanning Tree Protocol (IEEE 802.1D)
The Span ning Tree Proto col (STP) preve nts loops in a net work by allowing only one active pat h
between any two network device s at a time. STP ope rates on two level s. The switch has a global
set ting, which eith er enabl es all ports to participate in STP or prev ents all ports from parti cipating
in STP. When STP is globally enable d on the switch, STP ca n be enabled and disabled on
individual port s.
4.10.1 Forwarding Database (Layer 2 Address Table)
The Laye r 2 MAC for wardi ng datab ase contains at most 8 KByte of entri es (over 8,00 0 addresse s).
The default aging time for dynamically lea rned entries is 300 se conds. The value is user-
config urab le; the range i s 300 to 1, 000 ,000 seco nds. The s witch has a mini mum lea rning rate of 3K
MAC addresses per second.
When the swit ch di scovers that a t opology ch ange has oc curr ed, the ST P agin g time is decr ease d to
the “Forward Delay” time , which has a default value of 15 seconds. (The defaul t STP aging t im e is
20 seconds.)
The forwarding database s upports two types of static entries: sta tic and black hole .
•Black Hole : If a blac k-hol e entry i s added for a specifi ed MAC address , the swit ch d iscards all
frames with the sp ec ified MAC address in the source or destination field.
•Static: If a static entry is added f or a MAC addr ess, the switch f o r w ards all f r ames with th is
MAC address to a s p ecified p o rt.
4.10.2 Path Cost Issue
When you ena ble STP and you do not co nfigure a port cost for a port, the sw itch ass igns a default
por t cos t based on the port’s current link sp ee d.
For the ma st er port of t he group, the path cos t is th e assign ed va lue minu s the number of ports in
the group. However, if you configure the path cost f or the master port, the configured value will be
us ed in st ead .
Table 5. Path Cost
Link Spee d De fa ult C ost Ra nge
10 Mbps 100 1-65535
100 Mbps 19 1-65535
1000 Mbps 4 1-65535
24 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Layer 2 Switch Features
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Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 25
Network Management
Network Management 5
5.1 Security
For incr eased securi ty, the switch supports restricting management acce ss to a specif ied list of IP
addresses. The manage ment station IP addre ss is compose d of an IP addre ss and an Ether net port
number. This list determines which stations can request authentication to the switch through the
SNMP, Telnet, and Web inter f aces. For th e requ es t to be considered, the station’s IP address mu st
match one in the list. If no addresses are entered into the list, any station can req ues t authentication
to the switc h. SNMP th en uses commun ity strings t o control ac cess. The Telnet and Web interfaces
use user accounts to enforc e security.
5.2 IP Interfaces
An IP interface associates an IP address with a specific VLAN, which allows the VLAN to act as
Layer 3 and be configured for RIP and mult icasting protocols. Ea ch VLAN must be configured
prio r to sett i ng up th e co r r e s pon d ing IP inte rfa c e . A n I P addr e s s i ng schem e m ust then be
est ablished and impl em ented when the IP interfaces are set up on the switch.
5. 2.1 S ys tem IP Inte rf ace
The switch is shipped with one pre-configured IP interface called System. Th is nam e cannot b e
modified . By default, the Syst em IP interface is bound to the default VLAN (VID=1). This VLAN
contains all the switch’s Ethernet ports.
You can assig n or chan ge the IP address of the System IP in terface with a manual as signme nt,
BOOP, or DHCP. The switch uses the IP address assigned to the switch as the IP address for the
System IP interface.
Note: BOOTP and DHCP are only available for the System IP interface.
5.2.2 Additional IP Interfaces
To add an IP interfa ce to the swi tch, you must first configure a VLAN and then associat e an IP
address (subne t mask and gatewa y) with the VLAN.
Note: T he switch m ust have a manuall y assign ed IP addre ss i n order to c onfigure a dditi onal IP interfa ces.
User defined IP inte rfaces differ from the System IP int erfa ce in the following ways:
•They cannot use BOOTP/DHCP to ge t a dynami c IP addres s. They must be assi gned a man ual
IP address.
•They can be renamed. Howev er, when the change is applied, all other settings for the IP
in terface are changed to their default values . This incl udes the settings for RI P and the IP
multicast protocols.
26 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Network Management
5.3 SNM P Agent
The switc h support s the SNMP v1 age nt. The followin g s ectio ns descr ibe whic h MIBs and tra ps the
switc h supports.
•I f the support column labe l is No, the comment field expl ains why it isn’t supported.
•I f the support column label is Partial, the comment fiel d gives fu rther explanat ion.
5.3. 1 RFC 121 3 (MIB-II)
5.3 .2 RFC 1493 (Br id ge MIB )
Since the bridge MIB was defined before VLANs were invented, the address ta ble define d in
br idge MIB does not have VLAN inform ation. Therefore, all t he operations for a le arned or
dynam ic entr y in the addre s s table apply onl y to the defa ult VLAN.
Table 6. RFC 1213 (MIB-II)
Group Support Comment
System (1) Full
Interface (2) Full
AT (3) No Deprecated by NetToMed ia tabl e
IP (4) Partial IpRouteTable is read-only
ICMP (5) Full
TCP (6) Fu l l
UDP (7) Full
EGP (8) No
Tab le 7. RFC 1493 (Bridge MIB)
Group Support Comment
Dot1dBase Full
Dot1dStp Full
Dot1d Sr No Source Routin g is not needed .
Dot1dTp Full
Dot1dStaticTable Full
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 27
Network Management
5.3.3 RFC 1643 (Ether-Like MIB)
5.3.4 RFC 1757 (RMON)
5.3.5 RFC 1724 (RIP MIB)
Demand circuit is not supported.
5.3.6 RFC 2096 (CIDR MIB)
Table 8. RFC 1643 (Ether-Like MIB)
Group Support Comment
Dot3StatsTable Full
Do t3C oll Tabl e Pa rti al ASI C has no such co un t er. Al l co unte rs are dis playe d a s zero s.
Table 9. RFC 1757 (RMON)
Group Support Comment
Statist ics (RMO N 1) Full
History (RMO N 2) Full
Alarm (RMON 3) Full
Host (RMON 4) No
HostTopN (RMON 5) No
Ma trix (R MO N 6) No
Filter (RMON 7) No
Capture (RMON 8) No
Event (R MON 9) Full
Table 10. RFC 1724 (RIP MIB)
Group Support Comment
rip2Global s (rip 2 1) Full
rip2I fStatTa ble (rip2 2) Full
rip2I fC onfTabl e (rip2 3) Full
rip2PeerTable (rip2 4) Full
Table 11. RFC 2096 (CIDR MIB)
Group Support Comment
ipCidrRouteNumber Full
ipCidrRouteTable Full
28 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Network Management
5.3.7 RFC 2233 ( Interface MIB Using SMIv2)
5.3 .8 RFC 2674 (V LA N MIB)
Tab le 12. RFC 2233 (Interface MIB Using SMIv2)
Group Support Comment
ifTable Partial Per VLAN counter is not available
ifXTable Partial Per VLAN counter is not available
ifStackTable Full
ifTestTable No Deprecated
ifRcvAddressTable Partial No such ASIC counters. All counters display as zero
Table 13. RFC 2674 (VLAN MIB)
Group Support Comment
dot1dExtBase Full
dot1dPriority Partial • The dot1dPportNumTrafficClasses is read-only.
• The dot1dUserPriori tyRegenTable is not suppor ted.
• The do t1dPortOutboundAccess Prio rityTable is not s upported.
dot1dGarp Full
dot1dGmrp Full
dot1dTpHCPortTable Full
dot1dTpPortOverflowTable Full
Dot1qBase Full
Dot1qTp Partial • The dot1qForwardAllTable is not supported.
• The dot1qForwardUnregiste redTa ble is not supported .
Dot1qStatic Full
Dot1qVlan Partial
• The field acceptableframetypes in dot1qPortVlanTable is read-
only.
• The dot1qLearningConstraintsTable is read-only because SVL
is not supporte d.
• All counters are zero in the dot1qPortVlanStatisticsTable.
• All counters are zero in the dot1qPortVlanHCStatisticsTable.
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 29
Network Management
5.3.9 Traps
5.4 TFTP Client
TFTP is a simple protocol used to transfe r fil es wit hout any ki nd of authe nti catio n. It runs on top of
UDP, using t imeout and re trans mission to e nsure th at data arrives. The switc h’ s TFTP client all ows
use rs to c opy file s fr om and to a r emote system that is runni ng t he TFTP ser ver p rotoc ol. T he TFTP
client allows onl y one us er to acces s it and t r ansfer files.
You can use the TFTP client is to do the f o llowing:
•Download firmware.
•Download and upload the switc h’s configuration file.
•Upload the switch’s history log.
Note: Some TFTP ser vers cannot dete rm ine when a transaction is aborted. In thes e cases, you must
reboot the switch, whic h restarts the TFTP client a nd re-initializes the TFTP transaction.
5.5 Ping
The Pi ng utility invokes the ICMP echo request an d ec ho reply messag es . A host or gateway sends
an ICMP echo request message to a specified destination. Any machine that receive s an echo
request formu lates an echo reply and transmits it to the original sender. The ech o reque st and
associated reply can be used to test whether a destination is reachable and responding.
When handl ing a subnet -broa dcast or a direct ed-broad cast ICMP ech o request, the switc h forward s
the s ubnet-broadcast or directed-bro adc as t ICMP echo request to the dest ination network.
Table 14. Traps
Trap C od e Spec i fi c Nu mber De sc r ipt i on
00Cold Start
10Warm Start
2 0 Link Up
3 0 Link Down
4 0 Authentication Failure
5 1 New Root (STP)
5 2 Topology Change (STP)
30 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Network Management
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Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 31
Layer 3 Unicast Routing Protocols
Layer 3 Unicast Routing Protocols 6
6.1 ARP Tabl e
The A R P table maintains the ma p pi n gs fro m In ternet ad dresses to h ardware addresses. There are
two types of ARP entries: dynamic and static.
When a static ARP entr y is added to the switch’s ARP table, the switch does not send an ARP
query to the con f igured IP address. This allows the s witch to connect to devices that ha ve not
implemented ARP.
The ARP table has the following characteristics:
•S tatic entri es ha ve high er p rec edenc e than dynami c ent ries. There fore, a st atic entr y will n ot b e
overwritten by a dynamic entry.
•The aging time f or dynamic entrie s is 20 minutes. This value is not confi gurable.
•The ta ble ca n be up to 2 K in siz e.
•Up to 32 sta tic entries are allowed in the table.
6.2 Routi ng Tabl e
TCP/IP routing prot ocols have ways of dis covering the rea cha ble IP address prefixes and , for ea ch
prefix, the n ext-hop router to use to forward data tra ffic to the prefix. The info rmation exc hanged
between rout ers res ults in an internal database ca lled the routing table, which instruct s the router
how to for ward packe ts . The r e are two common implementations for a router’ s routing table: ha sh
+ binary tree alg orithm and Patricia tree . Both algo rithms have their strengths and wea knes ses.
Sin ce Layer 3 soft ware is currentl y configured to use th e Patricia tree algorithm, the ZT 8101
switch uses the Pa tr icia tree algorithm.
The switch’s routing tabl e has the followin g characteristics:
•The table can be up to 2 K in size.
•Up to 32 sta tic entries are allowed in the table.
6.3 Multi-Netting
In legacy networks, multi-netting is commonly used to configure a physical router port with more
than one IP inte rface. In a Layer 3 s witch, an IP interface is bound to a single VLAN. To
acc ommodate multi-netting, you must configure two or more tagged VLANs to span the same
physical ports and then assign e ach VLAN a different IP address.
The VLANs must include tagged ports, beca use untagged ports can only belong to one VLAN.
32 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Layer 3 Unicast Routing Protocols
6.4 RIP v1 and RIP v2
RIP is a routin g pr otocol based on the dis tance-vector algori thm . T he ZT 8101 s w itch su pports
both RIP v1 and RIP v2. You c an confi gure the following RIP options:
•Enable or disabl e RIP on the switch .
•Ena ble or dis able transmitting RIP packets on a spec ified IP interface.
•Ena ble or dis able RIP receiving RIP packets on a s pec ified IP interface .
RIP MD5 authentication is not supporte d.
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 33
Layer 3 Multicast Routing Protocols
Layer 3 Mul t icast Routing Protocols 7
The ZT 8 101 swit ch sup port s both DVMRP a nd PIM-DM, and both prot ocol s can be enable d at th e
same time. However, an IP interface can only be e nabled for one of these protocols.
7.1 Router Ports
When the switch det ects routing co ntrol packets (RIP, OSPF, DVMRP, and PIM) or IGMP query
packets on an Ethernet por t of a specific VLAN, the switch automatically designates the port as a
dynam ic router port. Route r ports be come defau lt member s of the lea r ned multicast groups in the
VLAN.
The switch al lows you to co nfigure ports as static router ports . Th ese ports als o become def ault
members of the learned multicast groups in the VLAN.
7.2 Mult icast Forw a r ding Rules
The forwarding r ules depend upon whether the packe ts nee d to be forwa r ded within a VLAN or
between VLANs. The following sect ions de s cribe these rules.
7.2.1 Multicast Forwarding within a VLAN
The fol lowing two ta bles de scribe th e forwarding rules for mult icas t data wit hin a VLAN. The first
tabl e descri bes th e rules for i ncomin g packe ts, and th e second t abl e descri bes the rul es for o utgoing
packets.
Ta ble 15. Rules for Inco ming Pa ckets
Incoming Packet Type Will be sent to
IP Multicast Dat a Packet (IGMP and
IGMP Snooping is disabled) VLAN flooding.
Destination Unknown multicast data Either VLAN flooding, or if the customer requests, dropped.
Router Packet (OSPF, etc.) Router ports only.
IGMP Report Router ports only.
IGMP Query VLAN flooding.
IGMP Leave Router ports only.
IG MP Grou p Specific Query Either VLAN flooding, or if there are group mem ber ports and/or
router ports, the data is sent to them.
Multicast data packet destined for a
learned multicast group Group member ports and router ports.
34 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
L ayer 3 Mul ti cast Routing P rotocols
7.2 .2 Mul ti cas t Fo rw ar d ing bet w ee n V LANs
When a multica st routi ng protocol is enabled, such as DVMRP or PIM, the mul ticast data can be
f orwarded to other IP interfa ce s , if ne ede d. Either software or hardware can be used to forward an
I P multicast packet. The switch currently supports so f tware forwarding.
7.2.2.1 Software Forwarding
To imp rove switch performanc e, IP multicast p ac kets are flood ed to the VLAN domain and are not
sent to switch’s CPU. When you enable any multicast routing protocol (DVMRP or PIM-DM), al l
of th e IP m u lt icas t pack ets ar e sen t to s w it ch ’s CPU to do f ur t h er fo r w ardin g p r oc essing .
An in ternal multicast forwarding cache is used to match an incoming IP multica st packet with a
f orwarding IP interfa ce . The multi ca st forwarding cache contains the following information :
•The sender’s source IP address
•The sender’s multicast group IP address
•A bitm ap of forwa r ding IP interfaces
The multicast group IP ad dress is use d as the table’s index.
Whe n the switch rece ives a n I P multicast packet, i t either builds or updates the internal mul ticast
forwarding cache. The relevant bit in the forwarding bitmap is updated according to the re sults of
multicast routing protocol exchanges and IGMP re ports.
The fo llowi ng tables des cribe the for w arding rules for mult icast data.
Tab le 16. Rules for Ou tgoing Pack ets
Outgoing Packet Type Will be sent to
IGMP Query A ll VLAN member ports.
IGMP Group Specific Query (IGMP) Group member ports and router ports.
I GMP Gr ou p Specific Que ry (IGM P
Snooping) The ports that rece ived IGMP leave packets and the r outer
ports.
Tab le 17. Forwarding Rules for Incomin g Multicast Data
Incoming Multicast Data Packets Behavior Remarks
Unknown multicast data • Builds IP multicast cache.
• Forwards to the entries in the
bitmap for the gro up. DVMRP or PIM-DM is enabled.
Know n group member multicast
data
• Builds IP multicast cache.
• Forwards to the entries in the
bitmap for the gro up. DVMRP or PIM-DM is enabled.
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 35
Layer 3 Multicast Routing Protocols
7.3 IGMP Queries
An IGMP querier s ends IGMP Query packets peri odically to hel p to maintain t he m ulticast grou p
information for a VLAN. When IGMP Snooping is enabled for a VLAN, the switch uses the
following states to determine whether the VLAN becomes a querier:
•Non-Querier: Prev ents the VLAN fr o m becoming a q u erie r.
•V1 Querier: Enables the sending of IGMPv1 query pac kets. If no queri er is present in the
VLAN or the VLAN’ s IP address is smaller than current V1 querier, the switch becomes the
querier for the VLAN. IGMPv2 group spe cific query and leave packet s ar e not handled.
•V2 Q uerier: If a V1 queri er is pre sent in the VLAN, the switch r emains silent. If no quer ier is
present in the VLAN or the VLAN’s IP address is smaller than current V2 querier, the switch
becomes the quer ier for the VLAN. IGMPv2 group spec ific que ry and le ave packets are
handled.
When receiving an IGMPv2 leave pa cket, the IGMP interface issues an IGMPv2 group
spe cific query packet immedi ately and wait s one sec ond to check i f any IGMP reports a r e
received on the ports. If not, the port is removed from the IGMP group member lis t, and the
group's multicast data is not forwarded to this port until an IGMP report is rec eived again.
The out going ports for the IGMPv1 Query or IGMPv2 Query packe ts are defi ned in Multi ca st
Forwarding within a VLAN section.
If the IGMP interfa ce is designate d as the IGMP querier, the switch uses t he following int erval s for
sen ding query packets:
•When you ena ble IGMP snooping or boot the switch with the que rier option enabled, the first
query packet will not be sent for 255 seconds. This time delay is non-standard.
•The second query pac ket will be sent after t he “Startup Qu erier Int erval” which is 1/4 *
“Query Interval.” By default , this is 31 sec onds.
•The next query packe ts will be sent p eriodic ally a ccordi ng t o the “Query Int erv al.” The defaul t
“Query Int erval ” is 125 seconds.
The fol lowing table gives the sequence of these pac kets.
Table 18. Forwarding Rules for Multicast Dat a to Another IP Interface
Forwarding Multicast Data Packets
to another IP interface Behavior Remarks
Unknown multicast data Forwards to router ports. DVMRP or PIM-DM is enabled.
Kno w n gro up mem ber mu ltic as t dat a Forw ards to group member po rts
and router ports. DVMRP or PIM-DM is enabled.
36 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
L ayer 3 Mul ti cast Routing P rotocols
7.4 IGMP Snooping
I GMP Snooping is a fea ture that reduces the flooding of IP multica st tra ffic.The default be havior
for handling a multicast packet is to flood the packet to all members of a VLAN. With IGMP
Snooping, only the ac tive member ports re ceive the data .
All groups le arned by IGMP sno oping are re corded in an i nternal group tabl e with the VLAN ID
and m ulticast group address us ed as the table’s index. This table sto res the active member ports for
this group. This table can contain a maximum of 128 groups. If the acti ve multicast groups exceed
this li mi t, the new group’s data wil l be floode d in the VLAN.
You can globally enable or disable IGMP Snooping on the switch. You can also enable or disa ble
the snoop ing for a specific VLAN. You must enable IGMP globally for it to be enabled on a
spe cific VLAN. By defaul t, the IGMP globa l flag is off and per- VLAN flag is on. Thus, when you
enab l e I G M P gl oball y, it is en ab l ed on al l V LA N s.
You can configu re the swit ch to snoop and to keep track of IGMP groups. The se two interact in the
f ollowing ways:
•If the IP inte rface h as IGMP Sn ooping conf ig ured for t h e associated VLA N, the configu ration
of IGMP Snooping will be ove rwritten by the IGMP group settings. On such VLANs, the per-
VLAN flag is th e only available c onfigurable option on the IGMP Snooping screen.
•If the IGMP group settings are dis abled on the interface, IGMP Snooping on the VLAN
beco mes co n f ig u r ab l e an d th e sw it ch uses th ese sett ing s for th e V LA N .
Note: The switc h support s a maxi mum of 255 VLANs and a maxim um of 128 IGMP Snoop ing gr oups. If
you cre ate more than 128 VL ANs with IGMP Snoopi ng e nabled , some of thos e VLANs will no t be
added to the IGMP Snoopi ng table a nd the group’s data will be flooded in the VLAN.
Tab le 19. Pa cket Sequen ce
Time (se co nds ) Descr i ptio n
0 Switch decides to be IGMP Querier for the VLAN
255 1s t Q uery Packet
286 2nd Query Packet (255+31)
411 3rd Query Packet (286+125)
536 4th Q uery Packet ( 411 +125)
661 5th Query Packet (536+125)
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 37
Layer 3 Multicast Routing Protocols
7.5 IGMP Group Settings
An IP host uses IGMP to register its IP multicast group membership with the swi tch. Periodi ca lly,
th e swi tch queries the multica st group to see if the group is still in use:
•If the group is stil l ac tive, a single IP hos t responds to the query, and the gr oup registration is
maintained.
•If the group is inact ive and a report is not r ec eived wit hin the time limit for a response, the
group registration is removed.
7.6 DVMRP
DVMRP is a distance-vector rout ing protocol desi gned to support the forwardin g of mult icast
datagrams through an inter -network. DVMRP constr ucts source-rooted multicast de livery tree s
using the Reverse Path Multicasting (RPM) algorithm. Unlike RIP, DVMRP is concerned with
computing the previous hops back to a s ource. The ZT 8101 switch supports DVMRP v3.
7.7 PIM Dense Mode (P IM-DM)
PIM Dense Mode (PIM-DM) is similar to DVMRP in that it employs the Reverse Path
Multic asting (RPM) algorithm. However , there are several importa nt diffe rences betwe en PIM-DM
and DVMRP:
•PIM-DM r elies on the presence of an existing u nicast routing protocol to adapt to topology
changes, but it is independent of the mechanisms of the specific unicast routing protocol. In
contrast, DVMRP c ontains a n integrated routing protocol that ma kes us e of its own RIP-like
exchanges t o compute the re quired unicast routing information.
•Unlike DVMRP, which calc ulates a set of chi ld interfaces for ea ch (source an d group) pair,
PIM-DM simply forwards mul ticast traffic on all downs tream interfaces until explicit pru n e
me ss a g es are r ecei v ed . P IM - D M is wi l li n g to ac cept pa ck et dup lic at io n to eli mi n ate rou t in g
protocol dependenc ies and to avoid the o v erhead i nvolved in building t he pa rent/child
database.
The ZT 8101 switch supports PIM-DM v2.
38 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
L ayer 3 Mul ti cast Routing P rotocols
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Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 39
Miscellaneous Switch Features
Miscellaneous Switch Features 8
8.1 User Acco unts
Two levels of user accounts are sup ported:
•Admin: The use r can perform all the operations (configuring, chec king sta tus , and re booting).
•User: Th e user can check the switch’ s status, view its configuration inform ation, and ping
other stations to check c ommunica tion.
You can create a total of eight accounts, which can be either Admin or Us er level . At least one
Admin-level account must exist.
8.2 General Swit ch Informatio n
The fol lowing fields are embedde d to the hea der of firmware a nd are displayed in the switch
information screen:
•Devic e Type – Device’s model number
•MAC Addres s – Start MAC address of this device (contains 32)
•Boot PROM Firmware Version , inclu ding build number
•Runtime Firmware Version, including build number
•Hardware Version
•Device Serial Number
•System Name suppl ied by the e nd us er
•System Loca tion suppli ed by the end user
•System Contact supplied by the end user
These fiel ds are eas y to modify for c ustom requirements.
8.3 Switch Diagnostics
The switch diagnostic s are divided into two parts :
•Syste m memory diagnostics: these are execute d on the PROM (loade r).
•Switch ASIC diagnost ics: these are executed on RUNTIME a nd are only available for
manu fac turing testing.
40 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Miscellaneo us Swi tch Fea tures
8.3.1 System Memory Diagnostics
The PROM loade r automa tically runs the memory diagnostics each time the switch is booted. It is
divided into two parts . The first part tests the dat a bus and the seco nd part tests th e add r ess bus.
8.3.2 Switch ASIC Diagnostics
The followi ng ar e included in the switc h’s ASIC level diagnostics.
•Direct Register Testing
•Indirect Register Testing
•In t e r nal Buff ers Te s tin g
•ARL L3 Table Te sting
•Port Based VLAN Ta ble Testing
•802.1Q Tagged VLAN Table Testing
•Trunk Group Table Testing
•Trunk Group Bit map Table Testing
•I n clusive Fi lter Mask Table Testing
•Inclusive Filter Rules Table Testing
•Layer 2 Multicast Table Testing
•Default IP Router Table Testing
•Layer 3 Inte rface Table Testi ng
•External Buffers Testing
•Layer 3 Multicast Table Testing
8.4 History Log
The following table shows the message types and the messages that are currently supported in the
history log.
Tab le 20. History Log Mes sages (Sheet 1 of 2)
Type Log Message
Device System started up
De v ic e Port 1: lin k up, 100 Mb ps, full dupl ex
Device Port 1: link down
Mana ge me nt S uc ce s sful lo g in thr o ug h Teln et (Us er n am e : Edw a rd)
Mana ge ment Conso le se s sion timed ou t (Us ername : E dward)
Management Login faile d through Telnet (Username : Edward)
Mana ge me nt S uc ce s sful lo g in thr o ug h Teln et (Us er n am e : Edw a rd)
Management Telnet session timed out (Username: Edward)
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 41
Miscellaneous Switch Features
8.5 Reset Configura tion to Factory Default
The switch has a menu option to re s et it to fa ctory defa ults. It can also be manually reset to the
fact ory defaults from th e serial port with the following steps:
1. From the serial interface, reboot switc h and wait for the following m essage to appear:
Pl ea s e w ai t, lo ad i ng Ru n t ime imag e. .. ..... ... ..... .. .... 1 0%
2. When the above mes sage appears, press the # key.
3. When the “Factory Default Enable” message appears, release the # key.
4. Press the Enter key tw ice to log in to the syste m.
5. Reboot the sw itch with the Save Configuration and Reboot' opt ion.
6. Wait for th e s witch to boot up.
7. Log in to the system with de fault username and pas sword.
Note: If you s kip Step 5, the default settings are not save d in flash.
8.6 F irmware Upgrade
8.6.1 Upgrade Runtime through TFT P
To up grade the switch’s firmware, you must first complete the following tasks:
•Yo u m u s t obt ain an upd ate d r unt ime ver s i on o f the fir mwar e.
•You mus t cop y the fi rmware to a known direct ory on a TFTP ser ver.
On ce th e fi rm w a r e is o n th e T FTP ser v e r, you can u pg r a de th e sw it ch f rom the ser i al , Tel n et , o r
Web interface. Only one TFTP upgrade se s sion is all owed at a time. When the download has
complete d and the firmware has been written to flash, the switch will automatic ally reboot and
execu t e th e n ew r untim e fi r mw are .
Management Configuration saved to flash (Username: Edward)
Management Firmware upgrade was successful (Username: Edward)
Management Firmware upgrade was unsuccessful! (Username: Edward)
Management Configuration download was successful (Username: Edward)
M anagement Co nfigu ration download was unsuccessf ul! (Username: Edward)
Spanning Tree Topology change
Spanning Tree New root
Spanning Tree Spanning Tree Protocol is enabled
Spanning Tree Spanning Tree Protocol is disabled
Sec u rit y Pos s ib le spoo f i ng att ac k fro m 00 - 80 - C8-11-2 2-3 3 port 1
Ta ble 20. History Log M essag es (Sheet 2 of 2)
42 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Miscellaneo us Swi tch Fea tures
8.6.2 Upgrade R untime through Zmo dem
Generally, TFTP i s the first choi ce to use to upgrade firm ware. The Telnet Console and the Web
Cons ole both have opti ons for upgra din g the firmware using a TFTP serve r . However , you can al so
use Zmodem to upgrade t he firmware from the serial port. The swi tch can hold only one image of
the firmware.
8.6.2.1 To upgrade the firmware using Zmodem
1. Obtain the runtim e firmware.
2. Using Windows HyperTerminal, log in to the switch through the se rial port.
3. From the Main Menu, select Reboot and press E nter.
4. When the power on self test message appears , press the # key and wait for the following
message :
Please change your baud rate to 115200 for the Zmodem upgrade, or
press CTRL+C to go to the BOOT Menu.
If you press CTRL-C, you can configure the baud rate to a different value.
5. Change Hype rTerminal’s baud rate to match the t arget’s setting.
6. Use the Send File func tion of HyperTer minal to upgra de the firmwa re.
Whe n the download is completed, Zmodem will display a me ssage indicating that it is done
and then a message about loading the Runtim e im age.
7. Change the baud ra te of HyperTerminal back to 9600 bps.
8. Press th e Ent er key twice.
9. Log in to th e switch.
10. From the main menu, select Switch Informati on and press Enter. Verify the firmware version.
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 43
Hardware
Hardware 9
9.1 Design Summary
In very gene ral terms, the following diagram outlines the bas ic de s ign of the ZT 8101 swi tch.
9.2 Physi cal Board
The ZT 8101 swi tch co mplies with the form fa ctor of a 6U CompactPCI c ar d, 160 mm de ep. It uses
the s ame connectors as defined by PICMG 2.0 spec for J1 – J5. Th e pin out is compatible with
PICMG 2. 16 standard for Switch Fabrics. An Exte nded Fabric Board J4 key shall be used to
prevent the u se r from inserting this module into a standard node slo t.
The ZT 8101 switch has Electro Static Discharge Stri ps on the top and bottom of the card. See
PICMG Spe c sec tion 4.1.4 for a detail of the ESD Strips.
The ZT 8101 switch has the foll owing general physi cal outli ne an d connect or placement.
Figure 2. S witch Block Dia gram
IPMI + Glue logic
Processor
Ethernet Switch + MACs +Phys +
Magnetics
Uplink Ports
100/1000Mbps
LP1 LP21
Backplane Por ts
10/100Mbps Backplane Port s
10/100Mbps
LPf/22 IPMB
I2C to Onboard
Sensors, Memory
SRAM Flash
ROM
Aux.
Signals
To J1 & J2 Connectors
To J3, J4 & J5
Connectors
25 26
Sw itch Board block Diagram
Uplink Ports
10/100Mbps
PMC: Peripheral
Management Controller
2423 RS232
Management Port
RS232 IPMB_PWR
LED
Array
Eject or Switch
LED Select,
Speed/Activity
44 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Hardware
Figu re 3. Fro nt Pa nel
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 45
Hardware
9.3 Power
The power syste m supports for following feature set:
•Compac tPCI Hot Swap.
•The ZT 8101 switc h runs from a 3.3 V and 5 V supply. The chassis supplies th is power from a
dedicat ed reli able power source. The ZT 8101 switc h consumes no mor e than 35 W total.
•The ZT 8101 switch has the foll owing power needs.
The following diagram outlines the major power syste ms of the ZT 8101 switch .
Table 21. Volt age and Current Needs
Voltage Max current Where used
12 V 20 mA Regulator control, LTC1421.
5V 3.1 A LTC1421, 5 V-to-2.5 V swi tching ci rcuit input (1.784 A) , 5 V-to-1.8 V
s witch ing circuit input (2.778 A).
3.3 V 5.038 A TX 3927, PHY, switch engine, regula tors to generate 2.5 V.
2.5 V 2.676 A CPU, PH Y, switch en gine.
Figure 4. Power Syste ms
46 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Hardware
9.4 CompactPCI
The ZT 8101 switch complies wi th P I CMG 2.1 Hot Swap specification for insertion and removal
of the ZT 8101 boa rd.
The ZT 8101 slot in the cha ssis wi ll have the BD_SEL # pin grounded . When the Z T 8101 switc h is
inserted, the hot swap power control ler will wait until BD_SEL# is grounded and backplane power
has s tabilized before ramping up main power to ZT 8101. If backplane power becomes unstabl e or
BD_S EL # goes high, the hot swap power controller will turn of f mai n power to the ZT 8101
switch.
A CPLD is used to control the hot swap LED, and reset to the board. See the Hot Swap se ction for
details on the hot swap logic.
The blue LED will be on at any time it is sa fe to remove the ZT 8101 switch.
9. 5 Power Controll er
The hot swa p power controller chip is used to ramp voltages and watch for over current. If over
current is detecte d, main power to the ZT 8101 switch will be terminate d. Over current is defined
as 50 percent over sp ec.
A tim e constant of 100uS is used on startup to prevent any surges.
The ZT 8101 switch has a Hot Swap Shiel d on the back of the board to prot ec t the circ uits.
The hot swap power controller chi p is a LTC1421 chip.
9.6 Regulators
The ZT 8101 switch generat es the on board vol tages from both 3.3 V and 5 V.
A switching regulator gen era tes 2 .5 V (for two Octal Phy) and 1.8 V (switc h engine) from th e 5 V.
Several LDO regulators generate the 2.5 V needed for the CPU core, 10/100/1000 and Octal Phy.
The switc hing re gulator is a RT-9226B. The 2.5 V LDO regulator is a CS -5253.
9.7 Embedded C o nt r o lle r
The ZT 8101 switch uses the TX-3927 RISC CP U.
9.8 Ethernet
The ZT 8101 switch utilizes a si ngle chip Eth erne t switch controller solution tha t has 24 10/ 100
ports and 2 GbE ports.
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 47
Hardware
9.9 L ocal I2C Bus and GPIO
The I2C bus on the ZT 8101 switch for GPIO and system managem ent monitoring uses the
following device and a ddress.
The SCL and DTA signals are tied high to 3.3 V with 1 K oh m resi stors.
9.10 GPIO
The fol lowing table describes all the GPIO of the TX3927 CPU on the ZT 8101 swi tch.
9.11 Rear Panel Connector
The ZT 8101 re ar panel use s the same connectors as a CompactPCI 6U Module. The f ollowing
tables outline the pins used in J1 through J5. J1 is keye d as code number 3456.
J4 is keyed as code number 1235.
Table 22. IO Devices and Addresses
Chip Device Address Description
ATC2 4C02 24C02 001b 24C02 for storing hardware dependent informatio n
Table 23. GPIO Assignments
Label Name I/O Chip Pin Description
SD A_BRD I/O TX3927 127 Local I2C Bus
SCLK_BRD O TX3927 128 Local I2C Bus
Ta ble 24. J1 Pin Out (S heet 1 of 2)
ZABCDEF
25 GND EARLY_5V PreCharge ENUM# EARLY_3.3V EARLY_5V GND
24 GND PreCharge EARLY_5V -NC- PreCharge PreCharge GND
23 GND EARLY_3.3V PreCharge PreCharge EARLY_5V PreCharge GND
22 GND PreCharge GND EARLY_3.3V PreCharge -NC- GND
21 GND EARLY_3.3V PreCharge PreCharge -NC- PreCharge GND
20 GND PreCharge GND -NC- PreCharge PreCharge GND
19 GND EARLY_3.3V PreCharge PreCharge GND PreCharge GND
18 GND PreCharge -NC- EARLY_3.3V PreCharge -NC- GND
17 GND EARLY_3.3V IPMB_SCL IPMB_SDA GND PreCharge GND
48 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Hardware
16 GND PreCharge GND -NC- PreCharge -NC- GND
15 GND EARLY_3.3V PreCharge PreCharge -NC- PreCharge GND
12-14
11 GND PreCharge PreCharge PreCharge GND PreCharge GND
10 GND PreCharge GND EARLY_3.3V PreCharge PreCharge GND
9GND PreCharge PreCharge PreCharge GND PreCharge GND
8GND PreCharge GND -NC- PreCharge PreCharge GND
7GND PreCharge PreCharge PreCharge GND PreCharge GND
6GND PreCharge -NC- EARLY_3.3V -NC- PreCharge GND
5GND -NC- -NC- PreCharge GND PreCharge GND
4GND IPMB_PWR HEALTHY# -NC- -NC- -NC- GND
3GND PreCharge PreCharge PreCharge EARLY_5V PreCharge GND
2GND -NC- EARLY_5V -NC- -NC- -NC- GND
1GND EARLY_5V -NC- -NC- EARLY_12V EARLY_5V GND
Tab le 25. Backp lane Pin Descr iptions
Name Count Type Description
EARL Y_5V 8 Power Early 5 V and 5 V power supply pins
EARLY_3.3V 10 Power Early 3.3 V and 3.3 V power supply pins
IPMB_PWR 1 Pow er IPMB power supply pin
HEALTHY# 1 Output Healthy status
IPMB_SCL 1 Output IPMB Clock
IPMB_SDA 1 I/O IPMB Address/Data
ENUM# 1 O To indicate the switch blade is freshly inserted
EARLY_12V 1 Power Early 12 V power supply pin
GND 76 Pow er GND pins. There are more GND pins at J3~J5.
-N C- No connected pins.
TOTAL 220
Tab le 24. J1 Pin Out (Sheet 2 of 2)
ZABCDEF
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 49
Hardware
Table 26. J2 Pin Out
AB C D E F
22 GA4 GA3 GA2 GA1 GA0 GND
21 -NC- GND -NC- -NC- -NC- GND
20 -NC- -NC- -NC- GND -NC- GND
19 -NC- GND -NC- -NC- -NC- GND
18 -NC- -NC- -NC- GND -NC- GND
17 -NC- GND -NC- -NC- -NC- GND
16 -NC- -NC- -NC- GND -NC- GND
15 -NC- GND -NC- -NC- -NC- GND
14 PreCharge PreCharge PreCharge GND PreCharge GND
13 PreCharge GND -NC- PreCharge PreCharge GND
12 PreCharge PreCharge PreCharge GND PreCharge GND
11 PreCharge GND -NC- PreCharge PreCharge GND
10 PreCharge PreCharge PreCharge GND PreCharge GND
9PreCharge GND -NC- PreCharge PreCharge GND
8PreCharge PreCharge PreCharge GND PreCharge GND
7PreCharge GND -NC- PreCharge PreCharge GND
6PreCharge PreCharge PreCharge GND PreCharge GND
5PreCharge GND -NC- PreCharge PreCharge GND
4-NC- -NC- PreCharge GND PreCharge GND
3-NC- GND -NC- -NC- -NC- GND
2-NC- -NC- -NC- -NC- -NC- GND
1-NC- GND -NC- -NC- -NC- GND
50 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Hardware
Tab le 27. J3 Pin Ou t
AB C D E F
19 SGA4 SGA3 SGA2 SGA1 SGA0 GND
18 TX+22 TX-22 GND -NC- -NC- GND
17 RX+22 RX-22 GND -NC- -NC- GND
16 TX+8 TX-8 GND -NC- -NC- GND
15 RX+8 RX-8 GND -NC- -NC- GND
14 TX+7 TX-7 GND -NC- -NC- GND
13 RX+7 RX-7 GND -NC- -NC- GND
12 TX+6 TX-6 GND -NC- -NC- GND
11 RX+6 RX-6 GND -NC- -NC- GND
10 TX+5 TX-5 GND -NC- -NC- GND
9RX+5 RX-5 GND -NC- -NC- GND
8TX+4 TX-4 GND -NC- -NC- GND
7RX+4 RX-4 GND -NC- -NC- GND
6TX+3 TX-3 GND -NC- -NC- GND
5RX+3 RX-3 GND -NC- -NC- GND
4TX+2 TX-2 GND -NC- -NC- GND
3RX+2 RX-2 GND -NC- -NC- GND
2TX+1 TX-1 GND -NC- -NC- GND
1RX+1 RX-1 GND -NC- -NC- GND
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 51
Hardware
Table 28. J4 Pin Out
AB C D E F
25 TX+20 TX-20 GND -NC- -NC- GND
24 RX+20 RX-20 GND -NC- -NC- GND
23 TX+21 TX-21 GND -NC- -NC- GND
22 RX+21 RX-21 GND -NC- -NC- GND
21 -NC- -NC- GND -NC- -NC- GND
20 -NC- -NC- GND -NC- -NC- GND
19 -NC- -NC- GND -NC- -NC- GND
18 -NC- -NC- GND -NC- -NC- GND
17 -NC- -NC- GND -NC- -NC- GND
16 -NC- -NC- GND -NC- -NC- GND
15 -NC- -NC- GND -NC- -NC- GND
14 -NC- -NC- -NC- -NC- -NC- GND
13 -NC- -NC- -NC- -NC- -NC- GND
12 -NC- -NC- -NC- -NC- -NC- GND
11 5V 5V GND 3.3V 3.3V GND
10 RTS_BP CTS_BP TXD_BP RXD_BP SMBD GND
9DTR_BP DSR_BP IPMB_PWR SMBA SMBC GND
8-NC- -NC- -NC- -NC- -NC- GND
7-NC- -NC- -NC- -NC- -NC- GND
6-NC- -NC- -NC- -NC- -NC- GND
5-NC- -NC- -NC- -NC- -NC- GND
4-NC- -NC- -NC- -NC- -NC- GND
3-NC- -NC- -NC- -NC- -NC- GND
2-NC- -NC- -NC- -NC- -NC- GND
1-NC- -NC- -NC- -NC- -NC- GND
52 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Hardware
Tab le 29. J5 Pin Ou t
AB C D E F
22 TX+19 TX-19 GND -NC- -NC- GND
21 RX+19 RX-19 GND -NC- -NC- GND
20 TX+18 TX-18 GND -NC- -NC- GND
19 RX+18 RX-18 GND -NC- -NC- GND
18 TX+17 TX-17 GND -NC- -NC- GND
17 RX+17 RX-17 GND -NC- -NC- GND
16 TX+16 TX-16 GND -NC- -NC- GND
15 RX+16 RX-16 GND -NC- -NC- GND
14 TX+15 TX-15 GND -NC- -NC- GND
13 RX+15 RX-15 GND -NC- -NC- GND
12 TX+14 TX-14 GND -NC- -NC- GND
11 RX+14 RX-14 GND -NC- -NC- GND
10 TX+13 TX-13 GND -NC- -NC- GND
9RX+13 RX-13 GND -NC- -NC- GND
8TX+12 TX-12 GND -NC- -NC- GND
7RX+12 RX-12 GND -NC- -NC- GND
6TX+11 TX-11 GND -NC- -NC- GND
5RX+11 RX-11 GND -NC- -NC- GND
4TX+10 TX-10 GND -NC- -NC- GND
3RX+10 RX-10 GND -NC- -NC- GND
2TX+9 TX-9 GND -NC- -NC- GND
1RX+9 RX-9 GND -NC- -NC- GND
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 53
Hardware
9.12 Watchdog
The switch uses a TX3927 int ernal watchdog timer and one exte rnal watc hdog tim er insi de CPLD.
9.13 Clocks
The r e ar e fou r clock sou r ce s:
•25 MHz for GbE PHY chips
•125 MHz for switch controller core frequency, Octal PHY SMII clock and GbE PHY GMII
clock
•100 MHz for SDRAM clock
•8.33 MHz for TX3927.
Al l of the m ar e gen er ate d fr om oscil l a t or.
9.14 Front Pan el
The front panel of the ZT 8101 switch has the following items.
Tabl e 3 0. Front P ane l Item s
Item Description
Ejector switch This switch tells the hot swap controller if the user wants to remove the
card . Whil e thi s swi tc h is close d, the car d can n ot ph ysic a lly be rem ov e d.
Hot Swap LED This blue LED tells the user it is safe to remove the ZT 8101 switch. If this
LED is not on, damage to the chassis, the ZT 8101 switch, or modules in
th e ch as si s coul d re s ul t by r em o vi ng the ZT 81 01 sw itc h.
RJ-45 Ports There are 4 RJ-45 ports. Two of them are for 10BASE-T/100BASE-TX
Ethernet ports and two of them are for 100BASE-TX/1000BASE-T
Ethernet ports.
Board Status LED T he status LED shows the heal th of the board and its po wer state.
Management Serial Port The serial port allows the user to attach a ter minal or a PC running
termin al emulation software (such as HyperTermina l) and ma nage th e
switch.
Ethernet Channe l LEDs These LEDs indicate either the activity or the speed of the ports.
54 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Hardware
9.15 Hot Swap
The blue hot swa p LED has controlled ejec tor switch logic, which is powered by early power and
the CPLD. A 3.3 V high signal from the CPLD means to turn on the LED. Sinc e a blue LED
r equires a la rge forward voltage, i t us es the following circuit to drive the blue LED.
A PIO pin is used to indicate that the ejec tor latch of the switch has been ope ned. When the user
o pens the ejector latch o f th e switch, the PIO pin is pulled low to inform the CPU that hot swap is
in progress. When the swi tch’s polling task noti ces this eve nt, it forces each port into link down
mode and then lights a LED to indi cate t h at it is safe to unplug the switch.
9.16 Board Stat us LED
9.17 Ethernet Channel LEDs
The LED array on the front pan el displays informati on about all the Ethernet l inks on the board. A
gr ee n/amb er two-col or LED is used for each of the 26 Ethe rnet port c onnect ions (24 10/100 + 2
Gigabit). A push button switch just below the array toggles the LED display from Link /Activity
mode to Li nk / Speed mode. T he de fault LED mode is Link /Acti vity. When the switch butt on is
depress ed, the LEDs are in Link/Speed mode.
Figu re 5. Hot Sw ap LE D
5V
HSR
Table 31. Board Status LED
Status Meaning
Of f Not powered.
Green Powered.
Amber
Pow ered and atte ntion nee ded. Possible condi tions incl ude:
• Over temperature
• Exceeding voltage limits
• IPMB tim e outs
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 55
Hardware
9.17.1 Link/Activity LED Mode
Note: After a port is reconfigured, the port LED can remain amber for up to 30 seconds while STP checks
the s witch for loop paths.
9.17.2 Link/Speed LED Mode
Table 32. LED Descriptions
Status Meaning
Off No E thernet conn ection
Solid Green Good connection , link present
Blinking Green Por t is transmitting or receivi ng packets (activity is on going)
Solid Amber Port is not forwar ding packets. Mana gement ha s disabled the port, an address violation
has occurred, or STP is b locking the port.
Tabl e 3 3. Li nk/Spee d LE D M ode
Port Type Stat us Mea nin g
10/100 Off 10 Mbps
So li d Gr een 10 0 Mb ps
100/ 1 00 0 Soli d Gr een 10 0 Mb ps
So li d Ambe r 10 00 Mbps
56 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Hardware
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Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 57
Reliabil ity and Serviceabi lity
Reliability and Serviceability 10
The MTBF of th e ZT 8101 is 104,000 hours.
58 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Reliability and Serviceabi lity
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Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 59
ASIC T ables
ASIC Ta bles 11
11.1 Fast Filt er Processor
The ZT 8101 supports an extensive filte ring mechani sm and pac ket cl assifi cation, whic h enables a
switch application to filter and classify based on certain protocol fields in the packet. You can also
filter on sp ec ified ingress or egre s s ports .
Fi lt er ing u s es two co n structs :
•The filte r mask defin es whic h fiel ds to filter.
•The rul e ta ble defi nes the filt ering options.
11.2 MARL Table
The M A RL table is used to li mit the flooding domain fo r a specific mu lticast M A C address. The
table size is 256, but one entry is rese rved by ASIC. Both IGMP snooping and GMRP use this
table.
Table 34. MARL Table
Functionality Size
IGMP Snooping 128
Static GMRP Gr ou p 32
Dynamic GMRP Group 64
Software Re served 31
ASIC Reserved 1
60 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
ASIC Tables
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Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 61
IEEE Standards and Protocol Compliance
IEEE Standards and Protocol
Compliance A
Table 35. IEEE Standards Support
Feature Description Supported
IEEE 802.1D Brid ge s pecification incorporating T raf fic Class
Expediting and Dynamic Multicast Filtering Yes
IEEE 802.1P Priority queues for QOS Yes
IEEE 802.3 10Mbps Yes
IEEE 802.3u 100 Mbps Ethernet Yes
IEEE 802.3ab 1 GbE on Category 5 UTP cable Yes
IEEE 802.3ac Frame Extensions for VLAN tagging on Ethernet Yes
IEEE 802.3x Full-duplex Operation/Flow Control on Ethernet Yes
IEEE 802.3ad Link Aggregation Yes
IEEE 802.1Q VLAN Specification Yes
RFC 768 Unr eliable Data gram Protocol (UDP) Yes
RFC 783 Triv ial Fil e Transfer Protocol (TFTP) Yes
RFC 791 / 950 Int ernet Pro tocol (IP) Yes
RFC 792 Internet Control Message Protocol (ICMP) Yes
RFC 826 Address Resolution Protocol (ARP) Yes
RFC 854
RFC 855
RFC 856
RFC 857
Telnet
Telnet Options specification
Telnet Binary transmission
Te lnet Ec ho option
Yes
RFC 1058 Routing Informa tion Protocol (RIP) Yes
RFC 1519 Classless Inter-domain Routing (CIDR) Yes
RFC 1542 BOOTP Yes
RFC 1723 Routing Informa tion Protocol (RIP) version 2 Yes
RFC 2068 Hyper Text Transfer Protocol (HTTP) Yes
RFC 2113 IP Router Alerts No
RFC 2328 Open Shortest Path First (OSPF v2) No
RFC 2131 BOOTP/DHCP Relay Yes
RFC 2236 Internet Group Manag ement P rotoc ol (IGMP)
version 2 Yes
draft-ietf-idmr-dvmrp-v3-10 DVMRPv3 Yes
draft-ietf-idmr-PIM-DM-spec-01 PIMv2 Yes
62 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
IEEE Standa r ds and Pr otocol Complia nce
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Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 63
PICMG Compliance
PICMG Compliance B
Table 36. PICMG Compliance
Number Feature Description Supported
3.13.1 PICMG 2.0 R3.0 CompactPCI Core Specifications Yes
3.13.2 PICMG 2.1 1 CompactPCI Power Interface
Specifications Yes
3.13.3 PICMG 2.10 CompactPCI Keying Specifications Yes
3.13.4 PI CMG 2.9 System Manageme nt Specificat ions Yes
3.13.5 PICMG 2.1 Hot Swap Specifications Yes
3.13.6 PICMG 2.16 Packet Switching Back plane Yes
64 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
PICMG Compliance
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Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 65
Warranty Information
Warranty Information C
C.1 Intel® NetSt ructure™ Compute Boards & Platform
Products
Limited Warranty
Int el wa rr ants to the or iginal owner that the pr od uct deli vered in this p ac k age will be fr ee fr om
defects in material and workmanship for two (2) ye ar(s) following the l atter of: (i) the date of
pur cha s e only if you regi st er by returning the registra tion card as i ndica ted ther eon with proof of
purchase; or (ii) the date of manufacture; or (iii) the registration date if by electronic means
provided su ch reg is tra tion occurs with in 30 days from purc has e. This warra nty does no t cove r the
product if it is dam aged in the proc es s of being installed. Intel recommends that you have the
comp any from whom you purchased this product install the pr oduct.
THE ABOVE WARRANTY IS IN LIEU OF ANY OTHER WARRANTY, WHETHER
EXPRESS, IMPLIED OR STATUT ORY, I NCLUDING, BUT NOT LIMITED TO, ANY
WARRANTY OF MERCHANTABILITY, FITNESS FOR A PAR T ICUL AR PURPOSE, ANY
WARRANTY OF INFRINGEMENT OF ANY OTHER PAR TY'S INTELLECTUAL PROPERTY
RIGHTS, OR ANY WARRANTY ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR
SAMPLE.
This warranty does not cover re place ment of products damaged by abus e, ac ci dent, mis us e,
negle ct, alt erati on, repa ir , d isaster, i mproper install ation or i mproper test ing. If the product i s found
to be otherwise defec tive, Intel, a t its option, will replace or repair the product a t no charge exce pt
as set forth below, provide d that you deliver the p r oduct along with a ret urn ma terial authoriza tion
(RMA) numbe r (see be low) either to the compa ny fr om whom you purchase d it or to Int el. If you
ship the product, you must assume the risk of damage or loss in transit. You must use the original
container (or the equi valent ) and pay the shipping charge. Inte l ma y replace or rep air the product
with ei ther a new or recond it ioned produc t, and t he return ed product b ecomes In tel's prop ert y. Int el
warrant s the repair ed or repl aced produc t to be free fr om defect s in material a nd workmans hip for a
period of the greater of: (i) ni nety (90) days from the ret urn s hipping date; or (ii) the period of time
remaini ng on the original two (2) yea r warra nty.
This warra nty gives you spec ific legal rights and you may have other rights which vary from st ate
to sta te. All parts or components contained in this pr oduct are covered by Intel's limited warra nty
for this product. The product may conta in fully tested, recycled parts, warra nted as if ne w.
C.1.1 Retu rning a Defective Produc t (RMA)
Before returni ng any product, contact an Intel Custom er Support Group to obtain either a Dir ect
Return Authorization (DRA) or Return Ma terial Authorization (RMA). Return Material
Authorizations are only available for products purchased with in 30 days.
Return contact information by geog raphy:
66 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Wa rranty Information
C.1.2 For the Americas
Retu r n Mate r ia l A u th o r izat ion ( RM A ) credi t r eq u ests e- mai l ad d r es s: requests.rma@intel.com
Direct Return Authorization (DRA) repair re quests e-mail address: uspss.repair@intel.com
DRA on- line form: http://support.intel.com/support/motherboards/draform.htm
Intel Business Link (IBL): http://www.intel.com/ibl
Telephone No.: 1-800-INTEL4U or 480-554-49 04
Of fice Hours: Monday - Fri day 0700-1700 MST Winter / P ST Summer
C.1.3 For EMEA
Re tu r n Ma ter ia l A u th orizat ion ( RM A ) e- m a il ad d re s s - emea.fs@intel.com
Direct Return Authorization (DRA) for repair requests e-mail address: emea.fs@intel.com
Intel Business Link (IBL): http://www.intel.com/ibl
Telephone No.: 00 44 1793 403 063
Fax N o.: 00 44 1793 403109
Office Hours: Monday - Friday 0900-1700 UK time
C.1.4 For APAC
R M A / D RA requests email addr ess: apac.rma.front-end@intel.com
Telephone No.: 604-859-311 1 or 604-859-3325
Fax No .: 604-859-3324
Office Hours: Monday - Friday 0800-1700 Malays ia tim e
Return Mate rial Authorization (RMA) requests e-mail address: rma.center.jpss@intel.com
Telephone No.: 81-298-47-0993 or 81-298-47-5417
Fax No .: 81-298-47-4264
Direct Return Authorization (DRA) for repair requests, contact the JPSS Repair center.
E-m ai l address : sugiyamakx@intel.co.jp
Telephone No.: 81-298-47-8920
Fax No .: 81-298-47-5468
Office Hours: Monday - Friday 0830-1730 Japan tim e
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 67
Warranty Information
If the Custome r Support Group verif ies that the product is defective, they wi ll have the Dir ect
Return Authorization/Return Material Authori za tion Department issu e you a DRA/RM A numbe r
to place on the outer pac kage of th e product. Intel cannot accept any produ ct without a DRA/ RMA
numbe r on the pa ckage. Limita tion of Lia bility and Remedies
INTEL SHALL HAVE NO LIABILITY FOR ANY INDIRECT OR SPECULATIVE DAMAGES
(INCLUDING , WITHOUT LIMI TING THE FOREGOING, CONSEQUENTIAL , INCIDENTAL
AND SPECIAL DAMAGES) ARISING FROM THE USE OF OR INABILITY TO USE THIS
PRODUCT, WHETHER ARISING OUT OF CONTRACT, NEGLIGENCE, TORT, OR UNDER
ANY WARRANTY, OR FOR INFRI NGEMENT OF ANY OTHER PARTY'S INTELLECTUAL
PROPERTY RIGHTS, IRRESPECTIVE OF WHETHER INTEL HAS ADVANCE NOTICE OF
THE POSSIB ILITY OF ANY SUCH DAMAGES, INCLUDING, BUT NOT LIMITED TO LOSS
OF USE, BUSINESS INTERRUPTIONS, AND LOSS OF PROFITS. NOTWITHSTANDING
THE FOREGOING, INTEL'S TOTAL LIABILITY FOR ALL CLAIMS UNDER THIS
AGREEMENT SHALL NOT EXCEED THE PRIC E PAID FOR THE PRODUCT. THESE
LIMI TATIO N S O N POT EN T I A L LIA B I LI TIES WER E A N ESSENTI A L EL EM E N T IN
SETTING THE PRODUCT PRICE. INTEL NEITHER ASSUMES NOR AUTHORIZES
ANYONE TO ASSUME FOR IT ANY OTHER LIABILITIES.
Some states do not allow the e xclusion or limit ation of incidental or conseque ntial damages, so the
above limitations or exclusions may not apply to you.
68 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Wa rranty Information
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Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 69
Customer Support
Customer Support D
This appe ndix of fer s techni cal a nd sa les assista nce i nformat ion for t his p roduc t, a nd inform ation on
return ing an Intel NetStructure pro duct for servic e.
D.1 Tech nical Support an d Return for Service
Assistance
For all product returns and sup port issue s, please cont act your Intel produc t dis tributor or Intel
Sales Representati ve f o r specific information.
D.2 Sales Assistance
If you have a sales question, please cont act your local Inte l® NetStructureTM Sales Representative
or the Reg ional Sales Office for your area. Address, telephone and FAX numbers, and a dditional
in f or mation is availab le at Intel's website, located at:
http://www.intel.com/network/csp/sales/
In tel Co r p o r atio n
Telepho ne (in U.S.) 1-800 -755-4444
Telepho ne (Outside U.S.) 1-973-993-3030
70 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Customer Supp ort
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Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 71
Specifications
Specifications E
CompactPCI Specification, PICMG 2.16
Less than 35W power consumption
E.1 Power Requirements
Supply Voltage Vcc +5 VDC +5%, -3%
Supply Current Vcc=5.0 VDC 4 A
Supply Voltage V3.3 V +3.3 VDC +5%, -3%
Supply Current V3.3 V=3. 3 VDC 6 A
Suppl y Voltag e V12. 0 V +12 VDC 10%
Suppl y Curre nt V12 V=12.0 V 20 mA
E.2 Mechanical
Measures 9.2 x 6.3 (233 .35 mm x 160 mm)
Connec tor: IEC-1076-4 -101 (J 1-J 5)
Width: 0.8 (1 slot - 4HP)
E.3 Environmental
Operating Temperature (requires 200 LFM airflow): 0 to 50o C
Storage Temperature: -25o to +55o C
Non-Condensing Relative Humidity: less than 95o per cent at 40 o C
E.4 Certifications
•FCC CFR47 Pa rt 15 Class A
•UL/cUL UL1950 3rd edi tion/CSA C22.2 No. 950- 95
•CE Mark
— EN55022 Class A
— EN55024
— EN60950: 1992
72 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Specifications
•CB report and certifi ca te - IEC 60950 2nd edition
•GR-1089-CORE sections 2, 3
E.5 North America (English Required) (FCC Class A)
FCC Verification Notice
This device complies with Pa rt 15 of the FCC Rule s . Op er ation is subject to th e fo llowing tw o
condi ti ons: (1) thi s device may not cause harmful in te rference, and (2) this devi ce must ac cept any
interference received, including interference that may ca use unde sired operation.
For questions r elated to the EMC pe rform ance of this p roduct, c ontact:
I n tel Corporation
5200 N.E. Elam Young Parkway
Hillsb oro, OR 97124
1-800-628-8686
This equipment has been tested and found to comply with the lim its for a Clas s A dig ital device,
pu rs uant to Part 15 of the FCC Rule s . The s e limits are designe d to provide reason able prot ec tion
ag ainst harmful in terf er ence wh en th e equip ment is oper ated in a commercial envir onment. This
equipment gene rat es, us es, and can radiate ra dio frequency energy if not installed and used in
accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of th is equipment in a resi dential area is likely to caus e harmful interference in which
case the use will b e re q u ired to cor r ect th e in terf er ence at his own expense .
E.6 Canada – Industry Canada (ICES-003 Class A)
(English and French-translated below)
CANADA – INDUSTR Y CANADA
Cet appa rei l numéri que re specte les limites bruits r adi oélec triques applicables aux appare ils
n u mériq u es de Clas se A prescrites dan s la nor me sur le matériel brouilleur : “Appareils
Numé riques”, NMB-003 éd ictée par le Minis tre Canadian des Communications.
( Engl ish translation of the notice above) This digital appara tus does not exceed the Class A limi ts
for ra d io noi se emissions fr o m digita l ap par a tu s s e t out in the in ter fe r en ce- cau sing eq u ip men t
standard entitled “Digital Apparatus,” ICES-003 of the Canadi an Department of Communications.
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 73
Safety Warnings
Safety Warnings F
Caution: System environmental r equirements: Components such as Processor Boards, Ethernet
Switche s , et c. , are designed t o operate with exte rnal airflow. Component s can be destroyed if they
are ope rated wit hout exte rnal airflow. External ai rflow is normally provided by chassi s fans wh en
components are installed in compatible chassis. Never restric t the a irflow through the unit's fan or
vents . Filler panels or ai r ma nage me nt boards mu st be ins tall ed in unus ed chass is slots.
Environmental specificat ions for s pec ific products may dif f er . Refer to product user manuals for
airfl ow r equi rem ents and other environmental specif ica tions.
Warning: Device heatsinks may be hot during no rmal operation: To avoid burns , do not allow
anything to touch heat sinks.
Warning: Av oid injury, fire hazard, or explosion: Do no t o p erate th is pro d u ct i n an explosive
atmosphere.
Caution: Lithium batteries are not field-replaceable units. There is a danger of explosion if a
battery is incorrectly replaced or handled. Do not disassemble or recharge the battery. Do not
dispose of the battery in fire. W hen the battery is replaced, the same type or an equiva lent type
re co mmended by the manufacturer m u st be used. Used batteries must b e d isposed of acco rding to
th e ma nuf acture r 's instructions. R eturn the unit to Intel for battery service.
Warning: Avoid i njury: This product may contai n one or more laser devices that are visually
acc es s ible de pending on t he plug-in modules installe d. Products equipped with a laser device must
comply with International Electrotechn ical Commission (IEC) 60825.
F.1 Mesures de sÉcuritÉ
Review the following precautions to avoid personal injury and prevent damage to this product or
products to which it is conne cted. To avoid pot ential hazards , use the product only as speci f ied.
Read all safety information provided in the component product user manuals and understand the
preca utions as s ociat ed wit h safety sy mbo ls , writ ten warnings, and c autions before acce ssing parts or
locations wit h in t he unit. Save this document for future reference.
Veuillez suivre les me su res de sécurité suivantes pour éviter tout acc ide nt corporel et ne pas endom-
mage r ce produit ou tout au tre produit lui ét ant connecté. Pour évite r tout dange r, ve illez à utiliser le
produit conformém ent aux spécifications mentionné es.
Lis ez toutes les infor ma tions de séc u rité fournies dan s l es manuels de l'utilisateur des pr oduits com-
po san ts et ve i ll ez à bien co mp r en d r e le s me s u res a s so ci ées au x sy mb o le s d e sécur it é, aux av er t isse-
ments écrits et aux mises en garde avant d'accéder à certains éléments ou emplacements de l'unité.
Conse rvez ce document comm e outi l de référence.
74 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Safety Warnings
Attention : exigences environ nementales du sy stème : les co mposants tels que les cartes de
pr oce s se urs , les comm utateurs Etherne t, etc., so nt conçus pour fonctionner ave c un flux d'ai r
exte rne. Le s composants peuvent être détruits s'ils fonc tionnent dans d'autres conditions. Le flux
d'air ext erne est gé néralement produit par le s ventilateurs des châ s si s lorsque les composants sont
installé s dan s des châssi s comp a tib les. Ve il lez à ne jamais obst r uer le flux d'air alime ntant le
vent il ateur ou les conduit s de l'uni té. Des boucl iers ou des pannea ux d e g estion de l' air doive nt être
insta llés dans les connecteurs inu tilisés du châssis. L es spé ci f icat ions environneme ntales peuvent
varier d' un produit à un autr e. Veuillez-vous reporter au manue l de l 'utilisateur pour déterminer les
ex igenc es en mat ière de flux d'a ir et d ' autres spécifications envir o nnementales.
Avertissement : le s di ss i pa t eurs de ch a l eur de l'ap pare il peu v en t êt re ch a uds lors d'un
fonctionnement normal. Pour éviter to u t risque d e brûlure, veillez à ce q ue ri en n' entre en cont act
av ec les diss ipateu rs de ch aleur.
Avertissement : évitez les blessures, les incendies ou les explosions. N'u til is e z pas ce pro dui t
dans une atmosphère présentant des risques d'explosion.
Attention : l es batteries au lithium ne peuvent pas être remplacées sur place. Celles-ci peuvent
exploser si elles sont incorrectement remplacées ou manipulées. Veillez à ne pas désassembler ni à
r echarger la batt er ie. Veill ez à ne pas jeter la ba tterie au feu. Lors du re mplacement de la batterie,
u tilisez le mêm e type de batterie ou un type équi valent reco mman dé par le fabricant. Les batterie s
usa gées doi vent ê tre mis es au re but confo rméme nt aux instr uctions d u fa bricant . Renv oyez l 'unité à
I ntel pour toute répa rat ion de la batterie.
Avertissement : évi tez les ble ssures. Ce produ it peut contenir un ou plus ieurs pé riphériques laser
vis uellement acc ess ibles en fonction des modules plug-in ins tall és . Les produ its équ ipés d'un
périphé rique laser doivent être conform es à la norme IEC (International El ectrotec hnical
Commission) 60825.
F.2 SICHERHEITSHINWEISE
Vorsicht: Anforderungen an die System umgebung: Komponenten wie Prozessor-Boards,
Eth ernet-Schal ter u sw. s ind au f den B etrieb m it exte rner Lu ftzufuhr ausgelegt . Diese Kompone nten
können bei Be trieb ohne externe Luftz ufuhr beschädigt werden. Wenn die Komponenten in ei nem
kompa tiblen Gehäuse ins tallie rt sind, wird Luft von außen normalerweise durch G ehäuselüfter
zuge führt. Blockier en Sie niemal s die Lu ftzufuhr der Ge rätelüfter oder -ventil at oren. In
ung e nu t zt en G eh äu s e s t eckpl ätz en müssen Füll el emente oder Luf t steu erung s ei n he ite n ei n g esetz t
werden. Die Betriebsbedingungen können zwischen den verschiede nen Produkten variieren. Für
die Anforderungen an die Belüftung und andere Betriebsbedingungen siehe die
Benutzer handbücher der jeweiligen Produk te.
Lesen Sie bitte die folgenden Sicherheitshinweise, um Verletzungen und Beschädigungen dieses
Produkts oder der angeschlossenen Produkte zu verhindern. Verwenden Sie das Produkt nur gemäß
den Anwei su ngen, um mögliche Gefahre n zu ver me ide n.
Lesen Sie alle Sicherheitsinformationen in den Benutzerhandbüchern der zu dem Produkt
gehörenden Komponenten und machen Sie sich mit den Hinweisen zu den Sicherheitssymbolen,
schriftlichen Warnungen und Vorsichtsmaßnahmen vertraut, ehe Sie Teile oder Stellen des Geräts
anfa ssen. Bewahre n S ie diese s Dokument gut auf, um späte r dari n nac hlesen zu können.
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 75
Safety Warnings
Warnung: Die Kühlkörper des Geräts können sich während des normal en Betriebs erhitzen:
Um Verbrennungen zu vermeiden, sollte jeder Kontakt mi t den Kühlkörpern vermieden werden.
Warnung: Vermeiden Sie Verletzungen, Feuergefahr oder Explosionen: Unterl assen Sie den
Betrieb di es es P rodukts in einer explosionsgef ährdete n Bet r iebsumgebung.
Vorsicht: Lithiumbatterien sind keine austauschbaren Funktionseinheiten. Bei
unsa chgemäße m Austausc h oder Umg ang mit Ba tterie n bes teht Explo sions gefahr. Zerle gen Sie di e
Ba tteri e n icht und lad en Sie diese nicht wi ed er auf. Entsorgen Sie die Batterie nic ht durch
Ve rbrennen. Beim Auswechseln der Batterie muss dasselbe oder ein der Händlerempfehlung
gl eichwe r t iges Mod ell ver w en det we r den. Gebrauchte B atterien mü ssen en tsprechend de n
Anweis ungen des Herstell ers ents orgt werden. Bringen Sie das Gerä t bitte z ur Bat teriewartung zu
In tel zu rück.
Warnung: Vermeiden Sie Verletzungen: Dieses Produkt kann ei n o der meh r ere Lasergeräte
enthal ten, die abhängig von den installierten Plug-In-Modulen optisch zugänglich sind. Mit einem
Lasergerät ausgestattete Produkte m üssen der Internationa l Electrotechnical Com mission (IEC)
60825 entspr ec hen.
11.3 NORME DI SICURE ZZA
Attenzione: rispettare i requisiti ambientali del sistema. I com pon en ti come le schede d i
processore , i comm utatori Ethernet , e cc ., sono progettati per funzionare in pres enza di un flusso di
aria proveniente dall'esterno, in ass enza del quale rischiano di danneggiarsi irrimediabilmente. In
genere, il fluss o di aria e st erno vie ne generato da appositi venti la tori ins ta llati
contemporanea me n te ai comp onenti nell o chassis compatibi le. Non ostacolare mai il f lusso di aria
convogliato dal ven tilatore e dai condotti dell'unità. I pannel li di cope rtura o le schede per il
controllo dell'aria devono essere installati negli alloggiamenti vuoti dello chass is. I requisiti
ambi entali p osso no varia re a seco nda del prodott o. Per ult eriori infor mazi oni su i requi siti del f luss o
di aria e sugli altr i r equisiti ambientali, consultare la gui da per l 'utente del pr odotto.
Avvertenza: i dissipator i di calore possono scal darsi durante il funzio namento normale. Per
evitare bruciature o danni, evitare il contatto del dissipatore di calore con qualsiasi altro elemento.
Avvertenza: ev it a re lesi oni, pos si b i li cause d i incend io o di es plo si one. Non usare il p rodotto in
un'atm osfera in cui sussiste il rischio di esplosione.
Attenzione: le b a t te ri e a l li t io n on pos so n o essere s o st it u i t e da ll'ute nt e. La sostituzione o l'us o
non corretto della batteria comport a un rischio di esplosione. Non smontare n é ricari ca re la
batteria. Non gettare la batteria nel fuoco. Per la sostituzione, usare il tipo di batteria identico o
eq u ivalente consigliato d al c ostrutt ore. Le batterie usate d evono essere smaltite rispettando le
istruzioni del cost r uttore. Per l a riparazione della batteria , r es tituire l'unità a Intel.
Leggere le norme seguenti per prevenire lesioni personali ed evitare di danneggiare questo prodotto
o altri a cui è collegato. Per evitare qualsiasi pericolo potenziale, usare il prodotto unicamente come
indicato.
Leg g ere tu tte le inform azioni sulla s icurezza fornite nella guida pe r l'uten te relativa al component e e
comprendere le norme associate ai simboli di pericolo, agli avvisi scritti e alle precauzioni da adot-
tare prima di accedere a comp onenti o ar ee dell'unità. Custo d ire il pres ente documento per usi futuri.
76 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Safety Warnings
Avvertenza: evitare le lesioni. Quest o prodotto può contenere uno o più disposi tivi laser
accessibili alla vi sta, a se conda dei mod u li insta llati. I prodotti provvist i di un dispositivo laser
devono essere conformi alla norma 60825 della Commissione elettrotecnica inte rnazionale (IEC).
F.3 INSTRUCCIONES DE SEGURIDAD
Precaución: Re qu i sit o s d e ent o rno pa ra el sist ema: Los componentes del tipo de placas de
procesador, conmutadores de Ethernet, etc., están conc ebidos para funcionar en condiciones que
p ermitan el paso de aire. Lo s compo nent es pued en averi ar se si funcio n an si n que circu le el aire en
su entorno. La circulación del aire suele est ar f acilitada po r los ventilador es incor po rados en e l
arm azón cuando l os com ponente s está n i nstala dos en arma zones compa tib les. Nunc a interr umpa el
pas o del aire por los ventiladores or los resp iraderos. Los paneles de re lleno y las placas para el
control de l a ci rculación d el a ire deben ins tala rs e en ra nuras del cha s is que no est én destinadas a
ningún otro uso. Las características técnicas relativas al e ntorno pueden variar e ntre productos.
Cons ulte los manuale s de usu ari o del product o si nec esita co noce r sus nece s idades en té rm inos de
cir cu laci ó n de ai r e u o tr a s car a cterísti cas técn ic as.
Advertencia: En condiciones de funcionamiento normales, los disipadores de calor pueden
recalentarse. Ev ite que ningún el emento entre en co n tacto con los disi p adore s par a ev itar
quemaduras.
Advertencia: Riesgos de daños, incendio o expl osión: No permit a que el apa rato func ione e n una
atm ós fera que presen te riesgos de ex plos ión.
Precaución: El usuario no debe cambiar las baterías de litio. Si las baterías no se manipulan o
cambian co rrec tamente, exite riesgo de explosión. No desm onte ni re ca rgue la batería. Nunca tire
las baterí as al fuego. Al ca mbi ar la baterí a, es pr ec is o utilizar el mismo ti po o un tipo equivalent e
qu e ha ya sido recomendado por el fabr icant e. La s baterías utili za das deben desec hars e según las
in s tr uccione s del fabricant e. Devuelv a la unidad a Intel si la batería necesita al gún tipo de
operaci ón de mantenimi ento.
Advertencia: Daños person ales: E ste producto puede contener uno o varios dispositivos láser,
que estarán a la vista dependiendo de los módulos enchufables que se hayan instalado. Los
pr oductos provistos de un dispositivo lá se r debe n aj ustarse a la norma 60825 de la Inte rnati onal
Electrotechnical Commission (IEC).
Examine las instruc ciones sobre condiciones de segurid ad que si guen para evitar cu alquier tipo de daño s
personales, así como para evitar perjudicar el producto o productos a los que esté conectado. Para evitar
riesgos potenciale s, utilice el producto única m ente en la form a especi ficada .
Lea toda la inf orma ci ón relat iva a seguridad qu e s e inc luye en los manuale s de usuario de los distintos
com ponentes y procure familiarizarse co n los dis tintos símbolos de seguridad, a dvertencias esc r itas y
normas d e pr eca uc i ón an t es de man i pu l ar las di stintas pi ez as o secci ones de la unid ad . Gu ar d e es t e
documento para consultarlo en el futuro.
Intel® NetStructureTM ZT 8101 10/100 Ethe rnet Switch Technical Product Speci fication 77
Serial Port Requirements
Serial Port Requirements G
G.1 Pin Assignments
Table 37. RJ-45 Pin Assignments
RJ-45 Pin Signal
1RTS
2DTR
3TxD
4GND
5GND
6RxD
7DSR
8CTS
Ta ble 38. DB-9 Pin Assignmen ts
DB-9 Pin S ignal
1GND Shield
2RxD
3TxD
4DTR
5GND
6DSR
7RTS
8CTS
9NC
78 Intel® Ne tS tru c tu reTM ZT 8101 10/100 Ether net Switch Techni cal Pr oduc t Speci fic ation
Serial Port Requirements
G.1.1 Building the Cable
The ser ial cab l e allow s you to man age th e s witc h fr om the s er i al po r t o n the fro nt pa n el . To build
this cable, use a RJ-45 connec tor for the switch, a DB-9 connector for the te rminal, and the
following diagram as a guide for the wiring.
Figure 6. Male RJ-45 Connecto r
