[AK8963]
MS1356-E-02 - 1 - 2013/10
AK8963
3-axis Electronic Compass
1. Features
A 3-axis electronic compass IC with high sensitive Hall sensor technology.
Best adapted to pedestrian city navigation use for cell phone and other portable appliance.
Functions:
• 3-axis magnetometer device suitable for compass application
• Built-in A to D Converter for magnetometer data out
• 14-/16-bit selectable data out for each 3 axis magnetic components
- Sensitivity: 0.6 µT/LSB typ. (14-bit)
0.15µT/LSB typ. (16-bit)
• Serial interface
- I2C bus interface.
Standard mode and Fast mode compliant with Philips I2C specificat ion Ve r.2.1
- 4-wire SPI
• Operation modes:
Power-down, Single measurement, Continuous measurement, External trigger measurement, Self
test and Fuse ROM access.
• DRDY function for measurement data ready
• Magnetic sensor overflow monitor function
• Built-in oscillator for internal clock source
• Power on Reset circuit
• Self test function with built-in internal magnetic source
Operating temperatures:
• -30°C to +85°C
Operating supply voltage:
• Analog power supply +2.4V to +3.6V
• Digital Interface supply +1.65V to analog power supply voltage.
Current consumption:
• Power-down: 3 µA typ.
• Measurement:
- Average power consumption at 8 Hz repetition rate: 280µA typ.
Package:
AK8963C 14-pin WL-CSP (BGA): 1.6 mm × 1.6 mm × 0.5 mm (typ.)
AK8963N 16-pin QFN package: 3.0 mm × 3.0 mm × 0.75 mm (typ.)
[AK8963]
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2. Overview
AK8963 is 3-axis electronic compass IC with high sensitive Hall sensor technology.
Small package of AK8963 incorporates magnetic sensors for detecting terrestrial magnetism in the X-axis,
Y-axis, and Z-a xis, a s ensor dr iv ing c ircui t, signal a m plifier chai n, and an ari thmetic circuit for processi ng the
signal from each sensor. Self test function is also incorporated. From its compact foot print and thin package
feature, it is suit able for map heading up purp os e in G PS-equipped cell phon e t o real ize pedes tri an nav iga tion
function.
AK8963 has the following features:
(1) Silicon mono li thic H a ll -effect magnetic sensor with magnetic concentrator realizes 3-axis magnetometer
on a silicon chip. Analog circuit, digital logic, power block and interface block are also integrated on a
chip.
(2) Wide dynamic measurement range and high resolution with lower current consumption.
Output data resolution: 14-bit (0.6 µT/LSB)
16-bit (0.15 µT/LSB)
Measurement range: ± 4900 µT
Average current at 8Hz repetition rate: 280µA typ.
(3) Digital serial interface
- I2C bus interface to control AK8963 functions and to read out the measured data by external CPU. A
dedicated power supply for I2C bus interface can work in low-voltage apply as low as 1.65V.
- 4-wire SPI is also s upported. A dedicated power su ppl y for SPI can w ork i n low -v oltage apply as low as
1.65V.
(4) DRDY pin and register inform to system that measurement is end and set of data in registers are ready to
be read.
(5) Device is worked by on-chip oscillator so no external clock source is necessary.
(6) Self test function with internal magnetic source to confirm magnetic sensor operation on end products.
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3. Table of Cont e nt s
1. Features ...................................................................................................................................... 1
2. Overview ..................................................................................................................................... 2
3. Table of Contents ........................................................................................................................ 3
4. Circuit Con figurat ion .................................................................................................................... 5
4.1. Block Diagram ...................................................................................................................... 5
4.2. Block Function ..................................................................................................................... 5
4.3. Pin Function ......................................................................................................................... 6
5. Ov er all Characteristics ................................................................................................................ 7
5.1. Absolut e Maxim um Ratin gs ................................................................................................. 7
5.2. Recommende d O per at i ng Conditions ................................................................................. 7
5.3. Elect rical Chara cter ist ics ..................................................................................................... 7
5.3.1. DC Char a c ter is tics ........................................................................................................ 7
5.3.2. AC Ch a rac te r ist ic s ........................................................................................................ 8
5.3.3. Analog Circu it Characteristics ...................................................................................... 9
5.3.4. 4-wire SPI ................................................................................................................... 10
5.3.5. I2C Bus Interf ace.......................................................................................................... 11
6. Functional Explanation .............................................................................................................. 12
6.1. Power States ...................................................................................................................... 12
6.2. Reset Functions ................................................................................................................. 12
6.3. Operation Modes ............................................................................................................... 13
6.4. Descr iption of Each O peration Mo de................................................................................. 14
6.4.1. Power-down M ode ...................................................................................................... 14
6.4.2. Si ngl e M easurem ent M ode ........................................................................................ 14
6.4.3. Co nt inuous Measurement M ode 1 and 2 ................................................................... 15
6.4.3.1. Data Ready.......................................................................................................... 15
6.4.3.2. Normal Read Seque nce ...................................................................................... 15
6.4.3.3. Data Read Start During Measurement ................................................................ 16
6.4.3.4. Data Skip ............................................................................................................. 17
6.4.3.5. End Operation ..................................................................................................... 17
6.4.3.6. Magnetic S ensor Over flo w .................................................................................. 18
6.4.4. Ext er nal Trigger M easurement Mode ......................................................................... 18
6.4.5. Self-test Mode............................................................................................................. 19
6.4.6. Fuse ROM Access Mode ............................................................................................ 19
7. Serial Int erface .......................................................................................................................... 20
7.1. 4-wire SPI .......................................................................................................................... 20
7.1.1. Wr it ing Dat a ................................................................................................................ 20
7.1.2. Re ading Dat a .............................................................................................................. 21
7.2. I2C Bus Interface ................................................................................................................ 22
7.2.1. Dat a T r ansfer .............................................................................................................. 22
7.2.1.1. Change of Data ................................................................................................... 22
7.2.1.2. S t art/Stop Condition............................................................................................. 22
7.2.1.3. Acknowledge ....................................................................................................... 23
7.2.1.4. Slave Address ..................................................................................................... 23
7.2.2. WRITE Instruction ...................................................................................................... 24
7.2.3. READ Instruction ........................................................................................................ 25
7.2.3.1. One Byte READ .................................................................................................. 25
7.2.3.2. Multiple By t e RE AD ............................................................................................. 25
8. Registers ................................................................................................................................... 26
8.1. Descr ipt ion of Registers ..................................................................................................... 26
8.2. Register Map ...................................................................................................................... 27
8.3. Det ai led Descr iption of Regist ers ...................................................................................... 28
8.3.1. WIA: Device ID ........................................................................................................... 28
8.3.2. INFO: Information ....................................................................................................... 28
8.3.3. ST 1: St at us 1 .............................................................................................................. 28
8.3.4. HX L to HZH: M easurement Data ................................................................................ 29
8.3.5. ST 2: St at us 2 .............................................................................................................. 30
8.3.6. C NT L1: Control1 ......................................................................................................... 30
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8.3.7. C NT L2: Control2 ......................................................................................................... 31
8.3.8. ASTC: Self Test Control .............................................................................................. 31
8.3.9. TS1, TS2: Test 1, 2 ..................................................................................................... 31
8.3.10. I2CDIS: I2C Disable .................................................................................................... 31
8.3.11. ASAX, ASA Y, ASAZ: Sensitivity Adjustment values ................................................... 32
9. Exampl e of Recomme nde d External Connec tion ..................................................................... 33
9.1. I2C Bus Int er f ace ................................................................................................................ 33
9.2. 4-wire SPI .......................................................................................................................... 34
10. Package .................................................................................................................................... 35
10.1. Marking .............................................................................................................................. 35
10.2. Pin Assignment .................................................................................................................. 35
10.3. Out lin e D i me ns i ons ............................................................................................................ 36
10.4. Recommended Foot Print Pattern ..................................................................................... 37
11. Relationship bet ween the Magnetic Field and Output Code .................................................... 38
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4. Circ uit Configur ati on
4.1. Block Diagram
3-axis
Hall
sensor
MUX
SDA/SI
DRDY
Chopper
SW
HE-Drive
Pre-
AMP
Integrator & ADC
Interface,
Logic
& Register
SCL/SK
VDD
Voltage
Reference
Timing
Control
VID
SO
OSC1
CSB
Magnetic source
CAD0
VSS
POR
FUSE ROM
CAD1
TST1
TRIG
RSV
RSTN
OSC2
4.2. Block Function
Block
Function
3-axis Hall sensor
Monolithic Hall elements.
MUX
Multiplexer for selecting Hall elements.
Chopper SW
Performs chopping.
HE-Drive
Magnetic sensor drive circuit for constant-current driving of sensor
Pre-AMP
Fixed-gain differential amplifier used to amplify the magnetic sensor signal.
Integrator & ADC
Integrates and amplifies pre-AMP output and performs analog-to-digital
conversion.
OSC1
Generates an operating clock for sensor measurement.
12MHz(typ.)
OSC2
Generates an operating clock for sequencer.
128kHz(typ.)
POR
Power On Reset circuit. Generates reset signal on rising edge of VDD.
Interface Logic &
Register
Exchanges data with an external CPU.
DRDY pin indicates sensor measurement end and data is ready to be read.
I2C bus interface using two pins, namely, SCL and SDA. S t andard mode and Fast
mode are supported. The low-voltage specification can be supported by applying
1.65V to the VID pin.
4-wire SPI is also supported by SK, SI, SO and CSB pins.
4-wire SPI works in VID pin voltage down to 1.65V, too.
Timing Control
Generates a timing signal required for internal operation from a clock generated
by the OSC1.
Magnetic So urc e
Generates magnetic field for self test of magnetic sensor.
FUSE RO M
Fuse for adjustment
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4.3. Pin Function
QFN
Pin
No.
WLCSP
Pin
No.
Pin
name I/O Power
supply
system Type Function
1 A1 DRDY O VID CMOS Data Ready output pin.
“H” active. Informs measurement ended and data is ready to be read.
2 A2 CSB I VID CMOS Chip select pin for 4-wire SPI.
“L” active. Connect to VID when selecting I
2
C bus interface.
3 A3
SCL
I VID CMOS
When the I
2
C bus interface is selected (CSB pin is connected to VID)
SCL: Control data clock input pin
Input: Schmidt trigger
SK When the 4-wire SPI is selected
SK: Serial clock input pin
5 A4
SDA I/O
VID CMOS
When the I
2
C bus interface is selected (CSB pin is connected to VID)
SDA: Control data input/output pin
Input: Schmidt trigger, Output: Open drain
SI I When the 4-wire SPI is selected
SI: Serial data input pin
15 B1 VDD - - Power Analog Power supply pi n.
4 B3 RSV O VID CMOS Reserved.
Keep this pin electrical l y non-connected.
6 B4 SO O VID CMOS
When the I
2
C bus interface is selected (CSB pin is connected to VID)
Hi-Z output. Keep this pin elect rically non-connected.
When the 4-wire SPI is selected
Serial data output pin
13 C1 VSS - - Power Ground pi n.
14 C2 TST1 I VDD CMOS T est pin.
Pulled down by 100kΩ internal resister. Keep this pin electrically
non-connected or connect to VSS.
7 C3 TRG I VID CMOS
External trigger puls e input pin.
Enabled only in External trigger mode. Pulled down by 100kΩ internal
resister. When External trigger mode is not in use, keep this pin
electrical l y non-connected or connect to VSS.
8 C4 VID - - Power Digital interf ace posit i ve power supply pin.
12 D1 CAD0 I VDD CMOS
When the I
2
C bus interface is selected (CSB pin is connected to VID)
CAD0: Slave address 0 input pin
Connect to VSS or VDD.
When the 4-wire serial interface is selected
Connect to VSS.
11 D2 CAD1 I VDD CMOS
When the I
2
C bus interface is selected (CSB pin is connected to VID)
CAD1: Slave address 1 input pin
Connect to VSS or VDD.
When the 4-wire serial interface is selected
Connect to VSS.
10 D4 RSTN I VID CMOS Reset pi n.
Resets registers by setting t o “L”. Connect to VID when not in use.
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5. Overall Characteristics
5.1. Absolute Maximum Ratings
Vss=0V
Parameter
Symbol
Min.
Max.
Unit
Power supply voltage
(Vdd, Vid)
V+
-0.3
+4.3
V
Input voltage
VIN
-0.3
(V+)+0.3
V
Input current
IIN
-
±10
mA
Storage temperature
TST
-40
+125
°C
(Note 1) If the device is used in conditions ex ceeding these values, the device m ay be destroyed. Norm al operations
are not guaranteed i n such exceeding conditions.
5.2. Recommended Operating Conditions
Vss=0V
Parameter
Remark
Symbol
Min.
Typ.
Max.
Unit
Operating temperature
Ta
-30
+85
°C
Power supply voltage
VDD pin voltage
Vdd
2.4
3.0
3.6
V
VID pin voltage
Vid
1.65
Vdd
V
5.3. Electrical Characteristics
The following conditions apply unless otherwise noted:
Vdd=2.4V to 3.6V, Vid=1.65V to Vdd, Temperature range=-30°C to 85°C
5.3.1. D C C haracteristi cs
Parameter
Symbol
Pin
Condition
Min.
Typ.
Max.
Unit
High level input voltage 1
VIH1
CSB
RSTN
TRG
70%Vid
V
Low level input voltage 1
VIL1
30%Vid
V
High level input voltage 2
VIH2
SK/SCL
SI/SDA
70%Vid
Vid+0.5
V
Low level input voltage 2
VIL2
-0.5
30%Vid
V
High level input voltage 3
VIH3
CAD0
CAD1
70%Vdd
V
Low level input voltage 3
VIL3
30%Vdd
V
Input current 1
IIN1
SK/SCL
SI/SDA
CSB
RSTN
Vin=Vss or Vid
-10
+10
µ
A
Input current 2
IIN2
CAD0
CAD1
Vin=Vss or Vd d
-10
+10
µA
Input current 3
IIN3
TRG
Vin=Vid
100
µA
Input current 4
IIN4
TST1
Vin=Vdd
100
µ
A
Hysteresis input voltage
(Note 2)
VHS
SCL
SDA
Vid≥2V
5%Vid
V
Vid<2V
10%Vid
V
High level output voltage 1
VOH1
SO
DRDY
IOH≥-100µA
80%Vid
V
Low level output voltage 1
VOL1
IOL≤+100µA
20%Vid
V
Low level output voltage 2
(Note 3)(Note 4)
VOL2
SDA
IOL≤3mA V id≥2V
0.4
V
IOL≤3mA V id<2V
20%Vid
V
Current consumption (Note
5)
IDD1
VDD
VID
Power-down mode
Vdd=Vid=3.0V
3
10
µ
A
IDD2
When magnetic sensor
is driven
5
10
mA
IDD3
Self-test mode
9
15
mA
IDD4
(Note 6)
0.1
5
µA
(Note 2) Schmitt trigger input (reference value for design)
(Note 3) Maximum load capacitance: 400pF (capacitive load of each bus line applied to the I2C bus interface)
(Note 4) Output is open-drain. Connect a pull-up resistor externally.
(Note 5) Without any resistance load
(Note 6) (case1)Vdd=ON, Vid=ON, RSTN p in = “L”. (case2)Vdd=ON, Vid=OFF(0V),RSTN pin = “L”.
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(case3)Vdd=Off(0V), Vid=On.
5.3.2. AC Characteristics
Parameter
Symbol
Pin
Condition
Min.
Typ.
Max.
Unit
Power supply rise ti me
(Note 7)
PSUP
VDD
VID
Period of tim e that VDD
(VID) changes from 0.2V
to Vdd (Vid). (Note 8)
50
ms
POR completion time
(Note 7)
PORT
Period of time after PSUP
to Pow e r -down mode
(Note 8)
100
µs
Power supply turn off
voltage
SDV
VDD
VID
Turn off voltage to enable
POR to restart (Note 8)
0.2
V
Power supply turn on
interval (Note 7)
PSINT
VDD
VID
Period of time that voltage
lower than SDV n eeded to
be kept to enable POR to
restart (Note 8)
100
µs
Wait ti me befor e mode
setting
Twat
100
µs
(Note 7) Reference value for design
(Note 8) When POR circuit detects the rise of VDD/VID voltage, it resets internal circuits and initializes the
registers. After reset, AK8963 transits to Power-down mode.
Parameter
Symbol
Pin
Condition
Min.
Typ.
Max.
Unit
Trigger input effective
pulse width
tTRIGH
TRG
200
ns
Trigger input effective
frequency (Note 9)
tTRIGf
TRG
100
Hz
(Note 9) The value when t he period of time from the end o f the measurement to the next trigger input is 1.3ms.
VIH
tTRIGH
0V
PSINT:100µs
PSUP:50ms
PORT:100µs
Power down mode
Powe dow n m ode
SDV:0.2V
VDD/(VID)
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Parameter
Symbol
Pin
Condition
Min.
Typ.
Max.
Unit
Reset in put effective pulse
width (“L”)
tRSTL
RSTN
5
µs
VIL
tRSTL
5.3.3. Analog Circuit Characteristics
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Measurement data output bit
DBIT
BIT = “0”
14
bit
BIT = “1”
16
T i me for me a su remen t
TSM
Singl e me as ur e me nt mo de
7.2
9
ms
Magnetic se nsor sensitivity
BSE
Tc=25°C (Note 10)
0.57
0.6
0.63
µT/LSB
BIT = “0”
BIT = “1”
0.1425
0.15
0.1575
Magnetic sensor measurement
range (Note 11)
BRG
Tc=25°C (Note 10)
±4912
µT
Magnetic se nsor initial offset
(Note 12)
Tc=25°C
BIT = “0”
-500
500
LSB
(Note 10) Value after sensitivity is adjusted using sensitivity fine adjustment data stored in Fuse ROM. (Refer to
8.3.11 for how to adjust.)
(Note 11) Reference value for design
(Note 12) Value of measure ment data register on shipment without ap pl ying magnetic field on purpose.
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5.3.4. 4-wire SPI
4-wire SPI is compliant with mode 3
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
CSB setup time
Tcs
50
ns
Data setup time
Ts
50
ns
Data hold time
Th
50
ns
SK hi gh time Twh
Vid≥2.5V
100
ns
2.5V>Vid≥1.65V
150
ns
SK low time
Twl
Vid≥2.5V
100
ns
2.5V>Vid≥1.65V
150
ns
SK setup time
Tsd
50
ns
SK to SO delay time
(Note 13)
Tdd 50 ns
CSB to SO del
ay time
(Note 13)
Tcd 50 ns
SK rise time (Note 14)
Tr
100
ns
SK fall time (Note 14)
Tf
100
ns
CSB high time
Tch
150
ns
(Note 13) SO load capacitance: 20pF
(Note 14) Reference value for design.
[4-wire SPI]
CSB
SK
SI
Tcs
SO
Ts
Tsd
Tcd
Th
Tdd
Hi-Z
Hi-Z
Twh
Twl
Tch
[Rise time and fall time]
SK
Tr
Tf
0.9Vid
0.1Vid
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5.3.5. I2C Bus Interface
CSB pin = “H”
I2C bus interface is compliant with Standard mode and Fast mode. Standard/Fast mode is selected
automatically by fSCL.
(1) Standard mode
fSCL≤100kHz
Symbol
Parameter
Min.
Typ.
Max.
Unit
fSCL
SCL cl ock frequency
100
kHz
tHIGH
SCL clock "High" time
4.0
µs
tLOW
SCL clock "Low" time
4.7
µs
tR
SDA and SC L rise time
1.0
µs
tF
SD A and SCL fall time
0.3
µs
tHD:STA
Start Condition hold time
4.0
µs
tSU:STA
Start Condition setup time
4.7
µs
tHD:DAT
SDA hold time ( vs . SCL fall ing edge)
0
µs
tSU:DAT
SDA se tup time (vs. SCL ri s ing edge)
250
ns
tSU:STO
Stop Conditio n setup time
4.0
µs
tBUF
Bus free time
4.7
µs
(2) Fast mode
100kHz<fSCL≤400kHz
Symbol
Parameter
Min.
Typ.
Max.
Unit
fSCL
SCL cl ock frequency
400
kHz
tHIGH
SCL clock "High" time
0.6
µs
tLOW
SCL clock " Low" time
1.3
µs
tR
SDA and SC L rise time
0.3
µs
tF
SDA and SCL fall time
0.3
µs
tHD:STA
Start Condition hold time
0.6
µs
tSU:STA
Start Condition setup time
0.6
µs
tHD:DAT
SDA hold time ( vs . SCL fall ing edge)
0
µs
tSU:DAT
SDA se tup time (vs. SCL ri s ing edge)
100
ns
tSU:STO
Stop Condition setup time
0.6
µs
tBUF
Bus free time
1.3
µs
tSP
Noise suppre s si on pulse width
50
ns
[I2C bus inter face t i m ing]
1/fSCL
SCL VIH2
VIL2
tHIGH
SCL
SDA
VIH2
tLOW
tBUF
tHD:STA
tR
tF
tHD:DAT
tSU:DAT
tSU:STA
Stop
Start
Start
Stop
tSU:STO
VIL2
VIH2
VIL2
tSP
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6. Functiona l Expl a nati on
6.1. Power States
When VDD and VID are turned on from Vdd=OFF (0V) and Vid=OFF (0V), all registers in AK8963 are
initialized by POR circuit and AK8963 transits to Power-down mode.
All the states in the table below can be set, although the transition from state 2 to state 3 and the transition from
state 3 to state 2 are prohibited.
Table 6.1
State
VDD
VID
Power state
1
OFF (0V)
OFF (0V)
OFF (0V).
It doesn’t affect external interface. Digital input
pins other than SCL and SDA pin should be fixed
to “L”(0V).
2
OFF (0V)
1.65V to 3.6V
OFF (0V). It doesn’t affect external interface.
3
2.4V to 3.6V
OFF (0V)
OFF (0V).
It doesn’t affect external interface. Digital input
pins other than SCL and SDA pin should be fixed
to “L” (0V).
4
2.4V to 3.6V
1.65V to Vdd
ON
6.2. Reset Functions
When the power state is ON, always keep Vid≤Vdd.
Power-on reset (POR) works until Vdd reaches to the operation effect ive voltage (about 1.4V: reference v alue
for design) on power-on sequence. After POR is deactivated, all registers are initialized and transits to power
down mode.
When Vdd=2.4 ~ 3.6V, POR circuit and VID monitor circuit are active. When Vid=0V, AK8963 is in reset
status and it consumes the current of reset state (IDD4).
AK8963 has four types of reset;
(1) Power on reset (POR)
When Vdd rise is detected, POR circuit operates, and AK8963 is reset.
(2) VID monitor
When Vid is turned OFF (0V), AK8963 is reset.
(3) Reset pin (RSTN)
AK8963 is reset by Reset pin. When Reset pin is not used, connect to VID.
(4) Soft reset
AK8963 is reset by setting SRST bit.
When AK8963 is reset, all registers are initialized and AK8963 transits to Power-down mode.
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6.3. Operation Modes
AK8963 has following seven operation modes:
(1) Power-down mode
(2) Single measurement mode
(3) Continuous measurement mode 1
(4) Continuous measurement mode 2
(5) External trigger measurement mode
(6) Self-test mode
(7) Fuse ROM access mode
By setting CNTL1 register MODE[3:0] bits, the operation set for each mode is started.
A transition from one mode to another is shown below.
MODE[3:0]=“0001”
MODE[3:0]=“0000”
Transits automatically
MODE[3:0]=“0010”
MODE[3:0]=“0000”
MODE[3:0]=“0110”
MODE[3:0]=“0000”
MODE[3:0]=“0100”
MODE[3:0]=“0000”
MODE[3:0]=“1000
MODE[3:0]=“0000”
Transits automatically
MODE[3:0]=“1111
MODE[3:0]=“0000”
Power-down
mode
Continuous measure ment mode 2
Sensor is measured per iodically in 100Hz.
Transits to Pow er-down mode by writing
MODE[3:0]=“0000”.
Self-test mode
Sensor is self-tested and the resul t is output. Transits
to Power-down mode automatically.
Single measurement mode
Sensor is measured for one time and data is output.
Transits to Power-down mode automatically after
measurement ended.
External trigger me asurement mode
Sensor is measured for on e time by external trigger.
Waits for next trigger after data is output. Transits t o
Power-down mode by writing MODE[3:0]=“0000”.
Fuse ROM access mode
Turn on the circuit neede d to read out Fuse ROM.
Transits to Pow er-down mode by writing
MODE[3:0]=“0000”.
Continuous measure ment mode 1
Sensor is measured per iodically in 8Hz.
Transits to Pow er-down mode by writing
MODE[3:0]=“0000”.
Figure 6.1 Operation modes
When power is turned ON, AK8963 is in power-down mode. When a specified value is set to MODE[3:0],
AK8963 transits to the specified m ode and starts opera tion. When user wants to change operat ion mode, transit
to power-down mode fir st and then transit to other modes. After power-down mode is set, at least 100µs(Twat)
is needed before setting another mode.
[AK8963]
MS1356-E-02 - 14 - 2013/10
6.4. Description of Each Operation Mode
6.4.1. Power-do wn Mode
Power to almost all internal circuits is turned off. All registers are accessible in power-down mode. However,
fuse ROM data cannot be read correctly. Data st ored in read/write registers are remained. They can be reset by
soft reset.
6.4.2. Si ngle Me as urement Mode
When single measurement mode (MODE[3:0]=“0001”) is set, sensor is measured, and after sensor
measurement and signal processing is finished, measurement data is stored to measurement data registers
(HXL to HZH), then AK8963 transits to power-down mode aut omatically. On tr ansition to pow er-down mode,
MODE[3:0] turnes to “0000”. At the same time, DRDY bit in ST1 register turnes to “1”. This is called “Data
Ready”. When any of measurement data register (HXL to HZH) or ST2 register is read, DRDY bit turnes to
“0”. It remains “1” on transition from Power-down mode to another mode. DRDY pin is in the same state as
DRDY bit. (Refer to Figure 6.2.)
When sensor is measuring (Measurement period), measurement data registers (HXL ~ HZH) keep the
previous data. Therefore, it is possible to read out data even in measurement period. Data read out in
measurement period are previous data. (Refer to Figure 6.3.)
Operation Mode: Single measuremnet
Power-down (1) (2) (3)
Measurement period
Measurement Data Register
Last Data Measurement Data (1) Data(2) Data(3)
DRDY
Data read Data(1) Data(3)
Register Write MODE[3:0]="0001" MODE[3:0]="0001" MODE[3:0]="0001"
Figure 6.2 Single me a sur e me n t mod e: whe n data is read out of measurement period
Operation Mode: Single measuremnet
Power-down (1) (2) (3)
Measurement period
Measurement Data Register
Last Data Measurement Data (1) Data(2) Data(3)
DRDY
Data read Data(1)
Register Write MODE[3:0]="0001" MODE[3:0]="0001" MODE[3:0]="0001"
Figure 6.3 Single measurement mode: when data read started during measurement period
[AK8963]
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6.4.3. Continuous Measureme nt Mode 1 and 2
When continuous measurement mode 1 (MODE[3:0]=“0010”) or 2 (MODE[3:0]=“0110”) is set, sensor is
measured periodically at 8Hz or 100Hz respectively. When sensor measurement and signal processing is
finished, measurement data is stored to measurement data registers (HXL ~ HZH) and all circuits except for
the minimum circuit required for counting cycle lentgh are turned off (PD). When the next measurement
timing comes, AK8963 wakes up automatically from PD and starts measurement again.
Continuous measurement mode ends when power-down mode (MODE[3:0]=“0000”) is set. It repeats
measurement until power-down mode is set.
When continuous measurement mode 1 (MODE[3:0]=“0010”) or 2 (MODE[3:0]= “0110”) is set again while
AK8963 is already in continuous measurement mode, a new measurement starts. ST1, ST2 and measurement
data registers (HXL ~ HZH) will not be initialized by this.
(N-1)th Nth (N+1)th
PD Measurement PD Measurement PD
8Hz or 100Hz
Figure 6.4 Continuous measurement mode
6.4.3.1. Data Ready
When measurement data is stored and ready t o be read, DRDY bit in ST1 regis ter turne s to “1”. This is called
“Data Ready”. DRDY pin is in the same state as DRDY bit. When measurement is performed correctly,
AK8963 becomes Data Ready on transition to PD after measurement.
6.4.3.2. Normal Read Seq ue nc e
(1) Check Data Ready or not by any of the following method.
- Polling DRDY bit of ST1 register
- Monitor DRDY pin
When Data Ready, proceed to the next step.
(2) Read ST1 register (not needed when polling ST1)
DRDY: Shows Data Ready or not. Not when “0”, Data Rea dy when “1”.
DOR: Shows if any data has been skipped before the current data or not. There are no skipped data
when “0”, there are skipped data when “1”.
(3) Read measurement data
When any of measurement data register (HXL ~ HZH) or ST2 register is read, AK8963 judges that data
reading is started. When data reading is started, DRDY bit and DOR bit turnes to “0”.
(4) Read ST2 register (required)
HOFL: Shows if magnetic sensor is overflown or not. “0” means not overflown, “1” means
overflown.
When ST2 register is read, AK8963 judges that data reading is finished. Stored measurement data is
protected duri ng data r ea ding and da ta i s n ot upd at ed. By readi ng ST2 r egis ter, t his pr ote cti on is r eleas ed.
It is required to read ST2 register after data reading.
[AK8963]
MS1356-E-02 - 16 - 2013/10
(N-1)th Nth (N+1)th
PD Measurement PD Measurement PD
Measurement Data Register
(N-1)th Nth (N+1)
DRDY
Data read ST1 Data(N) ST2 ST1 Data(N+1) ST2
Figure 6.5 Normal read sequesnce
6.4.3.3. Data Read Start During Measurement
When sensor is measuring (Measurement period), measurement data registers (HXL ~ HZH) keep the
previous da ta. Therefore, it is possible to read out data even in m easurement peri od. If data is started to be read
during measurement period, previous data is read.
(N-1)th Nth (N+1)th
PD Measurement PD Measurement PD
Measurement Data Register
(N-1)th Nth
DRDY
Data read ST1 Data(N) ST2 ST1 Data(N) ST2
Figure 6.6 Data read start during measuremnet
[AK8963]
MS1356-E-02 - 17 - 2013/10
6.4.3.4. Data Skip
When Nth data was not read before (N+1)th measurement ends, Data Ready remains until data is read. In this
case, a set of measurement data is skipped so that DOR bit turnes to “1”. (Refer to Figure 6.7)
When data reading started after Nth measurement ended and did not finish reading before (N+1)th
measurem ent ended, Nth measurem ent data is protected to keep correct data. In this case, a set of measurem ent
data is skipped and not stored so that DOR bit turnes to “1”. (Refer to Figure 6.8)
In both case, DOR bit turnes to “0” at the next start of data reading.
(N-1)th Nth (N+1)th
PD Measurement PD Measurement PD
Measurement Data Register
(N-1)th Nth (N+1)
DRDY
DOR
Data read ST1 Data(N+1) ST2
Figure 6.7 Data Skip: When data is not read
(N-1)th Nth (N+1)th (N+2)th
PD
Measurement
PD
Measurement
PD
Measurement
PD
Measurement Data Register
(N-1)th Nth (N+2)
Data register is protedted
because data is being read
Not data ready
DRDY because data is not updated
(N+1)th data is skipped
DOR
Data read ST1 DataN ST2 ST1 Data(N+2)
Figure 6.8 Data Skip: When data read has not been finished before the next measurement ends
6.4.3.5. End Opera t ion
Set power-down mode (MODE[3:0]=“0000”) to end continuous measurement mode.
[AK8963]
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6.4.3.6. Magnetic Sensor Overflow
AK8963 has the limitation for measurement range that the sum of absolute values of each axis should be
smaller than 4912μT.
|X|+|Y|+|Z| < 4912μT
When the magnetic field exceeded this limitation, data stored at measurement data are not correct. This is
called Magnetic Sensor Overflow.
When magnetic sensor overlow occurs, HOFL bit turns to “1”. When the n ext measur em ent starts, it returns to
“0”.
6.4.4. Exter nal Trigger Mea surem ent Mode
When externa l trigger m easureme nt mode (MODE[3:0] =“0100”) is set , AK8963 wai ts for tr igger input. Whe n
a pulse is input from TRG pin, sensor measurement is started on the rising edge of TRG pin. When sensor
measurement and signal processing is finished, measurement data is stored to measurement data registers
(HXL to HZH) and all circuits exc ept for the minim um circuit r equired for tri gger input waiting are turned of f
(PD state). When the next pulse is input, AK8963 wakes up automatically from PD and starts measurement
again.
External trigger measurement mode ends when power-down mode (MODE[3:0]=“0000”) is set. AK8963
keeps waiting for the trigger input until the power-down mode is set.
When external trigger measurement mode (MODE[3:0]=“0100”) is set again while AK8963 is already in
external trigger measurement mode, it starts to wait for the trigger input again. The trigger input is ignored
while sensor is measuring.
Data read sequence and functions of read-only registers in external trigger measurement mode is the same as
continuous measurement mode.
[AK8963]
MS1356-E-02 - 19 - 2013/10
6.4.5. Self-test Mode
Self-test mode is used to check if the sensor is working normally.
When self-test m ode (MODE[3:0]=“1000”) is set, magnetic field is generated by the i nternal magnetic source
and sensor is measured. Measurement data is stored to measurement data registers (HXL to HZH), then
AK8963 transits to power-down mode automatically.
Before setting self-test mode, write “1” to SELF bit of ASTC register. Data read sequence and functions of
read-only registers in self-test mode is the same as single measurement mode.
When self-test is end, write “0” to SELF bit then proceed to other operation.
<Self-test Sequence>
(1) Set Power-down mode. (MODE[3:0]=“0000”)
(2) Write “1” to SELF bit of ASTC register (other bits in this register should be kept “0”)
(3) Set Self-test Mode. (MODE[3:0]=“1000”)
(4) Check Data Ready or not by any of the following method.
- Polling DRDY bit of ST1 register
- Monit or DRDY pin
When Data Ready, proceed to the next step.
(5) Read measurement data (HXL to HZH)
(6) Write “0” to SELF bit of ASTC register
(7) Set Power-down mode. (MODE[3:0]=“0000”)
<Self-test Judgement>
When measurement data read by the above sequence is in the range of following table after sensitivity
adjustment (refer to 8.3.11), AK8963 is working normally.
14-bit output(BIT=“0”)
HX[15:0]
HY[15:0]
HZ[15:0]
Criteria
-50 =< HX =< 50
-50 =< HY =< 50
-800 =< HZ =< -200
16-bit output(BIT=“1”)
HX[15:0]
HY[15:0]
HZ[15:0]
Criteria
-200 =< HX =< 200
-200 =< HY =< 200
-3200 =< HZ =< -800
6.4.6. Fuse ROM Access Mode
Fuse ROM access mode is used to read Fuse ROM data. Sensitivity adjustment data for each axis is stored in
fuse ROM.
Set Fuse ROM Access m ode (MO DE[3:0] =“1111”) before r eading F us e ROM data. W hen Fuse ROM Access
mode is set, circuits reauired for reading fuse ROM are turned on.
After reading fuse ROM data, set power-down mode (MODE[3:0]=“0000”) before the transition to another
mode.
[AK8963]
MS1356-E-02 - 20 - 2013/10
7. Serial Interface
AK8963 supports I2C bus interface and 4-wire SPI. A selection is made by CSB pin. When used as 3-wire SPI,
set SI pin and SO pin wired-OR externally.
CSB pin=“L”: 4-wire SPI
CSB pin=“H”: I2C bus interface
7.1. 4-wire SPI
The 4-wire SPI consists of four digital signal lines: SK, SI, SO, and CSB, and is provided in 16bit protocol.
Data consists of Read/Write control bit (R/W), register address (7bits) and control data (8bits).
To read out all a xes m easure men dat a (X, Y, Z), an option to read out m ore t han one byte dat a using automatic
increment command is available. (Sequencial read operation)
CSB pin is low active. Input data is taken in on the rising edge of SK pin, and output data is changed on the
falling edge of SK pin. (SPI MODE3)
Communication starts when CSB pin transits to “L” and stops when CSB pin transits to “H”. SK pin must be
“H” during CSB pi n is in tran sition. Also, it i s prohibited t o change SI pin during CSB pin is “H” and SK pin is
“H”.
7.1.1. Writing Data
Input 16 bits data on SI pin in synchronous with the 16-bit serial clock input on SK pin. Out of 16 bits input
data, the first 8 bits specify the R/W control bit (R/W=“0” when writing) and register address (7bits), and the
latter 8 bits are control data (8bits). When any of addresses listed on Table 8.1 is input, AK8963 recognizes
that it is selected and takes in latter 8 bits as setting data.
If the num ber of clock pul ses i s l ess than 16, no data is writt en. If the number of clock pulses i s mor e than 16,
data after the 16th clock pulse on SI pin are ignored.
It is not compliant with sereal write operation for multiple addresses.
CSB
SK
SI
(INPUT)
1
RW
SO
(OUTPUT)
Hi-Z
A6
A5
A4
A3
A2
A1
A0
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
D7
D6
D5
D4
D3
D2
D1
D0
Figure 7.1 4-wire SPI Wr iting D a ta
[AK8963]
MS1356-E-02 - 21 - 2013/10
7.1.2. Re adi ng Data
Input the R/W control bit (R/W=“1”) and 7 bit register address on SI pin in sy nchr onous with t he first 8 bits of
the 16 bits of a serial clock input on SK pin. Then AK8963 outputs the data held in the specified register with
MSB first from SO pin.
When clocks are input continuously after one byte of data is read, the address is incremented and data in the
next address is output. Accor dingly , after the falling edge of t he 15th clock and CSB pin is “L”, the data in t he
next address is output on S O pin. Whe n CSB pin is driven “L” to “H”, SO pi n is placed in the high-impedance
state.
AK8963 has two incrementation lines; 00H ~ 0CH and 10H ~ 12H. F or exampl e, data is read as follow s: 00H
-> 01H ... -> 0BH -> 0CH -> 00H -> 01H ..., or 10H -> 11H -> 12H -> 10H …
0DH and 0EH are reserved addresses. Do not access to those addresses. When specified address is other than
00H ~ 12H, AK8963 recognizes that it is not selected and keeps SO pin in high-impedance state. Therefore,
user can use other addresses for other devices.
CSB
SK
SI
(INPUT)
1
RW
SO
(OUTPUT)
Hi-Z
A6
A5
A4
A3
A2
A1
A0
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
D7
D6
D5
D4
D3
D2
D1
D0
Hi-Z
Figure 7.2 4-wire SPI Reading Data
[AK8963]
MS1356-E-02 - 22 - 2013/10
7.2. I2C Bus Interface
The I2C bus interface of AK8963 supports the standard mode (100 kHz max.) and the fast mode (400 kHz
max.).
7.2.1. Data Transfer
To access AK8963 on the bus, generate a start condition first.
Next, transmit a one-byte slave address including a device address. At this time, AK8963 compares the slave
address with its own address. If these addresses match, AK8963 generates an acknowledgement, and then
executes READ or WRITE instruction. At the end of instruction execution, generate a stop condition.
7.2.1.1. Change of Dat a
A change of data on the SDA line must be made during "Low" period of the clock on the SCL line. When the
clock signal on the SCL line is "High", the state of the SDA line must be stable. (Data on the SDA line can be
changed only when the clock signal on the SCL line is "Low".)
During the SCL line is "High", the state of data on the SDA line is changed only when a start condition or a
stop condition is generated.
SCL
SDA
DATA LINE
STABLE :
DATA VALID
CHANGE
OF DATA
ALLOWED
Figure 7.3 Data Change
7.2.1.2. Start/Stop Conditio n
If the SDA line is driven to "Low" from "High" when the SCL line is "High", a start condition is generated.
Every instruction starts with a start condition.
If the SDA line is driven to "High" from "Low" when the SCL line is "High", a stop condition is generated.
Every instruction stops with a stop condition.
SCL
SDA
STOP CONDITION
START CONDITION
Figure 7.4 Start and Stop Co nd itions
[AK8963]
MS1356-E-02 - 23 - 2013/10
7.2.1.3. Acknowledge
The IC that is transmitting data releases the SDA line (in the "High" state) after sending 1-byte data.
The IC that receives the data drives the SDA line to "Low " on the next clock pulse. This operation is referred as
acknowledge. With this operation, whether data has been transferred successfully can be checked.
AK8963 generates an acknowledge after reception of a start condition and slave address.
When a WRITE instruction is executed, AK8963 generates an acknowledge after every byte is received.
When a READ instruction is executed, AK8963 generates an acknowledge then transfers the data stored at the
specified address. Next, AK8963 releases the SDA line then monitors the SDA line. If a master IC generates
an acknowledge instead of a stop condition, AK8963 transmits the 8bit data stored at the next address. If no
acknowledge is generated, AK8963 stops data transmission.
SCL FROM
MASTER
acknowledge
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
1
9
8
START
CONDITION
Clock pulse
for acknowledge
not acknowledge
Figure 7.5 Generation of Acknowledge
7.2.1.4. Slave A ddress
The slave address of AK8963 can be selected from the following list by setting CAD0/1 pin. When CAD pin is
fixed to VSS, the corresponding slave address bit is “0”. When CAD pin is fixed to VDD, the corresponding
slave address bit is “1”.
Table 7.1 Slave Address and CAD0/1 pin
CAD1
CAD0
Slave A ddress
0
0
0CH
0
1
0DH
1
0
0EH
1
1
0FH
MSB LSB
0 0 0 1 1 CAD1 CAD0 R/W
Figure 7.6 Slave Address
The first byte including a slave address is transmitted after a start condition, and an IC to be accessed is
selected from the ICs on the bus according to the slave address.
When a slave address is transferred, the IC whose device address matches the transferred slave address
generates an acknowledge then executes an instruction. The 8th bit (least significant bit) of the first byte is a
R/W bit.
When the R/W bit is set to "1", READ instruction is executed. When the R/W bit is set to "0", WRITE
instruction is executed.
[AK8963]
MS1356-E-02 - 24 - 2013/10
7.2.2. WRITE Instruction
When the R/W bit is set to "0", AK8963 performs write operation.
In write operation, AK8963 generates an acknowledge after receiving a start condition and the first byte (slave
address) then receives the second byte. The second byte is used to specify the address of an internal control
register and is based on the MSB-first configuration.
MSB LSB
A7 A6 A5 A4 A3 A2 A1 A0
Figure 7.7 Register Addr ess
After receiving the second byte (register address), AK8963 generates an acknowledge then receives the third
byte.
The third and the following bytes represent control data. Control data consists of 8 bits and is based on the
MSB-first configuration. AK8963 generates an acknowledge after every by te is received. Data transfer always
stops with a stop condition generated by the master.
MSB LSB
D7 D6 D5 D4 D3 D2 D1 D0
Figure 7.8 Control Data
AK8963 can write multiple bytes of data at a time.
After reception of the third byte (control data), AK8963 generates an acknowledge then receives the next data.
If additional data is received instead of a stop condition after receiving one byte of data, the address counter
inside the LSI chip is automatically incremented and the data is written at the next address.
The address is incremented from 00H to 0CH or from 10H to12H. When the address is in 00H~0CH, the
address goe s back to 00 H after 0C H. When the address is in 10H~12H, the address goe s back to 10 H after 12 H.
Actual data is written only to Read/Write registers (refer to 8.2).
SDA
S
T
A
R
T
A
C
K
A
C
K
S
Slave
Address
A
C
K
Register
Address(n)
Data(n)
P
S
T
O
P
Data(n+x)
A
C
K
Data(n+1)
A
C
K
A
C
K
R/W="0"
Figure 7.9 WRITE Instructio n
[AK8963]
MS1356-E-02 - 25 - 2013/10
7.2.3. READ Instruction
When the R/W bit is set to "1", AK8963 performs read operation.
If a master IC generates an acknowledge instead of a stop condition after AK8963 transfers the data at a
specified address, the data at the next address can be read.
Address can be 00H~0CH and/or 10H~12H.When address is counted up to 0CH in 00H~0CH, the next
address returns to 00H. When address is counted up to 12H in 10H~12H, the next address returns to 10H.
AK8963 supports one byte read and multiple byte read.
7.2.3.1. One Byte READ
AK8963 has an address counter inside the LSI chip. In current address read operation, the data at an address
specified by this counter is read.
The internal address counter holds the next address of the most recently accessed address.
For example, if the address m ost recently access ed (for READ instruction) is address "n", and a current address
read operation is attempted, the data at address "n+1" is read.
In one byte read operation, AK8963 generates an acknowledge after receiving a slave address for the READ
instruction (R/W bit="1"). Next, AK8963 transfers the data specified by the internal address counter starting
with the next clock pulse, then increments the internal counter by one. If the master IC generates a stop
condition instead of an acknowledge after AK8963 transmits one byte of data, the read operation stops.
SDA
S
T
A
R
T
A
C
K
A
C
K
S
Slave
Address
A
C
K
Data(n)
Data(n+1)
P
S
T
O
P
Data(n+x)
A
C
K
Data(n+2)
A
C
K
R/W="1"
Figure 7.10 One Byte READ
7.2.3.2. Multiple Byte REA D
By multiple byte read operation, data at an arbitrary address can be read.
The multiple byte read operation requires to execute WRITE instruction as dummy before a slave address for
the READ instruction (R/W bit="1") is transmitted. In random read operation, a start condition is first
generated then a slave address for the WRITE instruction (R/W bit="0") and a read address are transmitted
sequentially.
After AK8963 generates an acknowledge in respons e to this address transmission, a start condition and a slave
address for the READ instruction (R/W bit="1") are generated again. AK8963 generates an acknowledge in
response to this slave address transmission. Next, AK8963 transfers the data at the specified address then
increments the internal address counter by one. If the master IC generates a stop condition instead of an
acknowledge after data is transferred, the read operation stops.
SDA
S
T
A
R
T
A
C
K
A
C
K
S
Slave
Address
A
C
K
Register
Address(n)
Data(n)
P
S
T
O
P
Data(n+x)
A
C
K
Data(n+1)
A
C
K
R/W="0"
S
T
A
R
T
A
C
K
S
Slave
Address
R/W="1"
Figure 7.11 M ultiple Byte READ
[AK8963]
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8. Registers
8.1. Description of Registers
AK8963 has registers of 20 addresses as indicated in Table 8.1. Every address consists of 8 bits data. Data is
transferred to or received from the external CPU via the serial interface described previously.
Table 8.1 Register Table
Name Address
READ/
WRITE
Description
Bit
width
Explanation
WIA
00H
READ
Device ID
8
INFO
01H
READ
Information
8
ST1
02H
READ
Status 1
8
Data status
HXL
03H
READ
Measurement data
8
X-axis data
HXH
04H
8
HYL
05H
8
Y-axis data
HYH
06H
8
HZL
07H
8
Z-axis data
HZH
08H
8
ST2
09H
READ
Status 2
8
Data status
CNTL1
0AH
READ/
WRITE
Control 1
8
Function Control
CNTL2
0BH
Control 2
8
ASTC
0CH
READ/
WRITE
Self-test 8
TS1
0DH
READ/
WRITE
Test 1
8
DO NOT ACCESS
TS2
0EH
READ/
WRITE
Test 2
8
DO NOT ACCESS
I2CDIS
0FH
READ/
WRITE
I
2
C disable 8
ASAX
10H
READ
X-axis sen s itivi ty adjustment val ue
8
Fuse ROM
ASAY
11H
READ
Y-axis sen s itivi ty adjustment val ue
8
Fuse ROM
ASAZ
12H
READ
Z-axis sensitivity adjustment va l ue
8
Fuse ROM
RSV
13H
READ
Reserved
8
DO NOT ACCESS
Addresses 00H~0CH and 10H~12H are compliant with automatic increment function of serial interface
respectively. Values of addresses 10H~12H can be rea d o nly i n Fuse ROM access mode. In other m odes, read
data is not correct.
[AK8963]
MS1356-E-02 - 27 - 2013/10
8.2. Register Map Table 8.2 Register Map
Addr
Register
Name
D7
D6
D5
D4
D3
D2
D1
D0
Read-only Register
00H
WIA
0
1
0
0
1
0
0
0
01H
INFO
INFO7
INFO6
INFO5
INFO4
INFO3
INFO2
INFO1
INFO0
02H
ST1
-
0
0
-
0
0
DOR
DRDY
03H
HXL
HX7
HX6
HX5
HX4
HX3
HX2
HX1
HX0
04H
HXH
HX15
HX14
HX13
HX12
HX11
HX10
HX9
HX8
05H
HYL
HY7
HY6
HY5
HY4
HY3
HY2
HY1
HY0
06H
HYH
HY15
HY14
HY13
HY12
HY11
HY10
HY9
HY8
07H
HZL
HZ7
HZ6
HZ5
HZ4
HZ3
HZ2
HZ1
HZ0
08H
HZH
HZ15
HZ14
HZ13
HZ12
HZ11
HZ10
HZ9
HZ8
09H
ST2
0
0
0
BITM
HOFL
0
0
0
Write/read Register
0AH
CNTL1
0
0
0
BIT
MODE3
MODE2
MODE1
MODE0
0BH
CNTL2
0
0
0
0
0
0
0
SRST
0CH
ASTC
-
SELF
-
-
-
-
-
-
0DH
TS1
-
-
-
-
-
-
-
-
0EH
TS2
-
-
-
-
-
-
-
-
0FH
I2CDIS
I2CDIS7
I2CDIS6
I2CDIS5
I2CDIS4
I2CDIS3
I2CDIS2
I2CDIS1
I2CDIS0
Read-only Register
10H
ASAX
COEFX7
COEFX6
COEFX5
COEFX4
COEFX3
COEFX2
COEFX1
COEFX0
11H
ASAY
COEFY7
COEFY6
COEFY5
COEFY4
COEFY3
COEFY2
COEFY1
COEFY0
12H
ASAZ
COEFZ7
COEFZ6
COEFZ5
COEFZ4
COEFZ3
COEFZ2
COEFZ1
COEFZ0
13H
RSV
-
-
-
-
-
-
-
-
When VDD is turned ON, POR functi on works and all registers of AK8963 are initialized regardless of VID
status. To write data to or to read data from register, VID must be ON.
TS1 and TS2 are test registers for shipment test. Do not use these registers.
RSV is reserved register. Do not use this register.
[AK8963]
MS1356-E-02 - 28 - 2013/10
8.3. Detailed Description of Registers
8.3.1. WIA: Device ID
Addr
Register
name
D7 D6 D5 D4 D3 D2 D1 D0
Read-only register
00H
WIA
0
1
0
0
1
0
0
0
Device ID of AKM. It is described in one byte and fixed value.
48H: fixed
8.3.2. I NFO: Information
Addr
Register
name
D7 D6 D5 D4 D3 D2 D1 D0
Read-only register
01H
INFO
INFO7
INFO6
INFO5
INFO4
INFO3
INFO2
INFO1
INFO0
INFO[7:0]: Device information for AKM.
8.3.3. ST1: Status 1
Addr Register
name
D7 D6 D5 D4 D3 D2 D1 D0
Read-only register
02H
ST1
-
0
0
-
0
0
DOR
DRDY
Reset
0
0
0
0
0
0
0
0
DRDY: Data Ready
"0": Normal
"1": Data is ready
DRDY bit turns to “1” when data is ready in single m easurem ent mode, continuo us measur ement m ode1,
2, external tr igger m easur ement m ode or self-test mode. I t returns t o “0” when any one of ST2 register or
measurement data register (HXL~HZH) is read.
DOR: Data Overrun
"0": Normal
"1": Data overrun
DOR bit turns to “1” when data has been skipped in continuous measurement mode or external trigger
measurement mode. It returns to “0” when any one of ST2 register or measurement data register
(HXL~HZH) is read.
[AK8963]
MS1356-E-02 - 29 - 2013/10
8.3.4. HXL to HZH: Measurement Data
Addr
Register name
D7
D6
D5
D4
D3
D2
D1
D0
Read-only register
03H
HXL
HX7
HX6
HX5
HX4
HX3
HX2
HX1
HX0
04H
HXH
HX15
HX14
HX13
HX12
HX11
HX10
HX9
HX8
05H
HYL
HY7
HY6
HY5
HY4
HY3
HY2
HY1
HY0
06H
HYH
HY15
HY14
HY13
HY12
HY11
HY10
HY9
HY8
07H
HZL
HZ7
HZ6
HZ5
HZ4
HZ3
HZ2
HZ1
HZ0
08H
HZH
HZ15
HZ14
HZ13
HZ12
HZ11
HZ10
HZ9
HZ8
Reset
0
0
0
0
0
0
0
0
Measurement data of magnetic sensor X-axis/Y-axis/Z-axis
HXL[7:0]: X-axis measurement data lower 8bit
HXH[15:8]: X-axis measurement data higher 8bit
HYL[7:0]: Y-axis measurement data lower 8bit
HYH[15:8]: Y-axis measurement data higher 8bit
HZL[7:0]: Z-axis measurement data lower 8bit
HZH[15:8]: Z-axis measurement data higher 8bit
Measuremnet data is stored in two’s complement and Little Endian format. Measurement range of each
axis is -8190 ~ +8190 in decimal in 14-bit output, and -32760 ~ 32760 in 16-bit output.
Table 8.3 Measurement data format
Measurement data (each axis) [15:0]
Magnetic flux
density [µT]
Two’s complement
Hex
Decimal
14-bit output
0001 11 11 11 11 11 10
1FFE
8190
4912(max.)
|
|
|
|
0000 0000 00 00 00 01
0001
1
0.6
0000 0000 00 00 00 00
0000
0
0
1111 1111 11 11 11 11
FFFF
-1
-0.6
|
|
|
|
1110 00 00 00 00 0010
E002
-8190
-4912(min.)
16-bit output
0111 1111 1111 1000
7FF8
32760
4912(max.)
|
|
|
|
0000 0000 00 00 00 01
0001
1
0.15
0000 0000 00 00 00 00
0000
0
0
1111 1111 11 11 11 11
FFFF
-1
-0.15
|
|
|
|
1000 0000 0000 10 00
8008
-32760
-4912(min.)
[AK8963]
MS1356-E-02 - 30 - 2013/10
8.3.5. ST 2: Status 2
Addr
Register
name
D7 D6 D5 D4 D3 D2 D1 D0
Read-only register
09H
ST2
0
0
0
BITM
HOFL
0
0
0
Reset
0
0
0
0
0
0
0
0
HOFL: Magnetic sensor overflow
"0": Normal
"1": Magnetic sensor overflow occurred
In single measurement mode, continuous measurement mode, external trigger measurement mode and
self-test mode, magnetic sensor may overflow even though measurement data regiseter is not saturated.
In thi s case, m easurement data is not c orrect an d HOF L bit turns to “1”. W hen ne xt measurement stars, it
returns to “0”. Refer to 6.4.3.6 for detailed information.
BITM: Output bit setting (mirror)
"0": 14-bit output
"1": 16-bit output
Mirror data of BIT bit of CNTL1 register.
ST2 register has a role as data reading end register, also. When any of measurement data register is read in
continuous m easurem ent m ode or external trigger m easurem ent mode, it m eans data reading st art and taken
as data reading until ST2 register is read. Therefore, when any of measurement data is read, be sure to read
ST2 register at the end.
8.3.6. CNTL1: Control1
Addr
Register name
D7
D6
D5
D4
D3
D2
D1
D0
Write/rea d register
0AH
CNTL1
0
0
0
BIT
MODE3
MODE2
MODE1
MODE0
Reset
0
0
0
0
0
0
0
0
MODE[3:0]: Operation mode setting
"0000": Power-down mode
"0001": Single measurement mode
"0010": Continuous measurement mode 1
"0110": Continuous measurement mode 2
"0100": External trigger measurement mode
"1000": Self-test mode
"1111": Fuse ROM access mode
Other code settings are prohibited
BIT: Output bit setting
"0": 14-bit output
"1": 16-bit output
When each mode is set, AK8963 transits to the set mode. Refer to 6.3 for detailed information.
[AK8963]
MS1356-E-02 - 31 - 2013/10
8.3.7. CNTL2: Control2
Addr
Register name
D7
D6
D5
D4
D3
D2
D1
D0
Write/rea d register
0BH
CNTL2
0
0
0
0
0
0
0
SRST
Reset
0
0
0
0
0
0
0
0
SRST: Soft reset
"0": Normal
"1": Reset
When “1” is set, all registers are initialized. After reset, SRST bit turns to “0” automatically.
8.3.8. ASTC: Sel f Test Cont rol
Addr
Register name
D7
D6
D5
D4
D3
D2
D1
D0
Write/rea d register
0CH
ASTC
-
SELF
-
-
-
-
-
-
Reset
0
0
0
0
0
0
0
0
SELF: Self test control
"0": Normal
"1": Generate magnetic field for self-test
Do not write “1” to any bit other than SELF bit in ASTC regist er. If “1” is written to any bit other than SELF
bit, normal measurement can not be done.
8.3.9. TS1, TS2: Test 1, 2
Addr
Register name
D7
D6
D5
D4
D3
D2
D1
D0
Write/rea d register
0DH
TS1
-
-
-
-
-
-
-
-
0EH
TS2
-
-
-
-
-
-
-
-
Reset
0
0
0
0
0
0
0
0
TS1 and TS2 registers are test registers for shipment test. Do not use these registers.
8.3.10. I2CDIS: I2C Disable
Addr
Register name
D7
D6
D5
D4
D3
D2
D1
D0
Write/rea d register
0FH
I2CDIS
I2CDIS7
I2CDIS6
I2CDIS5
I2CDIS4
I2CDIS3
I2CDIS2
I2CDIS1
I2CDIS0
Reset
0
0
0
0
0
0
0
0
This register disables I2C bus interface. I2C bus i nterface is enabled i n default. To disable I2C bus interface,
write “00011011” to I2CDIS register. Then I2C bus interface is disabled.
Once I2C bus interface is di sabled, it is impossible to write other value to I2CDIS register. To enable I 2C bus
interface, reset AK8963 or input start condition 8 times continuously.
[AK8963]
MS1356-E-02 - 32 - 2013/10
8.3.11. ASAX, ASAY, ASAZ: Sensitivity Adjustment values
Addr
Register
name
D7 D6 D5 D4 D3 D2 D1 D0
Read-only register
10H
ASAX
COEFX7
COEFX6
COEFX5
COEFX4
COEFX3
COEFX2
COEFX1
COEFX0
11H
ASAY
COEFY7
COEFY6
COEFY5
COEFY4
COEFY3
COEFY2
COEFY1
COEFY0
12H
ASAZ
COEFZ7
COEFZ6
COEFZ5
COEFZ4
COEFZ3
COEFZ2
COEFZ1
COEFZ0
Reset
-
-
-
-
-
-
-
-
Sensitivity adjustment data for each axis is stored to fuse ROM on shipment.
ASAX[7:0]: Magnetic sensor X-axis sensitivity adjustment value
ASAY[7:0]: Magnetic sensor Y-axis sensitivity adjustment value
ASAZ[7:0]: Magnetic sensor Z-axis sensitivity adjustment value
<How to adjust sensitivity>
The sensitivity adjustment is done by the equation below;
( )
+
×−
×= 1
128 5.0128ASA
HHadj
,
where H is the measurement data read out from the measurement data register, ASA is the sensitivity
adjustment value, and Hadj is the adjusted measurement data.
[AK8963]
MS1356-E-02 - 33 - 2013/10
9. Example of Recommended E xt er nal Conne c t ion
9.1. I2C Bus Interface
<AK8963C>
Pins of dot circle should be kept non-connected.
<AK8963N>
Same as AK8963C.
AK8963C
(Top view)
Interrupt
Host CPU
I2C i/f
Power for i/f
VID
POWER 1.65V~Vdd
VDD
POWER 2.4V~3.6V
0.1µF
0.1µF
TST2
RSTN
VID
SO
SDA
/SI
TRG
RSV
SCL
/SK
CSB
TST1
CAD0
CAD1
VSS
VDD
DRDY
Slave address select
CAD1 CAD0 address
VSS VSS 0 0 0 1 1 0 0 R/W
VSS VDD 0 0 0 1 1 0 1 R/W
VDD VSS 0 0 0 1 1 1 0 R/W
VDD VDD 0 0 0 1 1 1 1 R/W
GPIB
4 3 2 1
D
C
B
A
[AK8963]
MS1356-E-02 - 34 - 2013/10
9.2. 4-wire SPI
<AK8963C>
Pins of dot circle should be kept non-connected.
<AK8963N>
Same as AK8963C.
AK8963C
(Top view )
Interrupt
Host CPU
SPI i/f
Power for i/f
VID
POWER 1.65V~Vdd
VDD
POWER 2.4V~3.6V
0.1µF
0.1µF
TST2
RSTN
VID
SO
SDA
/SI
TRG
RSV
SCL
/SK
CSB
TST1
CAD0
CAD1
VSS
VDD
DRDY
GPIB
4 3 2 1
D
C
B
A
[AK8963]
MS1356-E-02 - 35 - 2013/10
10. Package
10.1. Marking
<AK8963C>
• Product name: 8963
• Date code: X1X2X3X4X5
X1 = ID
X2 = Year code
X3X4 = Week code
X5 = Lot
<Top view>
<AK8963N>
• Company logo: AKM
• Product name: 8963
• Date code: X1X2X3X4X5
X1 = ID
X2 = Year code
X3X4 = Week code
X5 = Lot
<Top view>
10.2. Pin Assignment
<AK8963C>
4
3
2
1
D
RSTN
CAD1
CAD0
C
VID
TRG
TST1
VSS
B
SO
RSV
VDD
A
SDA/SI
SCL/SK
CSB
DRDY
<Top view>
<AK8963N>
14
SO
AK8963N
<Top view>
15
TRG
16
VID
8
7
RSV
4
SCL/SK
3
NC
9
RSTN
10
CAD0
11
CAD1
12
CSB
2
6
TST1
DRDY
5
VSS
13
SDA/SI
VDD
NC
1
AKM
8963
X
1
X
2
X
3
X
4
X
5
8963
X
1
X
2
X
3
X
4
X
5
[AK8963]
MS1356-E-02 - 36 - 2013/10
10.3. Outline Dimensions
<AK8963C> [mm]
<AK8963N> [mm]
0.05 C
0.57 max.
C
0.40
0.13
0.4
1.2
1.2
0.4
0.24±0.03
4 3 2 1
1.59±0.03
D
1.59±0.03
C
B
A
1 2 3 4
3.00
±
0.05
1 4
8
5
12 9
13
16
3.00±0.05
A
B
0.75±0.05
0.05 C
0.50 REF.
0.25±0.05
1.8±0.10
4 1
1.8±0.10
0.25 REF.
0.35±0.10
8
5
13
16
9 12
C0.25
0.10 M C A B
16X
0.45 REF.
[AK8963]
MS1356-E-02 - 37 - 2013/10
10.4. Recommended Foot Print Pattern
<AK8963C> [mm]
<AK8963N> [mm]
2.25
0.575
0.30
0.50
[AK8963]
MS1356-E-02 - 38 - 2013/10
11. Relationship between the Magnetic Field and Output Code
The measurement data increases as the magnetic flux density increases in the arrow directions.
<AK8963C> <AK8963N>
Impor tant Notice
• These products and their specifications are subject to change without notice.
When you consider any use or application of these produc
ts, please make inquiries the sales office of
Asahi Kasei Microdevices Corporation (AKM)
or authorized distributors as to current status of the
products.
• AKM assumes no liability for infringement of any patent, intellectual property, or other rights in the
application or use of any information contained herein.
•
Any export of these products, or devices or systems containing them, may require an export license or
other official approval under the law and regulations of the country of export pertaining to customs and
tariffs, currency exchange, or strategic materials.
• AKM products are neither intended nor authorized for use as critical componentsNote1) in a n y safet y, lif e
support, or other hazard related device or systemNote2), and AKM assumes no responsibility for such use,
except for the use approved with the express written consent by Representative Director of AKM. As
used here:
Note1) A cr itical component is one w hose fa ilure to fu nction or perfor m m ay reasonably be expected to
result, whether directly or i
ndirectly, in the loss of the safety or effectiveness of the device or system
containing it, and which must therefore meet very high standards of performance and reliability.
Note2) A ha zard rel ated dev ice or sy s tem is one de signed or intende d for l ife supp ort or m aintenance of
safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to
function or perform may reasonably be expected to result in loss of life or in significant injury or
damage to person or property.
•
It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or
otherwise places
the product wi th a t hir d party, to noti fy such thir d party in advance of the abov e cont ent
and conditions, and the buye r or distributor agrees to assume any and all responsibility and liability for
and hold AKM harmless from any and all claims arising fro
m the use of said product in the absence of
such notification.
8963
XXXXX
Y
Z
X
8963
XXXXX
8963
XXXXX
Y
Z
X
AKM
8963
XXXXX
Y
Z
X
AKM
8963
XXXXX
AKM
8963
XXXXX
Y
Z
XY
Z
X
