Innovative PowerTM - 1 - www.active-semi.com
Copyright © 2015 Active-Semi, Inc.
ActiveQRTM is a trademark of Active-Semi.
FEATURES
•DCM and Quasi-Resonant Operation
•High VDD Sustain Voltage for Wide Output
Range Application such as QC2.0
•Primary Side Constant Current Control
•Integrated Patented Frequency Foldback
Technique
•Integrated Patented Line Compensation
•Built-in Soft-Start Circuit
•Line Under-Voltage, Thermal, Output Over-
voltage, Output Short Protections
•Current Sense Resistor Short Protection
•Transformer Short Winding Protection
•30mW Standby Power
•Complies with Global Energy Efficiency and
CEC Average Efficiency Standards
•Sop-8 Packages
APPLICATIONS
•AC/DC Adaptors/Chargers for Cell Phones,
Cordless Phone, PDAs, E-books
•Adaptors for Portable Media Player, DSCs,
Set-top boxes, DVD players, records
•Linear Adapter Replacements
GENERAL DESCRIPTION
The ACT520/ACT520A is a high performance peak
current mode PWM controller. ACT520/ACT520A
applies ActiveQRTM and frequency foldback
technique to reduce EMI and improve efficiency.
ACT520/ACT520A’s maximum design switching
frequency is set at 130kHz. Very low standby
power, good dynamic response and accurate
voltage regulation is achieved with an opto-coupler
and the secondary side control circuit.
The idle mode operation enables low standby
power of 30mW with small output voltage ripple. By
applying frequency foldback and ActiveQRTM
technology, ACT520/ACT520A increases the
average system efficiency compared to
conventional solutions and exceeds the latest
ES2.0 efficiency standard with good margin.
ACT520/ACT520A integrates comprehensive
protection. In case of over temperature, over
voltage, short winding, short current sense resistor,
open loop an d overload conditions, it would enter
into auto restart mode including Cycle-by-Cycle
current limiting.
ACT520/ACT520A is to achieve no overshoot and
very short rise time even with big capacitive load
with the built-in fast and soft start process.
In low line full load condition, ACT520/ACT520A is
able to be designed to work in first valley turn on
DCM mode to meet different types of applications.
Quasi-Resonant (QR) operation mode can
effectively improve efficiency during DCM
operation, and reduce the EMI noise and further
reduce the components in input filter.
ACT520/ACT520A uses an opto-coupler feedback
architecture to provide accurate constant voltage
even at low loads, constant current (CV/CC)
regulation. Integrated line and primary inductance
compensation circuitry provides accurate constant
current operation despite wide variations in line
voltage and primary inductance.
ACT520 is idea for QC2.0 adaptor application up to
30 Watt.
ACT520A is typical for low standby power (<20mW)
12W charger application.
Figure 1:
Simplified Application Circuit
ACT520/ACT520A
ActiveQRTM Quasi-Resonant PWM Controller
Rev 0, 05-Jun-15
ACT520/ACT520A
Rev 0, 05-Jun-15
Innovative PowerTM - 2 - www.active-semi.com
Copyright © 2015 Active-Semi, Inc.
ActiveQRTM is a trademark of Active-Semi.
PIN CONFIGURATION
PIN DESCRIPTIONS
PART NUMBER TEMPERATURE RANGE PACKAGE PINS PACKING
METHOD TOP MARK
ACT520SH-T -40°C to 85°C SOP-8 8 TUBE & REEL ACT520SH
ACT520ASH-T -40°C to 85°C SOP-8 8 TUBE & REEL ACT520ASH
SOP-8
ACT520SH
ORDERING INFORMATION
PIN NAME DESCRIPTION
3 GND Ground.
4 CS
Current Sense Pin. Connect an external resistor (RCS) between this pin and ground to set peak
current limit for the primary switch.
5 FB Feedback Pin. Connect this pin to optocouplers’s collector for output regulation.
6 VDET
Valley Detector Pin. Connect this pin to a resistor divider network from the auxiliary winding to
detect zero-crossing points for valley turn on operation.
7 RT Connected through a NTC resistor to ground for adjustable OTP, or empty if not used.
8 VDD Power Supply. This pin provides bias power for the IC during startup and steady state operation.
2 GATE Gate Drive. Gate driver for the external MOSFET transistor.
1 EN Connect this to the gate of the N-depletion FET.
SOP-8
ACT520ASH
ACT520/ACT520A
Rev 0, 05-Jun-15
Innovative PowerTM - 3 - www.active-semi.com
Copyright © 2015 Active-Semi, Inc.
ActiveQRTM is a trademark of Active-Semi.
ABSOLUTE MAXIMUM RATINGSc
ELECTRICAL CHARACTERISTICS
(VDD = 33V, LM = 0.27mH, RCS = 0.806, VOUT = 12V, NP = 34, NS =6, NA =16, TA = 25°C, unless otherwise specified.)
c: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods.
PARAMETER VALUE UNIT
FB, CS, VDET to GND -0.3 to + 6 V
VDD, GATE to GND -0.3 to + 45 V
Maximum Power Dissipation (SOP-8) 0.625 W
Operating Junction Temperature -40 to 150 ˚C
Junction to Ambient Thermal Resistance (JA) 160 ˚C/W
Storage Temperature -55 to 150 ˚C
Lead Temperature (Soldering, 10 sec) 300 ˚C
Maximum Continuous VDD Current 100 mA
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
Supply
VDD Turn-On Voltage VDDON V
DD Rising from 0V 16 18 20 V
VDD Turn-Off Voltage VDDOFF V
DD Falling after Turn-on 6.5 7.0 7.5 V
VDD Over Voltage Protection VDDOVP V
DD Rising from 0V 43 44 45 V
Start Up Supply Current IDDST VDD=16V, before VDD Turn-on
(with N-depletion FET) 10 µA
IDD Supply Current IDD VDD = 18V, after VDD Turn-on ,FB
floating 0.5 0.8 mA
IDD Supply Current at Standby IDDSTBY FB = 1.9V 0.2 0.3 mA
IDD Supply Current at Fault IDDFAULT Fault mode, FB Floating 250 µA
Feedback
FB Pull up Resistor RFB 15 k
CS to FB Gain ACS 2 V/V
VFB at Max Peak Current VFBPEAK 3 + VBE V
FB Threshold to Stop Switching VFBBM1 1.9 V
FB Threshold to Start Switching VFBBM2 1.95 V
Output Overload Threshold VFBOLP 3.75 V
OverLoad/Over Voltage Blanking
Time TOVBLANK 400 ms
Slope Compensation Slope 24 mV/µS
RT Source Current IOTP 20 µA
Trigger Voltage for OTP VOTP 1.25 V
RT Section
ACT520/ACT520A
Rev 0, 05-Jun-15
Innovative PowerTM - 4 - www.active-semi.com
Copyright © 2015 Active-Semi, Inc.
ActiveQRTM is a trademark of Active-Semi.
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
Current Limit
CS Current Limit Threshold VCSLIM 0.98 1 1.02 V
Leading Edge Blanking Time TCSBLANK 240 300 360 ns
GATE DRIVE
Gate High Level current source IOG_ON V
GATE = 5V 30 mA
Gate Rise Time TRISE VDD = 10V, CL = 1nF 250 350 ns
Gate Falling Time TFALL VDD = 10V, CL = 1nF 50 100 ns
Gate Low Level ON-Resistance RONLO I
SINK = 30mA 20
Gate High Level ON-Resistance RONHI I
SOURCE = 30mA 40
Gate Voltage VGATE VDD = 10V, CL = 1nF 11 V
Max Gate Voltage VG.MAX VDD = 45V, Switching 14 V
Gate Leakage Current GATE = 25V, before VDD
turn-on 1 µA
Oscillator
fMAX ACT520 130 kHz
ACT520A 90
Switching Frequency Foldback fMIN FB = 2.3V+VBE f
MAX/3 kHz
Maximum Duty Cycle DMAX 65 75 %
Valley Detection
ZCD Threshold Voltage VDETTH 100 mV
Valley Detection Time Window No valley detected, force
turn-on main switch 2.5 µs
VDET Leakage Current 1 µA
Protection
CS Short Waiting Time 2.5 µs
CS Short Detection Threshold 0.1 0.15 V
CS Open Threshold Voltage 2.5 V
Abnormal OCP Blanking Time 150 ns
Line UVLO IVDETUVLO 60 µA
Line OVP IVDETOVP 2.4 mA
VDET Over Voltage Protection VDETVOOVP 2.75 V
VDET Vo Short Threshold VDETVOshort 0.58 V
Maximum Switching Frequency
ELECTRICAL CHARACTERISTICS CONT’D
(VDD = 33V, LM = 0.27mH, RCS = 0.806, VOUT = 12V, NP = 34, NS =6, NA =16, TA = 25°C, unless otherwise specified.)
ACT520/ACT520A
Rev 0, 05-Jun-15
Innovative PowerTM - 5 - www.active-semi.com
Copyright © 2015 Active-Semi, Inc.
ActiveQRTM is a trademark of Active-Semi.
FUNCTIONAL BLOCK DIAGRAM
ACT520/ACT520A
Rev 0, 05-Jun-15
Innovative PowerTM - 6 - www.active-semi.com
Copyright © 2015 Active-Semi, Inc.
ActiveQRTM is a trademark of Active-Semi.
ACT520/ACT520A is a high performance peak
current mode low-voltage PWM controller IC. The
controller includes the most advance features that
are required in the adaptor applications up to 30
Watt. Unique fast startup, frequency foldback, QR
switching technique, accurate peak current line
compensation, idle mode, short winding protection,
OCP, OTP, OVP and UVLO are included in the
controller.
Startup
VDD is the power supply terminal for the ACT520/
ACT520A. During startup, the N-depletion FET will
be turned ON. Once VDD reaches VDDON voltage,
the ACT520/ACT520A will start switching and the N
-depletion FET is turned OFF. To startup with a big
capacitive load, a fast startup sequence is
implemented in ACT520/ACT520A. To eliminate the
initial current stress on the MOSFET, a soft startup
sequence is implemented in ACT520/ACT520A.
During startup period, the IC begins to operate with
minimum Ippk to minimize the switching stresses
for the main switch, output diode and transformers.
And then, the IC operates at maximum power
output to achieve fast rise time. After this, VOUT
reaches about 90% VOUT , the IC operates with a
‘soft-landing’ mode(decrease Ippk) to avoid output
overshoot.
Constant Voltage (CV) Mode Operation
In constant voltage operation, the
ACT520/ACT520A regulates its output voltage
through secondary side control circuit . The output
voltage information is sensed at FB pin through
OPTO coupling. The error signal at FB pin is
amplified through TL431 and OPTO circuit. When
the secondary output voltage is above regulation,
the error amplifier output voltage decreases to
reduce the switch current. When the secondary
output voltage is below regulation, the error
amplifier output voltage increases to ramp up the
switch current to bring the secondary output back to
regulation. The output regulation voltage is
determined by the following relationship:
where RF1 (R15) and RF2 (R16) are top and bottom
feedback resistor of the TL431.
Constant Current (CC) Mode Operation
When the secondary output current reaches a level
set by the internal current limiting circuit, the
ACT520/ACT520A enters current limit condition and
causes the secondary output voltage to drop. As
the output voltage decreases, so does the flyback
voltage in a proportional manner. An internal
current shaping circuitry adjusts the switching
frequency based on the flyback voltage so that the
transferred power remains proportional to the
output voltage, resulting in a constant secondary
side output current profile. The energy transferred
to the output during each switching cycle is ½(LP ×
ILIM^2) × , where LP is the transformer primary
inductance, ILIM is the primary peak current, and
is the conversion efficiency. From this formula, the
constant output current can be derived:
where fSW is the switching frequency and VOUTCV is
the nominal secondary output voltage.
There is an external resistor, Rline, connected in
series between CS pin and RCS. This resistor is
used to compensate for the line voltage.
No Load Idle Mode
In no load standby mode, the feedback voltage falls
below VFBBM2 and reaches VFBBM1,
ACT520/ACT520A stop switching. After it stops, as
a result of a feedback reaction, the feedback
voltage increases. When the feedback voltage
reaches VFBBM2, ACT520/ACT520A start switching
again. Feedback voltage drops again and output
voltage starts to bounds back and forward with very
small output ripple. ACT520/ACT520A leaves idle
mode when load is added strong enough to pull
feedback voltage exceed VFBBM2.
Figure 2:
Idle Mode
FUNCTIONAL DESCRIPTION
(1)
)
R
R
1(VV 2F
1F
431TL_REFOUTCV +×=
Ip
Vo
Vfb
t
Ip_FL
Ilim
Vfb_fl
Vfb_olp
2A
Vfbbm1
Io
12V
Vfbbm2
0A
)
Vf
()
R
V
(L
2
1
IOUTCV
SW
2
CS
CS
pOUTCC ×
×××=
η
(2)
ACT520/ACT520A
Rev 0, 05-Jun-15
Innovative PowerTM - 7 - www.active-semi.com
Copyright © 2015 Active-Semi, Inc.
ActiveQRTM is a trademark of Active-Semi.
Primary Inductor Current Limit
Compensation
The ACT520/ACT520A integrates a primary
inductor peak current limit compensation circuit to
achieve constant current over wide line and wide
inductance.
Frequency Foldback
When the load drops to 75% of full load level,
ACT520/ACT520A starts to reduce the switching
frequency, which is proportional to the load current
,to improve the efficiency of the converter.
ACT520/ACT520A’s load adaptive switching
frequency enables applications to meet all latest
green energy standards. The actual minimum
average switching frequency is programmable with
output capacitance, feedback circuit and dummy
load (while still meeting standby power).
Valley Switching
ACT520/ACT520A employed valley switching from
no load to heavy load to reduce switching loss and
EMI. In discontinuous mode operation, the resonant
voltage between inductance and parasitic
capacitance on MOSFET source pin is coupled by
auxiliary winding and reflected on VDET pin through
feedback network R5, R6. Internally, the VDET pin
is connected to an zero-crossing detector to
generate the switch turn on signal when the
conditions are meet.
Figure 3:
Valley Switching
Protection Features
The ACT520/ACT520A provides full protection
functions. The following table summarizes all
protection functions.
Auto-Restart Operation
ACT520/ACT520A will enter into auto-restart mode
when a fault is identified. There is a startup phase in
the auto-restart mode. After this startup phase the
conditions are checked whether the failure is still
present. Normal operation proceeds once the failure
mode is removed. Otherwise, new startup phase will
be initiated again.
To reduce the power loss during fault mode, the
startup delay control is implemented. The startup
delay time increases over lines.
FUNCTIONAL DESCRIPTION CONT’D
PROTECTION
FUNCTIONS
FAILURE
CONDITION
PROTECTION
MODE
VDD Over Voltage VDD > 44V
(4 duty cycle) Auto Restart
VVDET Over Volt-
age/No Voltage
VVD > 2.75V or
No switching
for 4 cycles
Auto Restart
Over Temperature VOTP
< 1.25V
Auto Restart
Short Winding/
Short Diode
VCS > 1.75V Auto Restart
Over Load/Open
Loop ( No CC)
IPK = ILIMIT or
VFB = 4V for
400ms
Auto Restart
Output Short
Circuit VDET < 0.58V Auto Restart
VDD Under Volt-
age VDD < 7V Auto Restart
Line Brown Out IVDETUVLO
< 60µA Auto Restart
Vdrain_gnd
t
DC voltage
T
TonPossible Valley turn on
V
ACT520/ACT520A
Rev 0, 05-Jun-15
Innovative PowerTM - 8 - www.active-semi.com
Copyright © 2015 Active-Semi, Inc.
ActiveQRTM is a trademark of Active-Semi.
TYPICAL APPLICATION
Design Example
The design example below gives the procedure for
rapid charger flyback converter using ACT520.
Refer to application circuit Figure 4, the design for a
QC2.0 application starts with the following
specification:
The operation for the circuit shown in Figure 4 is as
follows: the rectifier bridge D1D4 and the capacitor
C1/C2 convert the AC line voltage to DC bus
voltage. This voltage supplies the primary winding
of the transformer T1 and the startup circuit of Q2
and C4 to VDD pin of ACT520. The primary power
current path is formed by the transformer’s primary
winding, Q1, and the current sense resistor R9. The
resistors R3, R2, diode D5 and capacitor C3 create
a snubber clamping network that protects Q1 from
damage due to high voltage spike during Q1’s turn
off. The network consisting of capacitor C4, diode
D6 and resistor R4 provides a VDD supply voltage
for ACT520 from the auxiliary winding of the
transformer. The resistor R4 is optional, which
filters out spikes and noise to makes VDD more
stable. C4 is the decoupling capacitor of the supply
voltage and energy storage component for startup.
During power startup, the current charges C4
through startup mosfet Q2 from the rectified bus
voltage. The diode D8 and the capacitor C5/C6
rectify filter the output voltage. The resistor divider
consists of R15 and R16 programs the output
voltage. Since a bridge rectifier and bulk input
capacitors are used, the resulting minimum and
maximum DC input voltages can be calculated:
Where is the estimated circuit efficiency, fL is the
line frequency, tC is the estimated rectifier
conduction time, CIN is empirically selected to two
15µF electrolytic capacitors.
The maximum duty cycle is set to be 44% at low line
voltage 90VAC and the circuit efficiency is estimated
to be 83%. Then the maximum average input current
is:
The maximum input primary peak current:
The primary inductance of the transformer:
The maximum primary turns on time:
The ringing periods from primary inductance with
mosfet Drain-Source capacitor:
Design only an half ringing cycle at maximum load in
minimum low line, so secondly reset time:
Base on conservation of energy and transformer
transform identity, the primary to secondary turns
ratio NP/NS:
The auxiliary to secondary turns ratio NA/NS:
V80
F3083.0
)ms5.3
472 1
(182
902
C
)t
f21
(P2
V2V
2
IN
C
L
OUT
2MIN_INACMIN_INDC
≈
-
-
-
μ
η
×
×
××
×=
×
=
V375)V265(2
V2V
AC
AC)MAX(INDC)MAX(IN
=×=
×= (4)
Input Voltage Range 90VAC - 265VAC, 50/60Hz
Output Power, PO18W
Output Voltage, VOUTCV 12/9/5V
Full Load Current, IOUTFL 1.5A
Constant Current, IOUTCC 1.5-1.9A
System Efficiency CV, η 0.83 A23.1
44.0 2712
DL2
IMAX
N
I
PPK =
×
=
×
=(6)
mH27.0
k110A23.1 44.080 fI DV
LsLIM
maxMIN_INDC
p
≈
×
×
=
×
=(7)
s15.4
80 A23.1mH27.0 VI
LT MIN_INDC
LIM
pMAX_ON
μ
=
×
=
=(8)
s06.1PF100%)71(mH27.014.32
CL2T MAX_DSMAX_pMAX_RINGING
μ
π
=×+×××=
=(9)
s41.4s06.15.0s15.4kHz110/1 T5.0TTT MAX_RINGINGMAX_ONSWRST
μμμ
=×=
=
--
-- (10)
1.6
3
5
.01
2
80
41.4 15.4 VVV
T
T
N
N
DOUT
MIN_IN
RST
ON
S
P
=
+
×=
+
×=
(11)
63.2
35.012 45.032
VV 'VV
N
N
DOUT
DDD
S
A=
+
+
=
+
+
=(12)
mA271
83.080 5.112 VIV
IMIN_INDC
OUTOUT
MAX_IN
=
×
×
=
×
×
=
η
(5)
(3)
ACT520/ACT520A
Rev 0, 05-Jun-15
Innovative PowerTM - 9 - www.active-semi.com
Copyright © 2015 Active-Semi, Inc.
ActiveQRTM is a trademark of Active-Semi.
TYPICAL APPLICATION CONT’D
An EI16+ core is selected for the transformer. From
the manufacture’s catalogue recommendation, the
gapped core with an effective inductance ALE of
0.234 µH/T2 is selected. The turn of the primary
winding is:
The turns of secondary and auxiliary winding can be
derived accordingly:
Determining the value of the current sense resistor
(R9) uses the peak current in the design. Since the
ACT520 internal current limit is set to 1V, the design
of the current sense resistor is given by:
The voltage feedback resistors are selected
according to the Ioccmax and Vo. The design Io_cc
max is given by:
The design Vo is given by:
Where k is IC constant and K=14530, then we can
get the value:
When selecting the output capacitor, a low ESR
electrolytic capacitor is recommended to minimize
ripple from the current ripple. The approximate
equation for the output capacitance value is given
by:
Two 330µF electrolytic capacitors are used to keep
the ripple small.
PCB Layout Guideline
Good PCB layout is critical to have optimal
performance. Decoupling capacitor (C4) and
feedback resistor (R5/R6) should be placed close to
VDD and FB pin respectively. There are two main
power path loops. One is formed by C1/C2, primary
winding, mosfet transistor and current sense
resistor (R9). The other is secondary winding,
rectifier D8 and output capacitors (C5/C6). Keep
these loop areas as small as possible. Connecting
high current ground returns, the input capacitor
ground lead, and the ACT520/ACT520A GND pin to
a single point (star ground configuration).
T34
T/H234.0 mH27.0
A
L
N2
LE
P
P===
μ
(13)
T634
1.61
N
N
N
Np
p
s
S≈×=×= (14)
T16663.2N
N
N
Ns
S
A
A≈×=×= (15)
Ω
η
806.0
83.0kHz110mH27.0 126.12 1
FL VI2 V
R
systemSWP
OUTMAX_OUT
CS
CS
≈
××
××
=
××
××
=
(16)
(17)
Ddet
a
s
2det
1det
oVV
N
N
)
R
R
1(V −××+= (18)
K8.6R,K115R 2det1det == (19)
F291
mV50k110 6.1
Vf I
C
RIPPLE
sw
OUT
OUT
μ
=
×
=
×
=(20)
sw_f
cs
cs
p
DO
2det1det
2det1det
s
p
sK
R
V
L
VV
RR RR
N
N
f
××
+
×
+
×
×=
ACT520/ACT520A
Rev 0, 05-Jun-15
Innovative PowerTM - 10 - www.active-semi.com
Copyright © 2015 Active-Semi, Inc.
ActiveQRTM is a trademark of Active-Semi.
Figure 4:
Universal VAC Input, 12/9/5V 1.5A rapid Charger
Figure 5:
Output CCCV curve
14
12
10
8
6
4
2
0
Output Voltage (V)
Output Current (mA)
0 600 1200 1800
V-I Characteristic vs. VIN (25˚C)
ACT520/ACT520A
Rev 0, 05-Jun-15
Innovative PowerTM - 11 - www.active-semi.com
Copyright © 2015 Active-Semi, Inc.
ActiveQRTM is a trademark of Active-Semi.
Table 1:
ACT520 18W Rapid Charger Bill of Materials
ITEM REFERENCE DESCRIPTION QTY MANUFACTURER
1U1 IC, ACT520SH,SOP-8 1Active-Semi.
2U2 OPTO,EL3H7D,CTR:300-600%,4PIN SMD 1EVERLIGHT
3U3 TL431A, Ref=2.5V,1%,SOT23-3 1TI
4U4 IC, ACT4613SH201-T,SOP-8 1Active-Semi.
5C1,2 Capacitor, Electrolytic,15uF/400V, 8x14mm 2RUBYCON
6C11,C8 Capacitor, Ceramic, 1000pF/500V, 0805,SMD 2POE
7C4 Capacitor, Ceramic,33uF/50V, 1206 1POE
8C5,C6 Capacitor, Solid, 330uF/16V, 8x12mm 2KSC
9C9,10 Capacitor, Ceramic, 0.1uF/50V, 0805,SMD 2POE
10 C7 Capacitor, Ceramic, 100pF/25V, 0805,SMD 1POE
11 CY1 Safety Y1,Capacitor,1000pF/400V,Dip 1UXT
12 BD1 BP06,1000V/1.0A,SDIP 1PANJIT
13 D5,D6 Fast Recovery Rectifier, RS1M,1000V/1.0A, RMA 2 PANJIT
14 D8 Diode, Schottky, 100V/15A, TO-247AB 1 Diodes
15 LF1 CM Inductor, 27mH, EE8.3,D=0.2mm,90T 1APY(安品源科技)
16 Q1 N-Mosfet Transistor, 4N60,TO-220 1AUK
17 Q2 N-Mosfet, Depletion mode,CSF501D,20mA/600V,SOT23 1HuiJing
18 PCB1 PCB, L*W*T=39x39x1.0mm,FR-4,Rev:A 1Jintong
19 F1 Fuse,2A/250V 1TY-OHM
20 R1,4 Chip Resistor, 22 ohm, 0805, 5% 2TY-OHM
21 R2,23 Chip Resistor, 100 ohm, 0805, 5% 2TY-OHM
22 R3,3A,7 Carbon Resistor, 510K ohm, 1206, 5% 3TY-OHM
23 R5 Chip Resistor, 115K ohm, 0805,1% 1TY-OHM
24 R6 Chip Resistor, 6.8K ohm, 0805, 1% 1TY-OHM
25 R8 Chip Resistor, 820 ohm, 0805, 5% 1TY-OHM
28 R12 Chip Resistor, 1.1k ohm, 0805,5% 1TY-OHM
29 R14,26 Chip Resistor, 3.3k ohm, 0805, 5% 2TY-OHM
30 R15 Chip Resistor, 10.5K ohm, 0805, 1% 1TY-OHM
31 R16 Chip Resistor, 10.2K ohm, 0805, 1% 1TY-OHM
32 R17 Chip Resistor, 6.49K ohm, 0805, 1% 1TY-OHM
33 R18 Chip Resistor, 8.66K ohm, 0805, 1% 1TY-OHM
34 R24 Chip Resistor, 20k ohm, 0805, 5% 1TY-OHM
35 T1 Transformer, Lp=0.27mH, EI16+ 1APY(安品源科技)
36 NR1 Thermal resistor, SC053 1TY-OHM
37 VR1 10D471 1TY-OHM
38 USB1 Small standard USB connector. 1TY-OHM
39 R19,20 NC
26 R9 Chip Resistor, 0.806 ohm,1206 , 1% 1TY-OHM
27 R11 Chip Resistor, 510 ohm, 0805, 5% 1TY-OHM
ACT520/ACT520A
Rev 0, 05-Jun-15
Innovative PowerTM - 12 - www.active-semi.com
Copyright © 2015 Active-Semi, Inc.
ActiveQRTM is a trademark of Active-Semi.
TYPICAL PERFORMANCE CHARACTERISTICS
ACT520/ACT520A-001
VDD Turn on Voltage vs. Temperature
18.9
18.8
18.7
18.6
18.5
18.4
18.3
18.2
VDDON (V)
Temperature (°C)
0 40 12080 -40
ACT520/ACT520A-002
Startup Supply Current vs. Temperature
Startup Supply Current (µA)
ACT520/ACT520A-003
Static current vs. Temperature
Supply Current (µA)
1000
990
980
1010
1020
1030
ACT520/ACT520A-004
Maximum Switching Frequency vs.
Temperature
90
50
30
70
110
130
150
Maximum Switching Frequency (KHz)
5
4
3
2
1
0
Temperature (°C)
0 40 12080 -40
Temperature (°C)
0 40 12080 -40
Temperature (°C)
0 40 12080 -40
ACT520
ACT520A
ACT520/ACT520A
Rev 0, 05-Jun-15
Innovative PowerTM - 13 - www.active-semi.com
Copyright © 2015 Active-Semi, Inc.
ActiveQRTM is a trademark of Active-Semi.
PACKAGE OUTLINE
SOP-8 PACKAGE OUTLINE AND DIMENSIONS
Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each
product to make sure that it is suitable for th eir applicatio ns. Active-Se mi products are not inten ded or aut horized for use
as critical components in life-support devices or systems. Active-Semi, Inc. does not assume any liability arising out of
the use of any product or circuit described in this datasheet, nor does it convey any patent license.
Active-Semi and its logo are trademarks of Active-Semi, Inc. F or more info rmation on this and other products, contact
sales@active-semi.com or visit http://www.active-semi.com.
is a registered trademark of Active-Semi.
Note: Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed
0.15mm per end. Dimension E1 does not include flash or protrusion.
