D2TO20 www.vishay.com Vishay Sfernice Surface Mount Power Resistor Thick Film Technology FEATURES DESIGN SUPPORT TOOLS click logo to get started Models Available * AEC-Q200 qualified * 20 W at 25 C case temperature * Surface mounted resistor - TO-263 (D2PAK) style package * Wide resistance range from 0.01 to 550 k * Non inductive * Resistor isolated from metal tab * Solder reflow secure at 270 C/10 s * Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 DIMENSIONS in millimeters 4.5 1.25 10.5 Footprint recommendation for solderable contact area: 7.8 min. 1.25 8.7 11.00 1.6 1.50 8.8 8.1 4.02 6.50 8.00 15.4 10.1 5.15 0.2 7.6 2.49 4.00 5 2.8 2.2 1.6 2.40 0.3 0.26 5.08 2 4.5 Tolerance: 0.3 mm Notes * For the assembly on board, we recommend the lead (Pb)-free thermal profile as per J-STD-020C * Power dissipation is 3.1 W at an ambient temperature of 25 C when mounted on a double sided copper board using FR4 HTG, 70 m of copper, 39 mm x 30 mm x 1.6 mm, with thermal vias STANDARD ELECTRICAL SPECIFICATIONS MODEL SIZE RESISTANCE RANGE D2TO20 TO-263 0.01 to 550K RATED POWER LIMITING ELEMENT TOLERANCE P25 C VOLTAGE UL % W V 20 500 1, 2, 5, 10 TEMPERATURE COEFFICIENT ppm/C CRITICAL RESISTANCE 150, 250, 700, 1100 12.5K MECHANICAL SPECIFICATIONS TECHNICAL SPECIFICATIONS Mechanical Protection Power Rating and Thermal Resistance of the Component Temperature Coefficient Standard Dielectric Strength IEC 60115-1 Insulation Resistance Inductance Resistive Element Substrate Connections Weight Molded Thick film Alumina Tinned copper 2.2 g max. ENVIRONMENTAL SPECIFICATIONS Temperature Range Flammability Revision: 29-Mar-16 20 W at 25 C (case temperature) RTH (j - c): 6.5 C/W See Special Feature table 150 ppm/C 2000 VRMS - 1 min - 10 mA max. (between terminals and board) 106 M 0.1 H -55 C to 155 C IEC 60695-11-5 DIMENSIONS 2 applications 30 s separated by 60 s Standard Package TO-263 style (D2PAK) Document Number: 51055 1 For technical questions, contact: sferfixedresistors@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 D2TO20 www.vishay.com Vishay Sfernice SPECIAL FEATURES Resistance Values 0.010 0.045 Tolerances Requirement Temperature Coefficient (TCR) (-55 C +150 C) IEC 60115-1 0.1 0.5 250 ppm/C 150 ppm/C 1 % at 10 % 1100 ppm/C 700 ppm/C PERFORMANCE TESTS Momentary Overload Load Life High Temperature Exposure Temperature Cycling Moisture Resistance Biased Humidity Operational Life ESD Human Body Model Vibration Mechanical Shock Board Flex Terminal Strength CONDITIONS REQUIREMENTS IEC 60115-1 4.13 2 Pr 5 s for R < 2 1.5 Pr 5 s for R 2 US < 1.5 UL IEC 60115-1 1000 h, 90/30 Pr at +25 C AEC-Q200 REV D conditions: MIL-STD-202 method 108 1000 h, +175 C, unpowered Pre-conditioning 3 reflows according JESTD020D IEC 60068-2-14 test Na 1000 cycles, -55 C/+175 C Dwell time - 15 min AEC-Q200 REV D conditions: MIL-STD-202 method 106 10 cycles, 24 h, unpowered AEC-Q200 REV D conditions: MIL-STD-202 method 103 1000 h, 85C, 85 % RH AEC-Q200 REV D conditions: Pre-conditioning 3 reflows according JESTD020D MIL-STD-202 method 108 2000 h, 90/30, powered, +125 C AEC-Q200 REV D conditions: AEC-Q200-002 25 kVAD AEC-Q200 REV D conditions: MIL-STD-202 method 204 5 g's for 20 min, 12 cycles test from 10 Hz to 2000 Hz (0.25 % + 0.005 ) (1 % + 0.005 ) (0.25 % + 0.005 ) (0.5 % + 0.005 ) (0.5 % + 0.005 ) (1 % + 0.005 ) (1 % + 0.005 ) (0.5 % + 0.005 ) (0.5 % + 0.005 ) AEC-Q200 REV D conditions: MIL-STD-202 method 213 100 g's, 6 ms, 3.75 m/s 3 shocks/direction (0.5 % + 0.005 ) AEC-Q200 REV D conditions: AEC-Q200-005 Bending 2 mm/60 s AEC-Q200 REV D conditions: AEC-Q200-006 1.8 kgf/60 s (0.25 % + 0.01 ) (0.25 % + 0.01 ) ASSEMBLY SPECIFICATIONS For the assembly on board, we recommend the lead (Pb)-free thermal profile as per J-STD-020C TESTS Resistance to Soldering Heat Moisture Sensitivity Level (MSL) Revision: 29-Mar-16 CONDITIONS REQUIREMENTS IEC 60115-1 IEC 60068-2-58 Solder bath method: 270 C/10 s (0.5 % + 0.005 ) IPC/JEDEC(R) J-STD-020C 85 C/85 % RH/168 h Level: 1 + pass requirements of TCR overload and dielectric strength after MSL Document Number: 51055 2 For technical questions, contact: sferfixedresistors@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 D2TO20 www.vishay.com Vishay Sfernice CHOICE OF THE BOARD The user must choose the board according to the working conditions of the component (power, room temperature). Maximum working temperature must not exceed 175 C. The dissipated power is simply calculated by the following ratio: 1 T P = ------------------------------------------------------------------------------------------R TH (j - c) + R TH (c - h) + R TH (h - a) P: Expressed in W T: Difference between maximum working temperature and room temperature or fluid cooling temperature RTH (j - c): Thermal resistance value measured between resistive layer and outer side of the resistor. It is the thermal resistance of the component: 6.5 C/W. RTH (c - h): Thermal resistance value measured between outer side of the resistor and upper side of the board. This is the thermal resistance of the solder layer. RTH (h - a): Thermal resistance of the board. Example: RTH (c - h) + RTH (h - a) for D2TO20 power rating 2.5 W at ambient temperature +25 C. Thermal resistance RTH (j - c): 6.5 C/W Considering equation (1) we have: T = 155 C - 25 C = 130 C RTH (j - c) + RTH (c - h) + RTH (h - a) = T/P = 130/2.5 = 52 C/W RTH (c - h) + RTH (h - a) = 52 C/W - 6.5 C/W = 45.5 C/W Single Pulse: These informations are for a single pulse on a cold resistor at 25 C (not already used for a dissipation) and for pulses of 100 ms maximum duration. The formula used to calculate E is: 2 U- x t E = P x t = ------R with: E (J): Pulse energy P (W): Pulse power t (s): Pulse duration U (V): Pulse voltage R (W): Resistor The energy calculated must be less than that allowed by the graph. Revision: 29-Mar-16 Document Number: 51055 3 For technical questions, contact: sferfixedresistors@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 D2TO20 www.vishay.com Vishay Sfernice OVERLOADS POWER RATING In any case the applied voltage must be lower than the maximum overload voltage of 750 V. The values indicated on the graph below are applicable to resistors in air or mounted onto a board. The temperature of the case should be maintained within the limits specified. RATED POWER IN % ENERGY CURVE 100 ENERGY IN JOULES 120 10 1 100 75 50 25 0.1 0 0.01 0 20 40 60 80 100 120 140 155 CASE TEMPERATURE IN C 0.001 10-7 10-6 10-5 10-4 10-3 10-2 10-1 PACKAGING OVERLOAD DURATION IN s * Reel * Tube * Tape dimensions (mm) for reel: POWER CURVE 100 000 16 POWER IN W 5.3 10 000 16.4 24 11 1000 MARKING 100 10-7 10-6 10-5 10-4 10-3 10-2 10-1 Model, style, resistance value (in ), tolerance (in %), manufacturing date, Vishay Sfernice trademark OVERLOAD DURATION IN s Revision: 29-Mar-16 Document Number: 51055 4 For technical questions, contact: sferfixedresistors@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 D2TO20 www.vishay.com Vishay Sfernice ORDERING INFORMATION D2TO 020 C 100 K 1% XXX e3 MODEL STYLE CONNECTIONS RESISTANCE VALUE TOLERANCE CUSTOM DESIGN LEAD (Pb)-FREE F=1% G=2% J=5% K = 10 % Optional on request: Shape, etc. SAP PART NUMBERING GUIDELINES D 2 T O 0 2 0 C R 2 0 0 0 K R E 3 GLOBAL MODEL SIZE LEADS OHMIC VALUE TOLERANCE PACKAGING LEAD (Pb)-FREE D2TO 020 C = Surface mount The first four digits are significant figures and the last digit specifies the number of zeros to follow. R designates decimal point. 48R70 = 48.7 48701 = 48 700 10002 = 100 000 R0100 = 0.01 R6800 = 0.68 27000 = 2700 = 2.7 k F=1% G=2% J=5% K = 10 % R = Reel 500 pieces T = Tube 50 pieces E3 = Pure tin Revision: 29-Mar-16 Document Number: 51055 5 For technical questions, contact: sferfixedresistors@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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